* Linux CAN-bus device driver.
* The card support added by Paolo Grisleri <grisleri@ce.unipr.it>
* This software is released under the GPL-License.
- * Version lincan-0.2 9 Jul 2003
+ * Version lincan-0.3 17 Jun 2004
*/
#include "../include/can.h"
{
address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
*(EMS_CPCPCI_BYTES_PER_REG-1));
- readb(data,address);
+ writeb(data,address);
}
unsigned ems_cpcpci_read_register(unsigned long address)
{
address += ((address&(EMS_CPCPCI_BYTES_PER_CIRCUIT-1))
*(EMS_CPCPCI_BYTES_PER_REG-1));
- return inb(address);
+ return readb(address);
}
int ems_cpcpci_reset(struct candevice_t *candev)
if(!candev->chip[chip_nr]) continue;
chip=candev->chip[chip_nr];
- ems_cpcpci_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
+ ems_cpcpci_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=ems_cpcpci_read_register(chip->chip_base_addr+SJACDR);
- ems_cpcpci_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+ ems_cpcpci_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
i=20;
ems_cpcpci_write_register(0, chip->chip_base_addr+SJAMOD);
- while (ems_cpcpci_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
+ while (ems_cpcpci_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
if(!i--) return -ENODEV;
udelay(1000);
ems_cpcpci_write_register(0, chip->chip_base_addr+SJAMOD);
}
cdr=ems_cpcpci_read_register(chip->chip_base_addr+SJACDR);
- ems_cpcpci_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+ ems_cpcpci_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
ems_cpcpci_write_register(0, chip->chip_base_addr+SJAIER);
int ems_cpcpci_init_chip_data(struct candevice_t *candev, int chipnr)
{
-
if(candev->sysdevptr.pcidev==NULL)
return -ENODEV;
+ sja1000p_fill_chipspecops(candev->chip[chipnr]);
+
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
- candev->chip[chipnr]->chip_type="sja1000p";
candev->chip[chipnr]->chip_base_addr = candev->io_addr+
0x400 + chipnr*EMS_CPCPCI_BYTES_PER_CIRCUIT;
candev->chip[chipnr]->flags = 0;
candev->chip[chipnr]->int_cpu_reg = 0;
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
- candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
+ candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
candev->chip[chipnr]->sja_ocr_reg = EMS_CPCPCI_OCR_DEFAULT_STD;
candev->chip[chipnr]->clock = 8000000;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;