int i=0;
unsigned flags;
- disable_irq(chip->chip_irq);
+ can_disable_irq(chip->chip_irq);
flags=can_read_reg(chip,SJACR);
}
if (i>=10) {
CANMSG("Reset error\n");
- enable_irq(chip->chip_irq);
+ can_enable_irq(chip->chip_irq);
return -ENODEV;
}
return -ENODEV;
}
- enable_irq(chip->chip_irq);
+ can_enable_irq(chip->chip_irq);
return 0;
}
}
-irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+can_irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
{
unsigned irq_register;
struct chip_t *chip=(struct chip_t *)dev_id;
// can_read_reg(chip, SJASR));
if ((irq_register & (IR_WUI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0)
- return IRQ_NONE;
+ return CAN_IRQ_NONE;
if ((irq_register & IR_RI) != 0)
sja1000_irq_read_handler(chip, obj);
if ((irq_register & IR_TI) != 0) {
- set_bit(OBJ_TX_REQUEST,&obj->flags);
- while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
- clear_bit(OBJ_TX_REQUEST,&obj->flags);
+ can_msgobj_set_fl(obj,TX_REQUEST);
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+ can_msgobj_clear_fl(obj,TX_REQUEST);
if (can_read_reg(chip, SJASR) & SR_TBS)
sja1000_irq_write_handler(chip, obj);
- clear_bit(OBJ_TX_LOCK,&obj->flags);
- if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
}
}
}
}
- return IRQ_HANDLED;
+ return CAN_IRQ_HANDLED;
}
void sja1000_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj)
id = can_read_reg(chip, SJARXID0) | (can_read_reg(chip, SJARXID1)<<8);
obj->rx_msg.length = len = id & 0x0f;
obj->rx_msg.flags = id&ID0_RTR ? MSG_RTR : 0;
+ #ifdef CAN_MSG_VERSION_2
+ obj->rx_msg.timestamp.tv_sec = 0;
+ obj->rx_msg.timestamp.tv_usec = 0;
+ #else /* CAN_MSG_VERSION_2 */
obj->rx_msg.timestamp = 0;
+ #endif /* CAN_MSG_VERSION_2 */
obj->rx_msg.cob = 0;
obj->rx_msg.id = id>>5;
*/
int sja1000_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
{
- /* dummy lock to prevent preemption fully portable way */
- can_spinlock_t dummy_lock;
+ can_preempt_disable();
- /* preempt_disable() */
- can_spin_lock_init(&dummy_lock);
- can_spin_lock(&dummy_lock);
-
- set_bit(OBJ_TX_REQUEST,&obj->flags);
- while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
- clear_bit(OBJ_TX_REQUEST,&obj->flags);
+ can_msgobj_set_fl(obj,TX_REQUEST);
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+ can_msgobj_clear_fl(obj,TX_REQUEST);
if (can_read_reg(chip, SJASR) & SR_TBS)
sja1000_irq_write_handler(chip, obj);
- clear_bit(OBJ_TX_LOCK,&obj->flags);
- if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
}
- /* preempt_enable(); */
- can_spin_unlock(&dummy_lock);
+ can_preempt_enable();
return 0;
}