* Rewritten for new CAN queues by Pavel Pisa - OCERA team member
* email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
- * Version lincan-0.2 9 Jul 2003
+ * Version lincan-0.3 17 Jun 2004
*/
/* This file is intended as a bfadcan file for currently unsupported hardware.
#include "../include/can.h"
#include "../include/can_sysdep.h"
#include "../include/main.h"
-#include "../include/i82527.h"
#include "../include/sja1000p.h"
#define __NO_VERSION__
#include <linux/module.h>
-long clock_freq;
-MODULE_PARM(clock_freq,"i");
+#define CAN_BFAD_CLOCKFREQ 20000000
/* cli and sti are not allowed in 2.5.5x SMP kernels */
#ifdef WINDOWED_ACCESS
-can_spinlock_t bfadcan_win_lock=SPIN_LOCK_UNLOCKED;
+static CAN_DEFINE_SPINLOCK(bfadcan_win_lock);
#endif
/*
#define IO_RANGE 0x100
#endif
-unsigned bfadcan_read_register(unsigned long address);
-void bfadcan_write_register(unsigned char data, unsigned long address);
+unsigned bfadcan_read_register(can_ioptr_t address);
+void bfadcan_write_register(unsigned data, can_ioptr_t address);
/**
{
int i;
- struct chip_t *chip=candev->chip[0];
+ struct canchip_t *chip=candev->chip[0];
unsigned cdr;
- bfadcan_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
+ bfadcan_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=bfadcan_read_register(chip->chip_base_addr+SJACDR);
- bfadcan_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+ bfadcan_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
bfadcan_write_register(0, chip->chip_base_addr+SJAIER);
i=20;
bfadcan_write_register(0, chip->chip_base_addr+SJAMOD);
- while (bfadcan_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
+ while (bfadcan_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
if(!i--) return -ENODEV;
udelay(1000);
bfadcan_write_register(0, chip->chip_base_addr+SJAMOD);
}
cdr=bfadcan_read_register(chip->chip_base_addr+SJACDR);
- bfadcan_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+ bfadcan_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
bfadcan_write_register(0, chip->chip_base_addr+SJAIER);
return 0;
}
-#define CHIP_TYPE "sja1000p"
/**
* bfadcan_init_chip_data - Initialize chips
* @candev: Pointer to candevice/board structure
* The @clock entry holds the chip clock value in Hz.
* The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
* register. Options defined in the %sja1000.h file:
- * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
+ * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
* The entry @sja_ocr_reg holds hardware specific options for the Output Control
* register. Options defined in the %sja1000.h file:
- * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
- * %OCR_TX0_LH, %OCR_TX1_ZZ.
+ * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
+ * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
* The entry @int_clk_reg holds hardware specific options for the Clock Out
* register. Options defined in the %i82527.h file:
* %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
int bfadcan_init_chip_data(struct candevice_t *candev, int chipnr)
{
unsigned int id1, id2;
- candev->chip[chipnr]->chip_type=CHIP_TYPE;
- candev->chip[chipnr]->chip_base_addr=candev->io_addr;
- candev->chip[chipnr]->clock = clock_freq;
- candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
- candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
- candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
- candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
- candev->chip[chipnr]->sja_ocr_reg = OCR_MODE_NORMAL |
- OCR_TX0_LH;
- id1 = inb(0xe284);
- id2 = inb(0xe285);
+ sja1000p_fill_chipspecops(candev->chip[chipnr]);
+ candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(candev->io_addr);
+ if(candev->chip[chipnr]->clock<=0)
+ candev->chip[chipnr]->clock = CAN_BFAD_CLOCKFREQ;
+ candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
+ candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
+ id1 = can_inb(0xe284);
+ id2 = can_inb(0xe285);
- CANMSG("can driver ver lincan-0.2, at %04lx, CPLD v%d.%d.%d.%d\n",
- candev->chip[chipnr]->chip_base_addr,
- id1>>4, id1&0x0f, id2>>4, id2&0x0f);
+ CANMSG("can driver ver lincan-0.3, at %04lx, CPLD v%d.%d.%d.%d\n",
+ can_ioptr2ulong(candev->chip[chipnr]->chip_base_addr),
+ id1>>4, id1&0x0f, id2>>4, id2&0x0f);
return 0;
* Return Value: The function always returns zero
* File: src/bfadcan.c
*/
-int bfadcan_init_obj_data(struct chip_t *chip, int objnr)
+int bfadcan_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
- chip->msgobj[objnr]->flags=0;
return 0;
}
* Return Value: The function does not return a value
* File: src/bfadcan.c
*/
-void bfadcan_write_register(unsigned char data, unsigned long address)
+void bfadcan_write_register(unsigned data, can_ioptr_t address)
{
#ifdef WINDOWED_ACCESS
can_spin_irqflags_t flags;
can_spin_lock_irqsave(&bfadcan_win_lock,flags);
- outb(address&0x00ff,0x200);
- outb(data, 0x201);
+ can_outb(can_ioptr2ulong(address)&0x00ff,0x200);
+ can_outb(data, 0x201);
can_spin_unlock_irqrestore(&bfadcan_win_lock,flags);
#else
- outb(data,address);
+ can_outb(data,address);
#endif
}
* Return Value: The function returns the value stored in @address
* File: src/bfadcan.c
*/
-unsigned bfadcan_read_register(unsigned long address)
+unsigned bfadcan_read_register(can_ioptr_t address)
{
#ifdef WINDOWED_ACCESS
can_spin_irqflags_t flags;
int ret;
can_spin_lock_irqsave(&bfadcan_win_lock,flags);
- outb(address&0x00ff,0x200);
- ret = inb(0x201);
+ can_outb(can_ioptr2ulong(address)&0x00ff,0x200);
+ ret = can_inb(0x201);
can_spin_unlock_irqrestore(&bfadcan_win_lock,flags);
return ret;
#else
- return inb(address);
+ return can_inb(address);
#endif
}
projects / lincan.git / blobdiff