return 0;
}
+
+/**
+ * sja1000p_set_bittiming: - set bittiming according to already computed parameters.
+ * @chip: pointer to chip state structure
+ * @bpr: baud rate prescaler
+ * @sjw: synchronization jump width in bittime quanta
+ * @tseg1: length of the segment 1 in bittime quanta
+ * @tseg2: length of the segment 2 in bittime quanta
+ *
+ * Return Value: negative value reports error.
+ * File: src/sja1000p.c
+ */
+int sja1000p_set_bittiming(struct canchip_t *chip, int brp, int sjw, int tseg1, int tseg2)
+{
+ uint8_t sam3times = 0; /* 0 = the bus is sampled once */
+
+ if((--brp)<0)
+ return -EINVAL;
+
+ if((--sjw)<0)
+ return -EINVAL;
+
+ if((--tseg1)<0)
+ return -EINVAL;
+
+ if((--tseg2)<0)
+ return -EINVAL;
+
+
+
+ if (sja1000p_enable_configuration(chip))
+ return -ENODEV;
+
+ can_write_reg(chip, sjw<<6 | brp, SJABTR0);
+ can_write_reg(chip, (sam3times<<7) | (tseg2<<4) | tseg1, SJABTR1);
+
+ sja1000p_disable_configuration(chip);
+
+ return 0;
+}
+
+/**
+ * sja1000p_get_bittiming_const: - obtain description of chip bittiming calculation.
+ * @chip: pointer to chip state structure
+ * @btc: pointer to the structure filled by data
+ *
+ * Return Value: negative value reports error.
+ * File: src/sja1000p.c
+ */
+int sja1000p_get_bittiming_const(struct canchip_t *chip, struct can_bittiming_const *btc)
+{
+ btc->tseg1_min = 1;
+ btc->tseg1_max = 16; /* sjaMAX_TSEG1+1 */
+ btc->tseg2_min = 1;
+ btc->tseg2_max = 8; /* sjaMAX_TSEG2+1 */
+ btc->sjw_max = 4;
+ btc->brp_min = 1;
+ btc->brp_max = 64;
+ btc->brp_inc = 1;
+
+ return 0;
+}
+
+
/**
* sja1000p_read: - reads and distributes one or more received messages
* @chip: pointer to chip state structure
chipspecops->stop_chip=sja1000p_stop_chip;
chipspecops->irq_handler=sja1000p_irq_handler;
chipspecops->irq_accept=NULL;
+ chipspecops->set_bittiming=sja1000p_set_bittiming;
+ chipspecops->get_bittiming_const=sja1000p_get_bittiming_const;
return 0;
}