int can_lmc1_init_chip_data(struct candevice_t *candev, int chipnr){
- struct can_bittiming_const *btc;
struct can_lmc1_chip_data *chip_data;
// used CAN1 peripherial -> CAN1 registers base
chip_data = (struct can_lmc1_chip_data*) candev->chip[chipnr]->chip_data;
-
- btc = &chip_data->btc;
-
- // set bittiming constants
- btc->tseg1_min = 1;
- btc->tseg1_max = 16;
- btc->tseg2_min = 1;
- btc->tseg2_max = 8;
- btc->sjw_max = 4;
- btc->brp_min = 1;
- btc->brp_max = 1024;
- btc->brp_inc = 1;
+ chip_data->flags = 0;
return 0;
}
int best_tseg=0, best_brp=0, best_rate=0, brp=0;
int tseg=0, tseg1=0, tseg2=0;
- struct can_lmc1_chip_data *chip_data = (struct can_lmc1_chip_data*) chip->chip_data;
+ struct can_bittiming_const btc_buff;
+ struct can_bittiming_const *btc = &btc_buff;
- struct can_bittiming_const *btc = &chip_data->btc;
+ chip->chipspecops->get_bittiming_const(chip, btc);
/* tseg even = round down, odd = round up */
for (tseg=(0+0+2)*2; tseg<=(btc->tseg2_max+btc->tseg1_max+2)*2+1; tseg++) {
int lpc17xx_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
+ uint32_t i=0;
+ // check status of TB1
+ while (!(can_read_reg(chip, CAN_SR_o) & CAN_SR_TBS1)){
+ if(i++<MAX_TRANSMIT_WAIT_LOOPS)
+ continue;
+
+ // request command to abort transmission request
+ can_write_reg(chip, CAN_CMR_AT, CAN_CMR_o);
+ return 0;
+ }
+
CAN_send(chip, msg);
return 0;
if(i++<MAX_TRANSMIT_WAIT_LOOPS)
continue;
+ CANMSG("Abort transmission request\n");
+
// request command to abort transmission request
can_write_reg(chip, CAN_CMR_AT, CAN_CMR_o);
break;
uint32_t i;
struct msgobj_t *obj;
obj = chip->msgobj[0];
-
i = can_read_reg(chip, CAN_ICR_o);
//debug print
- printf("BRP: %d, SJW: %d, TSEG1: %d, TSEG2: %d \n", brp+1, sjw+1, tseg1+1, tseg2+1);
+ CANMSG("BRP: %d, SJW: %d, TSEG1: %d, TSEG2: %d \n", brp+1, sjw+1, tseg1+1, tseg2+1);
can_disable_irq(chip->chip_irq);
return 0;
}
+int lpc17xx_get_bittiming_const(struct canchip_t *chip, struct can_bittiming_const *btc) {
+ btc->tseg1_min = 1;
+ btc->tseg1_max = 16;
+ btc->tseg2_min = 1;
+ btc->tseg2_max = 8;
+ btc->sjw_max = 4;
+ btc->brp_min = 1;
+ btc->brp_max = 1024;
+ btc->brp_inc = 1;
+
+ return 0;
+}
+
+
int lpc17xx_fill_chipspecops(struct canchip_t *chip){
chip->max_objects=1;
chipspecops->irq_handler = lpc17xx_irq_handler;
chipspecops->set_bittiming = lpc17xx_set_bittiming;
+ chipspecops->get_bittiming_const = lpc17xx_get_bittiming_const;
return 0;
volatile uint32_t can_tfi1;
uint32_t i=0;
- // check status of TB1
- while (!(can_read_reg(chip, CAN_SR_o) & CAN_SR_TBS1)){
- if(i++<MAX_TRANSMIT_WAIT_LOOPS)
- continue;
-
- // request command to abort transmission request
- can_write_reg(chip, CAN_CMR_AT, CAN_CMR_o);
- return;
- }
-
can_tfi1 = can_read_reg(chip, CAN_TFI1_o);
can_tfi1 &= ~0x000F0000;