+
+can_irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+ unsigned irq_register;
+ struct chip_t *chip=(struct chip_t *)dev_id;
+ struct msgobj_t *obj=chip->msgobj[0];
+
+ irq_register=can_read_reg(chip, SJAIR);
+// DEBUGMSG("sja1000_irq_handler: SJAIR:%02x\n",irq_register);
+// DEBUGMSG("sja1000_irq_handler: SJASR:%02x\n",
+// can_read_reg(chip, SJASR));
+
+ if ((irq_register & (IR_WUI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0)
+ return CAN_IRQ_NONE;
+
+ if ((irq_register & IR_RI) != 0)
+ sja1000_irq_read_handler(chip, obj);
+
+ if ((irq_register & IR_TI) != 0) {
+ can_msgobj_set_fl(obj,TX_REQUEST);
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+ can_msgobj_clear_fl(obj,TX_REQUEST);
+
+ if (can_read_reg(chip, SJASR) & SR_TBS)
+ sja1000_irq_write_handler(chip, obj);
+
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
+ }
+ }
+
+ if ((irq_register & (IR_EI|IR_DOI)) != 0) {
+ // Some error happened
+// FIXME: chip should be brought to usable state. Transmission cancelled if in progress.
+// Reset flag set to 0 if chip is already off the bus. Full state report
+ CANMSG("Error: status register: 0x%x irq_register: 0x%02x\n",
+ can_read_reg(chip, SJASR), irq_register);
+ obj->ret=-1;
+
+ if(obj->tx_slot){
+ canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_BUS);
+ /*canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
+ obj->tx_slot=NULL;*/
+ }
+ }
+
+ return CAN_IRQ_HANDLED;
+}
+
+void sja1000_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj)
+{
+ int i=0, id=0, len;
+
+ do {
+ id = can_read_reg(chip, SJARXID0) | (can_read_reg(chip, SJARXID1)<<8);
+ obj->rx_msg.length = len = id & 0x0f;
+ obj->rx_msg.flags = id&ID0_RTR ? MSG_RTR : 0;
+ #ifdef CAN_MSG_VERSION_2
+ obj->rx_msg.timestamp.tv_sec = 0;
+ obj->rx_msg.timestamp.tv_usec = 0;
+ #else /* CAN_MSG_VERSION_2 */
+ obj->rx_msg.timestamp = 0;
+ #endif /* CAN_MSG_VERSION_2 */
+ obj->rx_msg.cob = 0;
+ obj->rx_msg.id = id>>5;
+
+ if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
+ for (i=0; i<len; i++)
+ obj->rx_msg.data[i]=can_read_reg(chip, SJARXDAT0 + i);
+
+ can_write_reg(chip, CMR_RRB, SJACMR);
+
+ canque_filter_msg2edges(obj->qends, &obj->rx_msg);
+ } while(can_read_reg(chip, SJASR) & SR_RBS);
+}
+
+void sja1000_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
+{
+ int cmd;
+
+ if(obj->tx_slot){
+ /* Do local transmitted message distribution if enabled */
+ if (processlocal){
+ obj->tx_slot->msg.flags |= MSG_LOCAL;
+ canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
+ }
+ /* Free transmitted slot */
+ canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
+ obj->tx_slot=NULL;
+ }
+
+ cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
+ if(cmd<0)
+ return;
+
+ if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
+ obj->ret = -1;
+ canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
+ canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
+ obj->tx_slot=NULL;
+ return;
+ }
+ if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
+ obj->ret = -1;
+ canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
+ canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
+ obj->tx_slot=NULL;
+ return;
+ }
+}
+
+/**
+ * sja1000_wakeup_tx: - wakeups TX processing
+ * @chip: pointer to chip state structure
+ * @obj: pointer to message object structure
+ *
+ * Return Value: negative value reports error.
+ * File: src/sja1000.c
+ */
+int sja1000_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
+{
+ can_preempt_disable();
+
+ can_msgobj_set_fl(obj,TX_REQUEST);
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+ can_msgobj_clear_fl(obj,TX_REQUEST);
+
+ if (can_read_reg(chip, SJASR) & SR_TBS)
+ sja1000_irq_write_handler(chip, obj);
+
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
+ }
+
+ can_preempt_enable();
+ return 0;
+}
+