#include <ctype.h>
+#ifndef IRQF_SHARED
+#define IRQF_SHARED SA_SHIRQ
+#endif /*IRQF_SHARED*/
+
can_irqreturn_t ipci165_irq_handler(CAN_IRQ_HANDLER_ARGS(irq_number, dev_id));
int ipci165_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
int sampl_pt, int flags);
*/
void ipci165_generate_irq(struct candevice_t *candev)
{
- unsigned long crm_addr = candev->io_addr;
- writeb(readb(crm_addr + CRM_UCR) & 0xFB, crm_addr + CRM_UCR);
- writeb(readb(crm_addr + CRM_UCR) | 0x04, crm_addr + CRM_UCR);
+ can_ioptr_t crm_addr = candev->aux_base_addr;
+ can_writeb(can_readb(crm_addr + CRM_UCR) & 0xFB, crm_addr + CRM_UCR);
+ can_writeb(can_readb(crm_addr + CRM_UCR) | 0x04, crm_addr + CRM_UCR);
}
/**
*/
int bci_command(struct candevice_t *candev, char cmd, int size, char *data)
{
- unsigned long dpram_addr = candev->dev_base_addr;
+ can_ioptr_t dpram_addr = candev->dev_base_addr;
DEBUGMSG ("ipci165_bci_command\n");
can_spin_lock(&candev->device_lock);
// check command buffer status
- if (readb(dpram_addr + OF_BCI_SYNC) != 0)
+ if (can_readb(dpram_addr + OF_BCI_SYNC) != 0)
{
/* something went wrong ... */
can_spin_unlock(&candev->device_lock);
}
// prepare command
- writeb(cmd, dpram_addr + OF_BCI_CMD);
- writeb(size + 1, dpram_addr + OF_BCI_NUM);
+ can_writeb(cmd, dpram_addr + OF_BCI_CMD);
+ can_writeb(size + 1, dpram_addr + OF_BCI_NUM);
memcpy_toio(dpram_addr + OF_BCI_DATA, data, size);
// set flag for firmware
- writeb(1, dpram_addr + OF_BCI_SYNC);
+ can_writeb(1, dpram_addr + OF_BCI_SYNC);
// generate interrupt to microcontroller
ipci165_generate_irq (candev);
*/
int bci_response(struct candevice_t *candev, char cmd, int *size, char *data)
{
- unsigned long dpram_addr = candev->dev_base_addr;
+ can_ioptr_t dpram_addr = candev->dev_base_addr;
char tmp;
int delay;
DEBUGMSG ("ipci165_bci_response\n");
delay = 1000;
- while (readb(dpram_addr + OF_BCI_SYNC) != 2)
+ while (can_readb(dpram_addr + OF_BCI_SYNC) != 2)
{
/* wait 1 ms */
/* ipci165_delay(1); */
}
/* we will not copy the command filed, so decrement the size by 1 */
- tmp = readb(dpram_addr + OF_BCI_NUM) - 1;
+ tmp = can_readb(dpram_addr + OF_BCI_NUM) - 1;
if (*size > tmp) *size = tmp;
- if (readb(dpram_addr + OF_BCI_CMD) != cmd)
+ if (can_readb(dpram_addr + OF_BCI_CMD) != cmd)
{
/* release the buffer */
- writeb(0, dpram_addr + OF_BCI_SYNC);
+ can_writeb(0, dpram_addr + OF_BCI_SYNC);
/* unlock the access */
can_spin_unlock(&candev->device_lock);
memcpy_fromio(data, dpram_addr + OF_BCI_DATA, *size);
/* release the buffer */
- writeb(0, dpram_addr + OF_BCI_SYNC);
+ can_writeb(0, dpram_addr + OF_BCI_SYNC);
/* unlock the access */
can_spin_unlock(&candev->device_lock);
return 0;
for (i = 0; i< BCI_QUEUE_SIZE; i++)
{
- writeb(BCI_MSG_STATUS_FREE, chip_data->rx_queue.addr + msg_ofs);
- writeb(BCI_MSG_STATUS_FREE, chip_data->tx_queue.addr + msg_ofs);
+ can_writeb(BCI_MSG_STATUS_FREE, chip_data->rx_queue.addr + msg_ofs);
+ can_writeb(BCI_MSG_STATUS_FREE, chip_data->tx_queue.addr + msg_ofs);
msg_ofs += BCI_MSG_SIZE;
}
*/
int ipci165_connect_irq(struct candevice_t *candev)
{
- unsigned long crm_addr = candev->io_addr;
+ can_ioptr_t crm_addr = candev->aux_base_addr;
unsigned char icr;
DEBUGMSG ("ipci165_connect_irq\n");
/* install interrupt routine */
if (request_irq(candev->sysdevptr.pcidev->irq,
ipci165_irq_handler,
- SA_SHIRQ,
+ IRQF_SHARED,
DEVICE_NAME,
candev))
return -ENODEV;
// Enable interrupt to PC
- writeb(readb(crm_addr + CRM_ICR) | 0x40, crm_addr + CRM_ICR);
+ can_writeb(can_readb(crm_addr + CRM_ICR) | 0x40, crm_addr + CRM_ICR);
udelay (100);
- icr = readb(crm_addr + CRM_ICR);
+ icr = can_readb(crm_addr + CRM_ICR);
return 0;
}
*/
void ipci165_disconnect_irq(struct candevice_t *candev)
{
- unsigned long crm_addr = candev->io_addr;
+ can_ioptr_t crm_addr = candev->aux_base_addr;
unsigned char icr;
DEBUGMSG ("ipci165_disconnect_irq\n");
// Enable interrupt to PC
- writeb(readb(crm_addr + CRM_ICR) & ~0x40, crm_addr + CRM_ICR);
+ can_writeb(can_readb(crm_addr + CRM_ICR) & ~0x40, crm_addr + CRM_ICR);
udelay (100);
- icr = readb(crm_addr + CRM_ICR);
+ icr = can_readb(crm_addr + CRM_ICR);
/* deinstall interrupt routine */
free_irq(candev->sysdevptr.pcidev->irq, candev);
}
{
struct ipci165_chip_t *chip_data = (struct ipci165_chip_t *)chip->chip_data;
struct bci_queue_t *queue = &(chip_data)->rx_queue;
- unsigned long queue_addr = queue->addr;
- unsigned long msg_addr = queue_addr + queue->idx * BCI_MSG_SIZE;
+ can_ioptr_t queue_addr = queue->addr;
+ can_ioptr_t msg_addr = queue_addr + queue->idx * BCI_MSG_SIZE;
int len;
unsigned char frame_info;
do {
dump_mem(msg_addr, BCI_MSG_SIZE);
- if (readb(msg_addr + BCI_MSG_TYPE) == BCI_MSG_TYPE_CAN)
+ if (can_readb(msg_addr + BCI_MSG_TYPE) == BCI_MSG_TYPE_CAN)
{
#if 0
- printk("ST(0)=%x, ST(1)=%x\n",readw(chip->chip_base_addr+OF_CAN1_STATUS),
- readw(chip->chip_base_addr+OF_CAN2_STATUS));
+ printk("ST(0)=%x, ST(1)=%x\n",can_readw(chip->chip_base_addr+OF_CAN1_STATUS),
+ can_readw(chip->chip_base_addr+OF_CAN2_STATUS));
for (tmp16 = 0 ; tmp16 < BCI_QUEUE_SIZE ; tmp16 ++)
- printk ("MSG_ST(%i)=%x\n",tmp16,readb(chip->chip_base_addr + OF_CH2_TX_QUEUE + tmp16*BCI_MSG_SIZE + BCI_MSG_STATUS));
+ printk ("MSG_ST(%i)=%x\n",tmp16,can_readb(chip->chip_base_addr + OF_CH2_TX_QUEUE + tmp16*BCI_MSG_SIZE + BCI_MSG_STATUS));
/* this is a can message */
DEBUGMSG ("ipci165_irq_read_handler[%i]: message in buffer\n",chip->chip_idx);
#endif
- frame_info = readb(msg_addr + BCI_MSG_FRAME);
+ frame_info = can_readb(msg_addr + BCI_MSG_FRAME);
len = frame_info & 0x0f;
if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
obj->rx_msg.length = len;
obj->rx_msg.cob = 0;
obj->rx_msg.timestamp.tv_sec = 0;
obj->rx_msg.timestamp.tv_usec =
- BCI_TIMESTAMP_RES * readl(msg_addr + BCI_MSG_TIMESTAMP);
- /* BCI_TIMESTAMP_RES * le32_to_cpu(readl(msg_addr + BCI_MSG_TIMESTAMP)); */
+ BCI_TIMESTAMP_RES * can_readl(msg_addr + BCI_MSG_TIMESTAMP);
+ /* BCI_TIMESTAMP_RES * le32_to_cpu(can_readl(msg_addr + BCI_MSG_TIMESTAMP)); */
/* fill CAN message timestamp */
/* can_filltimestamp(&obj->rx_msg.timestamp); */
/* extended frame - 29 bit identifier */
obj->rx_msg.flags |= MSG_EXT;
/* the ID is stored in motorola format (big endian), left justified */
- /* obj->rx_msg.id = be32_to_cpu(readl(msg_addr + BCI_MSG_ID) >> 3); */
+ /* obj->rx_msg.id = be32_to_cpu(can_readl(msg_addr + BCI_MSG_ID) >> 3); */
memcpy_fromio(&tmp32, msg_addr + BCI_MSG_ID, 4);
obj->rx_msg.id = be32_to_cpu(tmp32 >> 3);
if (len > 0)
{
/* standard frame - 11 bit identifier */
/* the ID is stored in motorola format (big endian), left justified */
- /* obj->rx_msg.id = be16_to_cpu(readw(msg_addr + BCI_MSG_ID) >> 5); */
+ /* obj->rx_msg.id = be16_to_cpu(can_readw(msg_addr + BCI_MSG_ID) >> 5); */
memcpy_fromio(&tmp16, msg_addr + BCI_MSG_ID, 2);
obj->rx_msg.id = be16_to_cpu(tmp16 >> 5);
if (len > 0)
else
{
/* this is a status message */
- status = readw(msg_addr + BCI_MSG_CAN_STATUS);
+ status = can_readw(msg_addr + BCI_MSG_CAN_STATUS);
DEBUGMSG ("ipci165_irq_read_handler[%i]: CAN status=%04x\n",chip->chip_idx, status);
/* wake up the reset thread if the CAN is in bus off */
/* update pointer */
queue->idx = (queue->idx + 1) % BCI_QUEUE_SIZE;
/* release the buffer */
- writeb(BCI_MSG_STATUS_FREE, msg_addr + BCI_MSG_STATUS);
+ can_writeb(BCI_MSG_STATUS_FREE, msg_addr + BCI_MSG_STATUS);
msg_addr = queue_addr + queue->idx * BCI_MSG_SIZE;
- } while (readb(msg_addr + BCI_MSG_STATUS) == BCI_MSG_STATUS_FULL);
+ } while (can_readb(msg_addr + BCI_MSG_STATUS) == BCI_MSG_STATUS_FULL);
}
{
struct ipci165_chip_t *chip_data = ((struct ipci165_chip_t *)chip->chip_data);
struct bci_queue_t *queue = &chip_data->tx_queue;
- unsigned long queue_addr = queue->addr;
- unsigned long msg_addr = queue_addr + queue->idx * BCI_MSG_SIZE;
+ can_ioptr_t queue_addr = queue->addr;
+ can_ioptr_t msg_addr = queue_addr + queue->idx * BCI_MSG_SIZE;
struct canque_slot_t *tx_slot;
int len;
while ((canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot) >=0))
{
if (test_bit(CHIP_FLAG_RESET,&chip_data->flags) ||
- (readb(msg_addr + BCI_MSG_STATUS) == BCI_MSG_STATUS_FULL))
+ (can_readb(msg_addr + BCI_MSG_STATUS) == BCI_MSG_STATUS_FULL))
{
canque_again_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
((tx_slot->msg.flags & MSG_RTR) ? BCI_MSG_FRAME_RTR : 0) |
((tx_slot->msg.flags & MSG_EXT) ? BCI_MSG_FRAME_EXT : 0);
- writeb(BCI_MSG_SIZE - 2, msg_addr + BCI_MSG_NUM);
- writeb(BCI_MSG_TYPE_CAN, msg_addr + BCI_MSG_TYPE);
- writeb(frame_info, msg_addr + BCI_MSG_FRAME);
+ can_writeb(BCI_MSG_SIZE - 2, msg_addr + BCI_MSG_NUM);
+ can_writeb(BCI_MSG_TYPE_CAN, msg_addr + BCI_MSG_TYPE);
+ can_writeb(frame_info, msg_addr + BCI_MSG_FRAME);
if (frame_info & BCI_MSG_FRAME_EXT)
{
/* extended frame - 29 bit identifier */
/* update pointer */
queue->idx = (queue->idx + 1) % BCI_QUEUE_SIZE;
/* mark the buffer as full */
- writeb(BCI_MSG_STATUS_FULL, msg_addr + BCI_MSG_STATUS);
+ can_writeb(BCI_MSG_STATUS_FULL, msg_addr + BCI_MSG_STATUS);
/* wake up the controller */
ipci165_generate_irq(chip->hostdevice);
/* check receive queue for messages */
queue = &chip_data->rx_queue;
- if (readb(queue->addr + queue->idx * BCI_MSG_SIZE + BCI_MSG_STATUS)
+ if (can_readb(queue->addr + queue->idx * BCI_MSG_SIZE + BCI_MSG_STATUS)
== BCI_MSG_STATUS_FULL)
ipci165_irq_read_handler(chip, obj);
queue = &chip_data->tx_queue;
-/* if (readb(queue->addr + queue->idx * BCI_MSG_SIZE + BCI_MSG_STATUS)
+/* if (can_readb(queue->addr + queue->idx * BCI_MSG_SIZE + BCI_MSG_STATUS)
== BCI_MSG_STATUS_FREE) */
{
can_msgobj_set_fl(obj,TX_REQUEST);
int retval;
struct candevice_t *candev = (struct candevice_t *)dev_id;
- unsigned long crm_addr = candev->io_addr;
- unsigned long ucr1_addr = crm_addr + CRM_UCR + 1;
+ can_ioptr_t crm_addr = candev->aux_base_addr;
+ can_ioptr_t ucr1_addr = crm_addr + CRM_UCR + 1;
struct canchip_t *chip;
unsigned char icr;
int i;
/* DEBUGMSG ("ipci165_irq_handler\n"); */
/* read interrupt control register (byte 0) */
- icr = readb(crm_addr + CRM_ICR);
+ icr = can_readb(crm_addr + CRM_ICR);
if ((icr & 0x44) == 0x44)
{
DEBUGMSG ("ipci165_irq_handler: pending interrupt\n");
/* confirm pending interrupt */
- writeb(readb(ucr1_addr) | 0x01, ucr1_addr);
- writeb(readb(ucr1_addr) & ~0x01, ucr1_addr);
+ can_writeb(can_readb(ucr1_addr) | 0x01, ucr1_addr);
+ can_writeb(can_readb(ucr1_addr) & ~0x01, ucr1_addr);
/* call interrupt handler for every channel */
for (i=0 ; i < candev->nr_all_chips ; i++)
*/
int ipci165_request_io(struct candevice_t *candev)
{
- unsigned long dpram_addr;
- unsigned long crm_addr;
- unsigned long fix_addr;
+ unsigned long dpram_addr; /* physical address before remap for this function */
+ unsigned long crm_addr; /* physical address before remap for this function */
+ unsigned long fix_addr; /* physical address before remap for this function */
int i,j;
DEBUGMSG ("ipci165_request_io\n");
{
CANMSG ("This card was not fixed!\n");
- if (candev->io_addr == 0)
+ if (candev->aux_base_addr == NULL)
{
CANMSG ("You have to specify IO address parameter!\n");
return -EINVAL;
}
CANMSG ("Using specified IO address value for the memory [0x%lx]\n",
- candev->io_addr);
+ can_ioptr2ulong(candev->aux_base_addr));
}
else
{
CANMSG ("Fixed card. Using of 3 region [0x%lx]\n", fix_addr);
- candev->io_addr = fix_addr;
+ candev->aux_base_addr = fix_addr;
}
pci_write_config_dword (candev->sysdevptr.pcidev,
{
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
- if ((candev->dev_base_addr = (long) ioremap(dpram_addr,
+ if ((candev->dev_base_addr = ioremap(dpram_addr,
pci_resource_len(candev->sysdevptr.pcidev,2))))
{
DEBUGMSG ("ipci165_request_io: dpram remapped to 0x%lx\n", candev->dev_base_addr);
- if ((candev->io_addr = (long) ioremap(crm_addr,
+ if ((candev->aux_base_addr = ioremap(crm_addr,
pci_resource_len(candev->sysdevptr.pcidev,0))))
{
- DEBUGMSG ("ipci165_request_io: crm remapped to 0x%lx\n", candev->io_addr);
+ DEBUGMSG ("ipci165_request_io: crm remapped to 0x%lx\n", can_ioptr2ulong(candev->aux_base_addr));
/* all resources has been allocated */
- candev->res_addr=candev->io_addr;
/* Because of my mapping, I cannot use the
can_base_addr_fixup(candev, remap_addr) to remap the addresses */
return 0;
} else CANMSG("Unable to remap memory at: 0x%lx\n", crm_addr);
- iounmap((void*)candev->io_addr);
+ iounmap(candev->aux_base_addr);
} else CANMSG("Unable to remap memory at: 0x%lx\n", dpram_addr);
- iounmap((void*)candev->dev_base_addr);
+ iounmap(candev->dev_base_addr);
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
pci_release_region(candev->sysdevptr.pcidev, 0);
}
#endif
- iounmap((void*)candev->io_addr);
- iounmap((void*)candev->dev_base_addr);
+ iounmap(candev->aux_base_addr);
+ iounmap(candev->dev_base_addr);
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
pci_release_region(candev->sysdevptr.pcidev, 2);
*/
int ipci165_download_fw(struct candevice_t *candev)
{
- unsigned long dpram_addr = candev->dev_base_addr;
+ can_ioptr_t dpram_addr = candev->dev_base_addr;
char board_name[BOARD_NAME_LEN+1];
char hw_version[HW_VERSION_LEN+1];
char mode[MODE_LEN+1];
while (fwArray->len)
{
/* fill buffer */
- writeb(LD_CMD_DOWNLOAD, dpram_addr + OF_LD_CMD);
- writeb(fwArray->len, dpram_addr + OF_LD_NUM);
- writeb(0, dpram_addr + OF_LD_NUM + 1);
+ can_writeb(LD_CMD_DOWNLOAD, dpram_addr + OF_LD_CMD);
+ can_writeb(fwArray->len, dpram_addr + OF_LD_NUM);
+ can_writeb(0, dpram_addr + OF_LD_NUM + 1);
- writel(fwArray->addr, dpram_addr + OF_LD_ADDRESS);
- /* writel already performes the cpu_to_le32 conversion by itself */
- /* writel(cpu_to_le32(fwArray->addr), dpram_addr + OF_LD_ADDRESS); */
+ can_writel(fwArray->addr, dpram_addr + OF_LD_ADDRESS);
+ /* can_writel already performes the cpu_to_le32 conversion by itself */
+ /* can_writel(cpu_to_le32(fwArray->addr), dpram_addr + OF_LD_ADDRESS); */
memcpy_toio(dpram_addr + OF_LD_DATA, fwArray->a_data, fwArray->len);
dump_mem((void *)(dpram_addr + OF_LD_SYNC), fwArray->len + 8);
#endif
/* buffer is prepared, set flag for loader */
- writeb(1, dpram_addr + OF_LD_SYNC);
+ can_writeb(1, dpram_addr + OF_LD_SYNC);
/* update pointer */
fwArray++;
/* wait for the loader */
attempt = 1000;
- while (readb(dpram_addr + OF_LD_SYNC) != 0)
+ while (can_readb(dpram_addr + OF_LD_SYNC) != 0)
{
udelay(100);
if (--attempt == 0)
CANMSG ("Firmware downladed successfully\n");
/* start the FW */
- writeb(LD_CMD_START_FW, dpram_addr + OF_LD_CMD);
- writeb(1, dpram_addr + OF_LD_SYNC);
+ can_writeb(LD_CMD_START_FW, dpram_addr + OF_LD_CMD);
+ can_writeb(1, dpram_addr + OF_LD_SYNC);
ipci165_delay (500);
return 0;
*/
int ipci165_reset(struct candevice_t *candev)
{
- unsigned long crm_addr = candev->io_addr;
+ can_ioptr_t crm_addr = candev->aux_base_addr;
unsigned long test_data;
char buffer[BCI_CMD_MAX_LEN];
int i, size, chips;
DEBUGMSG ("ipci165_reset: hardware reset\n");
/* reset the HW */
- ucr = readb(crm_addr + CRM_UCR + 3);
- writeb(ucr | 0x40, crm_addr + CRM_UCR + 3);
+ ucr = can_readb(crm_addr + CRM_UCR + 3);
+ can_writeb(ucr | 0x40, crm_addr + CRM_UCR + 3);
udelay(100);
- writeb(ucr & ~0x40, crm_addr + CRM_UCR + 3);
+ can_writeb(ucr & ~0x40, crm_addr + CRM_UCR + 3);
/* wait a little bit */
ipci165_delay(200);
projects / lincan.git / blobdiff