--- /dev/null
+/* pip.c
+ * Linux CAN-bus device driver.
+ * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
+ * This software is released under the GPL-License.
+ * Version 0.7 6 Aug 2001
+ */
+
+#include <linux/autoconf.h>
+#if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
+#define MODVERSIONS
+#endif
+
+#if defined (MODVERSIONS)
+#include <linux/modversions.h>
+#endif
+
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <asm/errno.h>
+#include <asm/io.h>
+
+#include "../include/main.h"
+#include "../include/pip.h"
+#include "../include/i82527.h"
+
+int pip5_request_io(unsigned long io_addr)
+{
+ if (io_addr != 0x8000) {
+ CANMSG("Invalid base io address\n");
+ CANMSG("The PIP5 uses a fixed base address of 0x8000,\n");
+ CANMSG("please consult your user manual.\n");
+ return -ENODEV;
+ }
+ if (check_region(io_addr,0x100)) {
+ CANMSG("Unable to open port: 0x%lx\n",io_addr);
+ return -ENODEV;
+ }
+ else if(check_region(io_addr+0x102,0x01)) {
+ CANMSG("Unable to open port: 0x%lx\n",io_addr+0x102);
+ return -ENODEV;
+ }
+ else {
+ request_region(io_addr,0x100,DEVICE_NAME);
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + 0x100 - 1);
+ request_region(io_addr+0x102,0x01,DEVICE_NAME);
+ DEBUGMSG("Registered IO-memory: 0x%lx\n", io_addr+0x102);
+ }
+ return 0;
+}
+
+int pip6_request_io(unsigned long io_addr)
+{
+ if ( (io_addr != 0x1000)&&(io_addr != 0x8000)&&(io_addr != 0xe000)) {
+ CANMSG("Invalid base io address\n");
+ CANMSG("Valid values for the PIP6 are: 0x1000, 0x8000 or 0xe000\n");
+ CANMSG("Please consult your user manual.\n");
+ return -ENODEV;
+ }
+ if (check_region(io_addr,0x100)) {
+ CANMSG("Unable to open port: 0x%lx\n",io_addr);
+ return -ENODEV;
+ }
+ else if (check_region(0x804, 0x02)) {
+ CANMSG("Unable to open port: 0x%x\n", 0x804);
+ return -ENODEV;
+ }
+ else {
+ request_region(io_addr,0x100, DEVICE_NAME);
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + 0x100 -1);
+ request_region(0x804,0x02,DEVICE_NAME);
+ DEBUGMSG("Registered IO-memory : 0x%x - 0x%x\n",0x804,0x805);
+ }
+ return 0;
+}
+
+int pip5_release_io(unsigned long io_addr)
+{
+ release_region(io_addr,0x100);
+ release_region(io_addr+0x102,0x01);
+
+ return 0;
+}
+
+int pip6_release_io(unsigned long io_addr)
+{
+ release_region(io_addr,0x100);
+ release_region(0x804,0x02);
+
+ return 0;
+}
+
+int pip_reset(int card)
+{
+ int i=0, res_value=0;
+
+ DEBUGMSG("Resetting %s hardware ...\n", candevices_p[card]->hwname);
+ if (!strcmp(candevices_p[card]->hwname,"pip5"))
+ res_value = 0xcf;
+ else
+ res_value = 0x01;
+ while (i < 1000000) {
+ i++;
+ outb(res_value,candevices_p[card]->res_addr);
+ }
+ outb(0x0,candevices_p[card]->res_addr);
+
+ /* Check hardware reset status */
+ i=0;
+ while ( (inb(candevices_p[card]->io_addr+iCPU) & iCPU_RST) && (i<=15)) {
+ udelay(20000);
+ i++;
+ }
+ if (i>=15) {
+ CANMSG("Reset status timeout!\n");
+ CANMSG("Please check your hardware.\n");
+ return -ENODEV;
+ }
+ else
+ DEBUGMSG("Chip0 reset status ok.\n");
+
+
+ return 0;
+}
+
+int pip_init_hw_data(int card)
+{
+ if (!strcmp(candevices_p[card]->hwname,"pip5"))
+ candevices_p[card]->res_addr=candevices_p[card]->io_addr+0x102;
+ else
+ candevices_p[card]->res_addr=0x805;
+ candevices_p[card]->nr_82527_chips=1;
+ candevices_p[card]->nr_sja1000_chips=0;
+ candevices_p[card]->flags |= PROGRAMMABLE_IRQ;
+
+ return 0;
+}
+
+int pip_init_chip_data(int card, int chipnr)
+{
+ candevices_p[card]->chip[chipnr]->chip_type="i82527";
+ candevices_p[card]->chip[chipnr]->chip_base_addr=candevices_p[card]->io_addr;
+ candevices_p[card]->chip[chipnr]->clock = 16000000;
+ if (!strcmp(candevices_p[card]->hwname,"pip5"))
+ candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC;
+ else
+ candevices_p[card]->chip[chipnr]->int_cpu_reg = 0x0;
+ candevices_p[card]->chip[chipnr]->int_clk_reg = iCLK_SL1;
+ candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY;
+ candevices_p[card]->chip[chipnr]->sja_cdr_reg = 0;
+ candevices_p[card]->chip[chipnr]->sja_ocr_reg = 0;
+
+ return 0;
+}
+
+int pip_init_obj_data(int chipnr, int objnr)
+{
+ chips_p[chipnr]->msgobj[objnr]->obj_base_addr=chips_p[chipnr]->chip_base_addr+(objnr+1)*0x10;
+ chips_p[chipnr]->msgobj[objnr]->flags=0;
+
+ return 0;
+}
+
+int pip5_program_irq(int card)
+{
+ outb(0x01, candevices_p[card]->res_addr);
+ switch (candevices_p[card]->chip[0]->chip_irq) {
+ case 3: { outb(0x03, candevices_p[card]->res_addr); break; }
+ case 4: { outb(0x05, candevices_p[card]->res_addr); break; }
+ case 5: { outb(0x07, candevices_p[card]->res_addr); break; }
+ case 10: { outb(0x09, candevices_p[card]->res_addr); break; }
+ case 11: { outb(0x0c, candevices_p[card]->res_addr); break; }
+ case 15: { outb(0x0d, candevices_p[card]->res_addr); break; }
+ default: {
+ CANMSG("Supplied interrupt is not supported by the hardware\n");
+ CANMSG("Please consult your user manual.\n");
+ return -ENODEV;
+ }
+ }
+ outb(0x00, candevices_p[card]->res_addr);
+
+ return 0;
+}
+
+int pip6_program_irq(int card)
+{
+ unsigned char can_int = 0, can_addr = 0;
+
+ can_int = candevices_p[card]->chip[0]->chip_irq;
+ if ((can_int != 3) && (can_int != 4) && (can_int != 5) && (can_int != 6)
+ && (can_int != 7) && (can_int != 9) && (can_int != 10) &&
+ (can_int != 11) && (can_int != 12) && (can_int != 14) &&
+ (can_int != 15)) {
+ CANMSG("Invalid interrupt number\n");
+ CANMSG("Valid interrupt numbers for the PIP6: 3,4,5,6,7,9,10,11,12,14 or 15\n");
+ CANMSG("Please consult your user manual.\n");
+ return -ENODEV;
+ }
+ switch (candevices_p[card]->io_addr) {
+ case 0x1000: { can_addr = 0x01; break; }
+ case 0x8000: { can_addr = 0x02; break; }
+ case 0xe000: { can_addr = 0x03; break; }
+ default: {
+ CANMSG("Supplied io address is not valid, please check your manual\n");
+ return -ENODEV;
+ }
+ }
+ outb( (can_int<<4)|can_addr, 0x804);
+
+ return 0;
+}
+
+void pip_write_register(unsigned char data, unsigned long address)
+{
+ outb(data,address);
+}
+
+unsigned pip_read_register(unsigned long address)
+{
+ return inb(address);
+}
+
+/* !!! Don't change these functions !!! */
+int pip5_register(struct hwspecops_t *hwspecops)
+{
+ hwspecops->request_io = pip5_request_io;
+ hwspecops->release_io = pip5_release_io;
+ hwspecops->reset = pip_reset;
+ hwspecops->init_hw_data = pip_init_hw_data;
+ hwspecops->init_chip_data = pip_init_chip_data;
+ hwspecops->init_obj_data = pip_init_obj_data;
+ hwspecops->write_register = pip_write_register;
+ hwspecops->read_register = pip_read_register;
+ hwspecops->program_irq = pip5_program_irq;
+ return 0;
+}
+
+int pip6_register(struct hwspecops_t *hwspecops)
+{
+ hwspecops->request_io = pip6_request_io;
+ hwspecops->release_io = pip6_release_io;
+ hwspecops->reset = pip_reset;
+ hwspecops->init_hw_data = pip_init_hw_data;
+ hwspecops->init_chip_data = pip_init_chip_data;
+ hwspecops->init_obj_data = pip_init_obj_data;
+ hwspecops->write_register = pip_write_register;
+ hwspecops->read_register = pip_read_register;
+ hwspecops->program_irq = pip6_program_irq;
+ return 0;
+}
projects / lincan.git / blobdiff