+int i82527_attach_to_chip(struct canchip_t *chip)
+{
+ return 0;
+}
+
+int i82527_release_chip(struct canchip_t *chip)
+{
+ i82527_stop_chip(chip);
+ can_write_reg(chip, (iCTL_CCE|iCTL_INI), iCTL);
+
+ return 0;
+}
+
+static inline
+void i82527_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
+{
+ int cmd;
+
+ canobj_write_reg(chip,obj,(MVAL_RES|TXIE_RES|RXIE_RES|INTPD_RES),iMSGCTL0);
+
+ if(obj->tx_slot){
+ /* Do local transmitted message distribution if enabled */
+ if (processlocal){
+ /* fill CAN message timestamp */
+ can_filltimestamp(&obj->tx_slot->msg.timestamp);
+
+ obj->tx_slot->msg.flags |= MSG_LOCAL;
+ canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
+ }
+ /* Free transmitted slot */
+ canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
+ obj->tx_slot=NULL;
+ }
+
+ cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
+ if(cmd<0)
+ return;
+
+ if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
+ obj->ret = -1;
+ canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
+ canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
+ obj->tx_slot=NULL;
+ return;
+ }
+ if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
+ obj->ret = -1;
+ canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
+ canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
+ obj->tx_slot=NULL;
+ return;
+ }
+ return;
+}
+
+static inline
+void i82527_irq_read_handler(struct canchip_t *chip, struct msgobj_t *obj, int objnum)
+{
+ int i;
+ unsigned long message_id;
+ int msgcfg, msgctl1;
+
+ msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
+ if(msgctl1 & NEWD_RES)
+ return;
+
+ do {
+ if(objnum != 14) {
+ canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_UNC|NEWD_RES),iMSGCTL1);
+ canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
+ }
+
+ msgcfg = canobj_read_reg(chip,obj,iMSGCFG);
+
+ if (msgcfg&MCFG_XTD) {
+ message_id =canobj_read_reg(chip,obj,iMSGID3);
+ message_id|=canobj_read_reg(chip,obj,iMSGID2)<<8;
+ message_id|=canobj_read_reg(chip,obj,iMSGID1)<<16;
+ message_id|=canobj_read_reg(chip,obj,iMSGID0)<<24;
+ message_id>>=3;
+ obj->rx_msg.flags = MSG_EXT;
+
+ }
+ else {
+ message_id =canobj_read_reg(chip,obj,iMSGID1);
+ message_id|=canobj_read_reg(chip,obj,iMSGID0)<<8;
+ message_id>>=5;
+ obj->rx_msg.flags = 0;
+ }
+
+ obj->rx_msg.length = (msgcfg >> 4) & 0xf;
+ if(obj->rx_msg.length > CAN_MSG_LENGTH) obj->rx_msg.length = CAN_MSG_LENGTH;
+
+ obj->rx_msg.id = message_id;
+
+ for (i=0; i < obj->rx_msg.length; i++)
+ obj->rx_msg.data[i] = canobj_read_reg(chip,obj,iMSGDAT0+i);
+
+
+ if(objnum != 14) {
+ /* if NEWD is set after data read, then read data are likely inconsistent */
+ msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
+ if(msgctl1 & NEWD_SET) {
+ CANMSG("i82527_irq_read_handler: object %d data overwritten\n",objnum);
+ continue;
+ }
+ }
+ else {
+ /* this object is special and data are queued in the shadow register */
+ canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
+ canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_UNC|NEWD_RES),iMSGCTL1);
+ msgctl1=canobj_read_reg(chip,obj,iMSGCTL1);
+ }
+
+
+ /* fill CAN message timestamp */
+ can_filltimestamp(&obj->rx_msg.timestamp);
+
+ canque_filter_msg2edges(obj->qends, &obj->rx_msg);
+
+ if (msgctl1 & NEWD_SET)
+ continue;
+
+ if (msgctl1 & MLST_SET) {
+ canobj_write_reg(chip,obj,(RMPD_UNC|TXRQ_UNC|MLST_RES|NEWD_UNC),iMSGCTL1);
+ CANMSG("i82527_irq_read_handler: object %d message lost\n",objnum);
+ }
+
+ return;
+
+ } while(1);
+}
+
+/*
+ if (msgcfg&MCFG_XTD) {
+ message_id =canobj_read_reg(chip,obj,iMSGID3);
+ message_id|=canobj_read_reg(chip,obj,iMSGID2)<<8;
+ message_id|=canobj_read_reg(chip,obj,iMSGID1)<<16;
+ message_id|=canobj_read_reg(chip,obj,iMSGID0)<<24;
+ message_id>>=3;
+ }
+ else {
+ message_id =canobj_read_reg(chip,obj,iMSGID1);
+ message_id|=canobj_read_reg(chip,obj,iMSGID0)<<8;
+ message_id>>=5;
+ }
+
+ can_spin_lock(&hardware_p->rtr_lock);
+ rtr_search=hardware_p->rtr_queue;
+ while (rtr_search != NULL) {
+ if (rtr_search->id == message_id)
+ break;
+ rtr_search=rtr_search->next;
+ }
+ can_spin_unlock(&hardware_p->rtr_lock);
+ if ((rtr_search!=NULL) && (rtr_search->id==message_id))
+ i82527_irq_rtr_handler(chip, obj, rtr_search, message_id);
+ else
+ i82527_irq_read_handler(chip, obj, message_id);
+*/
+
+
+static inline
+void i82527_irq_update_filter(struct canchip_t *chip, struct msgobj_t *obj)
+{
+ struct canfilt_t filt;
+
+ if(canqueue_ends_filt_conjuction(obj->qends, &filt)) {
+ obj->rx_preconfig_id=filt.id;
+ canobj_write_reg(chip,obj,(MVAL_RES|TXIE_RES|RXIE_RES|INTPD_RES),iMSGCTL0);
+ if(obj->object == 15) {
+ i82527_message15_mask(chip,filt.id,filt.mask);
+ }
+ if (filt.flags&MSG_EXT)
+ can_msgobj_set_fl(obj,RX_MODE_EXT);
+ else
+ can_msgobj_clear_fl(obj,RX_MODE_EXT);
+
+ i82527_pre_read_config(chip, obj);
+
+ CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n",obj->obj_base_addr);
+ }
+}
+
+
+void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
+{
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
+
+ if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
+ if(canobj_read_reg(chip,obj,iMSGCTL1)&TXRQ_RES)
+ i82527_irq_write_handler(chip, obj);
+ }
+
+ if(!obj->tx_slot) {
+ if(can_msgobj_test_and_clear_fl(obj,FILTCH_REQUEST)) {
+ i82527_irq_update_filter(chip, obj);
+ }
+ }
+
+ mb();
+
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(can_msgobj_test_fl(obj,TX_REQUEST))
+ continue;
+ if(can_msgobj_test_fl(obj,FILTCH_REQUEST) && !obj->tx_slot)
+ continue;
+ break;
+ }
+}
+
+int i82527_irq_handler(int irq, struct canchip_t *chip)
+{
+ unsigned char msgcfg;
+
+ unsigned irq_register;
+ unsigned status_register;
+ unsigned object;
+ struct msgobj_t *obj;
+ int loop_cnt=CHIP_MAX_IRQLOOP;
+
+ /*put_reg=device->hwspecops->write_register;*/
+ /*get_reg=device->hwspecops->read_register;*/
+
+ irq_register = i82527_seg_read_reg(chip, iIRQ);
+
+ if(!irq_register) {
+ DEBUGMSG("i82527: spurious IRQ\n");
+ return CANCHIP_IRQ_NONE;
+ }
+
+
+ do {
+
+ if(!loop_cnt--) {
+ CANMSG("i82527_irq_handler IRQ %d stuck\n",irq);
+ CANMSG("i82527_irq_register 0x%x\n",irq_register);
+ return CANCHIP_IRQ_STUCK;
+ }
+
+ DEBUGMSG("i82527: iIRQ 0x%02x\n",irq_register);
+
+ if (irq_register == 0x01) {
+ status_register=can_read_reg(chip, iSTAT);
+ CANMSG("Status register: 0x%x\n",status_register);
+ continue;
+ /*return CANCHIP_IRQ_NONE;*/
+ }
+
+ if (irq_register == 0x02)
+ object = 14;
+ else if(irq_register <= 13+3)
+ object = irq_register-3;
+ else
+ return CANCHIP_IRQ_NONE;
+
+ obj=chip->msgobj[object];
+
+ msgcfg = canobj_read_reg(chip,obj,iMSGCFG);
+ if (msgcfg & MCFG_DIR) {
+ can_msgobj_set_fl(obj,TX_REQUEST);
+
+ /* calls i82527_irq_write_handler synchronized with other invocations */
+ i82527_irq_sync_activities(chip, obj);
+ }
+ else {
+
+ i82527_irq_read_handler(chip, obj, object);
+ }
+
+ } while((irq_register=i82527_seg_read_reg(chip, iIRQ)) != 0);
+
+ return CANCHIP_IRQ_HANDLED;
+}
+
+void i82527_irq_rtr_handler(struct canchip_t *chip, struct msgobj_t *obj,
+ struct rtr_id *rtr_search, unsigned long message_id)
+{
+ short int i=0;
+
+ canobj_write_reg(chip,obj,(MVAL_RES|TXIE_RES|RXIE_RES|INTPD_RES),iMSGCTL0);
+ canobj_write_reg(chip,obj,(RMPD_RES|TXRQ_RES|MLST_RES|NEWD_RES),iMSGCTL1);
+
+ can_spin_lock(&hardware_p->rtr_lock);
+
+ rtr_search->rtr_message->id=message_id;
+ rtr_search->rtr_message->length=(canobj_read_reg(chip,obj,iMSGCFG) & 0xf0)>>4;
+ for (i=0; i<rtr_search->rtr_message->length; i++)
+ rtr_search->rtr_message->data[i]=canobj_read_reg(chip,obj,iMSGDAT0+i);
+
+ can_spin_unlock(&hardware_p->rtr_lock);
+
+ if (waitqueue_active(&rtr_search->rtr_wq))
+ wake_up(&rtr_search->rtr_wq);
+}
+
+/**
+ * i82527_wakeup_tx: - wakeups TX processing
+ * @chip: pointer to chip state structure
+ * @obj: pointer to message object structure
+ *
+ * Function is responsible for initiating message transmition.
+ * It is responsible for clearing of object TX_REQUEST flag
+ *
+ * Return Value: negative value reports error.
+ * File: src/i82527.c
+ */
+int i82527_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
+{
+ can_preempt_disable();
+
+ can_msgobj_set_fl(obj,TX_REQUEST);
+
+ /* calls i82527_irq_write_handler synchronized with other invocations
+ from kernel and IRQ context */
+ i82527_irq_sync_activities(chip, obj);
+
+ can_preempt_enable();
+ return 0;
+}
+
+int i82527_filtch_rq(struct canchip_t *chip, struct msgobj_t *obj)
+{
+ can_preempt_disable();
+
+ can_msgobj_set_fl(obj,FILTCH_REQUEST);
+
+ /* setups filter synchronized with other invocations from kernel and IRQ context */
+ i82527_irq_sync_activities(chip, obj);
+
+ can_preempt_enable();
+ return 0;
+}
+