--- /dev/null
+/* bfadcan.c
+ * Linux CAN-bus device driver.
+ * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
+ * This software is released under the GPL-License.
+ * Version 0.7 6 Aug 2001
+ */
+
+/* This file is intended as a bfadcan file for currently unsupported hardware.
+ * Once you've changed/added the functions specific to your hardware it is
+ * possible to load the driver with the hardware option hw=bfadcan.
+ */
+
+#define __NO_VERSION__ /* this is not a main module, do not include module info */
+
+#include <linux/autoconf.h>
+#if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
+#define MODVERSIONS
+#endif
+
+#if defined (MODVERSIONS)
+#include <linux/modversions.h>
+#endif
+#include <linux/module.h>
+
+#include <linux/version.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <asm/errno.h>
+#include <asm/io.h>
+
+#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,3,0))
+#include <asm/spinlock.h>
+#else
+#include <linux/spinlock.h>
+#endif
+
+#define WINDOWED_ACCESS
+
+#include "../include/main.h"
+#include "../include/i82527.h"
+#include "../include/sja1000p.h"
+
+long clock_freq;
+MODULE_PARM(clock_freq,"i");
+
+/* cli and sti are not allowed in 2.5.5x SMP kernels */
+#ifdef WINDOWED_ACCESS
+spinlock_t bfadcan_win_lock=SPIN_LOCK_UNLOCKED;
+#endif
+
+/*
+ * IO_RANGE is the io-memory range that gets reserved, please adjust according
+ * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
+ * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
+ */
+#ifdef WINDOWED_ACCESS
+#define IO_RANGE 0x4
+#else
+#define IO_RANGE 0x100
+#endif
+
+unsigned bfadcan_read_register(unsigned long address);
+void bfadcan_write_register(unsigned char data, unsigned long address);
+
+
+/**
+ * bfadcan_request_io: - reserve io memory
+ * @io_addr: The reserved memory starts at @io_addr, wich is the module
+ * parameter @io.
+ *
+ * The function bfadcan_request_io() is used to reserve the io-memory. If your
+ * hardware uses a dedicated memory range as hardware control registers you
+ * will have to add the code to reserve this memory as well.
+ * %IO_RANGE is the io-memory range that gets reserved, please adjust according
+ * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
+ * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
+ * Return Value: The function returns zero on success or %-ENODEV on failure
+ * File: src/bfadcan.c
+ */
+int bfadcan_request_io(unsigned long io_addr)
+{
+ if (check_region(io_addr,IO_RANGE)) {
+ CANMSG("Unable to open port: 0x%lx\n",io_addr);
+ return -ENODEV;
+ }
+ else {
+ request_region(io_addr,IO_RANGE,DEVICE_NAME);
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + IO_RANGE - 1);
+ }
+ return 0;
+}
+
+/**
+ * bfadcan_release_io - free reserved io-memory
+ * @io_addr: Start of the memory range to be released.
+ *
+ * The function bfadcan_release_io() is used to free reserved io-memory.
+ * In case you have reserved more io memory, don't forget to free it here.
+ * IO_RANGE is the io-memory range that gets released, please adjust according
+ * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
+ * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
+ * Return Value: The function always returns zero
+ * File: src/bfadcan.c
+ */
+int bfadcan_release_io(unsigned long io_addr)
+{
+ release_region(io_addr,IO_RANGE);
+
+ return 0;
+}
+
+/**
+ * bfadcan_reset - hardware reset routine
+ * @card: Number of the hardware card.
+ *
+ * The function bfadcan_reset() is used to give a hardware reset. This is
+ * rather hardware specific so I haven't included example code. Don't forget to
+ * check the reset status of the chip before returning.
+ * Return Value: The function returns zero on success or %-ENODEV on failure
+ * File: src/bfadcan.c
+ */
+int bfadcan_reset(int card)
+{
+
+ int i;
+ struct chip_t *chip=candevices_p[card]->chip[0];
+ unsigned cdr;
+
+ bfadcan_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
+ udelay(1000);
+
+ cdr=bfadcan_read_register(chip->chip_base_addr+SJACDR);
+ bfadcan_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+
+ bfadcan_write_register(0, chip->chip_base_addr+SJAIER);
+
+ i=20;
+ bfadcan_write_register(0, chip->chip_base_addr+SJAMOD);
+ while (bfadcan_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
+ if(!i--) return -ENODEV;
+ udelay(1000);
+ bfadcan_write_register(0, chip->chip_base_addr+SJAMOD);
+ }
+
+ cdr=bfadcan_read_register(chip->chip_base_addr+SJACDR);
+ bfadcan_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+
+ bfadcan_write_register(0, chip->chip_base_addr+SJAIER);
+
+ return 0;
+}
+
+#define RESET_ADDR 0x202
+#define NR_82527 0
+#define NR_SJA1000 1
+
+/**
+ * bfadcan_init_hw_data - Initialze hardware cards
+ * @card: Number of the hardware card.
+ *
+ * The function bfadcan_init_hw_data() is used to initialize the hardware
+ * structure containing information about the installed CAN-board.
+ * %RESET_ADDR represents the io-address of the hardware reset register.
+ * %NR_82527 represents the number of intel 82527 chips on the board.
+ * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
+ * The flags entry can currently only be %PROGRAMMABLE_IRQ to indicate that
+ * the hardware uses programmable interrupts.
+ * Return Value: The function always returns zero
+ * File: src/bfadcan.c
+ */
+int bfadcan_init_hw_data(int card)
+{
+ candevices_p[card]->res_addr=RESET_ADDR;
+ candevices_p[card]->nr_82527_chips=NR_82527;
+ candevices_p[card]->nr_sja1000_chips=NR_SJA1000;
+ candevices_p[card]->flags |= 0 /* PROGRAMMABLE_IRQ */ ;
+
+ return 0;
+}
+
+#define CHIP_TYPE "sja1000p"
+/**
+ * bfadcan_init_chip_data - Initialize chips
+ * @card: Number of the hardware card
+ * @chipnr: Number of the CAN chip on the hardware card
+ *
+ * The function bfadcan_init_chip_data() is used to initialize the hardware
+ * structure containing information about the CAN chips.
+ * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
+ * "sja1000".
+ * The @chip_base_addr entry represents the start of the 'official' memory map
+ * of the installed chip. It's likely that this is the same as the @io_addr
+ * argument supplied at module loading time.
+ * The @clock entry holds the chip clock value in Hz.
+ * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
+ * register. Options defined in the %sja1000.h file:
+ * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
+ * The entry @sja_ocr_reg holds hardware specific options for the Output Control
+ * register. Options defined in the %sja1000.h file:
+ * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
+ * %OCR_TX0_LH, %OCR_TX1_ZZ.
+ * The entry @int_clk_reg holds hardware specific options for the Clock Out
+ * register. Options defined in the %i82527.h file:
+ * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
+ * The entry @int_bus_reg holds hardware specific options for the Bus
+ * Configuration register. Options defined in the %i82527.h file:
+ * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
+ * The entry @int_cpu_reg holds hardware specific options for the cpu interface
+ * register. Options defined in the %i82527.h file:
+ * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
+ * Return Value: The function always returns zero
+ * File: src/bfadcan.c
+ */
+int bfadcan_init_chip_data(int card, int chipnr)
+{
+ unsigned int id1, id2;
+ candevices_p[card]->chip[chipnr]->chip_type=CHIP_TYPE;
+ candevices_p[card]->chip[chipnr]->chip_base_addr=candevices_p[card]->io_addr;
+ candevices_p[card]->chip[chipnr]->clock = clock_freq;
+ candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC;
+ candevices_p[card]->chip[chipnr]->int_clk_reg = iCLK_SL1;
+ candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY;
+ candevices_p[card]->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
+ candevices_p[card]->chip[chipnr]->sja_ocr_reg = OCR_MODE_NORMAL |
+ OCR_TX0_LH;
+ id1 = inb(0xe284);
+ id2 = inb(0xe285);
+
+
+ CANMSG("can driver ver 0.7.1-tm5, at %04lx, CPLD v%d.%d.%d.%d\n",
+ candevices_p[card]->chip[chipnr]->chip_base_addr,
+ id1>>4, id1&0x0f, id2>>4, id2&0x0f);
+
+
+ return 0;
+}
+
+/**
+ * bfadcan_init_obj_data - Initialize message buffers
+ * @chipnr: Number of the CAN chip
+ * @objnr: Number of the message buffer
+ *
+ * The function bfadcan_init_obj_data() is used to initialize the hardware
+ * structure containing information about the different message objects on the
+ * CAN chip. In case of the sja1000 there's only one message object but on the
+ * i82527 chip there are 15.
+ * The code below is for a i82527 chip and initializes the object base addresses
+ * The entry @obj_base_addr represents the first memory address of the message
+ * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
+ * base address.
+ * Unless the hardware uses a segmented memory map, flags can be set zero.
+ * Return Value: The function always returns zero
+ * File: src/bfadcan.c
+ */
+int bfadcan_init_obj_data(int chipnr, int objnr)
+{
+ chips_p[chipnr]->msgobj[objnr]->obj_base_addr=chips_p[chipnr]->chip_base_addr+(objnr+1)*0x10;
+ chips_p[chipnr]->msgobj[objnr]->flags=0;
+
+ return 0;
+}
+
+/**
+ * bfadcan_program_irq - program interrupts
+ * @card: Number of the hardware card.
+ *
+ * The function bfadcan_program_irq() is used for hardware that uses
+ * programmable interrupts. If your hardware doesn't use programmable interrupts
+ * you should not set the @candevices_t->flags entry to %PROGRAMMABLE_IRQ and
+ * leave this function unedited. Again this function is hardware specific so
+ * there's no example code.
+ * Return value: The function returns zero on success or %-ENODEV on failure
+ * File: src/bfadcan.c
+ */
+int bfadcan_program_irq(int card)
+{
+ return 0;
+}
+
+/**
+ * bfadcan_write_register - Low level write register routine
+ * @data: data to be written
+ * @address: memory address to write to
+ *
+ * The function bfadcan_write_register() is used to write to hardware registers
+ * on the CAN chip. You should only have to edit this function if your hardware
+ * uses some specific write process.
+ * Return Value: The function does not return a value
+ * File: src/bfadcan.c
+ */
+void bfadcan_write_register(unsigned char data, unsigned long address)
+{
+#ifdef WINDOWED_ACCESS
+ long flags;
+ spin_lock_irqsave(&bfadcan_win_lock,flags);
+ outb(address&0x00ff,0x200);
+ outb(data, 0x201);
+ spin_unlock_irqrestore(&bfadcan_win_lock,flags);
+#else
+ outb(data,address);
+#endif
+}
+
+/**
+ * bfadcan_read_register - Low level read register routine
+ * @address: memory address to read from
+ *
+ * The function bfadcan_read_register() is used to read from hardware registers
+ * on the CAN chip. You should only have to edit this function if your hardware
+ * uses some specific read process.
+ * Return Value: The function returns the value stored in @address
+ * File: src/bfadcan.c
+ */
+unsigned bfadcan_read_register(unsigned long address)
+{
+#ifdef WINDOWED_ACCESS
+ long flags;
+ int ret;
+ spin_lock_irqsave(&bfadcan_win_lock,flags);
+ outb(address&0x00ff,0x200);
+ ret = inb(0x201);
+ spin_unlock_irqrestore(&bfadcan_win_lock,flags);
+ return ret;
+#else
+ return inb(address);
+#endif
+}
+
+/* !!! Don't change this function !!! */
+int bfadcan_register(struct hwspecops_t *hwspecops)
+{
+ hwspecops->request_io = bfadcan_request_io;
+ hwspecops->release_io = bfadcan_release_io;
+ hwspecops->reset = bfadcan_reset;
+ hwspecops->init_hw_data = bfadcan_init_hw_data;
+ hwspecops->init_chip_data = bfadcan_init_chip_data;
+ hwspecops->init_obj_data = bfadcan_init_obj_data;
+ hwspecops->write_register = bfadcan_write_register;
+ hwspecops->read_register = bfadcan_read_register;
+ hwspecops->program_irq = bfadcan_program_irq;
+ return 0;
+}
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