/* smartcan.c
* Linux CAN-bus device driver.
* Written by Arnaud Westenberg email:arnaud@wanadoo.nl
+ * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
+ * email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
- * Version 0.7 6 Aug 2001
+ * Version lincan-0.3 17 Jun 2004
*/
-#include <linux/autoconf.h>
-#if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
-#define MODVERSIONS
-#endif
-
-#if defined (MODVERSIONS)
-#include <linux/modversions.h>
-#endif
-
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/sched.h>
-#include <asm/errno.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-
+#include "../include/can.h"
+#include "../include/can_sysdep.h"
#include "../include/main.h"
#include "../include/smartcan.h"
#include "../include/i82527.h"
int smartcan_irq=-1;
unsigned long smartcan_base=0x0;
-int smartcan_request_io(unsigned long io_addr)
-{
- int err=0;
+static CAN_DEFINE_SPINLOCK(smartcan_port_lock);
- if ( (err=check_region(io_addr,0x04)) < 0 ) {
- CANMSG("Unable to open port: 0x%lx\n",io_addr);
+int smartcan_request_io(struct candevice_t *candev)
+{
+ if (!can_request_io_region(candev->io_addr,0x04,DEVICE_NAME)) {
+ CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
- }
- else {
- request_region(io_addr,0x04,DEVICE_NAME);
- DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + 0x04 - 1);
+ }else {
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + 0x04 - 1);
}
return 0;
}
-int smartcan_release_io(unsigned long io_addr)
+int smartcan_release_io(struct candevice_t *candev)
{
- release_region(io_addr,0x04);
+ can_release_io_region(candev->io_addr,0x04);
return 0;
}
-int smartcan_reset(int card)
+int smartcan_reset(struct candevice_t *candev)
{
int i=0;
DEBUGMSG("Resetting smartcan hardware ...\n");
- outb(0x00,candevices_p[card]->res_addr);
+ outb(0x00,candev->res_addr);
while (i < 1000000) {
i++;
- outb(0x01,candevices_p[card]->res_addr);
+ outb(0x01,candev->res_addr);
}
- outb(0x00,candevices_p[card]->res_addr);
+ outb(0x00,candev->res_addr);
/* Check hardware reset status */
i=0;
- outb(candevices_p[card]->io_addr+iCPU,candevices_p[card]->io_addr);
- while ( (inb(candevices_p[card]->io_addr+1)&0x80) && (i<=15) ) {
+ outb(candev->io_addr+iCPU,candev->io_addr);
+ while ( (inb(candev->io_addr+1)&0x80) && (i<=15) ) {
udelay(20000);
i++;
}
return 0;
}
-int smartcan_init_hw_data(int card)
+int smartcan_init_hw_data(struct candevice_t *candev)
{
- candevices_p[card]->res_addr=candevices_p[card]->io_addr+0x02;
- candevices_p[card]->nr_82527_chips=1;
- candevices_p[card]->nr_sja1000_chips=0;
-
+ candev->res_addr=candev->io_addr+0x02;
+ candev->nr_82527_chips=1;
+ candev->nr_sja1000_chips=0;
+ candev->nr_all_chips=1;
+
return 0;
}
-int smartcan_init_chip_data(int card, int chipnr)
+int smartcan_init_chip_data(struct candevice_t *candev, int chipnr)
{
- candevices_p[card]->chip[chipnr]->chip_type="i82527";
- candevices_p[card]->chip[chipnr]->chip_base_addr=candevices_p[card]->io_addr;
- candevices_p[card]->chip[chipnr]->clock = 16000000;
- candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC;
- candevices_p[card]->chip[chipnr]->int_clk_reg = iCLK_SL1;
- candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY;
- candevices_p[card]->chip[chipnr]->sja_cdr_reg = 0;
- candevices_p[card]->chip[chipnr]->sja_ocr_reg = 0;
- smartcan_irq=candevices_p[card]->chip[chipnr]->chip_irq;
- smartcan_base=candevices_p[card]->chip[chipnr]->chip_base_addr;
+ i82527_fill_chipspecops(candev->chip[chipnr]);
+ candev->chip[chipnr]->chip_base_addr=candev->io_addr;
+ candev->chip[chipnr]->clock = 16000000;
+ candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
+ candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
+ candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
+ candev->chip[chipnr]->sja_cdr_reg = 0;
+ candev->chip[chipnr]->sja_ocr_reg = 0;
+ smartcan_irq=candev->chip[chipnr]->chip_irq;
+ smartcan_base=candev->chip[chipnr]->chip_base_addr;
return 0;
}
-int smartcan_init_obj_data(int chipnr, int objnr)
+int smartcan_init_obj_data(struct canchip_t *chip, int objnr)
{
- chips_p[chipnr]->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
- chips_p[chipnr]->msgobj[objnr]->flags=0;
+ chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
return 0;
}
-void smartcan_write_register(unsigned char data, unsigned long address)
+void smartcan_write_register(unsigned data, unsigned long address)
{
- disable_irq(smartcan_irq);
+ can_spin_irqflags_t flags;
+ can_spin_lock_irqsave(&smartcan_port_lock,flags);
outb(address-smartcan_base,smartcan_base);
outb(data,smartcan_base+1);
- enable_irq(smartcan_irq);
+ can_spin_unlock_irqrestore(&smartcan_port_lock,flags);
}
unsigned smartcan_read_register(unsigned long address)
{
unsigned ret;
- disable_irq(smartcan_irq);
+ can_spin_irqflags_t flags;
+ can_spin_lock_irqsave(&smartcan_port_lock,flags);
outb(address-smartcan_base,smartcan_base);
ret=inb(smartcan_base+1);
- enable_irq(smartcan_irq);
+ can_spin_unlock_irqrestore(&smartcan_port_lock,flags);
return ret;
}
-int smartcan_program_irq(int card)
+int smartcan_program_irq(struct candevice_t *candev)
{
CANMSG("The 'smartcan' card doesn't have programmable interrupts\n");
return 0;