extern int stdmask;
extern int extmask;
-can_spinlock_t c_can_spwlock = SPIN_LOCK_UNLOCKED; // Spin lock for write operations
-can_spinlock_t c_can_sprlock = SPIN_LOCK_UNLOCKED; // Spin lock for read operations
-can_spinlock_t c_can_if1lock = SPIN_LOCK_UNLOCKED; // spin lock for the if1 register
-can_spinlock_t c_can_if2lock = SPIN_LOCK_UNLOCKED; // spin lcok for the if2 register
+CAN_DEFINE_SPINLOCK(c_can_spwlock); // Spin lock for write operations
+CAN_DEFINE_SPINLOCK(c_can_sprlock); // Spin lock for read operations
+CAN_DEFINE_SPINLOCK(c_can_if1lock); // spin lock for the if1 register
+CAN_DEFINE_SPINLOCK(c_can_if2lock); // spin lcok for the if2 register
/**
* c_can_enable_configuration - enable chip configuration mode
return -1;
if (pchip->baudrate == 0)
- pchip->baudrate = 1000;
+ pchip->baudrate = 1000000;
if (c_can_baud_rate
- (pchip, pchip->baudrate * 1000, pchip->clock, 0, 75, 0)) {
+ (pchip, pchip->baudrate, pchip->clock, 0, 75, 0)) {
CANMSG("Error configuring baud rate\n");
return -ENODEV;
}
unsigned short comreg = 0;
comreg = c_can_read_reg_w(pchip, CCIF1CR);
- while ((comreg & IFXCR_BUSY) && (i <= 10)) {
- udelay(100); //100 microseconds
+ while ((comreg & IFXCR_BUSY) && (i <= 100)) {
+ udelay(1); //1 microseconds
i++;
comreg = c_can_read_reg_w(pchip, CCIF1CR);
}
unsigned short comreg = 0;
comreg = c_can_read_reg_w(pchip, CCIF2CR);
- while ((comreg & IFXCR_BUSY) && (i <= 10)) {
- udelay(100); //100 microseconds
+ while ((comreg & IFXCR_BUSY) && (i <= 100)) {
+ udelay(1); //1 microseconds
i++;
comreg = c_can_read_reg_w(pchip, CCIF2CR);
}
if (c_can_if1_busycheck(pmsgobj->hostchip))
return -ENODEV;
+ //set indication, that mask is used
+ tempreg = c_can_read_reg_w(pmsgobj->hostchip, CCIF1DMC);
+ c_can_write_reg_w(pmsgobj->hostchip, tempreg | IFXMC_UMASK,
+ CCIF1DMC);
+
//writing acceptance mask for extended or standart mode
if (can_msgobj_test_fl(pmsgobj, RX_MODE_EXT)) {
if (usedirbit)
((mask << 2) & 0x1FFC), CCIF1M2);
c_can_write_reg_w(pmsgobj->hostchip, 0, CCIF1M1);
}
+
//seting Message Valid Bit to one
tempreg = c_can_read_reg_w(pmsgobj->hostchip, CCIF1A2);
c_can_write_reg_w(pmsgobj->hostchip, tempreg | IFXARB2_MVAL, CCIF1A2);