/* Publication of enhanced or derived LinCAN files is required although. */
/**************************************************************************/
+// #define CAN_DEBUG
+
#include "./can.h"
#include "./constants.h"
#include "./can_sysdep.h"
int nr_all_chips;
int nr_82527_chips;
int nr_sja1000_chips;
+ int nr_mcp2515_chips;
can_spinlock_t device_lock;
struct canchip_t *chip[MAX_HW_CHIPS];
struct canhardware_t *hosthardware_p;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
+ struct kref refcount;
+#endif
+
union {
void *anydev;
#ifdef CAN_ENABLE_PCI_SUPPORT
int chip_idx; /* chip index in candevice_t.chip[] */
int chip_irq;
can_ioptr_t chip_base_addr;
- unsigned int flags;
+ uint16_t flags;
long clock; /* Chip clock in Hz */
long baudrate;
void (*write_register)(unsigned data, can_ioptr_t address);
unsigned (*read_register)(can_ioptr_t address);
+ /* SPI / mcp2515 specific */
+ int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
+ void (*spi_release_bus)(struct candevice_t *candev, short channel);
+ int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
+ int (*spi_async_transfer)(struct candevice_t *candev, void (*callback)(void *data, uint8_t count), void *data, uint8_t count, uint8_t fasthandler);
+ short spi_channel;
+
+
void *chip_data;
unsigned short sja_cdr_reg; /* sja1000 only! */
int (*program_irq)(struct candevice_t *candev);
void (*write_register)(unsigned data, can_ioptr_t address);
unsigned (*read_register)(can_ioptr_t address);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
+ void (*release_device)(struct kref *refcount);
+#endif
+
+ int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
+ void (*spi_release_bus)(struct candevice_t *candev, short channel);
+ int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
+ int (*spi_async_transfer)(struct candevice_t *candev, void (*callback)(void *data, uint8_t count), void *data, uint8_t count, uint8_t fasthandler);
};
/**
* @stop_chip: stops chip message processing
* @irq_handler: interrupt service routine
* @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
+ * @get_info: retrieve chp-specifc info for display in proc fs
*/
struct chipspecops_t {
int (*chip_config)(struct canchip_t *chip);
int (*stop_chip)(struct canchip_t *chip);
int (*irq_handler)(int irq, struct canchip_t *chip);
int (*irq_accept)(int irq, struct canchip_t *chip);
+ int (*reset_chip)(struct canchip_t *chip);
+ int (*get_info)(struct canchip_t *chip, char *buf);
};
struct mem_addr {
#define CONFIG_OC_LINCAN_DYNAMICIO
#endif
+#define SPI_MESSAGE_LENGTH (32)
+
+/**
+ * struct can_spi_async_t - SPI asynchronous communication supplemental data
+ * @chip: pointer to the chip structure
+ * @opcode: Operation code to be identified by spi_async callback function
+ * @tx_buf: a read-only copy of the transfer buffer
+ * @rx_buf: a read-only copy of the transfer buffer
+ * @len: length of the transmitted buffer
+ * @obj: lincan message for data transmission
+ */
+struct can_spi_async_t{
+ struct canchip_t *chip;
+ uint8_t opcode;
+ uint8_t tx_buf[SPI_MESSAGE_LENGTH];
+ uint8_t rx_buf[SPI_MESSAGE_LENGTH];
+ size_t len;
+ struct msgobj_t *obj;
+ canmsg_tstamp_t timestamp;
+};
+
+
/* Inline function to write to the hardware registers. The argument reg_offs is
* relative to the memory map of the chip and not the absolute memory reg_offs.
*/
return chip->read_register(address_to_read);
}
+extern inline int can_spi_transfer(struct canchip_t *chip, void *tx, void *rx, uint16_t len)
+{
+ return chip->spi_transfer(chip->hostdevice, tx, rx, len);
+}
+
+extern inline int can_spi_async_transfer(struct canchip_t *chip, void (*callback)(void *data, uint8_t count), struct can_spi_async_t *data, uint8_t count, uint8_t fasthandler)
+{
+ return chip->spi_async_transfer(chip->hostdevice, callback, data, count, fasthandler);
+}
+
+extern inline int can_spi_acquire_bus(struct canchip_t *chip, int block)
+{
+ return chip->spi_acquire_bus(chip->hostdevice, chip->spi_channel, block);
+}
+
+extern inline void can_spi_release_bus(struct canchip_t *chip)
+{
+ chip->spi_release_bus(chip->hostdevice, chip->spi_channel);
+}
+
+
extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned char data, unsigned reg_offs)
{
extern int can_rtl_priority;
#endif /*CAN_WITH_RTL*/
-extern struct candevice_t* register_usbdev(const char *hwname,void *devdata,void (*chipdataregfnc)(struct canchip_t *chip,void *data));
-extern void cleanup_usbdev(struct candevice_t *dev);
+extern struct candevice_t* register_hotplug_dev(const char *hwname,int (*chipdataregfnc)(struct canchip_t *chip,void *data),void *devdata);
+extern void deregister_hotplug_dev(struct candevice_t *dev);
+extern void cleanup_hotplug_dev(struct candevice_t *dev);