* Rewritten for new CAN queues by Pavel Pisa - OCERA team member
* email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
- * Version lincan-0.2 9 Jul 2003
+ * Version lincan-0.3 17 Jun 2004
*/
-#include <linux/autoconf.h>
-
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <asm/errno.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-
+#include "../include/can.h"
+#include "../include/can_sysdep.h"
#include "../include/main.h"
#include "../include/nsi.h"
#include "../include/i82527.h"
int nsican_irq=-1;
unsigned long nsican_base=0x0;
+static CAN_DEFINE_SPINLOCK(nsican_port_lock);
+
/* IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips.
* RESET_ADDR represents the io-address of the hardware reset register.
* NR_82527 represents the number of intel 82527 chips on the board.
* NR_SJA1000 represents the number of philips sja1000 chips on the board.
- * The flags entry can currently only be PROGRAMMABLE_IRQ to indicate that
+ * The flags entry can currently only be CANDEV_PROGRAMMABLE_IRQ to indicate that
* the hardware uses programmable interrupts.
*/
#define RESET_ADDR 0x02
candev->nr_82527_chips=1;
candev->nr_sja1000_chips=0;
candev->nr_all_chips=1;
- candev->flags |= PROGRAMMABLE_IRQ;
+ candev->flags |= CANDEV_PROGRAMMABLE_IRQ;
return 0;
}
* argument supplied at module loading time.
* The clock argument holds the chip clock value in Hz.
*/
-#define CHIP_TYPE "i82527"
int nsi_init_chip_data(struct candevice_t *candev, int chipnr)
{
- candev->chip[chipnr]->chip_type=CHIP_TYPE;
+ i82527_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->chip_base_addr=
candev->io_addr;
candev->chip[chipnr]->clock = 16000000;
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
*/
-int nsi_init_obj_data(struct chip_t *chip, int objnr)
+int nsi_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
- chip->msgobj[objnr]->flags=0;
return 0;
}
/* The function template_program_irq is used for hardware that uses programmable
* interrupts. If your hardware doesn't use programmable interrupts you should
- * not set the candevices_t->flags entry to PROGRAMMABLE_IRQ and leave this
+ * not set the candevices_t->flags entry to CANDEV_PROGRAMMABLE_IRQ and leave this
* function unedited. Again this function is hardware specific so there's no
* example code.
*/
* on the CAN chip. You should only have to edit this function if your hardware
* uses some specific write process.
*/
-void nsi_write_register(unsigned char data, unsigned long address)
+void nsi_write_register(unsigned data, unsigned long address)
{
/* address is an absolute address */
We use the two register, we write the address where we
want to read in a first time. In a second time we read the
data */
- unsigned char ret;
+ unsigned char ret;
+ can_spin_irqflags_t flags;
- disable_irq(nsican_irq);
- outb(address-nsican_base, nsican_base);
- ret=inb(nsican_base+1);
- enable_irq(nsican_irq);
- return ret;
+ can_spin_lock_irqsave(&nsican_port_lock,flags);
+ outb(address-nsican_base, nsican_base);
+ ret=inb(nsican_base+1);
+ can_spin_unlock_irqrestore(&nsican_port_lock,flags);
+ return ret;
}