* Version lincan-0.2 9 Jul 2003
*/
-#include <linux/autoconf.h>
-
-#include <linux/sched.h>
-#include <linux/delay.h>
-#include <asm/irq.h>
-
+#include "../include/can.h"
+#include "../include/can_sysdep.h"
#include "../include/main.h"
#include "../include/sja1000.h"
int i=0;
unsigned flags;
- disable_irq(chip->chip_irq);
+ can_disable_irq(chip->chip_irq);
flags=can_read_reg(chip,SJACR);
}
if (i>=10) {
CANMSG("Reset error\n");
- enable_irq(chip->chip_irq);
+ can_enable_irq(chip->chip_irq);
return -ENODEV;
}
return -ENODEV;
}
- enable_irq(chip->chip_irq);
+ can_enable_irq(chip->chip_irq);
return 0;
}
if (sja1000_standard_mask(chip,0x0000, 0xffff))
return -ENODEV;
- if (!baudrate)
- baudrate=1000;
- if (sja1000_baud_rate(chip,1000*baudrate,chip->clock,0,75,0))
+ if (!chip->baudrate)
+ chip->baudrate=1000000;
+ if (sja1000_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
return -ENODEV;
/* Enable hardware interrupts */
struct canmsg_t *msg)
{
int i=0, id=0;
+ int len;
sja1000_start_chip(chip); //sja1000 goes automatically into reset mode on errors
can_write_reg(chip, CMR_AT, SJACMR);
i=0;
while ( !(can_read_reg(chip, SJASR) & SR_TBS) &&
- i++<MAX_TRANSMIT_WAIT_LOOPS) {
+ i++<MAX_TRANSMIT_WAIT_LOOPS) {
udelay(i);
}
if (!(can_read_reg(chip, SJASR) & SR_TBS)) {
}
}
- id = (msg->id<<5) | ((msg->flags&MSG_RTR)?ID0_RTR:0) | msg->length;
+ len = msg->length;
+ if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
+ id = (msg->id<<5) | ((msg->flags&MSG_RTR)?ID0_RTR:0) | len;
can_write_reg(chip, id>>8, SJATXID1);
can_write_reg(chip, id & 0xff , SJATXID0);
- for (i=0; i<msg->length; i++)
+ for (i=0; i<len; i++)
can_write_reg(chip, msg->data[i], SJATXDAT0+i);
return 0;
}
-irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+can_irqreturn_t sja1000_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
{
unsigned irq_register;
struct chip_t *chip=(struct chip_t *)dev_id;
// can_read_reg(chip, SJASR));
if ((irq_register & (IR_WUI|IR_DOI|IR_EI|IR_TI|IR_RI)) == 0)
- return IRQ_NONE;
+ return CAN_IRQ_NONE;
if ((irq_register & IR_RI) != 0)
sja1000_irq_read_handler(chip, obj);
if ((irq_register & IR_TI) != 0) {
- set_bit(OBJ_TX_REQUEST,&obj->flags);
- while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
- clear_bit(OBJ_TX_REQUEST,&obj->flags);
+ can_msgobj_set_fl(obj,TX_REQUEST);
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+ can_msgobj_clear_fl(obj,TX_REQUEST);
if (can_read_reg(chip, SJASR) & SR_TBS)
sja1000_irq_write_handler(chip, obj);
- clear_bit(OBJ_TX_LOCK,&obj->flags);
- if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
}
}
}
}
- return IRQ_HANDLED;
+ return CAN_IRQ_HANDLED;
}
void sja1000_irq_read_handler(struct chip_t *chip, struct msgobj_t *obj)
{
- int i=0, id=0;
+ int i=0, id=0, len;
do {
id = can_read_reg(chip, SJARXID0) | (can_read_reg(chip, SJARXID1)<<8);
- obj->rx_msg.length = id & 0x0f;
+ obj->rx_msg.length = len = id & 0x0f;
obj->rx_msg.flags = id&ID0_RTR ? MSG_RTR : 0;
obj->rx_msg.timestamp = 0;
obj->rx_msg.cob = 0;
obj->rx_msg.id = id>>5;
- for (i=0; i<obj->rx_msg.length; i++)
+ if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
+ for (i=0; i<len; i++)
obj->rx_msg.data[i]=can_read_reg(chip, SJARXDAT0 + i);
can_write_reg(chip, CMR_RRB, SJACMR);
int cmd;
if(obj->tx_slot){
+ /* Do local transmitted message distribution if enabled */
+ if (processlocal){
+ obj->tx_slot->msg.flags |= MSG_LOCAL;
+ canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
+ }
+ /* Free transmitted slot */
canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
obj->tx_slot=NULL;
}
*/
int sja1000_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
{
- /* dummy lock to prevent preemption fully portable way */
- spinlock_t dummy_lock;
-
- /* preempt_disable() */
- spin_lock_init(&dummy_lock);
- spin_lock(&dummy_lock);
+ can_preempt_disable();
- set_bit(OBJ_TX_REQUEST,&obj->flags);
- while(!test_and_set_bit(OBJ_TX_LOCK,&obj->flags)){
- clear_bit(OBJ_TX_REQUEST,&obj->flags);
+ can_msgobj_set_fl(obj,TX_REQUEST);
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
+ can_msgobj_clear_fl(obj,TX_REQUEST);
if (can_read_reg(chip, SJASR) & SR_TBS)
sja1000_irq_write_handler(chip, obj);
- clear_bit(OBJ_TX_LOCK,&obj->flags);
- if(!test_bit(OBJ_TX_REQUEST,&obj->flags)) break;
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
}
- /* preempt_enable(); */
- spin_unlock(&dummy_lock);
+ can_preempt_enable();
return 0;
}