Use mdelay instead of udelay for long times.

[lincan.git] / lincan / src / m437.c

diff --git a/lincan/src/m437.c b/lincan/src/m437.c
index 2786106359401394e5df8260e97b679cc78f5e46..da772e893d195835b8904992e32a5e43dd841c69 100644 (file)
--- a/lincan/src/m437.c
+++ b/lincan/src/m437.c
@@ -36,7 +36,7 @@
 
 /*
  * This driver has been designed to support "Memory (MEM)" mode.
- * For example: Memory, MEM:0xD0000 => io=0xD0000. 
+ * For example: Memory, MEM:0xD0000 => io=0xD0000.
  * Configure the card with m437set.com provided by seco before loading driver.
  * This software is released under the GPL-License.
  */
@@ -140,24 +140,24 @@ int m437_release_io(struct candevice_t *candev)
         */
 #if 0 /* Object reset method */
        unsigned i;
-       
+
         /* disable IRQ generation */
         m437_write_register(iCTL_CCE, candev->dev_base_addr+iCTL);
 
        /* clear all message objects */
        for (i=1; i<=15; i++) {
                m437_write_register(
-                               INTPD_RES | 
-                               RXIE_RES | 
-                               TXIE_RES | 
-                               MVAL_RES, 
+                               INTPD_RES |
+                               RXIE_RES |
+                               TXIE_RES |
+                               MVAL_RES,
                                candev->dev_base_addr+i*0x10+iMSGCTL0);
                m437_write_register(
-                               NEWD_RES | 
-                               MLST_RES | 
-                               CPUU_RES | 
-                               TXRQ_RES | 
-                               RMPD_RES, 
+                               NEWD_RES |
+                               MLST_RES |
+                               CPUU_RES |
+                               TXRQ_RES |
+                               RMPD_RES,
                                candev->dev_base_addr+i*0x10+iMSGCTL1);
        }
 
@@ -202,7 +202,7 @@ int m437_reset(struct candevice_t *candev)
        /* Check hardware reset status */
        i=0;
        while ( (m437_read_register(candev->dev_base_addr+iCPU) & iCPU_RST) && (i<=15)) {
-               udelay(20000);
+               mdelay(20);
                i++;
        }
        if (i>=15) {