2 * Linux CAN-bus device driver.
3 * Written for new CAN driver version by Pavel Pisa - OCERA team member
4 * email:pisa@cmp.felk.cvut.cz
5 * This software is released under the GPL-License.
6 * Version lincan-0.3 17 Jun 2004
9 #include "../include/can.h"
10 #include "../include/can_sysdep.h"
11 #include "../include/main.h"
12 #include "../include/unican_cl2.h"
13 #include "../include/setup.h"
15 #define UNICAN_PCI_VENDOR 0xFA3C
16 #define UNICAN_PCI_ID 0x0101
18 static void unican_delay(long msdelay)
21 if(!rtl_rt_system_is_idle()) {
22 rtl_delay(1000000l*msdelay);
24 #endif /*CAN_WITH_RTL*/
26 set_current_state(TASK_UNINTERRUPTIBLE);
27 schedule_timeout((msdelay*HZ)/1000+1);
33 long unican_bus_latency(struct msgobj_t *obj)
36 latency=obj->hostchip->baudrate;
38 latency=(long)HZ*1000/latency;
44 /* * * unican Chip Functionality * * */
46 int unican_enable_configuration(struct chip_t *chip)
51 int unican_disable_configuration(struct chip_t *chip)
57 * unican_chip_config: - can chip configuration
58 * @chip: pointer to chip state structure
60 * Return Value: negative value reports error.
63 int unican_chip_config(struct chip_t *chip)
66 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
70 /* disable all card interrupts */
71 ret = cl2_int_mode(chipext, INT_MODE_ALL*0);
73 CANMSG("disable interrupts by cl2_iit_mode returned %d\n",ret);
78 if (chip->baudrate == 0)
79 chip->baudrate=1000000;
81 ret = chip->chipspecops->baud_rate(chip,chip->baudrate,chip->clock,0,75,0);
83 CANMSG("can not set baudrate\n");
88 /* set interrupt inhibit time to 1 ms */
89 ret = cl2_set_iit(chipext, 10);
91 CANMSG("cl2_set_iit returned %d\n",ret);
96 /* enable start interrupt inhibit time command */
97 ret = cl2_iit_mode(chipext, 1);
99 CANMSG("cl2_iit_mode returned %d\n",ret);
104 /* enable all card interrupts */
105 ret = cl2_int_mode(chipext, INT_MODE_ALL);
107 CANMSG("cl2_iit_mode returned %d\n",ret);
112 /* generate interrupt command */
113 cl2_gen_interrupt(chipext);
120 * unican_extended_mask: - setup of extended mask for message filtering
121 * @chip: pointer to chip state structure
122 * @code: can message acceptance code
123 * @mask: can message acceptance mask
125 * Return Value: negative value reports error.
128 int unican_extended_mask(struct chip_t *chip, unsigned long code, unsigned long mask)
134 * unican_baud_rate: - set communication parameters.
135 * @chip: pointer to chip state structure
136 * @rate: baud rate in Hz
137 * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
138 * @sjw: synchronization jump width (0-3) prescaled clock cycles
139 * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
140 * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
142 * Return Value: negative value reports error.
145 int unican_baud_rate(struct chip_t *chip, int rate, int clock, int sjw,
146 int sampl_pt, int flags)
149 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
153 case 5000: bt_val = CL2_BITRATE_5K; break;
154 case 10000: bt_val = CL2_BITRATE_10K; break;
155 case 20000: bt_val = CL2_BITRATE_20K; break;
156 case 50000: bt_val = CL2_BITRATE_50K; break;
157 case 100000: bt_val = CL2_BITRATE_100K; break;
158 case 125000: bt_val = CL2_BITRATE_125K; break;
159 case 200000: bt_val = CL2_BITRATE_200K; break;
160 case 250000: bt_val = CL2_BITRATE_250K; break;
161 case 500000: bt_val = CL2_BITRATE_500K; break;
162 case 800000: bt_val = CL2_BITRATE_800K; break;
163 case 1000000:bt_val = CL2_BITRATE_1M; break;
164 default: return -EINVAL;
167 ret=cl2_set_bitrate(chipext,bt_val);
168 if(ret == CL2_COMMAND_BUSY) return -EBUSY;
169 if(ret != CL2_OK) return -EINVAL;
176 * unican_read: - reads and distributes one or more received messages
177 * @chip: pointer to chip state structure
178 * @obj: pinter to CAN message queue information
180 * This is rewritten cl2_receive_data function. The direct use of CL2
181 * function would require one more message data copy to reformat message
182 * data into different structure layout. Other way is to rewrite CL2 sources.
183 * No of these solutions is perfect.
187 void unican_read(struct chip_t *chip, struct msgobj_t *obj) {
188 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
191 unsigned long timestamp;
195 ptr16 = (__u16*)chipext->rxBufPtr;
196 u = unican_readw(ptr16++);
197 if ( !(u & CL2_MESSAGE_VALID) ) break; /* No more messages in the queue */
199 obj->rx_msg.id = ((__u32)(u & 0xFF00 )) << 16;
200 u = unican_readw(ptr16++);
201 obj->rx_msg.id |= ((__u32)( u & 0x00FF )) << 16;
202 obj->rx_msg.id |= (__u32)( u & 0xFF00 );
203 u = unican_readw(ptr16++);
204 obj->rx_msg.id |= (__u32)( u & 0x00FF );
209 if ( u & CL2_EXT_FRAME ) { /* 2.0B frame */
210 obj->rx_msg.id >>= 3;
211 obj->rx_msg.flags = MSG_EXT;
212 } else { /* 2.0A frame */
213 obj->rx_msg.id >>= 21;
214 obj->rx_msg.flags = 0;
217 /*if ( !(u & (CL2_REMOTE_FRAME<<8)) )
218 obj->rx_msg.flags |= MSG_RTR;*/
220 obj->rx_msg.length = ( (u >> 4) & 0x000F );
221 if(obj->rx_msg.length > CAN_MSG_LENGTH) obj->rx_msg.length = CAN_MSG_LENGTH;
223 for ( i = 0; i < obj->rx_msg.length; ) {
224 u = unican_readw(ptr16++);
225 obj->rx_msg.data[i++] = (__u8)( u );
226 obj->rx_msg.data[i++] = (__u8)( u >> 8 );
228 if ( obj->rx_msg.length & 0x01 ) { /* odd */
229 timestamp = ( (unican_readw(ptr16++) & 0x00FF) | (u & 0xFF00) );
231 u = unican_readw(ptr16++);
232 timestamp = (u << 8) | (u >> 8);
234 unican_writew(0x000,(__u16*)chipext->rxBufPtr);
236 #ifdef CAN_MSG_VERSION_2
237 obj->rx_msg.timestamp.tv_sec = 0;
238 obj->rx_msg.timestamp.tv_usec = timestamp;
239 #else /* CAN_MSG_VERSION_2 */
240 obj->rx_msg.timestamp = timestamp;
241 #endif /* CAN_MSG_VERSION_2 */
243 /* increment rx-buffer pointer */
244 if ( (chipext->rxBufBase + chipext->rxBufSize*16 ) <= (chipext->rxBufPtr += 16) ) {
245 chipext->rxBufPtr = chipext->rxBufBase;
248 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
254 * unican_pre_read_config: - prepares message object for message reception
255 * @chip: pointer to chip state structure
256 * @obj: pointer to message object state structure
258 * Return Value: negative value reports error.
259 * Positive value indicates immediate reception of message.
262 int unican_pre_read_config(struct chip_t *chip, struct msgobj_t *obj)
267 #define MAX_TRANSMIT_WAIT_LOOPS 10
269 * unican_pre_write_config: - prepares message object for message transmission
270 * @chip: pointer to chip state structure
271 * @obj: pointer to message object state structure
272 * @msg: pointer to CAN message
274 * Return Value: negative value reports error.
277 int unican_pre_write_config(struct chip_t *chip, struct msgobj_t *obj,
278 struct canmsg_t *msg)
284 * unican_send_msg: - initiate message transmission
285 * @chip: pointer to chip state structure
286 * @obj: pointer to message object state structure
287 * @msg: pointer to CAN message
289 * This function is called after unican_pre_write_config() function,
290 * which prepares data in chip buffer.
291 * Return Value: negative value reports error.
294 int unican_send_msg(struct chip_t *chip, struct msgobj_t *obj,
295 struct canmsg_t *msg)
301 * unican_check_tx_stat: - checks state of transmission engine
302 * @chip: pointer to chip state structure
304 * Return Value: negative value reports error.
305 * Positive return value indicates transmission under way status.
306 * Zero value indicates finishing of all issued transmission requests.
309 int unican_check_tx_stat(struct chip_t *chip)
315 * unican_set_btregs: - configures bitrate registers
316 * @chip: pointer to chip state structure
317 * @btr0: bitrate register 0
318 * @btr1: bitrate register 1
320 * Return Value: negative value reports error.
323 int unican_set_btregs(struct chip_t *chip, unsigned short btr0,
327 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
330 bt_val=btr0 | (btr1<<8);
331 ret=cl2_set_bitrate(chipext,bt_val);
332 if(ret == CL2_COMMAND_BUSY) return -EBUSY;
333 if(ret != CL2_OK) return -EINVAL;
339 * unican_stop_chip: - starts chip message processing
340 * @chip: pointer to chip state structure
342 * Return Value: negative value reports error.
345 int unican_start_chip(struct chip_t *chip)
351 * unican_stop_chip: - stops chip message processing
352 * @chip: pointer to chip state structure
354 * Return Value: negative value reports error.
357 int unican_stop_chip(struct chip_t *chip)
364 * unican_remote_request: - configures message object and asks for RTR message
365 * @chip: pointer to chip state structure
366 * @obj: pointer to message object structure
368 * Return Value: negative value reports error.
371 int unican_remote_request(struct chip_t *chip, struct msgobj_t *obj)
373 CANMSG("unican_remote_request not implemented\n");
378 * unican_standard_mask: - setup of mask for message filtering
379 * @chip: pointer to chip state structure
380 * @code: can message acceptance code
381 * @mask: can message acceptance mask
383 * Return Value: negative value reports error.
386 int unican_standard_mask(struct chip_t *chip, unsigned short code,
389 CANMSG("unican_standard_mask not implemented\n");
394 * unican_clear_objects: - clears state of all message object residing in chip
395 * @chip: pointer to chip state structure
397 * Return Value: negative value reports error.
400 int unican_clear_objects(struct chip_t *chip)
402 CANMSG("unican_clear_objects not implemented\n");
407 * unican_config_irqs: - tunes chip hardware interrupt delivery
408 * @chip: pointer to chip state structure
409 * @irqs: requested chip IRQ configuration
411 * Return Value: negative value reports error.
414 int unican_config_irqs(struct chip_t *chip, short irqs)
417 CANMSG("unican_config_irqs not implemented\n");
422 * unican_irq_write_handler: - part of ISR code responsible for transmit events
423 * @chip: pointer to chip state structure
424 * @obj: pointer to attached queue description
426 * The main purpose of this function is to read message from attached queues
427 * and transfer message contents into CAN controller chip.
428 * This subroutine is called by
429 * unican_irq_write_handler() for transmit events.
432 void unican_irq_write_handler(struct chip_t *chip, struct msgobj_t *obj)
435 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
436 __u16 *ptr16 = (__u16*)chipext->rxBufPtr;
438 unsigned long timestamp=0;
445 /* Do local transmitted message distribution if enabled */
447 obj->tx_slot->msg.flags |= MSG_LOCAL;
448 canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
450 /* Free transmitted slot */
451 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
456 if ( chipext->asyncTxBufSize==0 ) {
457 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
458 return; /* No asynchronous queue configured */
462 ptr16 = (__u16*)chipext->asyncTxBufPtr;
463 if(unican_readw(ptr16) & CL2_MESSAGE_VALID)
464 return; /* No free space in asynchronous Tx queue */
466 cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
468 return; /* No more messages to send */
471 cobid = obj->tx_slot->msg.id;
473 if ( (obj->tx_slot->msg.flags & MSG_EXT) ) { /* 2.0B frame */
475 } else { /* 2.0A frame */
479 u = ((cobid>>16) & 0x00FF ) + (cobid & 0xFF00);
480 unican_writew(u,ptr16++);
482 len = obj->tx_slot->msg.length;
483 if(len > CAN_MSG_LENGTH)
484 len = CAN_MSG_LENGTH;
485 u = (len << 12) | (cobid & 0x00FF);
487 if ( !(obj->tx_slot->msg.flags & MSG_RTR) )
488 u |= CL2_REMOTE_FRAME<<8;
489 if ( obj->tx_slot->msg.flags & MSG_EXT )
490 u |= CL2_EXT_FRAME<<8;
492 unican_writew(u,ptr16++);
494 for ( i = 0; i < len-1; ) {
495 u = obj->tx_slot->msg.data[i++];
496 u |= ((__u16)obj->tx_slot->msg.data[i]<<8); i++;
497 unican_writew(u,ptr16++);
500 unican_writew(timestamp,ptr16);
502 u = obj->tx_slot->msg.data[i++];
503 u |= ((timestamp & 0x00FF)<<8);
504 unican_writew(u,ptr16++);
505 unican_writew(timestamp & 0x00FF, ptr16);
508 u = ((cobid>>16) & 0xFF00) | CL2_MESSAGE_VALID;
509 unican_writew(u,(__u16*)chipext->asyncTxBufPtr);
511 if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
512 (chipext->asyncTxBufPtr += 16) ) {
513 chipext->asyncTxBufPtr = chipext->asyncTxBufBase;
517 /* Do local transmitted message distribution if enabled. */
518 /* This code should not be called directly there, because it breaks strict
519 behavior of queues if O_SYNC is set. */
521 obj->tx_slot->msg.flags |= MSG_LOCAL;
522 canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
524 /* Free transmitted slot */
525 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
534 void unican_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj)
536 while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
538 if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
539 unican_irq_write_handler(chip, obj);
542 /*if(can_msgobj_test_and_clear_fl(obj,FILTCH_REQUEST)) {
543 unican_irq_update_filter(chip, obj);
546 can_msgobj_clear_fl(obj,TX_LOCK);
547 if(can_msgobj_test_fl(obj,TX_REQUEST))
549 if(can_msgobj_test_fl(obj,FILTCH_REQUEST) && !obj->tx_slot)
559 * unican_irq_handler: - interrupt service routine
560 * @irq: interrupt vector number, this value is system specific
561 * @dev_id: driver private pointer registered at time of request_irq() call.
562 * The CAN driver uses this pointer to store relationship of interrupt
563 * to chip state structure - @struct chip_t
564 * @regs: system dependent value pointing to registers stored in exception frame
566 * Interrupt handler is activated when state of CAN controller chip changes,
567 * there is message to be read or there is more space for new messages or
568 * error occurs. The receive events results in reading of the message from
569 * CAN controller chip and distribution of message through attached
573 int unican_irq_handler(int irq, struct chip_t *chip)
575 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
576 struct msgobj_t *obj=chip->msgobj[0];
580 if(!(chip->flags&CHIP_CONFIGURED)) {
581 CANMSG("unican_irq_handler: called for non-configured device\n");
582 return CANCHIP_IRQ_NONE;
585 if (cl2_get_status(chipext, &status) == CL2_NO_REQUEST)
586 return CANCHIP_IRQ_NONE;
588 cl2_clear_interrupt(chipext);
591 if(status & CL2_CARD_ERROR) {
592 cl2_get_error(chipext, &error);
593 CANMSG("unican_irq_handler: card status=0x%04x error=0x%04x \n",status,error);
595 if(status & CL2_ASYNC_QUEUE_EMPTY) {
598 if(status & CL2_SYNC_QUEUE_EMPTY) {
599 can_msgobj_set_fl(obj,TX_REQUEST);
601 /* calls unican_irq_write_handler synchronized with other invocations */
602 unican_irq_sync_activities(chip, obj);
605 if(status & CL2_DATA_IN_RBUF) {
606 unican_read(chip, obj);
609 cl2_gen_interrupt(chipext);
611 return CANCHIP_IRQ_HANDLED;
615 /*void unican_do_tx_timeout(unsigned long data)
617 struct msgobj_t *obj=(struct msgobj_t *)data;
622 * unican_wakeup_tx: - wakeups TX processing
623 * @chip: pointer to chip state structure
624 * @obj: pointer to message object structure
626 * Return Value: negative value reports error.
629 int unican_wakeup_tx(struct chip_t *chip, struct msgobj_t *obj)
631 can_preempt_disable();
633 can_msgobj_set_fl(obj,TX_REQUEST);
635 /* calls unican_irq_write_handler synchronized with other invocations
636 from kernel and IRQ context */
637 unican_irq_sync_activities(chip, obj);
639 can_preempt_enable();
645 /* * * unican Board Functionality * * */
647 #define IO_RANGE 0x1000
650 * unican_request_io: - reserve io or memory range for can board
651 * @candev: pointer to candevice/board which asks for io. Field @io_addr
652 * of @candev is used in most cases to define start of the range
654 * Return Value: The function returns zero on success or %-ENODEV on failure
657 int unican_request_io(struct candevice_t *candev)
659 unsigned long remap_addr;
660 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - unican")) {
661 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
664 if ( !( remap_addr = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
665 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
666 can_release_mem_region(candev->io_addr,IO_RANGE);
670 can_base_addr_fixup(candev, remap_addr);
671 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
676 * unican_elease_io - free reserved io memory range
677 * @candev: pointer to candevice/board which releases io
679 * Return Value: The function always returns zero
682 int unican_release_io(struct candevice_t *candev)
684 iounmap((void*)candev->dev_base_addr);
685 can_release_mem_region(candev->io_addr,IO_RANGE);
690 * unican_reset - hardware reset routine
691 * @candev: Pointer to candevice/board structure
693 * Return Value: The function returns zero on success or %-ENODEV on failure
696 int unican_reset(struct candevice_t *candev)
700 struct chip_t *chip = candev->chip[0];
704 if(chip->chip_data == NULL) {
705 chip->chip_data = can_checked_malloc(sizeof(sCAN_CARD));
706 if(!chip->chip_data) return -ENOMEM;
707 memset(chip->chip_data,0,sizeof(sCAN_CARD));
708 ret = cl2_init_card(chip->chip_data,(void*)chip->chip_base_addr,chip->chip_irq);
710 CANMSG("cl2_init_card returned %d\n",ret);
715 chipext = (sCAN_CARD *)chip->chip_data;
718 /* reset and test whether the card is present */
720 cl2_reset_card(chipext);
723 ret = cl2_test_card(chipext);
724 } while((ret != CL2_OK)&&(i<10));
727 CANMSG("card check failed %d\n",ret);
731 /* start card firmware */
732 ret = cl2_start_firmware(chipext);
734 CANMSG("cl2_start_firmware returned %d\n",ret);
744 * unican_init_hw_data - Initialize hardware cards
745 * @candev: Pointer to candevice/board structure
747 * Return Value: The function always returns zero
750 int unican_init_hw_data(struct candevice_t *candev)
753 candev->nr_82527_chips=0;
754 candev->nr_sja1000_chips=0;
755 candev->nr_all_chips=1;
756 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
762 * unican_init_chip_data - Initialize chips
763 * @candev: Pointer to candevice/board structure
764 * @chipnr: Number of the CAN chip on the hardware card
766 * Return Value: The function always returns zero
769 int unican_init_chip_data(struct candevice_t *candev, int chipnr)
771 struct chip_t *chip = candev->chip[chipnr];
772 chip->chip_type = "unican";
773 chip->chip_base_addr = 0;
774 chip->clock = 10000000;
775 chip->int_clk_reg = 0x0;
776 chip->int_bus_reg = 0x0;
777 chip->max_objects = 1;
778 chip->chip_base_addr=candev->io_addr;
780 CANMSG("initializing unican chip operations\n");
781 chip->chipspecops->chip_config=unican_chip_config;
782 chip->chipspecops->baud_rate=unican_baud_rate;
783 chip->chipspecops->standard_mask=unican_standard_mask;
784 chip->chipspecops->extended_mask=unican_extended_mask;
785 chip->chipspecops->message15_mask=unican_extended_mask;
786 chip->chipspecops->clear_objects=unican_clear_objects;
787 chip->chipspecops->config_irqs=unican_config_irqs;
788 chip->chipspecops->pre_read_config=unican_pre_read_config;
789 chip->chipspecops->pre_write_config=unican_pre_write_config;
790 chip->chipspecops->send_msg=unican_send_msg;
791 chip->chipspecops->check_tx_stat=unican_check_tx_stat;
792 chip->chipspecops->wakeup_tx=unican_wakeup_tx;
793 chip->chipspecops->remote_request=unican_remote_request;
794 chip->chipspecops->enable_configuration=unican_enable_configuration;
795 chip->chipspecops->disable_configuration=unican_disable_configuration;
796 chip->chipspecops->set_btregs=unican_set_btregs;
797 chip->chipspecops->start_chip=unican_start_chip;
798 chip->chipspecops->stop_chip=unican_stop_chip;
799 chip->chipspecops->irq_handler=unican_irq_handler;
805 * unican_init_obj_data - Initialize message buffers
806 * @chip: Pointer to chip specific structure
807 * @objnr: Number of the message buffer
809 * Return Value: The function always returns zero
812 int unican_init_obj_data(struct chip_t *chip, int objnr)
814 struct msgobj_t *obj=chip->msgobj[objnr];
815 obj->obj_base_addr=chip->chip_base_addr;
816 /*obj->tx_timeout.function=unican_do_tx_timeout;
817 obj->tx_timeout.data=(unsigned long)obj;*/
822 * unican_program_irq - program interrupts
823 * @candev: Pointer to candevice/board structure
825 * Return value: The function returns zero on success or %-ENODEV on failure
828 int unican_program_irq(struct candevice_t *candev)
833 int unican_register(struct hwspecops_t *hwspecops)
835 hwspecops->request_io = unican_request_io;
836 hwspecops->release_io = unican_release_io;
837 hwspecops->reset = unican_reset;
838 hwspecops->init_hw_data = unican_init_hw_data;
839 hwspecops->init_chip_data = unican_init_chip_data;
840 hwspecops->init_obj_data = unican_init_obj_data;
841 hwspecops->write_register = NULL;
842 hwspecops->read_register = NULL;
843 hwspecops->program_irq = unican_program_irq;
848 /* Unicontrols PCI board specific functions */
850 #ifdef CAN_ENABLE_PCI_SUPPORT
852 int unican_pci_request_io(struct candevice_t *candev)
854 unsigned long remap_addr;
856 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
857 if(pci_request_region(candev->sysdevptr.pcidev, 0, "unican_pci") != 0){
858 CANMSG("Request of Unican PCI range failed\n");
861 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
862 if(pci_request_regions(candev->sysdevptr.pcidev, "kv_pcican") != 0){
863 CANMSG("Request of Unican PCI range failed\n");
866 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
868 candev->dev_base_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
869 candev->io_addr=candev->dev_base_addr;
870 candev->res_addr=candev->dev_base_addr;
872 if ( !( remap_addr = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
873 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
874 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
875 pci_release_region(candev->sysdevptr.pcidev, 0);
876 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
877 pci_release_regions(candev->sysdevptr.pcidev);
878 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
882 can_base_addr_fixup(candev, remap_addr);
883 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
884 DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
885 candev->dev_base_addr, candev->chip[0]->chip_base_addr);
891 int unican_pci_release_io(struct candevice_t *candev)
893 iounmap((void*)candev->dev_base_addr);
894 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
895 pci_release_region(candev->sysdevptr.pcidev, 0);
896 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
897 pci_release_regions(candev->sysdevptr.pcidev);
898 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
903 int unican_pci_init_hw_data(struct candevice_t *candev)
905 struct pci_dev *pcidev = NULL;
908 pcidev = pci_find_device(UNICAN_PCI_VENDOR, UNICAN_PCI_ID, pcidev);
909 if(pcidev == NULL) return -ENODEV;
910 } while(can_check_dev_taken(pcidev));
912 if (pci_enable_device (pcidev)){
913 printk(KERN_CRIT "Setup of Unican PCI failed\n");
916 candev->sysdevptr.pcidev=pcidev;
918 if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
919 printk(KERN_CRIT "Unican PCI region 0 is not MEM\n");
922 candev->dev_base_addr=pci_resource_start(pcidev,0);
923 candev->io_addr=candev->dev_base_addr;
924 candev->res_addr=candev->dev_base_addr;
926 /*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
928 candev->nr_82527_chips=0;
929 candev->nr_sja1000_chips=0;
930 candev->nr_all_chips=1;
936 int unican_pci_init_chip_data(struct candevice_t *candev, int chipnr)
939 candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
940 ret = unican_init_chip_data(candev, chipnr);
941 candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
945 int unican_pci_register(struct hwspecops_t *hwspecops)
947 hwspecops->request_io = unican_pci_request_io;
948 hwspecops->release_io = unican_pci_release_io;
949 hwspecops->reset = unican_reset;
950 hwspecops->init_hw_data = unican_pci_init_hw_data;
951 hwspecops->init_chip_data = unican_pci_init_chip_data;
952 hwspecops->init_obj_data = unican_init_obj_data;
953 hwspecops->write_register = NULL;
954 hwspecops->read_register = NULL;
955 hwspecops->program_irq = unican_program_irq;
959 #endif /*CAN_ENABLE_PCI_SUPPORT*/
961 #ifdef CAN_ENABLE_VME_SUPPORT
963 #include "unican_vme.c"
965 #endif /*CAN_ENABLE_VME_SUPPORT*/