3 * \brief Support for Tegra 2 platforms
6 * \author Adam Lackorznynski <adam@os.inf.tu-dresden.de>
11 * economic rights: Technische Universität Dresden (Germany)
13 * This file is part of TUD:OS and distributed under the terms of the
14 * GNU General Public License 2.
15 * Please see the COPYING-GPL-2 file for details.
18 /* Init-code from http://android.git.kernel.org/?p=kernel/tegra.git */
21 #include <l4/drivers/uart_pxa.h>
24 class Platform_arm_tegra2 : public Platform_base
27 void some_delay(int d) const
29 for (int i = 0; i < d; i++)
30 asm volatile("":::"memory");
34 bool probe() { return true; }
38 volatile unsigned long *addr;
40 addr = (volatile unsigned long *)0x600060a0;
44 addr = (volatile unsigned long *)0x600060a4;
48 addr = (volatile unsigned long *)0x600060a8;
52 addr = (volatile unsigned long *)0x600060ac;
57 /* UARTD clock source is PLLP_OUT0 */
58 addr = (volatile unsigned long *)0x600061c0;
61 /* Enable clock to UARTD */
62 addr = (volatile unsigned long *)0x60006018;
66 /* Deassert reset to UARTD */
67 addr = (volatile unsigned long *)0x6000600c;
72 static L4::Uart_pxa _uart(1, 1);
73 _uart.startup(0x70006300);
74 _uart.change_mode(3, 7876);
75 set_stdio_uart(&_uart);
78 void setup_memory_map(l4util_mb_info_t *,
79 Region_list *ram, Region_list *)
81 ram->add(Region::n(0x0, 448 << 20, ".ram", Region::Ram));
82 ram->add(Region::n(512 << 20, 1024 << 20, ".ram", Region::Ram));
87 REGISTER_PLATFORM(Platform_arm_tegra2);