x86: Control interrupts in vendor-specific way

Jailhouse runs with GIF cleared on AMD, and simple 'sti' and 'cli'
aren't enough to enable and disable interrupts. This affects apic_clear()
which fails to reset IRR on AMD. To overcome this, former enable_irq()
and disable_irq() are now defined in svm.c/vmx.c in vendor-specific way.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
[Jan: convert documentation into doxygen format]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

diff --git a/hypervisor/arch/x86/include/asm/processor.h b/hypervisor/arch/x86/include/asm/processor.h
index 08d40ca3284aa5704c0ebfa030d2b901f22dbde1..b75e16ac2e3266610861ff2072f3ac56b1f0997d 100644 (file)
--- a/hypervisor/arch/x86/include/asm/processor.h
+++ b/hypervisor/arch/x86/include/asm/processor.h
@@ -109,6 +109,15 @@
 
 #ifndef __ASSEMBLY__
 
+/**
+ * @ingroup X86
+ * @defgroup Processor Processor
+ *
+ * Low-level support for x86 processor configuration and status retrieval.
+ *
+ * @{
+ */
+
 struct registers {
        unsigned long r15;
        unsigned long r14;
@@ -267,16 +276,19 @@ static inline void write_idtr(struct desc_table_reg *val)
        asm volatile("lidtq %0" : : "m" (*val));
 }
 
-static inline void enable_irq(void)
-{
-       asm volatile("sti");
-}
+/**
+ * Enable or disable interrupts delivery to the local CPU when in host mode.
+ *
+ * In some cases (AMD) changing IF isn't enough, so these are implemented on
+ * per-vendor basis.
+ * @{
+ */
+void enable_irq(void);
 
-static inline void disable_irq(void)
-{
-       asm volatile("cli");
-}
+void disable_irq(void);
+/** @} */
 
+/** @} */
 #endif /* !__ASSEMBLY__ */
 
 #endif /* !_JAILHOUSE_ASM_PROCESSOR_H */

diff --git a/hypervisor/arch/x86/svm.c b/hypervisor/arch/x86/svm.c
index 876599382dd829b8a8131e614a5009bb53458a45..6c2aa88ce951290e6f2e5633d3f73052290d65c3 100644 (file)
--- a/hypervisor/arch/x86/svm.c
+++ b/hypervisor/arch/x86/svm.c
@@ -1136,3 +1136,15 @@ void vcpu_vendor_get_execution_state(struct vcpu_execution_state *x_state)
        x_state->cs = cpu_data->vmcb.cs.selector;
        x_state->rip = cpu_data->vmcb.rip;
 }
+
+/* GIF must be set for interrupts to be delivered (APMv2, Sect. 15.17) */
+void enable_irq(void)
+{
+       asm volatile("stgi; sti" : : : "memory");
+}
+
+/* Jailhouse runs with GIF cleared, so we need to restore this state */
+void disable_irq(void)
+{
+       asm volatile("cli; clgi" : : : "memory");
+}

diff --git a/hypervisor/arch/x86/vmx.c b/hypervisor/arch/x86/vmx.c
index 740cdbd8d017814ed3cb9fbedfcbb4aa24456642..aaf5a672b46ea24fa7a27edc49b82bcd2cec80ff 100644 (file)
--- a/hypervisor/arch/x86/vmx.c
+++ b/hypervisor/arch/x86/vmx.c
@@ -1091,3 +1091,13 @@ void vcpu_vendor_get_execution_state(struct vcpu_execution_state *x_state)
        x_state->cs = vmcs_read16(GUEST_CS_SELECTOR);
        x_state->rip = vmcs_read64(GUEST_RIP);
 }
+
+void enable_irq(void)
+{
+       asm volatile("sti" : : : "memory");
+}
+
+void disable_irq(void)
+{
+       asm volatile("cli" : : : "memory");
+}