core: Add compiler barrier semantic to cpu_relax

Will eventually help to get rid of volatile for several synchronization
variables by enforcing a re-read in busy-wait loops:

        while (state_var == STATE)
                cpu_relax();

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

diff --git a/hypervisor/arch/x86/include/asm/processor.h b/hypervisor/arch/x86/include/asm/processor.h
index 6abdc695cfc03d11f74777df0f041c0e02698fe6..4205bf3d9c646b8ed67f8c0c6768a977454dce58 100644 (file)
--- a/hypervisor/arch/x86/include/asm/processor.h
+++ b/hypervisor/arch/x86/include/asm/processor.h
@@ -125,7 +125,7 @@ static unsigned long __force_order;
 
 static inline void cpu_relax(void)
 {
-       asm volatile("rep; nop");
+       asm volatile("rep; nop" : : : "memory");
 }
 
 static inline void memory_barrier(void)

diff --git a/inmates/inmate.h b/inmates/inmate.h
index 6f0b7f8c8f0dfa8ff55cd120ddfe7c3e9e372e1e..599bc5fd6092e8b94c18ac94307afc151974798d 100644 (file)
--- a/inmates/inmate.h
+++ b/inmates/inmate.h
@@ -44,7 +44,7 @@ typedef enum { true=1, false=0 } bool;
 
 static inline void cpu_relax(void)
 {
-       asm volatile("rep; nop");
+       asm volatile("rep; nop" : : : "memory");
 }
 
 static inline void outb(u8 v, u16 port)