* THE POSSIBILITY OF SUCH DAMAGE.
*
* Configuration for Dell Inc. OptiPlex 7010
- * created with '/usr/local/libexec/jailhouse/jailhouse config create -r . novabox-pc.c'
+ * created with '/usr/local/libexec/jailhouse/jailhouse config create -r . novabox.c'
*
* NOTE: This config expects the following to be appended to your kernel cmdline
* "memmap=0x4200000$0x3b000000"
struct {
struct jailhouse_system header;
__u64 cpus[1];
- struct jailhouse_memory mem_regions[41];
+ struct jailhouse_memory mem_regions[45];
struct jailhouse_irqchip irqchips[1];
__u8 pio_bitmap[0x2000];
- struct jailhouse_pci_device pci_devices[12];
- struct jailhouse_pci_capability pci_caps[22];
+ struct jailhouse_pci_device pci_devices[16];
+ struct jailhouse_pci_capability pci_caps[29];
} __attribute__((packed)) config = {
.header = {
.signature = JAILHOUSE_SYSTEM_SIGNATURE,
.size = 0x400000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c00000-f7c1ffff : 0000:00:19.0 */
+ /* MemRegion: f7c00000-f7c00fff : 0000:02:00.1 */
{
.phys_start = 0xf7c00000,
.virt_start = 0xf7c00000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* MemRegion: f7c01000-f7c01fff : 0000:02:00.1 */
+ {
+ .phys_start = 0xf7c01000,
+ .virt_start = 0xf7c01000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* MemRegion: f7c02000-f7c02fff : 0000:02:00.0 */
+ {
+ .phys_start = 0xf7c02000,
+ .virt_start = 0xf7c02000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* MemRegion: f7c03000-f7c03fff : 0000:02:00.0 */
+ {
+ .phys_start = 0xf7c03000,
+ .virt_start = 0xf7c03000,
+ .size = 0x1000,
+ .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+ },
+ /* MemRegion: f7d00000-f7d1ffff : 0000:00:19.0 */
+ {
+ .phys_start = 0xf7d00000,
+ .virt_start = 0xf7d00000,
.size = 0x20000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c20000-f7c2ffff : 0000:00:14.0 */
+ /* MemRegion: f7d20000-f7d2ffff : 0000:00:14.0 */
{
- .phys_start = 0xf7c20000,
- .virt_start = 0xf7c20000,
+ .phys_start = 0xf7d20000,
+ .virt_start = 0xf7d20000,
.size = 0x10000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c30000-f7c33fff : 0000:00:1b.0 */
+ /* MemRegion: f7d30000-f7d33fff : 0000:00:1b.0 */
{
- .phys_start = 0xf7c30000,
- .virt_start = 0xf7c30000,
+ .phys_start = 0xf7d30000,
+ .virt_start = 0xf7d30000,
.size = 0x4000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c35000-f7c350ff : 0000:00:1f.3 */
+ /* MemRegion: f7d35000-f7d350ff : 0000:00:1f.3 */
{
- .phys_start = 0xf7c35000,
- .virt_start = 0xf7c35000,
+ .phys_start = 0xf7d35000,
+ .virt_start = 0xf7d35000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c36000-f7c367ff : ahci */
+ /* MemRegion: f7d36000-f7d367ff : ahci */
{
- .phys_start = 0xf7c36000,
- .virt_start = 0xf7c36000,
+ .phys_start = 0xf7d36000,
+ .virt_start = 0xf7d36000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c37000-f7c373ff : ehci_hcd */
+ /* MemRegion: f7d37000-f7d373ff : ehci_hcd */
{
- .phys_start = 0xf7c37000,
- .virt_start = 0xf7c37000,
+ .phys_start = 0xf7d37000,
+ .virt_start = 0xf7d37000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c38000-f7c383ff : ehci_hcd */
+ /* MemRegion: f7d38000-f7d383ff : ehci_hcd */
{
- .phys_start = 0xf7c38000,
- .virt_start = 0xf7c38000,
+ .phys_start = 0xf7d38000,
+ .virt_start = 0xf7d38000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c39000-f7c39fff : 0000:00:19.0 */
+ /* MemRegion: f7d39000-f7d39fff : 0000:00:19.0 */
{
- .phys_start = 0xf7c39000,
- .virt_start = 0xf7c39000,
+ .phys_start = 0xf7d39000,
+ .virt_start = 0xf7d39000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
- /* MemRegion: f7c3c000-f7c3c00f : 0000:00:16.0 */
+ /* MemRegion: f7d3c000-f7d3c00f : 0000:00:16.0 */
{
- .phys_start = 0xf7c3c000,
- .virt_start = 0xf7c3c000,
+ .phys_start = 0xf7d3c000,
+ .virt_start = 0xf7d3c000,
.size = 0x1000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
},
.msix_region_size = 0x0,
.msix_address = 0x0,
},
+ /* PCIDevice: 00:1c.0 */
+ {
+ .type = JAILHOUSE_PCI_TYPE_BRIDGE,
+ .iommu = 1,
+ .domain = 0x0,
+ .bdf = 0xe0,
+ .bar_mask = {
+ 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000,
+ },
+ .caps_start = 17,
+ .num_caps = 4,
+ .num_msi_vectors = 1,
+ .msi_64bits = 0,
+ .num_msix_vectors = 0,
+ .msix_region_size = 0x0,
+ .msix_address = 0x0,
+ },
+ /* PCIDevice: 00:1c.2 */
+ {
+ .type = JAILHOUSE_PCI_TYPE_BRIDGE,
+ .iommu = 1,
+ .domain = 0x0,
+ .bdf = 0xe2,
+ .bar_mask = {
+ 0x00000000, 0x00000000, 0x00000000,
+ 0x00000000, 0x00000000, 0x00000000,
+ },
+ .caps_start = 17,
+ .num_caps = 4,
+ .num_msi_vectors = 1,
+ .msi_64bits = 0,
+ .num_msix_vectors = 0,
+ .msix_region_size = 0x0,
+ .msix_address = 0x0,
+ },
/* PCIDevice: 00:1d.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000,
},
- .caps_start = 17,
+ .caps_start = 21,
.num_caps = 1,
.num_msi_vectors = 0,
.msi_64bits = 0,
0xfffffff8, 0xfffffffc, 0xfffffff8,
0xfffffffc, 0xffffffe0, 0xfffff800,
},
- .caps_start = 18,
+ .caps_start = 22,
.num_caps = 4,
.num_msi_vectors = 1,
.msi_64bits = 0,
.msix_region_size = 0x0,
.msix_address = 0x0,
},
+ /* PCIDevice: 02:00.0 */
+ {
+ .type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
+ .domain = 0x0,
+ .bdf = 0x200,
+ .bar_mask = {
+ 0xfffffff8, 0xfffff000, 0x00000000,
+ 0x00000000, 0x00000000, 0xfffff000,
+ },
+ .caps_start = 26,
+ .num_caps = 3,
+ .num_msi_vectors = 8,
+ .msi_64bits = 1,
+ .num_msix_vectors = 0,
+ .msix_region_size = 0x0,
+ .msix_address = 0x0,
+ },
+ /* PCIDevice: 02:00.1 */
+ {
+ .type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
+ .domain = 0x0,
+ .bdf = 0x201,
+ .bar_mask = {
+ 0xfffffff8, 0xfffff000, 0x00000000,
+ 0x00000000, 0x00000000, 0xfffff000,
+ },
+ .caps_start = 26,
+ .num_caps = 3,
+ .num_msi_vectors = 8,
+ .msi_64bits = 1,
+ .num_msix_vectors = 0,
+ .msix_region_size = 0x0,
+ .msix_address = 0x0,
+ },
},
.pci_caps = {
.len = 2,
.flags = 0,
},
+ /* PCIDevice: 00:1c.0 */
+ /* PCIDevice: 00:1c.2 */
+ {
+ .id = 0x10,
+ .start = 0x40,
+ .len = 2,
+ .flags = 0,
+ },
+ {
+ .id = 0x5,
+ .start = 0x80,
+ .len = 10,
+ .flags = JAILHOUSE_PCICAPS_WRITE,
+ },
+ {
+ .id = 0xd,
+ .start = 0x90,
+ .len = 2,
+ .flags = 0,
+ },
+ {
+ .id = 0x1,
+ .start = 0xa0,
+ .len = 8,
+ .flags = JAILHOUSE_PCICAPS_WRITE,
+ },
/* PCIDevice: 00:1e.0 */
{
.id = 0xd,
.len = 2,
.flags = 0,
},
+ /* PCIDevice: 02:00.0 */
+ /* PCIDevice: 02:00.1 */
+ {
+ .id = 0x5,
+ .start = 0x50,
+ .len = 14,
+ .flags = JAILHOUSE_PCICAPS_WRITE,
+ },
+ {
+ .id = 0x1,
+ .start = 0x78,
+ .len = 8,
+ .flags = JAILHOUSE_PCICAPS_WRITE,
+ },
+ {
+ .id = 0x10,
+ .start = 0x80,
+ .len = 2,
+ .flags = 0,
+ },
},
};
+
projects / jailhouse.git / commitdiff