return true;
}
-unsigned int apic_mmio_access(union registers *guest_regs,
- struct per_cpu *cpu_data, unsigned long rip,
+unsigned int apic_mmio_access(unsigned long rip,
const struct guest_paging_structures *pg_structs,
unsigned int reg, bool is_write)
{
return 0;
}
if (is_write) {
- val = guest_regs->by_index[inst.reg_num];
+ val = this_cpu_data()->guest_regs.by_index[inst.reg_num];
if (apic_accessing_reserved_bits(reg, val))
return 0;
apic_ops.read(APIC_REG_ICR_HI)))
return 0;
} else if (reg == APIC_REG_LDR &&
- val != 1UL << (cpu_data->cpu_id + XAPIC_DEST_SHIFT)) {
+ val != 1UL << (this_cpu_id() + XAPIC_DEST_SHIFT)) {
panic_printk("FATAL: Unsupported change to LDR: %x\n",
val);
return 0;
apic_ops.write(reg, val);
} else {
val = apic_ops.read(reg);
- guest_regs->by_index[inst.reg_num] = val;
+ this_cpu_data()->guest_regs.by_index[inst.reg_num] = val;
}
return inst.inst_len;
}
void apic_irq_handler(void);
-unsigned int apic_mmio_access(union registers *guest_regs,
- struct per_cpu *cpu_data, unsigned long rip,
+unsigned int apic_mmio_access(unsigned long rip,
const struct guest_paging_structures *pg_structs,
unsigned int reg, bool is_write);
* TODO: This handles unaccelerated (non-AVIC) access. AVIC should
* be treated separately in svm_handle_avic_access().
*/
-static bool svm_handle_apic_access(union registers *guest_regs,
- struct per_cpu *cpu_data)
+static bool svm_handle_apic_access(struct per_cpu *cpu_data)
{
struct vmcb *vmcb = &cpu_data->vmcb;
struct guest_paging_structures pg_structs;
if (!vcpu_get_guest_paging_structs(&pg_structs))
goto out_err;
- inst_len = apic_mmio_access(guest_regs, cpu_data, vmcb->rip,
- &pg_structs, offset >> 4, is_write);
+ inst_len = apic_mmio_access(vmcb->rip, &pg_structs, offset >> 4,
+ is_write);
if (!inst_len)
goto out_err;
vmcb->exitinfo2 < XAPIC_BASE + PAGE_SIZE) {
/* APIC access in non-AVIC mode */
cpu_data->stats[JAILHOUSE_CPU_STAT_VMEXITS_XAPIC]++;
- if (svm_handle_apic_access(guest_regs, cpu_data))
+ if (svm_handle_apic_access(cpu_data))
return;
} else {
/* General MMIO (IOAPIC, PCI etc) */
vmcs_write64(GUEST_IA32_PAT, val);
}
-static bool vmx_handle_apic_access(union registers *guest_regs,
- struct per_cpu *cpu_data)
+static bool vmx_handle_apic_access(void)
{
struct guest_paging_structures pg_structs;
unsigned int inst_len, offset;
if (!vcpu_get_guest_paging_structs(&pg_structs))
break;
- inst_len = apic_mmio_access(guest_regs, cpu_data,
- vmcs_read64(GUEST_RIP),
+ inst_len = apic_mmio_access(vmcs_read64(GUEST_RIP),
&pg_structs, offset >> 4,
is_write);
if (!inst_len)
break;
case EXIT_REASON_APIC_ACCESS:
cpu_data->stats[JAILHOUSE_CPU_STAT_VMEXITS_XAPIC]++;
- if (vmx_handle_apic_access(guest_regs, cpu_data))
+ if (vmx_handle_apic_access())
return;
break;
case EXIT_REASON_XSETBV: