/* AMBA's biosfood */
#define AMBA_DEVICE 0xb105f00d
+extern struct irqchip_ops irqchip;
+
void *gicd_base;
unsigned long gicd_size;
* per-cpu setup, which means that a bool must be set by the master CPU
*/
static bool irqchip_is_init;
-static struct irqchip_ops irqchip;
-static int irqchip_init_pending(struct per_cpu *cpu_data)
+bool spi_in_cell(struct cell *cell, unsigned int spi)
{
- struct pending_irq *pend_array = page_alloc(&mem_pool, 1);
-
- if (pend_array == NULL)
- return -ENOMEM;
- memset(pend_array, 0, PAGE_SIZE);
+ /* FIXME: Change the configuration to a bitmask range */
+ u32 spi_mask;
- cpu_data->pending_irqs = pend_array;
- cpu_data->first_pending = NULL;
+ if (spi >= 64)
+ return false;
+ else if (spi >= 32)
+ spi_mask = cell->arch.spis >> 32;
+ else
+ spi_mask = cell->arch.spis;
- return 0;
+ return spi_mask & (1 << (spi & 31));
}
-/*
- * Find the first available pending struct for insertion. The `prev' pointer is
- * set to the previous pending interrupt, if any, to help inserting the new one
- * into the list.
- * Returns NULL when no slot is available
- */
-static struct pending_irq* get_pending_slot(struct per_cpu *cpu_data,
- struct pending_irq **prev)
+void irqchip_set_pending(struct per_cpu *cpu_data, u16 irq_id)
{
- u32 i, pending_idx;
- struct pending_irq *pending = cpu_data->first_pending;
+ bool local_injection = (this_cpu_data() == cpu_data);
+ unsigned int new_tail;
- *prev = NULL;
+ if (local_injection && irqchip.inject_irq(cpu_data, irq_id) != -EBUSY)
+ return;
- for (i = 0; i < MAX_PENDING_IRQS; i++) {
- pending_idx = pending - cpu_data->pending_irqs;
- if (pending == NULL || i < pending_idx)
- return cpu_data->pending_irqs + i;
+ spin_lock(&cpu_data->pending_irqs_lock);
- *prev = pending;
- pending = pending->next;
+ new_tail = (cpu_data->pending_irqs_tail + 1) % MAX_PENDING_IRQS;
+
+ /* Queue space available? */
+ if (new_tail != cpu_data->pending_irqs_head) {
+ cpu_data->pending_irqs[cpu_data->pending_irqs_tail] = irq_id;
+ cpu_data->pending_irqs_tail = new_tail;
+ /*
+ * Make the change to pending_irqs_tail visible before the
+ * caller sends SGI_INJECT.
+ */
+ memory_barrier();
}
- return NULL;
+ spin_unlock(&cpu_data->pending_irqs_lock);
+
+ /*
+ * The list registers are full, trigger maintenance interrupt if we are
+ * on the target CPU. In the other case, the caller will send a
+ * SGI_INJECT, and irqchip_inject_pending will take care.
+ */
+ if (local_injection)
+ irqchip.enable_maint_irq(true);
}
-int irqchip_insert_pending(struct per_cpu *cpu_data, struct pending_irq *irq)
+void irqchip_inject_pending(struct per_cpu *cpu_data)
{
- struct pending_irq *prev = NULL;
- struct pending_irq *slot;
+ u16 irq_id;
+
+ while (cpu_data->pending_irqs_head != cpu_data->pending_irqs_tail) {
+ irq_id = cpu_data->pending_irqs[cpu_data->pending_irqs_head];
- spin_lock(&cpu_data->gic_lock);
+ if (irqchip.inject_irq(cpu_data, irq_id) == -EBUSY) {
+ /*
+ * The list registers are full, trigger maintenance
+ * interrupt and leave.
+ */
+ irqchip.enable_maint_irq(true);
+ return;
+ }
- slot = get_pending_slot(cpu_data, &prev);
- if (slot == NULL) {
- spin_unlock(&cpu_data->gic_lock);
- return -ENOMEM;
+ cpu_data->pending_irqs_head =
+ (cpu_data->pending_irqs_head + 1) % MAX_PENDING_IRQS;
}
/*
- * Don't override the pointers yet, they may be read by the injection
- * loop. Odds are astronomically low, but hey.
+ * The software interrupt queue is empty - turn off the maintenance
+ * interrupt.
*/
- memcpy(slot, irq, sizeof(struct pending_irq) - 2 * sizeof(void *));
- slot->prev = prev;
- if (prev) {
- slot->next = prev->next;
- prev->next = slot;
- } else {
- slot->next = cpu_data->first_pending;
- cpu_data->first_pending = slot;
- }
- if (slot->next)
- slot->next->prev = slot;
-
- spin_unlock(&cpu_data->gic_lock);
-
- return 0;
+ irqchip.enable_maint_irq(false);
}
-int irqchip_set_pending(struct per_cpu *cpu_data, u32 irq_id, bool try_inject)
+void irqchip_handle_irq(struct per_cpu *cpu_data)
{
- struct pending_irq pending;
-
- pending.virt_id = irq_id;
- /* Priority must be less than ICC_PMR */
- pending.priority = 0;
-
- if (is_sgi(irq_id)) {
- pending.hw = 0;
- pending.type.sgi.maintenance = 0;
- pending.type.sgi.cpuid = 0;
- } else {
- pending.hw = 1;
- pending.type.irq = irq_id;
- }
-
- if (try_inject && irqchip.inject_irq(cpu_data, &pending) == 0)
- return 0;
-
- return irqchip_insert_pending(cpu_data, &pending);
+ irqchip.handle_irq(cpu_data);
}
-/*
- * Only executed by `irqchip_inject_pending' on a CPU to inject its own stuff.
- */
-int irqchip_remove_pending(struct per_cpu *cpu_data, struct pending_irq *irq)
+void irqchip_eoi_irq(u32 irqn, bool deactivate)
{
- spin_lock(&cpu_data->gic_lock);
-
- if (cpu_data->first_pending == irq)
- cpu_data->first_pending = irq->next;
- if (irq->prev)
- irq->prev->next = irq->next;
- if (irq->next)
- irq->next->prev = irq->prev;
+ irqchip.eoi_irq(irqn, deactivate);
+}
- spin_unlock(&cpu_data->gic_lock);
+int irqchip_send_sgi(struct sgi *sgi)
+{
+ return irqchip.send_sgi(sgi);
+}
- return 0;
+int irqchip_cpu_init(struct per_cpu *cpu_data)
+{
+ return irqchip.cpu_init(cpu_data);
}
-int irqchip_inject_pending(struct per_cpu *cpu_data)
+int irqchip_cpu_reset(struct per_cpu *cpu_data)
{
- int err;
- struct pending_irq *pending = cpu_data->first_pending;
-
- while (pending != NULL) {
- err = irqchip.inject_irq(cpu_data, pending);
- if (err == -EBUSY)
- /* The list registers are full. */
- break;
- else
- /*
- * Removal only changes the pointers, but does not
- * deallocate anything.
- * Concurrent accesses are avoided with the spinlock,
- * but the `next' pointer of the current pending object
- * may be rewritten by an external insert before or
- * after this removal, which isn't an issue.
- */
- irqchip_remove_pending(cpu_data, pending);
+ cpu_data->pending_irqs_head = cpu_data->pending_irqs_tail = 0;
- pending = pending->next;
- }
+ return irqchip.cpu_reset(cpu_data, false);
+}
- return 0;
+void irqchip_cpu_shutdown(struct per_cpu *cpu_data)
+{
+ /*
+ * The GIC backend must take care of only resetting the hyp interface if
+ * it has been initialised: this function may be executed during the
+ * setup phase.
+ */
+ irqchip.cpu_reset(cpu_data, true);
}
-void irqchip_handle_irq(struct per_cpu *cpu_data)
+static const struct jailhouse_irqchip *
+irqchip_find_config(struct jailhouse_cell_desc *config)
{
- irqchip.handle_irq(cpu_data);
+ const struct jailhouse_irqchip *irq_config =
+ jailhouse_cell_irqchips(config);
+
+ if (config->num_irqchips)
+ return irq_config;
+ else
+ return NULL;
}
-int irqchip_send_sgi(struct sgi *sgi)
+int irqchip_cell_init(struct cell *cell)
{
- return irqchip.send_sgi(sgi);
+ const struct jailhouse_irqchip *pins = irqchip_find_config(cell->config);
+
+ cell->arch.spis = (pins ? pins->pin_bitmap : 0);
+
+ return irqchip.cell_init(cell);
}
-int irqchip_cpu_init(struct per_cpu *cpu_data)
+void irqchip_cell_exit(struct cell *cell)
{
- int err;
+ const struct jailhouse_irqchip *root_pins =
+ irqchip_find_config(root_cell.config);
- err = irqchip_init_pending(cpu_data);
- if (err)
- return err;
+ /* might be called by arch_shutdown while rolling back
+ * a failed setup */
+ if (!irqchip_is_init)
+ return;
- if (irqchip.cpu_init)
- return irqchip.cpu_init(cpu_data);
+ if (root_pins)
+ root_cell.arch.spis |= cell->arch.spis & root_pins->pin_bitmap;
- return 0;
+ irqchip.cell_exit(cell);
}
-/* Only the GIC is implemented */
-extern struct irqchip_ops gic_irqchip;
+void irqchip_root_cell_shrink(struct cell *cell)
+{
+ root_cell.arch.spis &= ~(cell->arch.spis);
+}
int irqchip_init(void)
{
pidr2 = mmio_read32(gicd_base + GICD_PIDR2);
switch (GICD_PIDR2_ARCH(pidr2)) {
case 0x2:
- break;
case 0x3:
case 0x4:
- memcpy(&irqchip, &gic_irqchip, sizeof(struct irqchip_ops));
break;
+ default:
+ goto err_no_distributor;
}
if (irqchip.init) {
}
err_no_distributor:
- printk("GIC: no distributor found\n");
+ printk("GIC: no supported distributor found\n");
arch_unmap_device(gicd_base, gicd_size);
return -ENODEV;
projects / jailhouse.git / blobdiff