arm: Remove unused return code of irqchip_set_pending

[jailhouse.git] / hypervisor / arch / arm / include / asm / irqchip.h

diff --git a/hypervisor/arch/arm/include/asm/irqchip.h b/hypervisor/arch/arm/include/asm/irqchip.h
index 17ba90ad5bb0e082a8b114ba40231d1f165b9218..c4b8289f19cf581468e64db3d7d065bacb3c05ce 100644 (file)
--- a/hypervisor/arch/arm/include/asm/irqchip.h
+++ b/hypervisor/arch/arm/include/asm/irqchip.h
@@ -24,7 +24,6 @@
 #include <jailhouse/cell.h>
 #include <jailhouse/mmio.h>
 #include <asm/percpu.h>
-#include <asm/traps.h>
 
 #ifndef __ASSEMBLY__
 
@@ -65,19 +64,6 @@ struct irqchip_ops {
 struct pending_irq {
        u32     virt_id;
 
-       u8      priority;
-       u8      hw;
-       union {
-               /* Physical id, when hw is 1 */
-               u16 irq;
-               struct {
-                       /* GICv2 needs cpuid for SGIs */
-                       u16 cpuid       : 15;
-                       /* EOI generates a maintenance irq */
-                       u16 maintenance : 1;
-               } sgi __attribute__((packed));
-       } type;
-
        struct pending_irq *next;
        struct pending_irq *prev;
 } __attribute__((packed));
@@ -97,25 +83,12 @@ int irqchip_send_sgi(struct sgi *sgi);
 void irqchip_handle_irq(struct per_cpu *cpu_data);
 void irqchip_eoi_irq(u32 irqn, bool deactivate);
 
-int irqchip_inject_pending(struct per_cpu *cpu_data);
+void irqchip_inject_pending(struct per_cpu *cpu_data);
 int irqchip_insert_pending(struct per_cpu *cpu_data, struct pending_irq *irq);
 int irqchip_remove_pending(struct per_cpu *cpu_data, struct pending_irq *irq);
-int irqchip_set_pending(struct per_cpu *cpu_data, u32 irq_id, bool try_inject);
-
-static inline bool spi_in_cell(struct cell *cell, unsigned int spi)
-{
-       /* FIXME: Change the configuration to a bitmask range */
-       u32 spi_mask;
-
-       if (spi >= 64)
-               return false;
-       else if (spi >= 32)
-               spi_mask = cell->arch.spis >> 32;
-       else
-               spi_mask = cell->arch.spis;
-
-       return spi_mask & (1 << (spi & 31));
-}
+void irqchip_set_pending(struct per_cpu *cpu_data, u32 irq_id, bool try_inject);
+
+bool spi_in_cell(struct cell *cell, unsigned int spi);
 
 #endif /* __ASSEMBLY__ */
 #endif /* _JAILHOUSE_ASM_IRQCHIP_H */