2 * Copyright (c) 2002 Brian Foley
3 * Copyright (c) 2002 Dieter Shirley
4 * Copyright (c) 2003-2004 Romain Dolbeau <romain@dolbeau.org>
6 * This file is part of FFmpeg.
8 * FFmpeg is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2.1 of the License, or (at your option) any later version.
13 * FFmpeg is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with FFmpeg; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
23 #include "libavcodec/dsputil.h"
25 #include "dsputil_ppc.h"
27 #include "dsputil_altivec.h"
29 void fdct_altivec(int16_t *block);
30 void gmc1_altivec(uint8_t *dst, uint8_t *src, int stride, int h,
31 int x16, int y16, int rounder);
32 void idct_put_altivec(uint8_t *dest, int line_size, int16_t *block);
33 void idct_add_altivec(uint8_t *dest, int line_size, int16_t *block);
35 void dsputil_h264_init_ppc(DSPContext* c, AVCodecContext *avctx);
37 void dsputil_init_altivec(DSPContext* c, AVCodecContext *avctx);
38 void vc1dsp_init_altivec(DSPContext* c, AVCodecContext *avctx);
39 void float_init_altivec(DSPContext* c, AVCodecContext *avctx);
40 void int_init_altivec(DSPContext* c, AVCodecContext *avctx);
49 result |= FF_MM_ALTIVEC;
55 #if CONFIG_POWERPC_PERF
56 unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total];
57 /* list below must match enum in dsputil_ppc.h */
58 static unsigned char* perfname[] = {
59 "ff_fft_calc_altivec",
61 "dct_unquantize_h263_altivec",
65 "put_pixels16_altivec",
66 "avg_pixels16_altivec",
67 "avg_pixels8_altivec",
68 "put_pixels8_xy2_altivec",
69 "put_no_rnd_pixels8_xy2_altivec",
70 "put_pixels16_xy2_altivec",
71 "put_no_rnd_pixels16_xy2_altivec",
72 "hadamard8_diff8x8_altivec",
73 "hadamard8_diff16_altivec",
74 "avg_pixels8_xy2_altivec",
75 "clear_blocks_dcbz32_ppc",
76 "clear_blocks_dcbz128_ppc",
77 "put_h264_chroma_mc8_altivec",
78 "avg_h264_chroma_mc8_altivec",
79 "put_h264_qpel16_h_lowpass_altivec",
80 "avg_h264_qpel16_h_lowpass_altivec",
81 "put_h264_qpel16_v_lowpass_altivec",
82 "avg_h264_qpel16_v_lowpass_altivec",
83 "put_h264_qpel16_hv_lowpass_altivec",
84 "avg_h264_qpel16_hv_lowpass_altivec",
90 #if CONFIG_POWERPC_PERF
91 void powerpc_display_perf_report(void)
94 av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
95 for(i = 0 ; i < powerpc_perf_total ; i++) {
96 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
97 if (perfdata[j][i][powerpc_data_num] != (unsigned long long)0)
98 av_log(NULL, AV_LOG_INFO,
99 " Function \"%s\" (pmc%d):\n\tmin: %"PRIu64"\n\tmax: %"PRIu64"\n\tavg: %1.2lf (%"PRIu64")\n",
102 perfdata[j][i][powerpc_data_min],
103 perfdata[j][i][powerpc_data_max],
104 (double)perfdata[j][i][powerpc_data_sum] /
105 (double)perfdata[j][i][powerpc_data_num],
106 perfdata[j][i][powerpc_data_num]);
110 #endif /* CONFIG_POWERPC_PERF */
112 /* ***** WARNING ***** WARNING ***** WARNING ***** */
114 clear_blocks_dcbz32_ppc will not work properly on PowerPC processors with a
115 cache line size not equal to 32 bytes.
116 Fortunately all processor used by Apple up to at least the 7450 (aka second
117 generation G4) use 32 bytes cache line.
118 This is due to the use of the 'dcbz' instruction. It simply clear to zero a
119 single cache line, so you need to know the cache line size to use it !
120 It's absurd, but it's fast...
122 update 24/06/2003 : Apple released yesterday the G5, with a PPC970. cache line
123 size: 128 bytes. Oups.
124 The semantic of dcbz was changed, it always clear 32 bytes. so the function
125 below will work, but will be slow. So I fixed check_dcbz_effect to use dcbzl,
126 which is defined to clear a cache line (as dcbz before). So we still can
127 distinguish, and use dcbz (32 bytes) or dcbzl (one cache line) as required.
129 see <http://developer.apple.com/technotes/tn/tn2087.html>
130 and <http://developer.apple.com/technotes/tn/tn2086.html>
132 void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
134 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz32, 1);
135 register int misal = ((unsigned long)blocks & 0x00000010);
137 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
140 ((unsigned long*)blocks)[0] = 0L;
141 ((unsigned long*)blocks)[1] = 0L;
142 ((unsigned long*)blocks)[2] = 0L;
143 ((unsigned long*)blocks)[3] = 0L;
146 for ( ; i < sizeof(DCTELEM)*6*64-31 ; i += 32) {
147 __asm__ volatile("dcbz %0,%1" : : "b" (blocks), "r" (i) : "memory");
150 ((unsigned long*)blocks)[188] = 0L;
151 ((unsigned long*)blocks)[189] = 0L;
152 ((unsigned long*)blocks)[190] = 0L;
153 ((unsigned long*)blocks)[191] = 0L;
157 memset(blocks, 0, sizeof(DCTELEM)*6*64);
159 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
162 /* same as above, when dcbzl clear a whole 128B cache line
163 i.e. the PPC970 aka G5 */
165 void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
167 POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1);
168 register int misal = ((unsigned long)blocks & 0x0000007f);
170 POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz128, 1);
173 // we could probably also optimize this case,
174 // but there's not much point as the machines
175 // aren't available yet (2003-06-26)
176 memset(blocks, 0, sizeof(DCTELEM)*6*64);
179 for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
180 __asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
183 memset(blocks, 0, sizeof(DCTELEM)*6*64);
185 POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz128, 1);
188 void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
190 memset(blocks, 0, sizeof(DCTELEM)*6*64);
195 /* check dcbz report how many bytes are set to 0 by dcbz */
196 /* update 24/06/2003 : replace dcbz by dcbzl to get
197 the intended effect (Apple "fixed" dcbz)
198 unfortunately this cannot be used unless the assembler
199 knows about dcbzl ... */
200 long check_dcbzl_effect(void)
202 register char *fakedata = av_malloc(1024);
203 register char *fakedata_middle;
204 register long zero = 0;
212 fakedata_middle = (fakedata + 512);
214 memset(fakedata, 0xFF, 1024);
216 /* below the constraint "b" seems to mean "Address base register"
217 in gcc-3.3 / RS/6000 speaks. seems to avoid using r0, so.... */
218 __asm__ volatile("dcbzl %0, %1" : : "b" (fakedata_middle), "r" (zero));
220 for (i = 0; i < 1024 ; i ++) {
221 if (fakedata[i] == (char)0)
230 long check_dcbzl_effect(void)
236 static void prefetch_ppc(void *mem, int stride, int h)
238 register const uint8_t *p = mem;
240 __asm__ volatile ("dcbt 0,%0" : : "r" (p));
245 void dsputil_init_ppc(DSPContext* c, AVCodecContext *avctx)
247 // Common optimizations whether AltiVec is available or not
248 c->prefetch = prefetch_ppc;
249 switch (check_dcbzl_effect()) {
251 c->clear_blocks = clear_blocks_dcbz32_ppc;
254 c->clear_blocks = clear_blocks_dcbz128_ppc;
261 if(CONFIG_H264_DECODER) dsputil_h264_init_ppc(c, avctx);
264 mm_flags |= FF_MM_ALTIVEC;
266 dsputil_init_altivec(c, avctx);
267 if(CONFIG_VC1_DECODER || CONFIG_WMV3_DECODER)
268 vc1dsp_init_altivec(c, avctx);
269 float_init_altivec(c, avctx);
270 int_init_altivec(c, avctx);
271 c->gmc1 = gmc1_altivec;
274 if (avctx->dct_algo == FF_DCT_AUTO ||
275 avctx->dct_algo == FF_DCT_ALTIVEC) {
276 c->fdct = fdct_altivec;
278 #endif //CONFIG_ENCODERS
280 if (avctx->lowres==0) {
281 if ((avctx->idct_algo == FF_IDCT_AUTO) ||
282 (avctx->idct_algo == FF_IDCT_ALTIVEC)) {
283 c->idct_put = idct_put_altivec;
284 c->idct_add = idct_add_altivec;
285 c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
289 #if CONFIG_POWERPC_PERF
292 for (i = 0 ; i < powerpc_perf_total ; i++) {
293 for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
294 perfdata[j][i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFFULL;
295 perfdata[j][i][powerpc_data_max] = 0x0000000000000000ULL;
296 perfdata[j][i][powerpc_data_sum] = 0x0000000000000000ULL;
297 perfdata[j][i][powerpc_data_num] = 0x0000000000000000ULL;
301 #endif /* CONFIG_POWERPC_PERF */
303 #endif /* HAVE_ALTIVEC */