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microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / system / ip / sja1000_1.0 /
2016-05-24 Martin Jerabeksja1000: added module can_top for backward compatibility tree | commitdiff
2016-05-12 Martin Jerabeksja1000: IP fixes, corrected device-tree entry, it... tree | commitdiff
2016-05-12 Martin Jerabeksja1000: synchronous with AXI, duplex register access... tree | commitdiff
2016-05-12 Martin Jerabeksja1000 core, linux drivers tree | commitdiff
2016-05-12 Martin Jerabekadded sja1000 IP tree | commitdiff
CAN benchmark FPGA design and software for MicroZed board