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microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / system / ip / display_16bit_cmd_data_bus_1.0 /
2017-02-14 Pavel Pisamicrozed_apo: 16 bit bus LCD: Add register bit for... tree | commitdiff
2017-02-14 Pavel PisaMerge remote-tracking branch 'origin/microzed_apo'... tree | commitdiff
2017-02-14 Pavel Pisamicrozed_apo: 16 bit bus LCD: Implemented basic write... tree | commitdiff
2017-02-09 Pavel Pisamicrozed_apo: Include skeleton for 16 bit bus connected... tree | commitdiff
CAN benchmark FPGA design and software for MicroZed board