]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - .gitignore
microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / .gitignore
2016-05-16 Martin Jerabekupdated README, .gitignore