]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/ip
scripts: include script for applying new FPGA design at runtime.
[fpga/zynq/canbench-sw.git] / system / ip /
2016-05-24 Martin Jerabeksja1000: added module can_top for backward compatibility
2016-05-24 Martin Jerabekcan_crossbar: fixed STBY bit position in register
2016-05-16 Martin Jerabeksystem: can_crossbar fixed and added to device tree...
2016-05-12 Martin Jerabekcan_crossbar: fixes (but still not working)
2016-05-12 Martin Jerabeksja1000: IP fixes, corrected device-tree entry, it...
2016-05-12 Martin Jerabeksystem: added GPIO IP
2016-05-12 Martin Jerabeksystem: added CAN crossbar IP
2016-05-12 Martin Jerabeksja1000: synchronous with AXI, duplex register access...
2016-05-12 Martin Jerabeksja1000 core, linux drivers
2016-05-12 Martin Jerabekadded sja1000 IP
2016-03-30 Martin Jerabekadded system and petalinux configuration, scripts,...