]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/blob - lib/usblc6.dcm
layout: connectors, KEYs; added ESD protection
[fpga/zynq/canbench-hw.git] / lib / usblc6.dcm
1 EESchema-DOCLIB  Version 2.0
2 #
3 $CMP USBLC6-2
4 D Very low capacitance ESD protection
5 K ESD
6 $ENDCMP
7 #
8 #End Doc Library