Added build system and initial *.prj file.

[fpga/virtex2/plasma.git] / top_plasma.prj

diff --git a/top_plasma.prj b/top_plasma.prj
new file mode 100644 (file)
index 0000000..8cc550a
--- /dev/null
+++ b/top_plasma.prj
@@ -0,0 +1,20 @@
+# Plasma MIPS core (mlite_cpu)
+#==================================================
+vhdl work plasma/vhdl/alu.vhd
+vhdl work plasma/vhdl/bus_mux.vhd
+vhdl work plasma/vhdl/control.vhd
+vhdl work plasma/vhdl/mem_ctrl.vhd
+vhdl work plasma/vhdl/mlite_cpu.vhd
+vhdl work plasma/vhdl/mlite_pack.vhd
+vhdl work plasma/vhdl/mult.vhd
+vhdl work plasma/vhdl/pc_next.vhd
+vhdl work plasma/vhdl/pipeline.vhd
+vhdl work plasma/vhdl/reg_bank.vhd
+vhdl work plasma/vhdl/shifter.vhd
+
+
+# Core with memory, uart, gpio, ...
+#==================================================
+vhdl work plasma/vhdl/uart.vhd
+vhdl work plasma/vhdl/ram_xilinx.vhd
+vhdl work plasma/vhdl/plasma.vhd