signal EVENT_SEL : std_logic;
signal event_i : std_logic_vector (15 downto 0);
signal event_o : std_logic_vector (15 downto 0);
+
+ -- Edge detector
+ signal EDGE_DAT_O : std_logic_vector (15 downto 0);
+ signal EDGE_DETECT_SEL : std_logic;
+ signal event_in : std_logic_vector (15 downto 0);
+ signal edge_detect_o : std_logic_vector (15 downto 0);
+ signal rst_edge : std_logic;
+
-- Qcounter capture
signal CAPTURE_SEL : std_logic;
signal CAPTURE_DAT : std_logic_vector (15 downto 0);
QCNT_DAT_O when QCNT_SEL = '1' else
EVENT_DAT_O when EVENT_SEL = '1' else
CAPTURE_DAT when CAPTURE_SEL = '1' else
- INDEX_DETECT_DAT_O when INDEX_DETECT_SEL ='1' else
+ EDGE_DAT_O when EDGE_DETECT_SEL = '1' else
(others => '0'); -- MUST be 0 when nothing is addressed
GPIO_SEL <= '1' when per_addr(7 downto 2) = 16#0140#/2/4 else '0';
QCNT_SEL <= '1' when per_addr(7 downto 1) = 16#0148#/2/2 else '0';
EVENT_SEL <= '1' when per_addr(7 downto 0) = 16#014C#/2 else '0';
CAPTURE_SEL <= '1' when per_addr(7 downto 1) = 16#0150#/2/2 else '0';
- INDEX_DETECT_SEL <= '1' when per_addr(7 downto 1) = 16#0152#/2/2 else '0';
+ EDGE_DETECT_SEL <= '1' when per_addr(7 downto 0) = 16#0154#/2 else '0';
per_wen16 <= per_wen(0) and per_wen(1);
count => open,
event_ow => MOTOR_IRQ);
+
event_io_0 : entity work.event_rwc
port map (
-- Peripheral bus interface
IRC_INDEX_EVENT <= event_i(0);
+ edge_detector_0 : entity work.edge_detector
+ port map (
+ -- Peripheral bus interface
+ ACK_O => open,
+ CLK_I => mclk,
+ DAT_I => per_din,
+ DAT_O => EDGE_DAT_O,
+ RST_I => puc,
+ SEL_I => EDGE_DETECT_SEL,
+ STB_I => per_en,
+ WE_I => per_wen16,
+ -- Event port pins
+ EVENT_I => event_in);
+
+
+ --rst_edge <= '0' when per_addr()
+ event_in(0) <= IRC_INDEX_DFF;
+
irc_index_dff_0 : entity work.dff
port map (
clock => mclk,