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(parent: 066f608) | patch
Added top-level HDL files.
authorVladimir Burian <buriavl2@fel.cvut.cz>
Sat, 9 Apr 2011 19:04:27 +0000 (21:04 +0200)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Sat, 9 Apr 2011 19:04:27 +0000 (21:04 +0200)
commitc275cacf7bcb122e176a1993c9e2d2b74d67b80d
treee5cf8a8bf40a2d67cb42f0ff1a0f28294816b13ctree | snapshot
parent066f608c84bdf31cc92121084b25f97f74aea282commit | diff
Added top-level HDL files.
memory.bmm [new file with mode: 0644] blob
msp430_cmdproc.prj [new file with mode: 0644] blob
msp430_cmdproc.ucf [new file with mode: 0644] blob
msp430_cmdproc.vhd [new file with mode: 0644] blob
MSP430 with RS-232 command processor - top level design for Virtex 2 V2MB1000 board