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Resets changed from asynchronous to synchronous.
[fpga/pwm.git] / counter.vhd
2011-05-18 Vladimir BurianResets changed from asynchronous to synchronous. blob | commitdiff | raw
2011-05-18 Vladimir BurianEarly initialization of all relevant signals. blob | commitdiff | raw | diff to current
2011-04-16 Vladimir BurianGeneral counter extended by clk_en input blob | commitdiff | raw | diff to current
2011-03-14 Vladimir BurianAdded counter and pwm modules. blob | commitdiff | raw | diff to current
The control block for three phases BLDC motor PWM output with profile based commutation logic