Remove FSL from Tumbl completely

[fpga/lx-cpu1/tumbl.git] / hw / mem.vhd

diff --git a/hw/mem.vhd b/hw/mem.vhd
index 6ea137e773d02938005f737ed6a253a9c78e3d14..6d549820ca90e49b62b7c09910c90a8a11896bf2 100644 (file)
--- a/hw/mem.vhd
+++ b/hw/mem.vhd
@@ -29,8 +29,6 @@ ENTITY mem IS
         DMEMB_i     :  IN DMEMB2CORE_Type;
         DMEMB_o     : OUT CORE2DMEMB_Type;
         --
-        FSL_S2MEM_i :  IN FSL_S2MEM_Type;
-        --
         MEM_REG_i   :  IN MEM_REG_Type;
         MEM_REG_o   : OUT MEM_REG_Type;
         --
@@ -64,7 +62,7 @@ BEGIN
     DMEMB_o.bSel     <= EX2MEM_i.byte_Enable;
 
 p_mem:
-    PROCESS (EX2MEM_i, DMEMB_i, MEM_REG_i, FSL_S2MEM_i)
+    PROCESS (EX2MEM_i, DMEMB_i, MEM_REG_i)
         VARIABLE exeq_data_v : STD_LOGIC_VECTOR (31 DOWNTO 0);
         VARIABLE dmem_data_v : STD_LOGIC_VECTOR (31 DOWNTO 0);
 
@@ -96,9 +94,6 @@ p_mem:
                         WHEN WRB_EX  =>
                             -- forward exeq output, to handle e.g. add rD,rA,xx; sw rD,mem[y]; ...
                             exeq_data_v := MEM_REG_i.exeq_result;
-                        WHEN WRB_FSL =>
-                            -- forward FSL_S input, to handle e.g. nget rD,rFSLx; swi rD,mem[x],xx; ...
-                            exeq_data_v := FSL_S2MEM_i.S_Data;
                         WHEN OTHERS  =>
                             -- forward mem_data just read, to handle e.g. lhu rD,mem[x]; sh rD,mem[y]; ...
                             exeq_data_v := dmem_data_v;
@@ -132,7 +127,6 @@ p_mem:
         -- additional wrb signals
         CASE MEM_REG_i.wrb_Action IS
             WHEN WRB_MEM => MEM_WRB_o.data_rD <= dmem_data_v;
-            WHEN WRB_FSL => MEM_WRB_o.data_rD <= FSL_S2MEM_i.S_Data;
             WHEN OTHERS  => MEM_WRB_o.data_rD <= MEM_REG_i.exeq_result;
         END CASE;