ID2EX_o : OUT ID2EX_Type;
--
INT_CTRL_i : IN INT_CTRL_Type;
- ID2CTRL_o : OUT ID2CTRL_Type
+ ID2CTRL_o : OUT ID2CTRL_Type;
+ --
+ noLiteOpc_o : OUT STD_LOGIC
);
END ENTITY decode;
ARCHITECTURE rtl OF decode IS
--------------------------------------------------------------------------------
- SIGNAL noLiteOpc_s : STD_LOGIC;
-
BEGIN
p_decode:
VARIABLE rA_v : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
VARIABLE rB_v : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
VARIABLE IMM16_v : STD_LOGIC_VECTOR (15 DOWNTO 0);
- VARIABLE FSL_Mode_v : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
VARIABLE code_x26_v : STD_LOGIC_VECTOR ( 2 DOWNTO 0);
VARIABLE IMM_Lock_v : STD_LOGIC;
VARIABLE alu_Action_v : ALU_ACTION_Type;
mem_Action_v := NO_MEM;
transfer_Size_v := WORD;
wrb_Action_v := WRB_EX;
- FSL_Mode_v := "01010";
-- for decoding SEXT16, SEXT8, SRC, SRC or SRL
code_x26_v := instruction_v(6) & instruction_v(5) & instruction_v(0);
int_busy_v := INT_CTRL_i.int_busy;
-- for debugging purposes
- noLiteOpc_s <= '0';
+ noLiteOpc_o <= '0';
IF (INT_CTRL_i.setup_int = '1') THEN
END IF;
END IF;
- WHEN "01" => -- MUL / BS / FSL
+ WHEN "01" => -- MUL / BS
CASE opcIx_v (2 DOWNTO 0) IS
WHEN "000" => -- MUL
IF (USE_HW_MUL_g = TRUE) THEN
alu_Action_v := A_MUL;
ELSE
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END IF;
WHEN "001" => -- BS
IF (USE_BARREL_g = TRUE) THEN
END IF;
END IF;
ELSE
- noLiteOpc_s <= '1';
- END IF;
- WHEN "011" => -- FSL
- IF (opcIx_v(3) = '0') THEN
- FSL_Mode_v := instruction_v(10 DOWNTO 6);
- ELSE
- FSL_Mode_v := instruction_v(15 DOWNTO 11);
+ noLiteOpc_o <= '1';
END IF;
- IF (FSL_Mode_v(4) = '0') THEN
- alu_Action_v := A_FSL_GET;
- wrb_Action_v := WRB_FSL;
- ELSE
- alu_Action_v := A_FSL_PUT;
- wrb_Action_v := NO_WRB;
- END IF;
- msr_Action_v := UPDATE_CARRY;
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
WHEN "10" =>
WHEN "10" => -- SRL
alu_Cin_v := CIN_ZERO;
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
alu_Action_v := A_SHIFT;
msr_Action_v := UPDATE_CARRY;
WHEN "111" => -- SEXT16
alu_Action_v := A_SEXT16;
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
ELSIF (opcIx_v (3 DOWNTO 0) = "1100") THEN -- IMM
IMM_Lock_v := '1';
-- WHEN "10010" => -- RTBD
-- WHEN "10100" => -- RTED
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
alu_Action_v := A_ADD;
branch_Action_v := BR;
alu_Action_v := A_MTS;
wrb_Action_v := NO_WRB;
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
rB_v := (OTHERS => '0'); -- in order to prevent occasional hazards (r16, r24)
ELSE
WHEN "0101" => -- BGE
branch_Action_v := BGE;
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
alu_Action_v := A_ADD;
alu_Op1_v := ALU_IN_PC;
delayBit_v := rD_v(4);
wrb_Action_v := NO_WRB; -- evaluate and update/overwrite in exeq
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
END IF;
WHEN "01" => transfer_Size_v := HALFWORD;
WHEN "10" => transfer_Size_v := WORD;
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
IF (opcIx_v(2) = '0') THEN
mem_Action_v := RD_MEM;
END IF;
WHEN OTHERS =>
- noLiteOpc_s <= '1';
+ noLiteOpc_o <= '1';
END CASE;
ID2EX_o.mem_Action <= mem_Action_v;
ID2EX_o.transfer_Size <= transfer_Size_v;
ID2EX_o.wrb_Action <= wrb_Action_v;
- ID2EX_o.FSL_Non_blocking <= FSL_Mode_v(3);
- ID2EX_o.FSL_Control <= FSL_Mode_v(2);
- ID2EX_o.FSL_Test <= FSL_Mode_v(1);
- ID2EX_o.FSL_Atomic <= FSL_Mode_v(0);
--
ID2CTRL_o.delayBit <= delayBit_v;
ID2CTRL_o.int_busy <= int_busy_v;