1 ---------------------------------------------------------------------------------
4 -- Filename: mbl_Pkg.vhd
5 -- Description: Package for the TUD MB-Lite implementation
7 -- Author: Huib Lincklaen Arriens
8 -- Delft University of Technology
9 -- Faculty EEMCS, Department ME&CE, Circuits and Systems
10 -- Date: September, 2010
12 -- Modified: September, 2013: Removed FSL
13 -- June, 2011: ALU_ACTION_Type extended to incorporate
14 -- MUL and BS instructions (Huib)
15 -- Adapted to work with separate fsl_M-
16 -- and fsl_S selectors and automatic
17 -- tumbl<_jtag><_fsl>.vhd generation (Huib)
18 -- July, 2011: function ef_nbits added (Huib)
21 --------------------------------------------------------------------------------
24 USE IEEE.std_logic_1164.all;
25 USE IEEE.std_logic_unsigned.all;
26 USE IEEE.numeric_std.all;
29 --------------------------------------------------------------------------------
31 --------------------------------------------------------------------------------
33 CONSTANT C_8_ZEROS : STD_LOGIC_VECTOR ( 7 DOWNTO 0) := X"00";
34 CONSTANT C_16_ZEROS : STD_LOGIC_VECTOR (15 DOWNTO 0) := X"0000";
35 CONSTANT C_24_ZEROS : STD_LOGIC_VECTOR (23 DOWNTO 0) := X"000000";
36 CONSTANT C_32_ZEROS : STD_LOGIC_VECTOR (31 DOWNTO 0) := X"00000000";
38 CONSTANT C_16_ONES : STD_LOGIC_VECTOR (15 DOWNTO 0) := X"FFFF";
39 CONSTANT C_24_ONES : STD_LOGIC_VECTOR (23 DOWNTO 0) := X"FFFFFF";
42 ----------------------------------------------------------------------------------------------
44 ----------------------------------------------------------------------------------------------
46 TYPE ALU_ACTION_Type IS (A_NOP, A_ADD, A_CMP, A_CMPU, A_OR, A_AND, A_XOR,
47 A_SHIFT, A_SEXT8, A_SEXT16, A_MFS, A_MTS,
48 A_MUL, A_BSLL, A_BSRL, A_BSRA, A_HALT);
49 TYPE ALU_IN1_Type IS (ALU_IN_REGA, ALU_IN_NOT_REGA, ALU_IN_PC, ALU_IN_ZERO);
50 TYPE ALU_IN2_Type IS (ALU_IN_REGB, ALU_IN_NOT_REGB, ALU_IN_IMM, ALU_IN_NOT_IMM);
51 TYPE ALU_CIN_Type IS (CIN_ZERO, CIN_ONE, FROM_MSR, FROM_IN1);
52 TYPE MSR_ACTION_Type IS (UPDATE_CARRY, KEEP_CARRY);
53 TYPE BRANCH_ACTION_Type IS (NO_BR, BR, BRL, BEQ, BNE, BLT, BLE, BGT, BGE);
54 TYPE WRB_ACTION_Type IS (NO_WRB, WRB_EX, WRB_MEM);
55 TYPE MEM_ACTION_Type IS (NO_MEM, WR_MEM, RD_MEM);
56 TYPE TRANSFER_SIZE_Type IS (WORD, HALFWORD, BYTE);
57 TYPE SAVE_REG_Type IS (NO_SAVE, SAVE_RA, SAVE_RB);
58 TYPE CMP_COND_Type IS (COND_ALL, COND_EQ, COND_NE, COND_LT, COND_LE, COND_GT, COND_GE);
59 TYPE CMP_COND_TYPE_Type IS (COND_TYPE_ALL, COND_TYPE_IF_THEN, COND_TYPE_IF_THEN_THEN, COND_TYPE_IF_THEN_ELSE);
61 TYPE IF2ID_Type IS RECORD
62 program_counter : STD_LOGIC_VECTOR (31 DOWNTO 0);
65 TYPE ID2EX_Type IS RECORD
66 program_counter : STD_LOGIC_VECTOR (31 DOWNTO 0);
67 rdix_rA : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
68 rdix_rB : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
69 curr_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
70 alu_Action : ALU_ACTION_Type;
71 alu_Op1 : ALU_IN1_Type;
72 alu_Op2 : ALU_IN2_Type;
73 alu_Cin : ALU_CIN_Type;
74 IMM16 : STD_LOGIC_VECTOR (15 DOWNTO 0);
76 msr_Action : MSR_ACTION_Type;
77 branch_Action : BRANCH_ACTION_Type;
78 mem_Action : MEM_ACTION_Type; -- rd_mem implies writeback
79 transfer_Size : TRANSFER_SIZE_Type;
80 wrb_Action : WRB_ACTION_Type;
81 cmp_Cond : CMP_COND_Type;
82 cmp_Cond_Type : CMP_COND_TYPE_Type;
85 TYPE ID2GPRF_Type IS RECORD
86 rdix_rA : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
87 rdix_rB : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
88 rdix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
91 TYPE INT_CTRL_Type IS RECORD
92 setup_int : STD_LOGIC;
93 rti_target : STD_LOGIC_VECTOR (31 DOWNTO 0);
97 TYPE ID2CTRL_Type IS RECORD
102 TYPE GPRF2EX_Type IS RECORD
103 data_rA : STD_LOGIC_VECTOR (31 DOWNTO 0);
104 data_rB : STD_LOGIC_VECTOR (31 DOWNTO 0);
105 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
108 TYPE IMM_LOCK_Type IS RECORD
110 IMM_hi16 : STD_LOGIC_VECTOR (15 DOWNTO 0);
113 TYPE MSR_Type IS RECORD
114 IE : STD_LOGIC; -- MSR[VHDL b1] = [MicroBlaze b30]
115 C : STD_LOGIC; -- MSR[VHDL b2 and b31] = [MicroBlaze b29 and b0]
118 TYPE EX2IF_Type IS RECORD
119 take_branch : STD_LOGIC;
120 branch_target : STD_LOGIC_VECTOR (31 DOWNTO 0);
123 TYPE EX2CTRL_Type IS RECORD
124 flush_first : STD_LOGIC;
125 flush_second : STD_LOGIC;
128 TYPE HALT_Type IS RECORD
130 halt_code : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
133 TYPE EX2MEM_Type IS RECORD
134 mem_Action : MEM_ACTION_Type; -- RD_MEM implies writeback
135 wrb_Action : WRB_ACTION_Type;
136 exeq_result : STD_LOGIC_VECTOR (31 DOWNTO 0);
137 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
138 byte_Enable : STD_LOGIC_VECTOR ( 3 DOWNTO 0);
139 wrix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
142 TYPE WRB_Type IS RECORD
143 wrb_Action : WRB_ACTION_Type;
144 wrix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
145 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
148 TYPE HAZARD_WRB_Type IS RECORD
150 save_rX : SAVE_REG_Type;
151 data_rX : STD_LOGIC_VECTOR (31 DOWNTO 0);
152 data_rD : STD_LOGIC_VECTOR (31 DOWNTO 0);
155 TYPE MEM_REG_Type IS RECORD
156 wrb_Action : WRB_ACTION_Type;
157 exeq_result : STD_LOGIC_VECTOR (31 DOWNTO 0);
158 byte_Enable : STD_LOGIC_VECTOR ( 3 DOWNTO 0);
159 wrix_rD : STD_LOGIC_VECTOR ( 4 DOWNTO 0);
162 TYPE MEM2CTRL_Type IS RECORD
167 TYPE CORE2DMEMB_Type IS RECORD
169 addr : STD_LOGIC_VECTOR (31 DOWNTO 0);
170 bSel : STD_LOGIC_VECTOR ( 3 DOWNTO 0);
172 data : STD_LOGIC_VECTOR (31 DOWNTO 0);
175 TYPE DMEMB2CORE_Type IS RECORD
177 data : STD_LOGIC_VECTOR (31 DOWNTO 0);
181 TYPE MEMORY_MAP_Type IS ARRAY(NATURAL RANGE <>) OF STD_LOGIC_VECTOR (31 DOWNTO 0);
182 -- NOTE: Use the named association format xxxx := ( 0 => X"A0010000" );
183 -- in case the array has to contain only one element !!
185 ----------------------------------------------------------------------------------------------
187 ----------------------------------------------------------------------------------------------
191 prog_cntr_i : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
192 inc_pc_i : IN STD_LOGIC;
193 EX2IF_i : IN EX2IF_Type;
194 IF2ID_o : OUT IF2ID_Type
200 USE_HW_MUL_g : BOOLEAN := TRUE;
201 USE_BARREL_g : BOOLEAN := TRUE;
202 COMPATIBILITY_MODE_g : BOOLEAN := FALSE
205 IF2ID_i : IN IF2ID_Type;
206 imem_data_i : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
208 ID2GPRF_o : OUT ID2GPRF_Type;
209 ID2EX_o : OUT ID2EX_Type;
211 INT_CTRL_i : IN INT_CTRL_Type;
212 ID2CTRL_o : OUT ID2CTRL_Type;
214 noLiteOpc_o : OUT STD_LOGIC
220 DW_g : POSITIVE := 32;
221 LW_g : POSITIVE := 15
224 in1 : IN STD_LOGIC_VECTOR (DW_g-1 DOWNTO 0);
225 in2 : IN STD_LOGIC_VECTOR (DW_g-1 DOWNTO 0);
227 sum : OUT STD_LOGIC_VECTOR (DW_g-1 DOWNTO 0);
234 USE_HW_MUL_g : BOOLEAN := FALSE;
235 USE_BARREL_g : BOOLEAN := FALSE;
236 COMPATIBILITY_MODE_g : BOOLEAN := FALSE
239 ID2EX_i : IN ID2EX_Type;
240 GPRF2EX_i : IN GPRF2EX_Type;
241 EX2IF_o : OUT EX2IF_Type;
242 EX2CTRL_o : OUT EX2CTRL_Type;
243 HALT_o : OUT HALT_Type;
245 EX_WRB_i : IN WRB_Type;
246 EX_WRB_o : OUT WRB_Type;
247 MEM_WRB_i : IN WRB_Type;
249 HAZARD_WRB_i : IN HAZARD_WRB_Type;
250 HAZARD_WRB_o : OUT HAZARD_WRB_Type;
252 IMM_LOCK_i : IN IMM_LOCK_Type;
253 IMM_LOCK_o : OUT IMM_LOCK_Type;
256 MSR_o : OUT MSR_Type;
258 EX2MEM_o : OUT EX2MEM_Type
264 EX2MEM_i : IN EX2MEM_Type;
266 DMEMB_i : IN DMEMB2CORE_Type;
267 DMEMB_o : OUT CORE2DMEMB_Type;
269 MEM_REG_i : IN MEM_REG_Type;
270 MEM_REG_o : OUT MEM_REG_Type;
272 MEM_WRB_o : OUT WRB_Type;
273 MEM2CTRL_o : OUT MEM2CTRL_Type
277 COMPONENT core_ctrl IS
279 COMPATIBILITY_MODE_g : BOOLEAN := FALSE
282 clk_i : IN STD_LOGIC;
283 rst_i : IN STD_LOGIC;
284 halt_i : IN STD_LOGIC;
285 bad_op_i : IN STD_LOGIC;
286 int_i : IN STD_LOGIC;
287 trace_i : IN STD_LOGIC;
288 trace_kick_i : IN STD_LOGIC;
289 core_clken_o : OUT STD_LOGIC;
290 -- specific fetch i/o
291 imem_addr_o : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
292 imem_clken_o : OUT STD_LOGIC;
293 pc_ctrl_o : OUT STD_LOGIC;
294 -- fetch to decode pipeline registers
295 IF2ID_REG_i : IN IF2ID_Type;
296 IF2ID_REG_o : OUT IF2ID_Type;
297 -- decode to exeq pipeline registers
298 ID2EX_REG_i : IN ID2EX_Type;
299 ID2EX_REG_o : OUT ID2EX_Type;
301 gprf_clken_o : OUT STD_LOGIC;
302 -- exeq to fetch feedback registers
303 EX2IF_REG_i : IN EX2IF_Type;
304 EX2IF_REG_o : OUT EX2IF_Type;
305 EX2CTRL_REG_i : IN EX2CTRL_Type;
306 -- exeq to core (halting)
307 exeq_halt_i : IN STD_LOGIC;
308 -- exeq to mem pipeline registers
309 EX2MEM_REG_i : IN EX2MEM_Type;
310 EX2MEM_REG_o : OUT EX2MEM_Type;
311 -- mem pipeline register
312 MEM_REG_i : IN MEM_REG_Type;
313 MEM_REG_o : OUT MEM_REG_Type;
314 -- decode control i/o
315 ID2CTRL_i : IN ID2CTRL_Type;
316 INT_CTRL_o : OUT INT_CTRL_Type;
318 EX_WRB_i : IN WRB_Type;
319 EX_WRB_o : OUT WRB_Type;
321 HAZARD_WRB_i : IN HAZARD_WRB_Type;
322 HAZARD_WRB_o : OUT HAZARD_WRB_Type;
323 -- for handling the 'IMM' instruction
324 IMM_LOCK_i : IN IMM_LOCK_Type;
325 IMM_LOCK_o : OUT IMM_LOCK_Type;
326 -- for handling the Machine Status Register
328 MSR_o : OUT MSR_Type;
330 MEM2CTRL_i : IN MEM2CTRL_Type
334 ----------------------------------------------------------------------------------------------
335 -- FUNCTION, PROCEDURE DECLARATIONS
336 ----------------------------------------------------------------------------------------------
338 PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
340 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
341 VARIABLE co : OUT STD_LOGIC );
343 PROCEDURE ep_add32nc ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
345 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0));
347 -- PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR; ci : IN STD_LOGIC;
348 -- VARIABLE s : OUT STD_LOGIC_VECTOR;
349 -- VARIABLE co : OUT STD_LOGIC );
351 FUNCTION ef_nbits ( value : NATURAL ) RETURN POSITIVE;
356 ----------------------------------------------------------
357 PACKAGE BODY mbl_Pkg IS
358 ----------------------------------------------------------
360 PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
362 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
363 VARIABLE co : OUT STD_LOGIC ) IS
365 CONSTANT NBITS_LO_c : POSITIVE := 17;
366 CONSTANT NBITS_HI_c : POSITIVE := 32 -NBITS_LO_c;
367 VARIABLE tmp_lo_v : STD_LOGIC_VECTOR (NBITS_LO_c +1 DOWNTO 0);
368 VARIABLE tmp_hi0_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
369 VARIABLE tmp_hi1_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
371 tmp_lo_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(NBITS_LO_c -1 DOWNTO 0) & '1' ) +
372 UNSIGNED( '0' & b(NBITS_LO_c -1 DOWNTO 0) & ci ));
373 tmp_hi0_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
374 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '0'));
375 tmp_hi1_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
376 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '1'));
377 IF (tmp_lo_v(NBITS_LO_c +1) = '0') THEN
378 s := tmp_hi0_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
379 co := tmp_hi0_v(NBITS_HI_c +1);
381 s := tmp_hi1_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
382 co := tmp_hi1_v(NBITS_HI_c +1);
386 PROCEDURE ep_add32nc ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
388 VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) ) IS
390 CONSTANT NBITS_LO_c : POSITIVE := 17;
391 CONSTANT NBITS_HI_c : POSITIVE := 32 -NBITS_LO_c;
392 VARIABLE tmp_lo_v : STD_LOGIC_VECTOR (NBITS_LO_c +1 DOWNTO 0);
393 VARIABLE tmp_hi0_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
394 VARIABLE tmp_hi1_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0);
396 tmp_lo_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(NBITS_LO_c -1 DOWNTO 0) & '1' ) +
397 UNSIGNED( '0' & b(NBITS_LO_c -1 DOWNTO 0) & ci ));
398 tmp_hi0_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
399 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '0'));
400 tmp_hi1_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') +
401 UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '1'));
402 IF (tmp_lo_v(NBITS_LO_c +1) = '0') THEN
403 s := tmp_hi0_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
405 s := tmp_hi1_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1);
409 -- PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR; ci : IN STD_LOGIC;
410 -- VARIABLE s : OUT STD_LOGIC_VECTOR;
411 -- VARIABLE co : OUT STD_LOGIC ) IS
412 -- VARIABLE tmp_lo_v : STD_LOGIC_VECTOR (a'LENGTH/2 +1 DOWNTO 0);
413 -- VARIABLE tmp_hi0_v : STD_LOGIC_VECTOR (a'LENGTH/2 +1 DOWNTO 0);
414 -- VARIABLE tmp_hi1_v : STD_LOGIC_VECTOR (a'LENGTH/2 +1 DOWNTO 0);
416 -- tmp_lo_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(a'LENGTH/2 -1 DOWNTO 0) & '1' ) +
417 -- UNSIGNED( '0' & b(a'LENGTH/2 -1 DOWNTO 0) & ci ));
418 -- tmp_hi0_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(a'LENGTH -1 DOWNTO a'LENGTH/2) & '1') +
419 -- UNSIGNED( '0' & b(a'LENGTH -1 DOWNTO a'LENGTH/2) & '0'));
420 -- tmp_hi1_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(a'LENGTH -1 DOWNTO a'LENGTH/2) & '1') +
421 -- UNSIGNED( '0' & b(a'LENGTH -1 DOWNTO a'LENGTH/2) & '1'));
422 -- IF (tmp_lo_v(a'LENGTH/2 +1) = '0') THEN
423 -- s := tmp_hi0_v(a'LENGTH/2 DOWNTO 1) & tmp_lo_v(a'LENGTH/2 DOWNTO 1);
424 -- co := tmp_hi0_v(a'LENGTH/2 +1);
426 -- s := tmp_hi1_v(a'LENGTH/2 DOWNTO 1) & tmp_lo_v(a'LENGTH/2 DOWNTO 1);
427 -- co := tmp_hi1_v(a'LENGTH/2 +1);
431 -- Function ef_nbits returns the minimum number of binary bits to represent
433 -- so N = 0,1 NBITS = 1
435 -- N = 4,5,6,7 NBITS = 3
436 -- N = 8..15 NBITS = 4
437 -- N = 16..31 NBITS = 5
440 FUNCTION ef_nbits( value : NATURAL ) RETURN POSITIVE IS
441 VARIABLE temp_v : POSITIVE;
444 FOR i IN 1 TO INTEGER'HIGH LOOP
446 IF (temp_v > value) THEN
453 END PACKAGE BODY mbl_Pkg;