]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/history - hw
RoCoN: use BlueBot drawing declared axis order after population of another two bridges.
[fpga/lx-cpu1/lx-rocon.git] / hw /
2014-06-17 Pavel PisaProvide output event indication end of reception from...
2014-06-15 Pavel PisaImplemented initial version of LXPWR receiver FSM based...
2014-06-15 Pavel PisaProvide direct pass-trough drive of i_rd_s from filtere...
2014-06-15 Pavel PisaAssign next_last_address_s signal value in all cases...
2014-06-15 Pavel PisaRedesign external bus access timing and logic.
2014-06-09 Martin MelounUpdate FPGA, fix hazard conditions in BRAM
2014-06-02 Pavel PisaMerge branch 'master' of rtime.felk.cvut.cz:/fpga/lx...
2014-06-02 Martin MelounUpdate dff2, create dff3, fix LX Master for multiple...
2014-05-30 Martin MelounLX Master watchdog implemented
2014-05-30 Martin MelounAdd a bit to IRC register storing current index wire...
2014-05-30 Martin MelounFix LX Master transmission, update PXMC for new structure
2014-05-30 Martin MelounUpdate LX Master transmitter structure layout
2014-05-30 Martin MelounUpdate LX PWR communication
2014-05-27 Pavel PisaMerge 8x IRC support from origin/master branch into...
2014-05-27 Martin MelounSupport 8 IRCs, refactorization (IRC and LXMaster regis...
2014-05-23 Martin MelounCleanup (whitespace, etc.)
2014-05-23 Martin MelounLX Master MOSI and SYNC hold time after clock increased
2014-05-23 Martin MelounLX Master, usb command support, fixed SYNC and CRC...
2014-05-23 Martin MelounIRC inputs pin changed to PULLUP
2014-05-23 Martin MelounIRC coprocesor, change to generic, index to user, usb...
2014-05-11 Martin MelounMultiple patches
2013-12-04 Martin MelounIRC coprocessor with muxed access between Master CPU...
2013-10-02 Martin MelounMajor refactorization in hw
2013-09-30 Martin MelounImprove tumbl, tweak xst settings for more optimal...
2013-09-25 Martin MelounKeep up with tumbl update (conditional execution)
2013-09-24 Martin MelounPut up with tumbl changes and custom binutils / gcc...
2013-09-18 Martin MelounMultiple changes in FPGA, include Tumbl coprocessor
2013-08-30 Martin MelounFPGA: IRC - dff sampler shouldn't have reset
2013-08-30 Martin MelounFPGA: Improvements & Fixes
2013-08-26 Martin MelounImplement reset properly with correct polarity inside...
2013-08-25 Martin MelounFPGA: Bugfixes, custom packaging and added testing...
2013-08-18 Martin MelounApply fix for Spartan6 errata (9k block ram initialization)
2013-08-18 Martin MelounGenerate bin file for custom configuration
2013-08-18 Martin MelounAdd ID register to memory bus
2013-08-18 Martin MelounAdd FPGA sources with Makefile