rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/history

]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/history - hw/lx-rocon.ucf

2014-06-17	Pavel Pisa	Provide output event indication end of reception from...	blob \| commitdiff \| raw
2014-06-09	Martin Meloun	Update FPGA, fix hazard conditions in BRAM	blob \| commitdiff \| raw \| diff to current
2014-05-30	Martin Meloun	Update LX PWR communication	blob \| commitdiff \| raw \| diff to current
2014-05-27	Pavel Pisa	Merge 8x IRC support from origin/master branch into...	blob \| commitdiff \| raw \| diff to current
2014-05-27	Martin Meloun	Support 8 IRCs, refactorization (IRC and LXMaster regis...	blob \| commitdiff \| raw \| diff to current
2014-05-23	Martin Meloun	LX Master MOSI and SYNC hold time after clock increased	blob \| commitdiff \| raw \| diff to current
2014-05-23	Martin Meloun	IRC inputs pin changed to PULLUP	blob \| commitdiff \| raw \| diff to current
2014-05-11	Martin Meloun	Multiple patches	blob \| commitdiff \| raw \| diff to current
2013-09-18	Martin Meloun	Multiple changes in FPGA, include Tumbl coprocessor	blob \| commitdiff \| raw \| diff to current
2013-08-25	Martin Meloun	FPGA: Bugfixes, custom packaging and added testing...	blob \| commitdiff \| raw \| diff to current
2013-08-18	Martin Meloun	Add ID register to memory bus	blob \| commitdiff \| raw \| diff to current
2013-08-18	Martin Meloun	Add FPGA sources with Makefile	blob \| commitdiff \| raw \| diff to current

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