#define HAL_ERR_SENSITIVITY 20
#define HAL_ERR_MAX_COUNT 5
-unsigned pxmc_lpcpwm1_magnitude;
+unsigned pxmc_rocon_pwm_magnitude = 2500;
long pxmc_rocon_irc_offset[PXML_MAIN_CNT];
unsigned pxmc_rocon_mark_filt[PXML_MAIN_CNT];
{
unsigned h = 0;
/* FIXME */
+ h = 1;
/* return 3 bits corresponding to the HAL senzor input */
return h;
}
};
#endif
+uint32_t pxmc_rocon_pwm_dummy_reg;
+
+static inline volatile uint32_t *
+pxmc_rocon_pwm_chan2reg(unsigned chan)
+{
+ volatile uint32_t *pwm_reg;
+
+ if (chan >= 16)
+ return &pxmc_rocon_pwm_dummy_reg;
+
+ pwm_reg = fpga_lx_master_transmitter_base;
+ pwm_reg += 1 + (chan >> 8) + chan;
+ return pwm_reg;
+}
+
/**
* pxmc_rocon_pwm3ph_wr - Output of the 3-phase PWM to the hardware
* @mcs: Motion controller state information
{
unsigned long out_info = mcs->pxms_out_info;
- /* FIXME */
+ volatile uint32_t *pwm_reg_a, *pwm_reg_b, *pwm_reg_c;
+ int chan = mcs->pxms_out_info;
+
+ pwm_reg_a = pxmc_rocon_pwm_chan2reg(chan + 0);
+ pwm_reg_b = pxmc_rocon_pwm_chan2reg(chan + 1);
+ pwm_reg_c = pxmc_rocon_pwm_chan2reg(chan + 2);
+
+ *pwm_reg_a = pwm1;
+ *pwm_reg_b = pwm2;
+ *pwm_reg_c = pwm3;
}
static inline void
* @mcs: Motion controller state information
*/
int
-pxmc_rocon_pwm_out(pxmc_state_t *mcs)
+pxmc_rocon_pwm3ph_out(pxmc_state_t *mcs)
{
unsigned char hal_pos;
short pwm1;
pwm3 = mcs->pxms_ptptr3[indx];
#ifdef PXMC_WITH_PT_ZIC
+ if (labs(mcs->pxms_as) < (10 << PXMC_SUBDIV(mcs)))
+ {
+ pwm1 &= ~PXMC_PT_ZIC_MASK;
+ pwm2 &= ~PXMC_PT_ZIC_MASK;
+ pwm3 &= ~PXMC_PT_ZIC_MASK;
+ }
+#endif /*PXMC_WITH_PT_ZIC*/
- if (labs(mcs->pxms_as) > (10 << PXMC_SUBDIV(mcs)))
+ /* Default phase-table amplitude is 0x7fff, ene max is 0x7fff */
+ /* Initialized CTM4 PWM period is 0x200 => divide by value about 2097024 */
{
+ unsigned long pwm_dc = pxmc_rocon_pwm_magnitude * (unsigned long)ene;
if (pwm1 & PXMC_PT_ZIC_MASK)
- {
- /*hal_gpio_set_value(PWM2_EN_PIN,0);*/
- }
+ pwm1 = 0x8000;
else
- {
- /*hal_gpio_set_value(PWM2_EN_PIN,1);*/
- }
-
+ pwm1 = (((unsigned long long)pwm1 * pwm_dc) >> (15 + 15)) | 0x4000;
if (pwm2 & PXMC_PT_ZIC_MASK)
- {
- /*hal_gpio_set_value(PWM4_EN_PIN,0);*/
- }
+ pwm2 = 0x8000;
else
- {
- /*hal_gpio_set_value(PWM4_EN_PIN,1);*/
- }
-
+ pwm2 = (((unsigned long long)pwm2 * pwm_dc) >> (15 + 15)) | 0x4000;
if (pwm3 & PXMC_PT_ZIC_MASK)
- {
- /*hal_gpio_set_value(PWM6_EN_PIN,0);*/
- }
+ pwm3 = 0x8000;
else
- {
- /*hal_gpio_set_value(PWM6_EN_PIN,1);*/
- }
- }
- else
- {
- /*hal_gpio_set_value(PWM2_EN_PIN,1);*/
- /*hal_gpio_set_value(PWM4_EN_PIN,1);*/
- /*hal_gpio_set_value(PWM6_EN_PIN,1);*/
- }
-
- pwm1 &= ~PXMC_PT_ZIC_MASK;
- pwm2 &= ~PXMC_PT_ZIC_MASK;
- pwm3 &= ~PXMC_PT_ZIC_MASK;
-#endif /*PXMC_WITH_PT_ZIC*/
-
- /* Default phase-table amplitude is 0x7fff, ene max is 0x7fff */
- /* Initialized CTM4 PWM period is 0x200 => divide by value about 2097024 */
- {
- unsigned long pwm_dc = pxmc_lpcpwm1_magnitude * (unsigned long)ene;
- pwm1 = ((unsigned long long)pwm1 * pwm_dc) >> (15 + 15);
- pwm2 = ((unsigned long long)pwm2 * pwm_dc) >> (15 + 15);
- pwm3 = ((unsigned long long)pwm3 * pwm_dc) >> (15 + 15);
+ pwm3 = (((unsigned long long)pwm3 * pwm_dc) >> (15 + 15)) | 0x4000;
}
pxmc_rocon_pwm3ph_wr(mcs, pwm1, pwm2, pwm3);
}
else
{
- /*pxmc_lpc_wind_current_over_cnt=0;*/
pxmc_rocon_pwm3ph_wr(mcs, 0, 0, 0);
-#ifdef PXMC_WITH_PT_ZIC
- /*hal_gpio_set_value(PWM2_EN_PIN,1);*/
- /*hal_gpio_set_value(PWM4_EN_PIN,1);*/
- /*hal_gpio_set_value(PWM6_EN_PIN,1);*/
-#endif /*PXMC_WITH_PT_ZIC*/
}
return 0;
}
-uint32_t pxmc_rocon_pwm_dummy_reg;
-
-static inline volatile uint32_t *
-pxmc_rocon_pwm_chan2reg(unsigned chan)
-{
- volatile uint32_t *pwm_reg;
-
- if (chan >= 16)
- return &pxmc_rocon_pwm_dummy_reg;
-
- pwm_reg = fpga_lx_master_transmitter_base;
- pwm_reg += 1 + (chan >> 8) + chan;
- return pwm_reg;
-}
-
-
int
pxmc_rocon_pwm_dc_out(pxmc_state_t *mcs)
{
int chan = mcs->pxms_out_info;
int ene = mcs->pxms_ene;
- if (chan > 6)
- return 0;
-
pwm_reg_a = pxmc_rocon_pwm_chan2reg(chan + 0);
pwm_reg_b = pxmc_rocon_pwm_chan2reg(chan + 1);
ene = -ene;
if (ene > 0x7fff)
ene = 0x7fff;
- ene = (ene * (2500 + 5)) >> 15;
+ ene = (ene * (pxmc_rocon_pwm_magnitude + 5)) >> 15;
*pwm_reg_a = 0;
*pwm_reg_b = ene | 0x4000;
} else {
if (ene > 0x7fff)
ene = 0x7fff;
- ene = (ene * (2500 + 5)) >> 15;
+ ene = (ene * (pxmc_rocon_pwm_magnitude + 5)) >> 15;
*pwm_reg_b = 0;
*pwm_reg_a = ene | 0x4000;
}