Updated GTKwave view configuration for TUMBL tests visualization.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>

diff --git a/hw/tb/Makefile b/hw/tb/Makefile
index a2274a27c9d11408e297ae76b4f62122db484250..695116853c2d2ab0f9ac5b24304d9e2106fd2fa2 100644 (file)
--- a/hw/tb/Makefile
+++ b/hw/tb/Makefile
@@ -38,7 +38,7 @@ imem.bits : imem.bin convert_bin2bits
 
 test-tumbl: analyze-all imem.bits
        $(GHDL) $(GHDLFLAGS) -m $(ANALYZEFLAGS) lx_tumbl_tb
-       $(GHDL) $(GHDLFLAGS) -r  lx_tumbl_tb --stop-time=10000ns --vcd=$@.vcd --wave=$@.ghw
+       $(GHDL) $(GHDLFLAGS) -r  lx_tumbl_tb --stop-time=100000ns --vcd=$@.vcd --wave=$@.ghw
 
 test-rocon: analyze-all imem.bits
        $(GHDL) $(GHDLFLAGS) -m $(ANALYZEFLAGS) lx_rocon_top_tb

diff --git a/hw/tb/test-rocon.gtkw b/hw/tb/test-rocon.gtkw
index 9eb743c1c592750d40ef7075148c288bab9e7697..aef013b729679d8b901460ef4849bc3371dcd333 100644 (file)
--- a/hw/tb/test-rocon.gtkw
+++ b/hw/tb/test-rocon.gtkw
@@ -1,17 +1,18 @@
 [*]
 [*] GTKWave Analyzer v3.3.37 (w)1999-2012 BSI
-[*] Tue Dec 30 01:29:16 2014
+[*] Wed Dec 31 20:16:27 2014
 [*]
-[dumpfile] "test-rocon.ghw"
-[dumpfile_mtime] "Tue Dec 30 00:57:38 2014"
-[dumpfile_size] 308909
-[savefile] "test-rocon.gtkw"
-[timestart] 9059500000
+[dumpfile] "/home/pi/repo/ulan/lx-rocon/hw/tb/test-rocon.ghw"
+[dumpfile_mtime] "Wed Dec 31 11:07:58 2014"
+[dumpfile_size] 291181
+[savefile] "/home/pi/repo/ulan/lx-rocon/hw/tb/test-rocon.gtkw"
+[timestart] 3700600000
 [size] 1480 1076
 [pos] -1 -1
-*-25.226513 9150700000 9190000000 9126000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+*-26.226513 3871800000 9190000000 9126000000 3871800000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 [markername] AError
 [markername] BBad read
+[markername] CIncorrect sine val
 [treeopen] top.
 [treeopen] top.lx_rocon_top_tb.
 [treeopen] top.lx_rocon_top_tb.uut.
@@ -37,7 +38,6 @@ top.lx_rocon_top_tb.clk_50m
 #{top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[8:0]} top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[8] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[7] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[6] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[5] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[4] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[3] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[2] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[1] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_addr_i[0]
 #{top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_we_i[3:0]} top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_we_i[3] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_we_i[2] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_we_i[1] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.imem_we_i[0]
 @28
-top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.xmemb_i.clken
 top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.reset_s
 top.lx_rocon_top_tb.uut.init_s
 top.lx_rocon_top_tb.uut.tumbl_ce_s
@@ -55,8 +55,6 @@ top.lx_rocon_top_tb.uut.memory_bus_tumbl.ce_i
 top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_dmem.ce_i
 @22
 #{top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_dmem.i_ramb.wea[3:0]} top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_dmem.i_ramb.wea[3] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_dmem.i_ramb.wea[2] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_dmem.i_ramb.wea[1] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_dmem.i_ramb.wea[0]
-@28
-top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_mem.mem2ctrl_o.clken
 @200
 -fncapprox
 @28
@@ -76,5 +74,14 @@ top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_mem.mem_wrb_o.wrb_action
 @28
 top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_gprf.i_rd.web[0]
 top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_gprf.i_rd.clkb
+@22
+#{top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[31:0]} top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[31] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[30] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[29] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[28] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[27] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[26] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[25] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[24] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[23] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[22] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[21] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[20] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[19] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[18] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[17] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[16] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[15] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[14] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[13] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[12] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[11] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[10] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[9] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[8] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[7] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[6] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[5] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[4] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[3] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[2] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[1] top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.hazard_wrb_o.data_rd[0]
+@28
+top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_mem.dmemb_i.bus_taken
+top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_mem.mem2ctrl_o.bus_taken
+top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.finish_wrb_mem_s
+top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_ctrl.mem2ctrl_i.need_keep
+top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_gprf.ena_rd_s
+top.lx_rocon_top_tb.uut.memory_bus_tumbl.i_tumbl.i_gprf.wthru_rd_r
 [pattern_trace] 1
 [pattern_trace] 0

diff --git a/hw/tb/test-tumbl.gtkw b/hw/tb/test-tumbl.gtkw
index 5f19c8f6181f740c941b0d29b54f3885ae50efa6..a5013c2ac232de5b1ae134f131c2a4800b68fa99 100644 (file)
--- a/hw/tb/test-tumbl.gtkw
+++ b/hw/tb/test-tumbl.gtkw
@@ -1,33 +1,32 @@
 [*]
 [*] GTKWave Analyzer v3.3.37 (w)1999-2012 BSI
-[*] Tue Dec 30 10:31:41 2014
+[*] Wed Dec 31 20:16:20 2014
 [*]
-[dumpfile] "test-tumbl.ghw"
-[dumpfile_mtime] "Tue Dec 30 10:22:08 2014"
-[dumpfile_size] 162922
-[savefile] "test-tumbl.gtkw"
-[timestart] 1330900000
-[size] 1553 1053
+[dumpfile] "/home/pi/repo/ulan/lx-rocon/hw/tb/test-tumbl.ghw"
+[dumpfile_mtime] "Wed Dec 31 10:40:03 2014"
+[dumpfile_size] 1627306
+[savefile] "/home/pi/repo/ulan/lx-rocon/hw/tb/test-tumbl-2.gtkw"
+[timestart] 671400000
+[size] 1553 1113
 [pos] -1 -1
-*-26.055782 1454000000 1450300000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+*-27.192127 1267800000 1450300000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 [markername] AError excesive wrb_mem
 [treeopen] top.
 [treeopen] top.lx_tumbl_tb.
 [treeopen] top.lx_tumbl_tb.uut.
-[treeopen] top.lx_tumbl_tb.uut.i_dmem.
+[treeopen] top.lx_tumbl_tb.uut.i_exeq.
 [treeopen] top.lx_tumbl_tb.uut.i_gprf.
 [treeopen] top.lx_tumbl_tb.uut.i_gprf.i_rd.
-[treeopen] top.lx_tumbl_tb.uut.i_imem.
 [treeopen] top.lx_tumbl_tb.uut.i_imem.i_ramb.
 [treeopen] top.lx_tumbl_tb.uut.i_mem.
 [treeopen] top.lx_tumbl_tb.uut.i_mem.dmemb_o.
 [treeopen] top.lx_tumbl_tb.uut.i_mem.mem_reg_o.
 [treeopen] top.lx_tumbl_tb.uut.i_mem.mem_wrb_o.
 [treeopen] top.lx_tumbl_tb.uut.xmemb_i.
-[sst_width] 344
+[sst_width] 221
 [signals_width] 261
 [sst_expanded] 1
-[sst_vpaned_height] 314
+[sst_vpaned_height] 335
 @28
 top.lx_tumbl_tb.cycle_cnt
 @22
@@ -35,13 +34,6 @@ top.lx_tumbl_tb.cycle_cnt
 #{top.lx_tumbl_tb.uut.dmem_data_s[31:0]} top.lx_tumbl_tb.uut.dmem_data_s[31] top.lx_tumbl_tb.uut.dmem_data_s[30] top.lx_tumbl_tb.uut.dmem_data_s[29] top.lx_tumbl_tb.uut.dmem_data_s[28] top.lx_tumbl_tb.uut.dmem_data_s[27] top.lx_tumbl_tb.uut.dmem_data_s[26] top.lx_tumbl_tb.uut.dmem_data_s[25] top.lx_tumbl_tb.uut.dmem_data_s[24] top.lx_tumbl_tb.uut.dmem_data_s[23] top.lx_tumbl_tb.uut.dmem_data_s[22] top.lx_tumbl_tb.uut.dmem_data_s[21] top.lx_tumbl_tb.uut.dmem_data_s[20] top.lx_tumbl_tb.uut.dmem_data_s[19] top.lx_tumbl_tb.uut.dmem_data_s[18] top.lx_tumbl_tb.uut.dmem_data_s[17] top.lx_tumbl_tb.uut.dmem_data_s[16] top.lx_tumbl_tb.uut.dmem_data_s[15] top.lx_tumbl_tb.uut.dmem_data_s[14] top.lx_tumbl_tb.uut.dmem_data_s[13] top.lx_tumbl_tb.uut.dmem_data_s[12] top.lx_tumbl_tb.uut.dmem_data_s[11] top.lx_tumbl_tb.uut.dmem_data_s[10] top.lx_tumbl_tb.uut.dmem_data_s[9] top.lx_tumbl_tb.uut.dmem_data_s[8] top.lx_tumbl_tb.uut.dmem_data_s[7] top.lx_tumbl_tb.uut.dmem_data_s[6] top.lx_tumbl_tb.uut.dmem_data_s[5] top.lx_tumbl_tb.uut.dmem_data_s[4] top.lx_tumbl_tb.uut.dmem_data_s[3] top.lx_tumbl_tb.uut.dmem_data_s[2] top.lx_tumbl_tb.uut.dmem_data_s[1] top.lx_tumbl_tb.uut.dmem_data_s[0]
 @28
 top.lx_tumbl_tb.delay_access_s
-top.lx_tumbl_tb.xmemb_i_s.clken
-top.lx_tumbl_tb.uut.xmemb_i.clken
-top.lx_tumbl_tb.uut.mem2ctrl_s.clken
-top.lx_tumbl_tb.uut.i_mem.mem2ctrl_o.clken
-top.lx_tumbl_tb.uut.i_mem.dmemb_i.clken
-top.lx_tumbl_tb.uut.i_ctrl.mem2ctrl_i.clken
-top.lx_tumbl_tb.uut.dmemb_i_s.clken
 top.lx_tumbl_tb.uut.core_clken_s
 top.lx_tumbl_tb.uut.i_ctrl.core_clken_o
 @22
@@ -69,5 +61,54 @@ top.lx_tumbl_tb.uut.i_gprf.i_rd.web[0]
 top.lx_tumbl_tb.uut.mem_reg_s.wrb_action
 @22
 #{top.lx_tumbl_tb.uut.mem_reg_s.wrix_rd[4:0]} top.lx_tumbl_tb.uut.mem_reg_s.wrix_rd[4] top.lx_tumbl_tb.uut.mem_reg_s.wrix_rd[3] top.lx_tumbl_tb.uut.mem_reg_s.wrix_rd[2] top.lx_tumbl_tb.uut.mem_reg_s.wrix_rd[1] top.lx_tumbl_tb.uut.mem_reg_s.wrix_rd[0]
+@200
+-i_mem
+@28
+top.lx_tumbl_tb.uut.i_mem.ex2mem_i.mem_action
+top.lx_tumbl_tb.uut.i_mem.ex2mem_i.wrb_action
+top.lx_tumbl_tb.uut.i_mem.dmemb_i.bus_wait
+top.lx_tumbl_tb.uut.i_mem.mem2ctrl_o.bus_wait
+top.lx_tumbl_tb.uut.i_mem.dmemb_i.bus_taken
+top.lx_tumbl_tb.uut.i_mem.mem2ctrl_o.bus_taken
+top.lx_tumbl_tb.uut.dmem_really_sel_s
+top.lx_tumbl_tb.uut.gprf_really_clken_s
+top.lx_tumbl_tb.uut.imem_really_clken_s
+@200
+-core_ctrl
+@28
+top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrb_action
+@22
+#{top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[4:0]} top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[4] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[3] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[2] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[1] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[0]
+@200
+-Exec
+@28
+top.lx_tumbl_tb.uut.i_exeq.id2ex_i.alu_action
+top.lx_tumbl_tb.uut.i_exeq.id2ex_i.alu_op1
+@22
+#{top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_ra[4:0]} top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_ra[4] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_ra[3] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_ra[2] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_ra[1] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_ra[0]
+@28
+top.lx_tumbl_tb.uut.i_exeq.id2ex_i.alu_op2
+@22
+#{top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_rb[4:0]} top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_rb[4] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_rb[3] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_rb[2] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_rb[1] top.lx_tumbl_tb.uut.i_exeq.id2ex_i.rdix_rb[0]
+#{top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[31:0]} top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[31] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[30] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[29] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[28] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[27] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[26] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[25] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[24] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[23] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[22] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[21] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[20] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[19] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[18] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[17] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[16] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[15] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[14] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[13] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[12] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[11] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[10] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[9] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[8] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[7] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[6] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[5] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[4] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[3] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[2] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[1] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.data_rd[0]
+#{top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.wrix_rd[4:0]} top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.wrix_rd[4] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.wrix_rd[3] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.wrix_rd[2] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.wrix_rd[1] top.lx_tumbl_tb.uut.i_exeq.ex_wrb_o.wrix_rd[0]
+@200
+-xmemb_o
+@22
+#{top.lx_tumbl_tb.xmemb_o_s.bls[3:0]} top.lx_tumbl_tb.xmemb_o_s.bls[3] top.lx_tumbl_tb.xmemb_o_s.bls[2] top.lx_tumbl_tb.xmemb_o_s.bls[1] top.lx_tumbl_tb.xmemb_o_s.bls[0]
+@28
+top.lx_tumbl_tb.xmemb_o_s.rd
+@22
+#{top.lx_tumbl_tb.xmemb_o_s.addr[14:0]} top.lx_tumbl_tb.xmemb_o_s.addr[14] top.lx_tumbl_tb.xmemb_o_s.addr[13] top.lx_tumbl_tb.xmemb_o_s.addr[12] top.lx_tumbl_tb.xmemb_o_s.addr[11] top.lx_tumbl_tb.xmemb_o_s.addr[10] top.lx_tumbl_tb.xmemb_o_s.addr[9] top.lx_tumbl_tb.xmemb_o_s.addr[8] top.lx_tumbl_tb.xmemb_o_s.addr[7] top.lx_tumbl_tb.xmemb_o_s.addr[6] top.lx_tumbl_tb.xmemb_o_s.addr[5] top.lx_tumbl_tb.xmemb_o_s.addr[4] top.lx_tumbl_tb.xmemb_o_s.addr[3] top.lx_tumbl_tb.xmemb_o_s.addr[2] top.lx_tumbl_tb.xmemb_o_s.addr[1] top.lx_tumbl_tb.xmemb_o_s.addr[0]
+#{top.lx_tumbl_tb.uut.xmemb_o.data[31:0]} top.lx_tumbl_tb.uut.xmemb_o.data[31] top.lx_tumbl_tb.uut.xmemb_o.data[30] top.lx_tumbl_tb.uut.xmemb_o.data[29] top.lx_tumbl_tb.uut.xmemb_o.data[28] top.lx_tumbl_tb.uut.xmemb_o.data[27] top.lx_tumbl_tb.uut.xmemb_o.data[26] top.lx_tumbl_tb.uut.xmemb_o.data[25] top.lx_tumbl_tb.uut.xmemb_o.data[24] top.lx_tumbl_tb.uut.xmemb_o.data[23] top.lx_tumbl_tb.uut.xmemb_o.data[22] top.lx_tumbl_tb.uut.xmemb_o.data[21] top.lx_tumbl_tb.uut.xmemb_o.data[20] top.lx_tumbl_tb.uut.xmemb_o.data[19] top.lx_tumbl_tb.uut.xmemb_o.data[18] top.lx_tumbl_tb.uut.xmemb_o.data[17] top.lx_tumbl_tb.uut.xmemb_o.data[16] top.lx_tumbl_tb.uut.xmemb_o.data[15] top.lx_tumbl_tb.uut.xmemb_o.data[14] top.lx_tumbl_tb.uut.xmemb_o.data[13] top.lx_tumbl_tb.uut.xmemb_o.data[12] top.lx_tumbl_tb.uut.xmemb_o.data[11] top.lx_tumbl_tb.uut.xmemb_o.data[10] top.lx_tumbl_tb.uut.xmemb_o.data[9] top.lx_tumbl_tb.uut.xmemb_o.data[8] top.lx_tumbl_tb.uut.xmemb_o.data[7] top.lx_tumbl_tb.uut.xmemb_o.data[6] top.lx_tumbl_tb.uut.xmemb_o.data[5] top.lx_tumbl_tb.uut.xmemb_o.data[4] top.lx_tumbl_tb.uut.xmemb_o.data[3] top.lx_tumbl_tb.uut.xmemb_o.data[2] top.lx_tumbl_tb.uut.xmemb_o.data[1] top.lx_tumbl_tb.uut.xmemb_o.data[0]
+#{top.lx_tumbl_tb.uut.xmemb_i.data[31:0]} top.lx_tumbl_tb.uut.xmemb_i.data[31] top.lx_tumbl_tb.uut.xmemb_i.data[30] top.lx_tumbl_tb.uut.xmemb_i.data[29] top.lx_tumbl_tb.uut.xmemb_i.data[28] top.lx_tumbl_tb.uut.xmemb_i.data[27] top.lx_tumbl_tb.uut.xmemb_i.data[26] top.lx_tumbl_tb.uut.xmemb_i.data[25] top.lx_tumbl_tb.uut.xmemb_i.data[24] top.lx_tumbl_tb.uut.xmemb_i.data[23] top.lx_tumbl_tb.uut.xmemb_i.data[22] top.lx_tumbl_tb.uut.xmemb_i.data[21] top.lx_tumbl_tb.uut.xmemb_i.data[20] top.lx_tumbl_tb.uut.xmemb_i.data[19] top.lx_tumbl_tb.uut.xmemb_i.data[18] top.lx_tumbl_tb.uut.xmemb_i.data[17] top.lx_tumbl_tb.uut.xmemb_i.data[16] top.lx_tumbl_tb.uut.xmemb_i.data[15] top.lx_tumbl_tb.uut.xmemb_i.data[14] top.lx_tumbl_tb.uut.xmemb_i.data[13] top.lx_tumbl_tb.uut.xmemb_i.data[12] top.lx_tumbl_tb.uut.xmemb_i.data[11] top.lx_tumbl_tb.uut.xmemb_i.data[10] top.lx_tumbl_tb.uut.xmemb_i.data[9] top.lx_tumbl_tb.uut.xmemb_i.data[8] top.lx_tumbl_tb.uut.xmemb_i.data[7] top.lx_tumbl_tb.uut.xmemb_i.data[6] top.lx_tumbl_tb.uut.xmemb_i.data[5] top.lx_tumbl_tb.uut.xmemb_i.data[4] top.lx_tumbl_tb.uut.xmemb_i.data[3] top.lx_tumbl_tb.uut.xmemb_i.data[2] top.lx_tumbl_tb.uut.xmemb_i.data[1] top.lx_tumbl_tb.uut.xmemb_i.data[0]
+@200
+-i_ctrl.MEM_REG_o
+@28
+top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrb_action
+@22
+#{top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[4:0]} top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[4] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[3] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[2] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[1] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.wrix_rd[0]
+#{top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[31:0]} top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[31] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[30] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[29] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[28] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[27] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[26] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[25] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[24] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[23] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[22] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[21] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[20] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[19] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[18] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[17] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[16] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[15] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[14] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[13] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[12] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[11] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[10] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[9] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[8] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[7] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[6] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[5] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[4] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[3] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[2] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[1] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.exeq_result[0]
+#{top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.byte_enable[3:0]} top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.byte_enable[3] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.byte_enable[2] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.byte_enable[1] top.lx_tumbl_tb.uut.i_ctrl.mem_reg_o.byte_enable[0]
 [pattern_trace] 1
 [pattern_trace] 0