RoCoN: add definition of LX Master register for PWM cycle period configuration.

[fpga/lx-cpu1/lx-rocon.git] / sw / app / rocon / appl_fpga.h

diff --git a/sw/app/rocon/appl_fpga.h b/sw/app/rocon/appl_fpga.h
index 3667d16779d17c52c7d11e8f1e0a81e6eda48214..b3371efbb44d2fec7b9076b4fe6bcb58279bc1cf 100644 (file)
--- a/sw/app/rocon/appl_fpga.h
+++ b/sw/app/rocon/appl_fpga.h
@@ -89,10 +89,12 @@ extern volatile uint8_t *fpga_irc_reset;
 #endif
 #define FPGA_LX_MASTER_TRANSMITTER_REG    0x80025004
 #define FPGA_LX_MASTER_TRANSMITTER_WDOG   0x80025008
+#define FPGA_LX_MASTER_TRANSMITTER_CYCLE  0x8002500C
 #define FPGA_LX_MASTER_RECEIVER_REG       0x80025010
 
 extern volatile uint32_t *fpga_lx_master_transmitter_base;
 extern volatile uint32_t *fpga_lx_master_transmitter_reg;
+extern volatile uint32_t *fpga_lx_master_transmitter_cycle;
 extern volatile uint32_t *fpga_lx_master_transmitter_wdog;
 extern volatile uint32_t *fpga_lx_master_receiver_base;
 extern volatile uint32_t *fpga_lx_master_receiver_reg;