#include "appl_defs.h"
#include "appl_fpga.h"
+#include "appl_pxmc.h"
#include "pxmcc_types.h"
+#include "pxmcc_interface.h"
+
+#ifdef CONFIG_OC_MTD_DRV_SYSLESS
+#include <mtd_spi_drv.h>
+#endif
int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
return 0;
}
+int cmd_do_mtdspitest(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ int res;
+ unsigned char id_buff[3];
+
+ res = mtd_spi_read_jedec_id(&mtd_spi_state, id_buff, 3);
+ if (res < 0) {
+ printf("mtd_spi_read_jedec_id returned %d\n", res);
+ return -1;
+ }
+
+ printf("mtd_spi_read_jedec_id 0x%02x 0x%02x 0x%02x \n",
+ id_buff[0], id_buff[1], id_buff[2]);
+
+ res = mtd_spi_set_protect_mode(&mtd_spi_state, 0, 0);
+ if (res < 0) {
+ printf("mtd_spi_set_protect_mode returned %d\n", res);
+ return -1;
+ }
+
+ return 0;
+}
+
#ifdef SDRAM_BASE
int sdram_access_test(void)
{
char *ps = param[1];
long pwm_d;
long pwm_q;
- uint32_t ptofs;
- uint32_t irc;
- uint32_t ptirc;
- uint32_t ptreci;
- uint32_t pwmtx_info;
- uint64_t ull;
pxmc_state_t *mcs = pxmc_main_list.pxml_arr[0];
- volatile pxmcc_data_t *mcc_data = (pxmcc_data_t *)fpga_tumbl_dmem;
- volatile pxmcc_axis_data_t *mcc_axis = mcc_data->axis + 0;
+ volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
- mcc_axis->ccflg = 0;
+ pxmcc_axis_enable(mcs, 0);
si_skspace(&ps);
if (si_long(&ps, &pwm_d, 0) < 0)
if (si_ulong(&ps, &pwm_q, 0) < 0)
return -CMDERR_BADPAR;
- irc = fpga_irc[0]->count;
- ptofs = (int16_t)(mcs->pxms_ptofs - irc) + irc;
-
- ptirc = mcs->pxms_ptirc;
- ull = (1ULL << 32) * mcs->pxms_ptper;
- ptreci = (ull + ptirc / 2) / ptirc;
-
- pwmtx_info = (9 << 0) | (10 << 8) | (11 << 16);
-
- mcc_axis->mode = 1;
-
- mcc_axis->inp_info = mcs->pxms_inp_info;
- mcc_axis->out_info = mcs->pxms_out_info;
- mcc_axis->pwmtx_info = pwmtx_info;
-
- mcc_axis->ptirc = ptirc;
- mcc_axis->ptreci = ptreci;
- mcc_axis->ptofs = ptofs;
-
- mcc_axis->ccflg = 0;
- mcc_axis->pwm_dq = (pwm_d << 16) | (pwm_q & 0xffff);
+ if (0) {
+ pxmcc_axis_setup(mcs, PXMCC_MODE_BLDC);
+ }
pxmc_clear_flags(mcs,PXMS_ENO_m|PXMS_ENG_m|PXMS_ENR_m|PXMS_BSY_m);
-
- mcc_axis->ccflg = 1;
+ pxmcc_axis_pwm_dq_out(mcs, pwm_d, pwm_q);
+ pxmcc_axis_enable(mcs, 1);
if (0) {
- mcc_data->axis[1].inp_info = 1;
+ mcc_data->axis[1].inp_info = 0;
mcc_data->axis[1].out_info = 3;
mcc_data->axis[1].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
- mcc_data->axis[1].mode = 1;
+ mcc_data->axis[1].mode = PXMCC_MODE_BLDC;
mcc_data->axis[1].ccflg = 1;
- mcc_data->axis[2].inp_info = 2;
+ mcc_data->axis[2].inp_info = 0;
mcc_data->axis[2].out_info = 6;
mcc_data->axis[2].pwmtx_info = (15 << 0) | (16 << 8) | (18 << 16);
- mcc_data->axis[2].mode = 1;
+ mcc_data->axis[2].mode = PXMCC_MODE_BLDC;
mcc_data->axis[2].ccflg = 1;
- mcc_data->axis[3].inp_info = 3;
+ mcc_data->axis[3].inp_info = 0;
mcc_data->axis[3].out_info = 9;
mcc_data->axis[3].pwmtx_info = (19 << 0) | (20 << 8) | (21 << 16);
- mcc_data->axis[3].mode = 1;
+ mcc_data->axis[3].mode = PXMCC_MODE_BLDC;
mcc_data->axis[3].ccflg = 1;
}
return 0;
}
+int cmd_do_testcuradc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ char *ps = param[1];
+ long pwm_chan_a;
+ long pwm_chan_b;
+ long pwm_b = 0;
+ pxmc_state_t *mcs;
+ volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
+ int i;
+ long cur_a;
+ long cur_b;
+ long pwm_cycle = mcc_data->common.pwm_cycle;
+
+ si_skspace(&ps);
+ if (si_long(&ps, &pwm_chan_a, 0) < 0)
+ return -CMDERR_BADPAR;
+
+ si_skspace(&ps);
+ if (si_ulong(&ps, &pwm_chan_b, 0) < 0)
+ return -CMDERR_BADPAR;
+
+ if (pwm_chan_a >= PXMCC_CURADC_CHANNELS)
+ return -CMDERR_BADPAR;
+
+ if (pwm_chan_b >= PXMCC_CURADC_CHANNELS)
+ return -CMDERR_BADPAR;
+
+ si_skspace(&ps);
+ if (*ps) {
+ if (si_ulong(&ps, &pwm_b, 0) < 0)
+ return -CMDERR_BADPAR;
+ pxmc_for_each_mcs(i, mcs) {
+ /* PXMS_ENI_m - check if input (IRC) update is enabled */
+ if (mcs->pxms_flg & (PXMS_ENR_m | PXMS_ENO_m)) {
+ pxmc_axis_release(mcs);
+ }
+ }
+
+ for (i = 0; i < 16; i++) {
+ if (i == pwm_chan_a) {
+ if (pxmc_rocon_pwm_direct_wr(i, 0, 1) < 0)
+ return -CMDERR_EIO;
+ } else if (i == pwm_chan_b) {
+ if (pxmc_rocon_pwm_direct_wr(i, pwm_b, 1) < 0)
+ return -CMDERR_EIO;
+ } else {
+ pxmc_rocon_pwm_direct_wr(i, 0, 0);
+ }
+ }
+ }
+
+ cur_a = mcc_data->curadc[pwm_chan_a].cur_val;
+ cur_b = mcc_data->curadc[pwm_chan_b].cur_val;
+ if (pwm_b < pwm_cycle)
+ cur_b = (pwm_cycle * cur_b + pwm_cycle / 2) / (pwm_cycle - pwm_b);
+
+ printf("ch %2ld pwm %5ld cur %7ld\n", pwm_chan_a, 0l, cur_a);
+ printf("ch %2ld pwm %5ld cur %7ld\n", pwm_chan_b, pwm_b, cur_b);
+
+ return 0;
+}
+
+int cmd_do_curadc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
+{
+ int chan;
+ volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data();
+ volatile pxmcc_curadc_data_t *curadc;
+ int subcmd = (int)des->info[0];
+
+ for (chan = 0; chan < PXMCC_CURADC_CHANNELS; chan++) {
+ curadc = mcc_data->curadc + chan;
+ switch (subcmd) {
+ case 0:
+ printf("%s%ld", chan?",":"", (long)curadc->cur_val);
+ break;
+ case 1:
+ printf("%s%ld", chan?",":"", (long)curadc->siroladc_offs);
+ break;
+ case 2:
+ curadc->siroladc_offs += curadc->cur_val;
+ break;
+ }
+ }
+
+ if (subcmd < 2)
+ printf("\n");
+
+ return 0;
+}
+
cmd_des_t const cmd_des_test_memusage = {0, 0,
"memusage", "report memory usage", cmd_do_test_memusage,
{
cmd_do_spimst_blocking, {(void *) - 1}
};
+cmd_des_t const cmd_des_mtdspitest = {0, 0,
+ "mtdspitest", "test SPI connected Flash",
+ cmd_do_mtdspitest, {(void *) - 1}
+ };
+
#ifdef SDRAM_BASE
cmd_des_t const cmd_des_testsdram = {0, 0,
"testsdram", "test SDRAM",
cmd_do_testtumblebus, {(void *)0}
};
+cmd_des_t const cmd_des_testcuradc = {0, 0,
+ "testcuradc", "test current adc channel calibration",
+ cmd_do_testcuradc, {(void *)0}
+ };
+
+cmd_des_t const cmd_des_showcuradc = {0, 0,
+ "showcuradc", "print current ADC offsets",
+ cmd_do_curadc, {(void *)0}
+ };
+
+cmd_des_t const cmd_des_showcuradcoffs = {0, 0,
+ "showcuradcoffs", "print current ADC offsets",
+ cmd_do_curadc, {(void *)1}
+ };
+
+cmd_des_t const cmd_des_calcuradcoffs = {0, 0,
+ "calcuradcoffs", "calibrate current ADC offsets",
+ cmd_do_curadc, {(void *)2}
+ };
cmd_des_t const *const cmd_appl_tests[] =
{
&cmd_des_test_loglevel,
&cmd_des_spimst,
&cmd_des_spimstx,
+ &cmd_des_mtdspitest,
#ifdef SDRAM_BASE
&cmd_des_testsdram,
#endif /*SDRAM_BASE*/
&cmd_des_testfncapprox,
&cmd_des_testtumblefw,
&cmd_des_testtumblebus,
+ &cmd_des_testcuradc,
+ &cmd_des_showcuradc,
+ &cmd_des_showcuradcoffs,
+ &cmd_des_calcuradcoffs,
NULL
};