1 // arm.cc -- arm target support for gold.
3 // Copyright 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
38 #include "parameters.h"
45 #include "copy-relocs.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
61 template<bool big_endian>
62 class Output_data_plt_arm;
64 template<bool big_endian>
65 class Output_data_plt_arm_standard;
67 template<bool big_endian>
70 template<bool big_endian>
71 class Arm_input_section;
73 class Arm_exidx_cantunwind;
75 class Arm_exidx_merged_section;
77 class Arm_exidx_fixup;
79 template<bool big_endian>
80 class Arm_output_section;
82 class Arm_exidx_input_section;
84 template<bool big_endian>
87 template<bool big_endian>
88 class Arm_relocate_functions;
90 template<bool big_endian>
91 class Arm_output_data_got;
93 template<bool big_endian>
97 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
99 // Maximum branch offsets for ARM, THUMB and THUMB2.
100 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
101 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
102 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
103 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
104 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
105 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
107 // Thread Control Block size.
108 const size_t ARM_TCB_SIZE = 8;
110 // The arm target class.
112 // This is a very simple port of gold for ARM-EABI. It is intended for
113 // supporting Android only for the time being.
116 // - Implement all static relocation types documented in arm-reloc.def.
117 // - Make PLTs more flexible for different architecture features like
119 // There are probably a lot more.
121 // Ideally we would like to avoid using global variables but this is used
122 // very in many places and sometimes in loops. If we use a function
123 // returning a static instance of Arm_reloc_property_table, it will be very
124 // slow in an threaded environment since the static instance needs to be
125 // locked. The pointer is below initialized in the
126 // Target::do_select_as_default_target() hook so that we do not spend time
127 // building the table if we are not linking ARM objects.
129 // An alternative is to to process the information in arm-reloc.def in
130 // compilation time and generate a representation of it in PODs only. That
131 // way we can avoid initialization when the linker starts.
133 Arm_reloc_property_table* arm_reloc_property_table = NULL;
135 // Instruction template class. This class is similar to the insn_sequence
136 // struct in bfd/elf32-arm.c.
141 // Types of instruction templates.
145 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
146 // templates with class-specific semantics. Currently this is used
147 // only by the Cortex_a8_stub class for handling condition codes in
148 // conditional branches.
149 THUMB16_SPECIAL_TYPE,
155 // Factory methods to create instruction templates in different formats.
157 static const Insn_template
158 thumb16_insn(uint32_t data)
159 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
161 // A Thumb conditional branch, in which the proper condition is inserted
162 // when we build the stub.
163 static const Insn_template
164 thumb16_bcond_insn(uint32_t data)
165 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
167 static const Insn_template
168 thumb32_insn(uint32_t data)
169 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
171 static const Insn_template
172 thumb32_b_insn(uint32_t data, int reloc_addend)
174 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
178 static const Insn_template
179 arm_insn(uint32_t data)
180 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
182 static const Insn_template
183 arm_rel_insn(unsigned data, int reloc_addend)
184 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
186 static const Insn_template
187 data_word(unsigned data, unsigned int r_type, int reloc_addend)
188 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
190 // Accessors. This class is used for read-only objects so no modifiers
195 { return this->data_; }
197 // Return the instruction sequence type of this.
200 { return this->type_; }
202 // Return the ARM relocation type of this.
205 { return this->r_type_; }
209 { return this->reloc_addend_; }
211 // Return size of instruction template in bytes.
215 // Return byte-alignment of instruction template.
220 // We make the constructor private to ensure that only the factory
223 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
224 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
227 // Instruction specific data. This is used to store information like
228 // some of the instruction bits.
230 // Instruction template type.
232 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
233 unsigned int r_type_;
234 // Relocation addend.
235 int32_t reloc_addend_;
238 // Macro for generating code to stub types. One entry per long/short
242 DEF_STUB(long_branch_any_any) \
243 DEF_STUB(long_branch_v4t_arm_thumb) \
244 DEF_STUB(long_branch_thumb_only) \
245 DEF_STUB(long_branch_v4t_thumb_thumb) \
246 DEF_STUB(long_branch_v4t_thumb_arm) \
247 DEF_STUB(short_branch_v4t_thumb_arm) \
248 DEF_STUB(long_branch_any_arm_pic) \
249 DEF_STUB(long_branch_any_thumb_pic) \
250 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
251 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
252 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
253 DEF_STUB(long_branch_thumb_only_pic) \
254 DEF_STUB(a8_veneer_b_cond) \
255 DEF_STUB(a8_veneer_b) \
256 DEF_STUB(a8_veneer_bl) \
257 DEF_STUB(a8_veneer_blx) \
258 DEF_STUB(v4_veneer_bx)
262 #define DEF_STUB(x) arm_stub_##x,
268 // First reloc stub type.
269 arm_stub_reloc_first = arm_stub_long_branch_any_any,
270 // Last reloc stub type.
271 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
273 // First Cortex-A8 stub type.
274 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
275 // Last Cortex-A8 stub type.
276 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
279 arm_stub_type_last = arm_stub_v4_veneer_bx
283 // Stub template class. Templates are meant to be read-only objects.
284 // A stub template for a stub type contains all read-only attributes
285 // common to all stubs of the same type.
290 Stub_template(Stub_type, const Insn_template*, size_t);
298 { return this->type_; }
300 // Return an array of instruction templates.
303 { return this->insns_; }
305 // Return size of template in number of instructions.
308 { return this->insn_count_; }
310 // Return size of template in bytes.
313 { return this->size_; }
315 // Return alignment of the stub template.
318 { return this->alignment_; }
320 // Return whether entry point is in thumb mode.
322 entry_in_thumb_mode() const
323 { return this->entry_in_thumb_mode_; }
325 // Return number of relocations in this template.
328 { return this->relocs_.size(); }
330 // Return index of the I-th instruction with relocation.
332 reloc_insn_index(size_t i) const
334 gold_assert(i < this->relocs_.size());
335 return this->relocs_[i].first;
338 // Return the offset of the I-th instruction with relocation from the
339 // beginning of the stub.
341 reloc_offset(size_t i) const
343 gold_assert(i < this->relocs_.size());
344 return this->relocs_[i].second;
348 // This contains information about an instruction template with a relocation
349 // and its offset from start of stub.
350 typedef std::pair<size_t, section_size_type> Reloc;
352 // A Stub_template may not be copied. We want to share templates as much
354 Stub_template(const Stub_template&);
355 Stub_template& operator=(const Stub_template&);
359 // Points to an array of Insn_templates.
360 const Insn_template* insns_;
361 // Number of Insn_templates in insns_[].
363 // Size of templated instructions in bytes.
365 // Alignment of templated instructions.
367 // Flag to indicate if entry is in thumb mode.
368 bool entry_in_thumb_mode_;
369 // A table of reloc instruction indices and offsets. We can find these by
370 // looking at the instruction templates but we pre-compute and then stash
371 // them here for speed.
372 std::vector<Reloc> relocs_;
376 // A class for code stubs. This is a base class for different type of
377 // stubs used in the ARM target.
383 static const section_offset_type invalid_offset =
384 static_cast<section_offset_type>(-1);
387 Stub(const Stub_template* stub_template)
388 : stub_template_(stub_template), offset_(invalid_offset)
395 // Return the stub template.
397 stub_template() const
398 { return this->stub_template_; }
400 // Return offset of code stub from beginning of its containing stub table.
404 gold_assert(this->offset_ != invalid_offset);
405 return this->offset_;
408 // Set offset of code stub from beginning of its containing stub table.
410 set_offset(section_offset_type offset)
411 { this->offset_ = offset; }
413 // Return the relocation target address of the i-th relocation in the
414 // stub. This must be defined in a child class.
416 reloc_target(size_t i)
417 { return this->do_reloc_target(i); }
419 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
421 write(unsigned char* view, section_size_type view_size, bool big_endian)
422 { this->do_write(view, view_size, big_endian); }
424 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
425 // for the i-th instruction.
427 thumb16_special(size_t i)
428 { return this->do_thumb16_special(i); }
431 // This must be defined in the child class.
433 do_reloc_target(size_t) = 0;
435 // This may be overridden in the child class.
437 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
440 this->do_fixed_endian_write<true>(view, view_size);
442 this->do_fixed_endian_write<false>(view, view_size);
445 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
446 // instruction template.
448 do_thumb16_special(size_t)
449 { gold_unreachable(); }
452 // A template to implement do_write.
453 template<bool big_endian>
455 do_fixed_endian_write(unsigned char*, section_size_type);
458 const Stub_template* stub_template_;
459 // Offset within the section of containing this stub.
460 section_offset_type offset_;
463 // Reloc stub class. These are stubs we use to fix up relocation because
464 // of limited branch ranges.
466 class Reloc_stub : public Stub
469 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
470 // We assume we never jump to this address.
471 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
473 // Return destination address.
475 destination_address() const
477 gold_assert(this->destination_address_ != this->invalid_address);
478 return this->destination_address_;
481 // Set destination address.
483 set_destination_address(Arm_address address)
485 gold_assert(address != this->invalid_address);
486 this->destination_address_ = address;
489 // Reset destination address.
491 reset_destination_address()
492 { this->destination_address_ = this->invalid_address; }
494 // Determine stub type for a branch of a relocation of R_TYPE going
495 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
496 // the branch target is a thumb instruction. TARGET is used for look
497 // up ARM-specific linker settings.
499 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
500 Arm_address branch_target, bool target_is_thumb);
502 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
503 // and an addend. Since we treat global and local symbol differently, we
504 // use a Symbol object for a global symbol and a object-index pair for
509 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
510 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
511 // and R_SYM must not be invalid_index.
512 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
513 unsigned int r_sym, int32_t addend)
514 : stub_type_(stub_type), addend_(addend)
518 this->r_sym_ = Reloc_stub::invalid_index;
519 this->u_.symbol = symbol;
523 gold_assert(relobj != NULL && r_sym != invalid_index);
524 this->r_sym_ = r_sym;
525 this->u_.relobj = relobj;
532 // Accessors: Keys are meant to be read-only object so no modifiers are
538 { return this->stub_type_; }
540 // Return the local symbol index or invalid_index.
543 { return this->r_sym_; }
545 // Return the symbol if there is one.
548 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
550 // Return the relobj if there is one.
553 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
555 // Whether this equals to another key k.
557 eq(const Key& k) const
559 return ((this->stub_type_ == k.stub_type_)
560 && (this->r_sym_ == k.r_sym_)
561 && ((this->r_sym_ != Reloc_stub::invalid_index)
562 ? (this->u_.relobj == k.u_.relobj)
563 : (this->u_.symbol == k.u_.symbol))
564 && (this->addend_ == k.addend_));
567 // Return a hash value.
571 return (this->stub_type_
573 ^ gold::string_hash<char>(
574 (this->r_sym_ != Reloc_stub::invalid_index)
575 ? this->u_.relobj->name().c_str()
576 : this->u_.symbol->name())
580 // Functors for STL associative containers.
584 operator()(const Key& k) const
585 { return k.hash_value(); }
591 operator()(const Key& k1, const Key& k2) const
592 { return k1.eq(k2); }
595 // Name of key. This is mainly for debugging.
601 Stub_type stub_type_;
602 // If this is a local symbol, this is the index in the defining object.
603 // Otherwise, it is invalid_index for a global symbol.
605 // If r_sym_ is an invalid index, this points to a global symbol.
606 // Otherwise, it points to a relobj. We used the unsized and target
607 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
608 // Arm_relobj, in order to avoid making the stub class a template
609 // as most of the stub machinery is endianness-neutral. However, it
610 // may require a bit of casting done by users of this class.
613 const Symbol* symbol;
614 const Relobj* relobj;
616 // Addend associated with a reloc.
621 // Reloc_stubs are created via a stub factory. So these are protected.
622 Reloc_stub(const Stub_template* stub_template)
623 : Stub(stub_template), destination_address_(invalid_address)
629 friend class Stub_factory;
631 // Return the relocation target address of the i-th relocation in the
634 do_reloc_target(size_t i)
636 // All reloc stub have only one relocation.
638 return this->destination_address_;
642 // Address of destination.
643 Arm_address destination_address_;
646 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
647 // THUMB branch that meets the following conditions:
649 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
650 // branch address is 0xffe.
651 // 2. The branch target address is in the same page as the first word of the
653 // 3. The branch follows a 32-bit instruction which is not a branch.
655 // To do the fix up, we need to store the address of the branch instruction
656 // and its target at least. We also need to store the original branch
657 // instruction bits for the condition code in a conditional branch. The
658 // condition code is used in a special instruction template. We also want
659 // to identify input sections needing Cortex-A8 workaround quickly. We store
660 // extra information about object and section index of the code section
661 // containing a branch being fixed up. The information is used to mark
662 // the code section when we finalize the Cortex-A8 stubs.
665 class Cortex_a8_stub : public Stub
671 // Return the object of the code section containing the branch being fixed
675 { return this->relobj_; }
677 // Return the section index of the code section containing the branch being
681 { return this->shndx_; }
683 // Return the source address of stub. This is the address of the original
684 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
687 source_address() const
688 { return this->source_address_; }
690 // Return the destination address of the stub. This is the branch taken
691 // address of the original branch instruction. LSB is 1 if it is a THUMB
692 // instruction address.
694 destination_address() const
695 { return this->destination_address_; }
697 // Return the instruction being fixed up.
699 original_insn() const
700 { return this->original_insn_; }
703 // Cortex_a8_stubs are created via a stub factory. So these are protected.
704 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
705 unsigned int shndx, Arm_address source_address,
706 Arm_address destination_address, uint32_t original_insn)
707 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
708 source_address_(source_address | 1U),
709 destination_address_(destination_address),
710 original_insn_(original_insn)
713 friend class Stub_factory;
715 // Return the relocation target address of the i-th relocation in the
718 do_reloc_target(size_t i)
720 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
722 // The conditional branch veneer has two relocations.
724 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
728 // All other Cortex-A8 stubs have only one relocation.
730 return this->destination_address_;
734 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
736 do_thumb16_special(size_t);
739 // Object of the code section containing the branch being fixed up.
741 // Section index of the code section containing the branch begin fixed up.
743 // Source address of original branch.
744 Arm_address source_address_;
745 // Destination address of the original branch.
746 Arm_address destination_address_;
747 // Original branch instruction. This is needed for copying the condition
748 // code from a condition branch to its stub.
749 uint32_t original_insn_;
752 // ARMv4 BX Rx branch relocation stub class.
753 class Arm_v4bx_stub : public Stub
759 // Return the associated register.
762 { return this->reg_; }
765 // Arm V4BX stubs are created via a stub factory. So these are protected.
766 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
767 : Stub(stub_template), reg_(reg)
770 friend class Stub_factory;
772 // Return the relocation target address of the i-th relocation in the
775 do_reloc_target(size_t)
776 { gold_unreachable(); }
778 // This may be overridden in the child class.
780 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
783 this->do_fixed_endian_v4bx_write<true>(view, view_size);
785 this->do_fixed_endian_v4bx_write<false>(view, view_size);
789 // A template to implement do_write.
790 template<bool big_endian>
792 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
794 const Insn_template* insns = this->stub_template()->insns();
795 elfcpp::Swap<32, big_endian>::writeval(view,
797 + (this->reg_ << 16)));
798 view += insns[0].size();
799 elfcpp::Swap<32, big_endian>::writeval(view,
800 (insns[1].data() + this->reg_));
801 view += insns[1].size();
802 elfcpp::Swap<32, big_endian>::writeval(view,
803 (insns[2].data() + this->reg_));
806 // A register index (r0-r14), which is associated with the stub.
810 // Stub factory class.
815 // Return the unique instance of this class.
816 static const Stub_factory&
819 static Stub_factory singleton;
823 // Make a relocation stub.
825 make_reloc_stub(Stub_type stub_type) const
827 gold_assert(stub_type >= arm_stub_reloc_first
828 && stub_type <= arm_stub_reloc_last);
829 return new Reloc_stub(this->stub_templates_[stub_type]);
832 // Make a Cortex-A8 stub.
834 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
835 Arm_address source, Arm_address destination,
836 uint32_t original_insn) const
838 gold_assert(stub_type >= arm_stub_cortex_a8_first
839 && stub_type <= arm_stub_cortex_a8_last);
840 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
841 source, destination, original_insn);
844 // Make an ARM V4BX relocation stub.
845 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
847 make_arm_v4bx_stub(uint32_t reg) const
849 gold_assert(reg < 0xf);
850 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
855 // Constructor and destructor are protected since we only return a single
856 // instance created in Stub_factory::get_instance().
860 // A Stub_factory may not be copied since it is a singleton.
861 Stub_factory(const Stub_factory&);
862 Stub_factory& operator=(Stub_factory&);
864 // Stub templates. These are initialized in the constructor.
865 const Stub_template* stub_templates_[arm_stub_type_last+1];
868 // A class to hold stubs for the ARM target.
870 template<bool big_endian>
871 class Stub_table : public Output_data
874 Stub_table(Arm_input_section<big_endian>* owner)
875 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
876 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
877 prev_data_size_(0), prev_addralign_(1)
883 // Owner of this stub table.
884 Arm_input_section<big_endian>*
886 { return this->owner_; }
888 // Whether this stub table is empty.
892 return (this->reloc_stubs_.empty()
893 && this->cortex_a8_stubs_.empty()
894 && this->arm_v4bx_stubs_.empty());
897 // Return the current data size.
899 current_data_size() const
900 { return this->current_data_size_for_child(); }
902 // Add a STUB using KEY. The caller is responsible for avoiding addition
903 // if a STUB with the same key has already been added.
905 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
907 const Stub_template* stub_template = stub->stub_template();
908 gold_assert(stub_template->type() == key.stub_type());
909 this->reloc_stubs_[key] = stub;
911 // Assign stub offset early. We can do this because we never remove
912 // reloc stubs and they are in the beginning of the stub table.
913 uint64_t align = stub_template->alignment();
914 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
915 stub->set_offset(this->reloc_stubs_size_);
916 this->reloc_stubs_size_ += stub_template->size();
917 this->reloc_stubs_addralign_ =
918 std::max(this->reloc_stubs_addralign_, align);
921 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
922 // The caller is responsible for avoiding addition if a STUB with the same
923 // address has already been added.
925 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
927 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
928 this->cortex_a8_stubs_.insert(value);
931 // Add an ARM V4BX relocation stub. A register index will be retrieved
934 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
936 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
937 this->arm_v4bx_stubs_[stub->reg()] = stub;
940 // Remove all Cortex-A8 stubs.
942 remove_all_cortex_a8_stubs();
944 // Look up a relocation stub using KEY. Return NULL if there is none.
946 find_reloc_stub(const Reloc_stub::Key& key) const
948 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
949 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
952 // Look up an arm v4bx relocation stub using the register index.
953 // Return NULL if there is none.
955 find_arm_v4bx_stub(const uint32_t reg) const
957 gold_assert(reg < 0xf);
958 return this->arm_v4bx_stubs_[reg];
961 // Relocate stubs in this stub table.
963 relocate_stubs(const Relocate_info<32, big_endian>*,
964 Target_arm<big_endian>*, Output_section*,
965 unsigned char*, Arm_address, section_size_type);
967 // Update data size and alignment at the end of a relaxation pass. Return
968 // true if either data size or alignment is different from that of the
969 // previous relaxation pass.
971 update_data_size_and_addralign();
973 // Finalize stubs. Set the offsets of all stubs and mark input sections
974 // needing the Cortex-A8 workaround.
978 // Apply Cortex-A8 workaround to an address range.
980 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
981 unsigned char*, Arm_address,
985 // Write out section contents.
987 do_write(Output_file*);
989 // Return the required alignment.
992 { return this->prev_addralign_; }
994 // Reset address and file offset.
996 do_reset_address_and_file_offset()
997 { this->set_current_data_size_for_child(this->prev_data_size_); }
999 // Set final data size.
1001 set_final_data_size()
1002 { this->set_data_size(this->current_data_size()); }
1005 // Relocate one stub.
1007 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1008 Target_arm<big_endian>*, Output_section*,
1009 unsigned char*, Arm_address, section_size_type);
1011 // Unordered map of relocation stubs.
1013 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1014 Reloc_stub::Key::equal_to>
1017 // List of Cortex-A8 stubs ordered by addresses of branches being
1018 // fixed up in output.
1019 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1020 // List of Arm V4BX relocation stubs ordered by associated registers.
1021 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1023 // Owner of this stub table.
1024 Arm_input_section<big_endian>* owner_;
1025 // The relocation stubs.
1026 Reloc_stub_map reloc_stubs_;
1027 // Size of reloc stubs.
1028 off_t reloc_stubs_size_;
1029 // Maximum address alignment of reloc stubs.
1030 uint64_t reloc_stubs_addralign_;
1031 // The cortex_a8_stubs.
1032 Cortex_a8_stub_list cortex_a8_stubs_;
1033 // The Arm V4BX relocation stubs.
1034 Arm_v4bx_stub_list arm_v4bx_stubs_;
1035 // data size of this in the previous pass.
1036 off_t prev_data_size_;
1037 // address alignment of this in the previous pass.
1038 uint64_t prev_addralign_;
1041 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1042 // we add to the end of an EXIDX input section that goes into the output.
1044 class Arm_exidx_cantunwind : public Output_section_data
1047 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1048 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1051 // Return the object containing the section pointed by this.
1054 { return this->relobj_; }
1056 // Return the section index of the section pointed by this.
1059 { return this->shndx_; }
1063 do_write(Output_file* of)
1065 if (parameters->target().is_big_endian())
1066 this->do_fixed_endian_write<true>(of);
1068 this->do_fixed_endian_write<false>(of);
1071 // Write to a map file.
1073 do_print_to_mapfile(Mapfile* mapfile) const
1074 { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1077 // Implement do_write for a given endianness.
1078 template<bool big_endian>
1080 do_fixed_endian_write(Output_file*);
1082 // The object containing the section pointed by this.
1084 // The section index of the section pointed by this.
1085 unsigned int shndx_;
1088 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1089 // Offset map is used to map input section offset within the EXIDX section
1090 // to the output offset from the start of this EXIDX section.
1092 typedef std::map<section_offset_type, section_offset_type>
1093 Arm_exidx_section_offset_map;
1095 // Arm_exidx_merged_section class. This represents an EXIDX input section
1096 // with some of its entries merged.
1098 class Arm_exidx_merged_section : public Output_relaxed_input_section
1101 // Constructor for Arm_exidx_merged_section.
1102 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1103 // SECTION_OFFSET_MAP points to a section offset map describing how
1104 // parts of the input section are mapped to output. DELETED_BYTES is
1105 // the number of bytes deleted from the EXIDX input section.
1106 Arm_exidx_merged_section(
1107 const Arm_exidx_input_section& exidx_input_section,
1108 const Arm_exidx_section_offset_map& section_offset_map,
1109 uint32_t deleted_bytes);
1111 // Build output contents.
1113 build_contents(const unsigned char*, section_size_type);
1115 // Return the original EXIDX input section.
1116 const Arm_exidx_input_section&
1117 exidx_input_section() const
1118 { return this->exidx_input_section_; }
1120 // Return the section offset map.
1121 const Arm_exidx_section_offset_map&
1122 section_offset_map() const
1123 { return this->section_offset_map_; }
1126 // Write merged section into file OF.
1128 do_write(Output_file* of);
1131 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1132 section_offset_type*) const;
1135 // Original EXIDX input section.
1136 const Arm_exidx_input_section& exidx_input_section_;
1137 // Section offset map.
1138 const Arm_exidx_section_offset_map& section_offset_map_;
1139 // Merged section contents. We need to keep build the merged section
1140 // and save it here to avoid accessing the original EXIDX section when
1141 // we cannot lock the sections' object.
1142 unsigned char* section_contents_;
1145 // A class to wrap an ordinary input section containing executable code.
1147 template<bool big_endian>
1148 class Arm_input_section : public Output_relaxed_input_section
1151 Arm_input_section(Relobj* relobj, unsigned int shndx)
1152 : Output_relaxed_input_section(relobj, shndx, 1),
1153 original_addralign_(1), original_size_(0), stub_table_(NULL),
1154 original_contents_(NULL)
1157 ~Arm_input_section()
1158 { delete[] this->original_contents_; }
1164 // Whether this is a stub table owner.
1166 is_stub_table_owner() const
1167 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1169 // Return the stub table.
1170 Stub_table<big_endian>*
1172 { return this->stub_table_; }
1174 // Set the stub_table.
1176 set_stub_table(Stub_table<big_endian>* stub_table)
1177 { this->stub_table_ = stub_table; }
1179 // Downcast a base pointer to an Arm_input_section pointer. This is
1180 // not type-safe but we only use Arm_input_section not the base class.
1181 static Arm_input_section<big_endian>*
1182 as_arm_input_section(Output_relaxed_input_section* poris)
1183 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1185 // Return the original size of the section.
1187 original_size() const
1188 { return this->original_size_; }
1191 // Write data to output file.
1193 do_write(Output_file*);
1195 // Return required alignment of this.
1197 do_addralign() const
1199 if (this->is_stub_table_owner())
1200 return std::max(this->stub_table_->addralign(),
1201 static_cast<uint64_t>(this->original_addralign_));
1203 return this->original_addralign_;
1206 // Finalize data size.
1208 set_final_data_size();
1210 // Reset address and file offset.
1212 do_reset_address_and_file_offset();
1216 do_output_offset(const Relobj* object, unsigned int shndx,
1217 section_offset_type offset,
1218 section_offset_type* poutput) const
1220 if ((object == this->relobj())
1221 && (shndx == this->shndx())
1224 convert_types<section_offset_type, uint32_t>(this->original_size_)))
1234 // Copying is not allowed.
1235 Arm_input_section(const Arm_input_section&);
1236 Arm_input_section& operator=(const Arm_input_section&);
1238 // Address alignment of the original input section.
1239 uint32_t original_addralign_;
1240 // Section size of the original input section.
1241 uint32_t original_size_;
1243 Stub_table<big_endian>* stub_table_;
1244 // Original section contents. We have to make a copy here since the file
1245 // containing the original section may not be locked when we need to access
1247 unsigned char* original_contents_;
1250 // Arm_exidx_fixup class. This is used to define a number of methods
1251 // and keep states for fixing up EXIDX coverage.
1253 class Arm_exidx_fixup
1256 Arm_exidx_fixup(Output_section* exidx_output_section,
1257 bool merge_exidx_entries = true)
1258 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1259 last_inlined_entry_(0), last_input_section_(NULL),
1260 section_offset_map_(NULL), first_output_text_section_(NULL),
1261 merge_exidx_entries_(merge_exidx_entries)
1265 { delete this->section_offset_map_; }
1267 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1268 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1269 // number of bytes to be deleted in output. If parts of the input EXIDX
1270 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1271 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1272 // responsible for releasing it.
1273 template<bool big_endian>
1275 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1276 const unsigned char* section_contents,
1277 section_size_type section_size,
1278 Arm_exidx_section_offset_map** psection_offset_map);
1280 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1281 // input section, if there is not one already.
1283 add_exidx_cantunwind_as_needed();
1285 // Return the output section for the text section which is linked to the
1286 // first exidx input in output.
1288 first_output_text_section() const
1289 { return this->first_output_text_section_; }
1292 // Copying is not allowed.
1293 Arm_exidx_fixup(const Arm_exidx_fixup&);
1294 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1296 // Type of EXIDX unwind entry.
1301 // EXIDX_CANTUNWIND.
1302 UT_EXIDX_CANTUNWIND,
1309 // Process an EXIDX entry. We only care about the second word of the
1310 // entry. Return true if the entry can be deleted.
1312 process_exidx_entry(uint32_t second_word);
1314 // Update the current section offset map during EXIDX section fix-up.
1315 // If there is no map, create one. INPUT_OFFSET is the offset of a
1316 // reference point, DELETED_BYTES is the number of deleted by in the
1317 // section so far. If DELETE_ENTRY is true, the reference point and
1318 // all offsets after the previous reference point are discarded.
1320 update_offset_map(section_offset_type input_offset,
1321 section_size_type deleted_bytes, bool delete_entry);
1323 // EXIDX output section.
1324 Output_section* exidx_output_section_;
1325 // Unwind type of the last EXIDX entry processed.
1326 Unwind_type last_unwind_type_;
1327 // Last seen inlined EXIDX entry.
1328 uint32_t last_inlined_entry_;
1329 // Last processed EXIDX input section.
1330 const Arm_exidx_input_section* last_input_section_;
1331 // Section offset map created in process_exidx_section.
1332 Arm_exidx_section_offset_map* section_offset_map_;
1333 // Output section for the text section which is linked to the first exidx
1335 Output_section* first_output_text_section_;
1337 bool merge_exidx_entries_;
1340 // Arm output section class. This is defined mainly to add a number of
1341 // stub generation methods.
1343 template<bool big_endian>
1344 class Arm_output_section : public Output_section
1347 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1349 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1350 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1351 elfcpp::Elf_Xword flags)
1352 : Output_section(name, type,
1353 (type == elfcpp::SHT_ARM_EXIDX
1354 ? flags | elfcpp::SHF_LINK_ORDER
1357 if (type == elfcpp::SHT_ARM_EXIDX)
1358 this->set_always_keeps_input_sections();
1361 ~Arm_output_section()
1364 // Group input sections for stub generation.
1366 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1368 // Downcast a base pointer to an Arm_output_section pointer. This is
1369 // not type-safe but we only use Arm_output_section not the base class.
1370 static Arm_output_section<big_endian>*
1371 as_arm_output_section(Output_section* os)
1372 { return static_cast<Arm_output_section<big_endian>*>(os); }
1374 // Append all input text sections in this into LIST.
1376 append_text_sections_to_list(Text_section_list* list);
1378 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1379 // is a list of text input sections sorted in ascending order of their
1380 // output addresses.
1382 fix_exidx_coverage(Layout* layout,
1383 const Text_section_list& sorted_text_section,
1384 Symbol_table* symtab,
1385 bool merge_exidx_entries,
1388 // Link an EXIDX section into its corresponding text section.
1390 set_exidx_section_link();
1394 typedef Output_section::Input_section Input_section;
1395 typedef Output_section::Input_section_list Input_section_list;
1397 // Create a stub group.
1398 void create_stub_group(Input_section_list::const_iterator,
1399 Input_section_list::const_iterator,
1400 Input_section_list::const_iterator,
1401 Target_arm<big_endian>*,
1402 std::vector<Output_relaxed_input_section*>*,
1406 // Arm_exidx_input_section class. This represents an EXIDX input section.
1408 class Arm_exidx_input_section
1411 static const section_offset_type invalid_offset =
1412 static_cast<section_offset_type>(-1);
1414 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1415 unsigned int link, uint32_t size,
1416 uint32_t addralign, uint32_t text_size)
1417 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1418 addralign_(addralign), text_size_(text_size), has_errors_(false)
1421 ~Arm_exidx_input_section()
1424 // Accessors: This is a read-only class.
1426 // Return the object containing this EXIDX input section.
1429 { return this->relobj_; }
1431 // Return the section index of this EXIDX input section.
1434 { return this->shndx_; }
1436 // Return the section index of linked text section in the same object.
1439 { return this->link_; }
1441 // Return size of the EXIDX input section.
1444 { return this->size_; }
1446 // Return address alignment of EXIDX input section.
1449 { return this->addralign_; }
1451 // Return size of the associated text input section.
1454 { return this->text_size_; }
1456 // Whether there are any errors in the EXIDX input section.
1459 { return this->has_errors_; }
1461 // Set has-errors flag.
1464 { this->has_errors_ = true; }
1467 // Object containing this.
1469 // Section index of this.
1470 unsigned int shndx_;
1471 // text section linked to this in the same object.
1473 // Size of this. For ARM 32-bit is sufficient.
1475 // Address alignment of this. For ARM 32-bit is sufficient.
1476 uint32_t addralign_;
1477 // Size of associated text section.
1478 uint32_t text_size_;
1479 // Whether this has any errors.
1483 // Arm_relobj class.
1485 template<bool big_endian>
1486 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1489 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1491 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1492 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1493 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1494 stub_tables_(), local_symbol_is_thumb_function_(),
1495 attributes_section_data_(NULL), mapping_symbols_info_(),
1496 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1497 output_local_symbol_count_needs_update_(false),
1498 merge_flags_and_attributes_(true)
1502 { delete this->attributes_section_data_; }
1504 // Return the stub table of the SHNDX-th section if there is one.
1505 Stub_table<big_endian>*
1506 stub_table(unsigned int shndx) const
1508 gold_assert(shndx < this->stub_tables_.size());
1509 return this->stub_tables_[shndx];
1512 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1514 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1516 gold_assert(shndx < this->stub_tables_.size());
1517 this->stub_tables_[shndx] = stub_table;
1520 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1521 // index. This is only valid after do_count_local_symbol is called.
1523 local_symbol_is_thumb_function(unsigned int r_sym) const
1525 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1526 return this->local_symbol_is_thumb_function_[r_sym];
1529 // Scan all relocation sections for stub generation.
1531 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1534 // Convert regular input section with index SHNDX to a relaxed section.
1536 convert_input_section_to_relaxed_section(unsigned shndx)
1538 // The stubs have relocations and we need to process them after writing
1539 // out the stubs. So relocation now must follow section write.
1540 this->set_section_offset(shndx, -1ULL);
1541 this->set_relocs_must_follow_section_writes();
1544 // Downcast a base pointer to an Arm_relobj pointer. This is
1545 // not type-safe but we only use Arm_relobj not the base class.
1546 static Arm_relobj<big_endian>*
1547 as_arm_relobj(Relobj* relobj)
1548 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1550 // Processor-specific flags in ELF file header. This is valid only after
1553 processor_specific_flags() const
1554 { return this->processor_specific_flags_; }
1556 // Attribute section data This is the contents of the .ARM.attribute section
1558 const Attributes_section_data*
1559 attributes_section_data() const
1560 { return this->attributes_section_data_; }
1562 // Mapping symbol location.
1563 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1565 // Functor for STL container.
1566 struct Mapping_symbol_position_less
1569 operator()(const Mapping_symbol_position& p1,
1570 const Mapping_symbol_position& p2) const
1572 return (p1.first < p2.first
1573 || (p1.first == p2.first && p1.second < p2.second));
1577 // We only care about the first character of a mapping symbol, so
1578 // we only store that instead of the whole symbol name.
1579 typedef std::map<Mapping_symbol_position, char,
1580 Mapping_symbol_position_less> Mapping_symbols_info;
1582 // Whether a section contains any Cortex-A8 workaround.
1584 section_has_cortex_a8_workaround(unsigned int shndx) const
1586 return (this->section_has_cortex_a8_workaround_ != NULL
1587 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1590 // Mark a section that has Cortex-A8 workaround.
1592 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1594 if (this->section_has_cortex_a8_workaround_ == NULL)
1595 this->section_has_cortex_a8_workaround_ =
1596 new std::vector<bool>(this->shnum(), false);
1597 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1600 // Return the EXIDX section of an text section with index SHNDX or NULL
1601 // if the text section has no associated EXIDX section.
1602 const Arm_exidx_input_section*
1603 exidx_input_section_by_link(unsigned int shndx) const
1605 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1606 return ((p != this->exidx_section_map_.end()
1607 && p->second->link() == shndx)
1612 // Return the EXIDX section with index SHNDX or NULL if there is none.
1613 const Arm_exidx_input_section*
1614 exidx_input_section_by_shndx(unsigned shndx) const
1616 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1617 return ((p != this->exidx_section_map_.end()
1618 && p->second->shndx() == shndx)
1623 // Whether output local symbol count needs updating.
1625 output_local_symbol_count_needs_update() const
1626 { return this->output_local_symbol_count_needs_update_; }
1628 // Set output_local_symbol_count_needs_update flag to be true.
1630 set_output_local_symbol_count_needs_update()
1631 { this->output_local_symbol_count_needs_update_ = true; }
1633 // Update output local symbol count at the end of relaxation.
1635 update_output_local_symbol_count();
1637 // Whether we want to merge processor-specific flags and attributes.
1639 merge_flags_and_attributes() const
1640 { return this->merge_flags_and_attributes_; }
1642 // Export list of EXIDX section indices.
1644 get_exidx_shndx_list(std::vector<unsigned int>* list) const
1647 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1648 p != this->exidx_section_map_.end();
1651 if (p->second->shndx() == p->first)
1652 list->push_back(p->first);
1654 // Sort list to make result independent of implementation of map.
1655 std::sort(list->begin(), list->end());
1659 // Post constructor setup.
1663 // Call parent's setup method.
1664 Sized_relobj_file<32, big_endian>::do_setup();
1666 // Initialize look-up tables.
1667 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1668 this->stub_tables_.swap(empty_stub_table_list);
1671 // Count the local symbols.
1673 do_count_local_symbols(Stringpool_template<char>*,
1674 Stringpool_template<char>*);
1677 do_relocate_sections(
1678 const Symbol_table* symtab, const Layout* layout,
1679 const unsigned char* pshdrs, Output_file* of,
1680 typename Sized_relobj_file<32, big_endian>::Views* pivews);
1682 // Read the symbol information.
1684 do_read_symbols(Read_symbols_data* sd);
1686 // Process relocs for garbage collection.
1688 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1692 // Whether a section needs to be scanned for relocation stubs.
1694 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1695 const Relobj::Output_sections&,
1696 const Symbol_table*, const unsigned char*);
1698 // Whether a section is a scannable text section.
1700 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1701 const Output_section*, const Symbol_table*);
1703 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1705 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1706 unsigned int, Output_section*,
1707 const Symbol_table*);
1709 // Scan a section for the Cortex-A8 erratum.
1711 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1712 unsigned int, Output_section*,
1713 Target_arm<big_endian>*);
1715 // Find the linked text section of an EXIDX section by looking at the
1716 // first relocation of the EXIDX section. PSHDR points to the section
1717 // headers of a relocation section and PSYMS points to the local symbols.
1718 // PSHNDX points to a location storing the text section index if found.
1719 // Return whether we can find the linked section.
1721 find_linked_text_section(const unsigned char* pshdr,
1722 const unsigned char* psyms, unsigned int* pshndx);
1725 // Make a new Arm_exidx_input_section object for EXIDX section with
1726 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1727 // index of the linked text section.
1729 make_exidx_input_section(unsigned int shndx,
1730 const elfcpp::Shdr<32, big_endian>& shdr,
1731 unsigned int text_shndx,
1732 const elfcpp::Shdr<32, big_endian>& text_shdr);
1734 // Return the output address of either a plain input section or a
1735 // relaxed input section. SHNDX is the section index.
1737 simple_input_section_output_address(unsigned int, Output_section*);
1739 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1740 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1743 // List of stub tables.
1744 Stub_table_list stub_tables_;
1745 // Bit vector to tell if a local symbol is a thumb function or not.
1746 // This is only valid after do_count_local_symbol is called.
1747 std::vector<bool> local_symbol_is_thumb_function_;
1748 // processor-specific flags in ELF file header.
1749 elfcpp::Elf_Word processor_specific_flags_;
1750 // Object attributes if there is an .ARM.attributes section or NULL.
1751 Attributes_section_data* attributes_section_data_;
1752 // Mapping symbols information.
1753 Mapping_symbols_info mapping_symbols_info_;
1754 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1755 std::vector<bool>* section_has_cortex_a8_workaround_;
1756 // Map a text section to its associated .ARM.exidx section, if there is one.
1757 Exidx_section_map exidx_section_map_;
1758 // Whether output local symbol count needs updating.
1759 bool output_local_symbol_count_needs_update_;
1760 // Whether we merge processor flags and attributes of this object to
1762 bool merge_flags_and_attributes_;
1765 // Arm_dynobj class.
1767 template<bool big_endian>
1768 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1771 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1772 const elfcpp::Ehdr<32, big_endian>& ehdr)
1773 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1774 processor_specific_flags_(0), attributes_section_data_(NULL)
1778 { delete this->attributes_section_data_; }
1780 // Downcast a base pointer to an Arm_relobj pointer. This is
1781 // not type-safe but we only use Arm_relobj not the base class.
1782 static Arm_dynobj<big_endian>*
1783 as_arm_dynobj(Dynobj* dynobj)
1784 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1786 // Processor-specific flags in ELF file header. This is valid only after
1789 processor_specific_flags() const
1790 { return this->processor_specific_flags_; }
1792 // Attributes section data.
1793 const Attributes_section_data*
1794 attributes_section_data() const
1795 { return this->attributes_section_data_; }
1798 // Read the symbol information.
1800 do_read_symbols(Read_symbols_data* sd);
1803 // processor-specific flags in ELF file header.
1804 elfcpp::Elf_Word processor_specific_flags_;
1805 // Object attributes if there is an .ARM.attributes section or NULL.
1806 Attributes_section_data* attributes_section_data_;
1809 // Functor to read reloc addends during stub generation.
1811 template<int sh_type, bool big_endian>
1812 struct Stub_addend_reader
1814 // Return the addend for a relocation of a particular type. Depending
1815 // on whether this is a REL or RELA relocation, read the addend from a
1816 // view or from a Reloc object.
1817 elfcpp::Elf_types<32>::Elf_Swxword
1819 unsigned int /* r_type */,
1820 const unsigned char* /* view */,
1821 const typename Reloc_types<sh_type,
1822 32, big_endian>::Reloc& /* reloc */) const;
1825 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1827 template<bool big_endian>
1828 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1830 elfcpp::Elf_types<32>::Elf_Swxword
1833 const unsigned char*,
1834 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1837 // Specialized Stub_addend_reader for RELA type relocation sections.
1838 // We currently do not handle RELA type relocation sections but it is trivial
1839 // to implement the addend reader. This is provided for completeness and to
1840 // make it easier to add support for RELA relocation sections in the future.
1842 template<bool big_endian>
1843 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1845 elfcpp::Elf_types<32>::Elf_Swxword
1848 const unsigned char*,
1849 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1850 big_endian>::Reloc& reloc) const
1851 { return reloc.get_r_addend(); }
1854 // Cortex_a8_reloc class. We keep record of relocation that may need
1855 // the Cortex-A8 erratum workaround.
1857 class Cortex_a8_reloc
1860 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1861 Arm_address destination)
1862 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1868 // Accessors: This is a read-only class.
1870 // Return the relocation stub associated with this relocation if there is
1874 { return this->reloc_stub_; }
1876 // Return the relocation type.
1879 { return this->r_type_; }
1881 // Return the destination address of the relocation. LSB stores the THUMB
1885 { return this->destination_; }
1888 // Associated relocation stub if there is one, or NULL.
1889 const Reloc_stub* reloc_stub_;
1891 unsigned int r_type_;
1892 // Destination address of this relocation. LSB is used to distinguish
1894 Arm_address destination_;
1897 // Arm_output_data_got class. We derive this from Output_data_got to add
1898 // extra methods to handle TLS relocations in a static link.
1900 template<bool big_endian>
1901 class Arm_output_data_got : public Output_data_got<32, big_endian>
1904 Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1905 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1908 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1909 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1910 // applied in a static link.
1912 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1913 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1915 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1916 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1917 // relocation that needs to be applied in a static link.
1919 add_static_reloc(unsigned int got_offset, unsigned int r_type,
1920 Sized_relobj_file<32, big_endian>* relobj,
1923 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1927 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1928 // The first one is initialized to be 1, which is the module index for
1929 // the main executable and the second one 0. A reloc of the type
1930 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1931 // be applied by gold. GSYM is a global symbol.
1933 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1935 // Same as the above but for a local symbol in OBJECT with INDEX.
1937 add_tls_gd32_with_static_reloc(unsigned int got_type,
1938 Sized_relobj_file<32, big_endian>* object,
1939 unsigned int index);
1942 // Write out the GOT table.
1944 do_write(Output_file*);
1947 // This class represent dynamic relocations that need to be applied by
1948 // gold because we are using TLS relocations in a static link.
1952 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1953 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1954 { this->u_.global.symbol = gsym; }
1956 Static_reloc(unsigned int got_offset, unsigned int r_type,
1957 Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1958 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1960 this->u_.local.relobj = relobj;
1961 this->u_.local.index = index;
1964 // Return the GOT offset.
1967 { return this->got_offset_; }
1972 { return this->r_type_; }
1974 // Whether the symbol is global or not.
1976 symbol_is_global() const
1977 { return this->symbol_is_global_; }
1979 // For a relocation against a global symbol, the global symbol.
1983 gold_assert(this->symbol_is_global_);
1984 return this->u_.global.symbol;
1987 // For a relocation against a local symbol, the defining object.
1988 Sized_relobj_file<32, big_endian>*
1991 gold_assert(!this->symbol_is_global_);
1992 return this->u_.local.relobj;
1995 // For a relocation against a local symbol, the local symbol index.
1999 gold_assert(!this->symbol_is_global_);
2000 return this->u_.local.index;
2004 // GOT offset of the entry to which this relocation is applied.
2005 unsigned int got_offset_;
2006 // Type of relocation.
2007 unsigned int r_type_;
2008 // Whether this relocation is against a global symbol.
2009 bool symbol_is_global_;
2010 // A global or local symbol.
2015 // For a global symbol, the symbol itself.
2020 // For a local symbol, the object defining object.
2021 Sized_relobj_file<32, big_endian>* relobj;
2022 // For a local symbol, the symbol index.
2028 // Symbol table of the output object.
2029 Symbol_table* symbol_table_;
2030 // Layout of the output object.
2032 // Static relocs to be applied to the GOT.
2033 std::vector<Static_reloc> static_relocs_;
2036 // The ARM target has many relocation types with odd-sizes or noncontiguous
2037 // bits. The default handling of relocatable relocation cannot process these
2038 // relocations. So we have to extend the default code.
2040 template<bool big_endian, int sh_type, typename Classify_reloc>
2041 class Arm_scan_relocatable_relocs :
2042 public Default_scan_relocatable_relocs<sh_type, Classify_reloc>
2045 // Return the strategy to use for a local symbol which is a section
2046 // symbol, given the relocation type.
2047 inline Relocatable_relocs::Reloc_strategy
2048 local_section_strategy(unsigned int r_type, Relobj*)
2050 if (sh_type == elfcpp::SHT_RELA)
2051 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2054 if (r_type == elfcpp::R_ARM_TARGET1
2055 || r_type == elfcpp::R_ARM_TARGET2)
2057 const Target_arm<big_endian>* arm_target =
2058 Target_arm<big_endian>::default_target();
2059 r_type = arm_target->get_real_reloc_type(r_type);
2064 // Relocations that write nothing. These exclude R_ARM_TARGET1
2065 // and R_ARM_TARGET2.
2066 case elfcpp::R_ARM_NONE:
2067 case elfcpp::R_ARM_V4BX:
2068 case elfcpp::R_ARM_TLS_GOTDESC:
2069 case elfcpp::R_ARM_TLS_CALL:
2070 case elfcpp::R_ARM_TLS_DESCSEQ:
2071 case elfcpp::R_ARM_THM_TLS_CALL:
2072 case elfcpp::R_ARM_GOTRELAX:
2073 case elfcpp::R_ARM_GNU_VTENTRY:
2074 case elfcpp::R_ARM_GNU_VTINHERIT:
2075 case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2076 case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2077 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2078 // These should have been converted to something else above.
2079 case elfcpp::R_ARM_TARGET1:
2080 case elfcpp::R_ARM_TARGET2:
2082 // Relocations that write full 32 bits and
2083 // have alignment of 1.
2084 case elfcpp::R_ARM_ABS32:
2085 case elfcpp::R_ARM_REL32:
2086 case elfcpp::R_ARM_SBREL32:
2087 case elfcpp::R_ARM_GOTOFF32:
2088 case elfcpp::R_ARM_BASE_PREL:
2089 case elfcpp::R_ARM_GOT_BREL:
2090 case elfcpp::R_ARM_BASE_ABS:
2091 case elfcpp::R_ARM_ABS32_NOI:
2092 case elfcpp::R_ARM_REL32_NOI:
2093 case elfcpp::R_ARM_PLT32_ABS:
2094 case elfcpp::R_ARM_GOT_ABS:
2095 case elfcpp::R_ARM_GOT_PREL:
2096 case elfcpp::R_ARM_TLS_GD32:
2097 case elfcpp::R_ARM_TLS_LDM32:
2098 case elfcpp::R_ARM_TLS_LDO32:
2099 case elfcpp::R_ARM_TLS_IE32:
2100 case elfcpp::R_ARM_TLS_LE32:
2101 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2103 // For all other static relocations, return RELOC_SPECIAL.
2104 return Relocatable_relocs::RELOC_SPECIAL;
2110 template<bool big_endian>
2111 class Target_arm : public Sized_target<32, big_endian>
2114 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2117 // When were are relocating a stub, we pass this as the relocation number.
2118 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2120 Target_arm(const Target::Target_info* info = &arm_info)
2121 : Sized_target<32, big_endian>(info),
2122 got_(NULL), plt_(NULL), got_plt_(NULL), rel_dyn_(NULL),
2123 copy_relocs_(elfcpp::R_ARM_COPY), dynbss_(NULL),
2124 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2125 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2126 should_force_pic_veneer_(false),
2127 arm_input_section_map_(), attributes_section_data_(NULL),
2128 fix_cortex_a8_(false), cortex_a8_relocs_info_()
2131 // Whether we force PCI branch veneers.
2133 should_force_pic_veneer() const
2134 { return this->should_force_pic_veneer_; }
2136 // Set PIC veneer flag.
2138 set_should_force_pic_veneer(bool value)
2139 { this->should_force_pic_veneer_ = value; }
2141 // Whether we use THUMB-2 instructions.
2143 using_thumb2() const
2145 Object_attribute* attr =
2146 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2147 int arch = attr->int_value();
2148 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2151 // Whether we use THUMB/THUMB-2 instructions only.
2153 using_thumb_only() const
2155 Object_attribute* attr =
2156 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2158 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2159 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2161 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2162 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2164 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2165 return attr->int_value() == 'M';
2168 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2170 may_use_arm_nop() const
2172 Object_attribute* attr =
2173 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2174 int arch = attr->int_value();
2175 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2176 || arch == elfcpp::TAG_CPU_ARCH_V6K
2177 || arch == elfcpp::TAG_CPU_ARCH_V7
2178 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2181 // Whether we have THUMB-2 NOP.W instruction.
2183 may_use_thumb2_nop() const
2185 Object_attribute* attr =
2186 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2187 int arch = attr->int_value();
2188 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2189 || arch == elfcpp::TAG_CPU_ARCH_V7
2190 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2193 // Whether we have v4T interworking instructions available.
2195 may_use_v4t_interworking() const
2197 Object_attribute* attr =
2198 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2199 int arch = attr->int_value();
2200 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2201 && arch != elfcpp::TAG_CPU_ARCH_V4);
2204 // Whether we have v5T interworking instructions available.
2206 may_use_v5t_interworking() const
2208 Object_attribute* attr =
2209 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2210 int arch = attr->int_value();
2211 if (parameters->options().fix_arm1176())
2212 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2213 || arch == elfcpp::TAG_CPU_ARCH_V7
2214 || arch == elfcpp::TAG_CPU_ARCH_V6_M
2215 || arch == elfcpp::TAG_CPU_ARCH_V6S_M
2216 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2218 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2219 && arch != elfcpp::TAG_CPU_ARCH_V4
2220 && arch != elfcpp::TAG_CPU_ARCH_V4T);
2223 // Process the relocations to determine unreferenced sections for
2224 // garbage collection.
2226 gc_process_relocs(Symbol_table* symtab,
2228 Sized_relobj_file<32, big_endian>* object,
2229 unsigned int data_shndx,
2230 unsigned int sh_type,
2231 const unsigned char* prelocs,
2233 Output_section* output_section,
2234 bool needs_special_offset_handling,
2235 size_t local_symbol_count,
2236 const unsigned char* plocal_symbols);
2238 // Scan the relocations to look for symbol adjustments.
2240 scan_relocs(Symbol_table* symtab,
2242 Sized_relobj_file<32, big_endian>* object,
2243 unsigned int data_shndx,
2244 unsigned int sh_type,
2245 const unsigned char* prelocs,
2247 Output_section* output_section,
2248 bool needs_special_offset_handling,
2249 size_t local_symbol_count,
2250 const unsigned char* plocal_symbols);
2252 // Finalize the sections.
2254 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2256 // Return the value to use for a dynamic symbol which requires special
2259 do_dynsym_value(const Symbol*) const;
2261 // Relocate a section.
2263 relocate_section(const Relocate_info<32, big_endian>*,
2264 unsigned int sh_type,
2265 const unsigned char* prelocs,
2267 Output_section* output_section,
2268 bool needs_special_offset_handling,
2269 unsigned char* view,
2270 Arm_address view_address,
2271 section_size_type view_size,
2272 const Reloc_symbol_changes*);
2274 // Scan the relocs during a relocatable link.
2276 scan_relocatable_relocs(Symbol_table* symtab,
2278 Sized_relobj_file<32, big_endian>* object,
2279 unsigned int data_shndx,
2280 unsigned int sh_type,
2281 const unsigned char* prelocs,
2283 Output_section* output_section,
2284 bool needs_special_offset_handling,
2285 size_t local_symbol_count,
2286 const unsigned char* plocal_symbols,
2287 Relocatable_relocs*);
2289 // Relocate a section during a relocatable link.
2291 relocate_for_relocatable(const Relocate_info<32, big_endian>*,
2292 unsigned int sh_type,
2293 const unsigned char* prelocs,
2295 Output_section* output_section,
2296 typename elfcpp::Elf_types<32>::Elf_Off
2297 offset_in_output_section,
2298 const Relocatable_relocs*,
2299 unsigned char* view,
2300 Arm_address view_address,
2301 section_size_type view_size,
2302 unsigned char* reloc_view,
2303 section_size_type reloc_view_size);
2305 // Perform target-specific processing in a relocatable link. This is
2306 // only used if we use the relocation strategy RELOC_SPECIAL.
2308 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2309 unsigned int sh_type,
2310 const unsigned char* preloc_in,
2312 Output_section* output_section,
2313 typename elfcpp::Elf_types<32>::Elf_Off
2314 offset_in_output_section,
2315 unsigned char* view,
2316 typename elfcpp::Elf_types<32>::Elf_Addr
2318 section_size_type view_size,
2319 unsigned char* preloc_out);
2321 // Return whether SYM is defined by the ABI.
2323 do_is_defined_by_abi(const Symbol* sym) const
2324 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2326 // Return whether there is a GOT section.
2328 has_got_section() const
2329 { return this->got_ != NULL; }
2331 // Return the size of the GOT section.
2335 gold_assert(this->got_ != NULL);
2336 return this->got_->data_size();
2339 // Return the number of entries in the GOT.
2341 got_entry_count() const
2343 if (!this->has_got_section())
2345 return this->got_size() / 4;
2348 // Return the number of entries in the PLT.
2350 plt_entry_count() const;
2352 // Return the offset of the first non-reserved PLT entry.
2354 first_plt_entry_offset() const;
2356 // Return the size of each PLT entry.
2358 plt_entry_size() const;
2360 // Map platform-specific reloc types
2362 get_real_reloc_type(unsigned int r_type);
2365 // Methods to support stub-generations.
2368 // Return the stub factory
2370 stub_factory() const
2371 { return this->stub_factory_; }
2373 // Make a new Arm_input_section object.
2374 Arm_input_section<big_endian>*
2375 new_arm_input_section(Relobj*, unsigned int);
2377 // Find the Arm_input_section object corresponding to the SHNDX-th input
2378 // section of RELOBJ.
2379 Arm_input_section<big_endian>*
2380 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2382 // Make a new Stub_table
2383 Stub_table<big_endian>*
2384 new_stub_table(Arm_input_section<big_endian>*);
2386 // Scan a section for stub generation.
2388 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2389 const unsigned char*, size_t, Output_section*,
2390 bool, const unsigned char*, Arm_address,
2395 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2396 Output_section*, unsigned char*, Arm_address,
2399 // Get the default ARM target.
2400 static Target_arm<big_endian>*
2403 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2404 && parameters->target().is_big_endian() == big_endian);
2405 return static_cast<Target_arm<big_endian>*>(
2406 parameters->sized_target<32, big_endian>());
2409 // Whether NAME belongs to a mapping symbol.
2411 is_mapping_symbol_name(const char* name)
2415 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2416 && (name[2] == '\0' || name[2] == '.'));
2419 // Whether we work around the Cortex-A8 erratum.
2421 fix_cortex_a8() const
2422 { return this->fix_cortex_a8_; }
2424 // Whether we merge exidx entries in debuginfo.
2426 merge_exidx_entries() const
2427 { return parameters->options().merge_exidx_entries(); }
2429 // Whether we fix R_ARM_V4BX relocation.
2431 // 1 - replace with MOV instruction (armv4 target)
2432 // 2 - make interworking veneer (>= armv4t targets only)
2433 General_options::Fix_v4bx
2435 { return parameters->options().fix_v4bx(); }
2437 // Scan a span of THUMB code section for Cortex-A8 erratum.
2439 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2440 section_size_type, section_size_type,
2441 const unsigned char*, Arm_address);
2443 // Apply Cortex-A8 workaround to a branch.
2445 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2446 unsigned char*, Arm_address);
2449 // Make the PLT-generator object.
2450 Output_data_plt_arm<big_endian>*
2451 make_data_plt(Layout* layout, Output_data_space* got_plt)
2452 { return this->do_make_data_plt(layout, got_plt); }
2454 // Make an ELF object.
2456 do_make_elf_object(const std::string&, Input_file*, off_t,
2457 const elfcpp::Ehdr<32, big_endian>& ehdr);
2460 do_make_elf_object(const std::string&, Input_file*, off_t,
2461 const elfcpp::Ehdr<32, !big_endian>&)
2462 { gold_unreachable(); }
2465 do_make_elf_object(const std::string&, Input_file*, off_t,
2466 const elfcpp::Ehdr<64, false>&)
2467 { gold_unreachable(); }
2470 do_make_elf_object(const std::string&, Input_file*, off_t,
2471 const elfcpp::Ehdr<64, true>&)
2472 { gold_unreachable(); }
2474 // Make an output section.
2476 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2477 elfcpp::Elf_Xword flags)
2478 { return new Arm_output_section<big_endian>(name, type, flags); }
2481 do_adjust_elf_header(unsigned char* view, int len) const;
2483 // We only need to generate stubs, and hence perform relaxation if we are
2484 // not doing relocatable linking.
2486 do_may_relax() const
2487 { return !parameters->options().relocatable(); }
2490 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2492 // Determine whether an object attribute tag takes an integer, a
2495 do_attribute_arg_type(int tag) const;
2497 // Reorder tags during output.
2499 do_attributes_order(int num) const;
2501 // This is called when the target is selected as the default.
2503 do_select_as_default_target()
2505 // No locking is required since there should only be one default target.
2506 // We cannot have both the big-endian and little-endian ARM targets
2508 gold_assert(arm_reloc_property_table == NULL);
2509 arm_reloc_property_table = new Arm_reloc_property_table();
2512 // Virtual function which is set to return true by a target if
2513 // it can use relocation types to determine if a function's
2514 // pointer is taken.
2516 do_can_check_for_function_pointers() const
2519 // Whether a section called SECTION_NAME may have function pointers to
2520 // sections not eligible for safe ICF folding.
2522 do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2524 return (!is_prefix_of(".ARM.exidx", section_name)
2525 && !is_prefix_of(".ARM.extab", section_name)
2526 && Target::do_section_may_have_icf_unsafe_pointers(section_name));
2530 do_define_standard_symbols(Symbol_table*, Layout*);
2532 virtual Output_data_plt_arm<big_endian>*
2533 do_make_data_plt(Layout* layout, Output_data_space* got_plt)
2535 return new Output_data_plt_arm_standard<big_endian>(layout, got_plt);
2539 // The class which scans relocations.
2544 : issued_non_pic_error_(false)
2548 get_reference_flags(unsigned int r_type);
2551 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2552 Sized_relobj_file<32, big_endian>* object,
2553 unsigned int data_shndx,
2554 Output_section* output_section,
2555 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2556 const elfcpp::Sym<32, big_endian>& lsym);
2559 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2560 Sized_relobj_file<32, big_endian>* object,
2561 unsigned int data_shndx,
2562 Output_section* output_section,
2563 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2567 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2568 Sized_relobj_file<32, big_endian>* ,
2571 const elfcpp::Rel<32, big_endian>& ,
2573 const elfcpp::Sym<32, big_endian>&);
2576 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2577 Sized_relobj_file<32, big_endian>* ,
2580 const elfcpp::Rel<32, big_endian>& ,
2581 unsigned int , Symbol*);
2585 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2586 unsigned int r_type);
2589 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2590 unsigned int r_type, Symbol*);
2593 check_non_pic(Relobj*, unsigned int r_type);
2595 // Almost identical to Symbol::needs_plt_entry except that it also
2596 // handles STT_ARM_TFUNC.
2598 symbol_needs_plt_entry(const Symbol* sym)
2600 // An undefined symbol from an executable does not need a PLT entry.
2601 if (sym->is_undefined() && !parameters->options().shared())
2604 return (!parameters->doing_static_link()
2605 && (sym->type() == elfcpp::STT_FUNC
2606 || sym->type() == elfcpp::STT_ARM_TFUNC)
2607 && (sym->is_from_dynobj()
2608 || sym->is_undefined()
2609 || sym->is_preemptible()));
2613 possible_function_pointer_reloc(unsigned int r_type);
2615 // Whether we have issued an error about a non-PIC compilation.
2616 bool issued_non_pic_error_;
2619 // The class which implements relocation.
2629 // Return whether the static relocation needs to be applied.
2631 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2632 unsigned int r_type,
2634 Output_section* output_section);
2636 // Do a relocation. Return false if the caller should not issue
2637 // any warnings about this relocation.
2639 relocate(const Relocate_info<32, big_endian>*, Target_arm*,
2640 Output_section*, size_t relnum,
2641 const elfcpp::Rel<32, big_endian>&,
2642 unsigned int r_type, const Sized_symbol<32>*,
2643 const Symbol_value<32>*,
2644 unsigned char*, Arm_address,
2647 // Return whether we want to pass flag NON_PIC_REF for this
2648 // reloc. This means the relocation type accesses a symbol not via
2651 reloc_is_non_pic(unsigned int r_type)
2655 // These relocation types reference GOT or PLT entries explicitly.
2656 case elfcpp::R_ARM_GOT_BREL:
2657 case elfcpp::R_ARM_GOT_ABS:
2658 case elfcpp::R_ARM_GOT_PREL:
2659 case elfcpp::R_ARM_GOT_BREL12:
2660 case elfcpp::R_ARM_PLT32_ABS:
2661 case elfcpp::R_ARM_TLS_GD32:
2662 case elfcpp::R_ARM_TLS_LDM32:
2663 case elfcpp::R_ARM_TLS_IE32:
2664 case elfcpp::R_ARM_TLS_IE12GP:
2666 // These relocate types may use PLT entries.
2667 case elfcpp::R_ARM_CALL:
2668 case elfcpp::R_ARM_THM_CALL:
2669 case elfcpp::R_ARM_JUMP24:
2670 case elfcpp::R_ARM_THM_JUMP24:
2671 case elfcpp::R_ARM_THM_JUMP19:
2672 case elfcpp::R_ARM_PLT32:
2673 case elfcpp::R_ARM_THM_XPC22:
2674 case elfcpp::R_ARM_PREL31:
2675 case elfcpp::R_ARM_SBREL31:
2684 // Do a TLS relocation.
2685 inline typename Arm_relocate_functions<big_endian>::Status
2686 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2687 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2688 const Sized_symbol<32>*, const Symbol_value<32>*,
2689 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2694 // A class which returns the size required for a relocation type,
2695 // used while scanning relocs during a relocatable link.
2696 class Relocatable_size_for_reloc
2700 get_size_for_reloc(unsigned int, Relobj*);
2703 // Adjust TLS relocation type based on the options and whether this
2704 // is a local symbol.
2705 static tls::Tls_optimization
2706 optimize_tls_reloc(bool is_final, int r_type);
2708 // Get the GOT section, creating it if necessary.
2709 Arm_output_data_got<big_endian>*
2710 got_section(Symbol_table*, Layout*);
2712 // Get the GOT PLT section.
2714 got_plt_section() const
2716 gold_assert(this->got_plt_ != NULL);
2717 return this->got_plt_;
2720 // Create a PLT entry for a global symbol.
2722 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2724 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2726 define_tls_base_symbol(Symbol_table*, Layout*);
2728 // Create a GOT entry for the TLS module index.
2730 got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2731 Sized_relobj_file<32, big_endian>* object);
2733 // Get the PLT section.
2734 const Output_data_plt_arm<big_endian>*
2737 gold_assert(this->plt_ != NULL);
2741 // Get the dynamic reloc section, creating it if necessary.
2743 rel_dyn_section(Layout*);
2745 // Get the section to use for TLS_DESC relocations.
2747 rel_tls_desc_section(Layout*) const;
2749 // Return true if the symbol may need a COPY relocation.
2750 // References from an executable object to non-function symbols
2751 // defined in a dynamic object may need a COPY relocation.
2753 may_need_copy_reloc(Symbol* gsym)
2755 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2756 && gsym->may_need_copy_reloc());
2759 // Add a potential copy relocation.
2761 copy_reloc(Symbol_table* symtab, Layout* layout,
2762 Sized_relobj_file<32, big_endian>* object,
2763 unsigned int shndx, Output_section* output_section,
2764 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2766 this->copy_relocs_.copy_reloc(symtab, layout,
2767 symtab->get_sized_symbol<32>(sym),
2768 object, shndx, output_section, reloc,
2769 this->rel_dyn_section(layout));
2772 // Whether two EABI versions are compatible.
2774 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2776 // Merge processor-specific flags from input object and those in the ELF
2777 // header of the output.
2779 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2781 // Get the secondary compatible architecture.
2783 get_secondary_compatible_arch(const Attributes_section_data*);
2785 // Set the secondary compatible architecture.
2787 set_secondary_compatible_arch(Attributes_section_data*, int);
2790 tag_cpu_arch_combine(const char*, int, int*, int, int);
2792 // Helper to print AEABI enum tag value.
2794 aeabi_enum_name(unsigned int);
2796 // Return string value for TAG_CPU_name.
2798 tag_cpu_name_value(unsigned int);
2800 // Merge object attributes from input object and those in the output.
2802 merge_object_attributes(const char*, const Attributes_section_data*);
2804 // Helper to get an AEABI object attribute
2806 get_aeabi_object_attribute(int tag) const
2808 Attributes_section_data* pasd = this->attributes_section_data_;
2809 gold_assert(pasd != NULL);
2810 Object_attribute* attr =
2811 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2812 gold_assert(attr != NULL);
2817 // Methods to support stub-generations.
2820 // Group input sections for stub generation.
2822 group_sections(Layout*, section_size_type, bool, const Task*);
2824 // Scan a relocation for stub generation.
2826 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2827 const Sized_symbol<32>*, unsigned int,
2828 const Symbol_value<32>*,
2829 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2831 // Scan a relocation section for stub.
2832 template<int sh_type>
2834 scan_reloc_section_for_stubs(
2835 const Relocate_info<32, big_endian>* relinfo,
2836 const unsigned char* prelocs,
2838 Output_section* output_section,
2839 bool needs_special_offset_handling,
2840 const unsigned char* view,
2841 elfcpp::Elf_types<32>::Elf_Addr view_address,
2844 // Fix .ARM.exidx section coverage.
2846 fix_exidx_coverage(Layout*, const Input_objects*,
2847 Arm_output_section<big_endian>*, Symbol_table*,
2850 // Functors for STL set.
2851 struct output_section_address_less_than
2854 operator()(const Output_section* s1, const Output_section* s2) const
2855 { return s1->address() < s2->address(); }
2858 // Information about this specific target which we pass to the
2859 // general Target structure.
2860 static const Target::Target_info arm_info;
2862 // The types of GOT entries needed for this platform.
2863 // These values are exposed to the ABI in an incremental link.
2864 // Do not renumber existing values without changing the version
2865 // number of the .gnu_incremental_inputs section.
2868 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2869 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2870 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2871 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2872 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2875 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2877 // Map input section to Arm_input_section.
2878 typedef Unordered_map<Section_id,
2879 Arm_input_section<big_endian>*,
2881 Arm_input_section_map;
2883 // Map output addresses to relocs for Cortex-A8 erratum.
2884 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2885 Cortex_a8_relocs_info;
2888 Arm_output_data_got<big_endian>* got_;
2890 Output_data_plt_arm<big_endian>* plt_;
2891 // The GOT PLT section.
2892 Output_data_space* got_plt_;
2893 // The dynamic reloc section.
2894 Reloc_section* rel_dyn_;
2895 // Relocs saved to avoid a COPY reloc.
2896 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
2897 // Space for variables copied with a COPY reloc.
2898 Output_data_space* dynbss_;
2899 // Offset of the GOT entry for the TLS module index.
2900 unsigned int got_mod_index_offset_;
2901 // True if the _TLS_MODULE_BASE_ symbol has been defined.
2902 bool tls_base_symbol_defined_;
2903 // Vector of Stub_tables created.
2904 Stub_table_list stub_tables_;
2906 const Stub_factory &stub_factory_;
2907 // Whether we force PIC branch veneers.
2908 bool should_force_pic_veneer_;
2909 // Map for locating Arm_input_sections.
2910 Arm_input_section_map arm_input_section_map_;
2911 // Attributes section data in output.
2912 Attributes_section_data* attributes_section_data_;
2913 // Whether we want to fix code for Cortex-A8 erratum.
2914 bool fix_cortex_a8_;
2915 // Map addresses to relocs for Cortex-A8 erratum.
2916 Cortex_a8_relocs_info cortex_a8_relocs_info_;
2919 template<bool big_endian>
2920 const Target::Target_info Target_arm<big_endian>::arm_info =
2923 big_endian, // is_big_endian
2924 elfcpp::EM_ARM, // machine_code
2925 false, // has_make_symbol
2926 false, // has_resolve
2927 false, // has_code_fill
2928 true, // is_default_stack_executable
2929 false, // can_icf_inline_merge_sections
2931 "/usr/lib/libc.so.1", // dynamic_linker
2932 0x8000, // default_text_segment_address
2933 0x1000, // abi_pagesize (overridable by -z max-page-size)
2934 0x1000, // common_pagesize (overridable by -z common-page-size)
2935 false, // isolate_execinstr
2937 elfcpp::SHN_UNDEF, // small_common_shndx
2938 elfcpp::SHN_UNDEF, // large_common_shndx
2939 0, // small_common_section_flags
2940 0, // large_common_section_flags
2941 ".ARM.attributes", // attributes_section
2942 "aeabi" // attributes_vendor
2945 // Arm relocate functions class
2948 template<bool big_endian>
2949 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
2954 STATUS_OKAY, // No error during relocation.
2955 STATUS_OVERFLOW, // Relocation overflow.
2956 STATUS_BAD_RELOC // Relocation cannot be applied.
2960 typedef Relocate_functions<32, big_endian> Base;
2961 typedef Arm_relocate_functions<big_endian> This;
2963 // Encoding of imm16 argument for movt and movw ARM instructions
2966 // imm16 := imm4 | imm12
2968 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
2969 // +-------+---------------+-------+-------+-----------------------+
2970 // | | |imm4 | |imm12 |
2971 // +-------+---------------+-------+-------+-----------------------+
2973 // Extract the relocation addend from VAL based on the ARM
2974 // instruction encoding described above.
2975 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2976 extract_arm_movw_movt_addend(
2977 typename elfcpp::Swap<32, big_endian>::Valtype val)
2979 // According to the Elf ABI for ARM Architecture the immediate
2980 // field is sign-extended to form the addend.
2981 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
2984 // Insert X into VAL based on the ARM instruction encoding described
2986 static inline typename elfcpp::Swap<32, big_endian>::Valtype
2987 insert_val_arm_movw_movt(
2988 typename elfcpp::Swap<32, big_endian>::Valtype val,
2989 typename elfcpp::Swap<32, big_endian>::Valtype x)
2993 val |= (x & 0xf000) << 4;
2997 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3000 // imm16 := imm4 | i | imm3 | imm8
3002 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3003 // +---------+-+-----------+-------++-+-----+-------+---------------+
3004 // | |i| |imm4 || |imm3 | |imm8 |
3005 // +---------+-+-----------+-------++-+-----+-------+---------------+
3007 // Extract the relocation addend from VAL based on the Thumb2
3008 // instruction encoding described above.
3009 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3010 extract_thumb_movw_movt_addend(
3011 typename elfcpp::Swap<32, big_endian>::Valtype val)
3013 // According to the Elf ABI for ARM Architecture the immediate
3014 // field is sign-extended to form the addend.
3015 return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3016 | ((val >> 15) & 0x0800)
3017 | ((val >> 4) & 0x0700)
3021 // Insert X into VAL based on the Thumb2 instruction encoding
3023 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3024 insert_val_thumb_movw_movt(
3025 typename elfcpp::Swap<32, big_endian>::Valtype val,
3026 typename elfcpp::Swap<32, big_endian>::Valtype x)
3029 val |= (x & 0xf000) << 4;
3030 val |= (x & 0x0800) << 15;
3031 val |= (x & 0x0700) << 4;
3032 val |= (x & 0x00ff);
3036 // Calculate the smallest constant Kn for the specified residual.
3037 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3039 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3045 // Determine the most significant bit in the residual and
3046 // align the resulting value to a 2-bit boundary.
3047 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3049 // The desired shift is now (msb - 6), or zero, whichever
3051 return (((msb - 6) < 0) ? 0 : (msb - 6));
3054 // Calculate the final residual for the specified group index.
3055 // If the passed group index is less than zero, the method will return
3056 // the value of the specified residual without any change.
3057 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3058 static typename elfcpp::Swap<32, big_endian>::Valtype
3059 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3062 for (int n = 0; n <= group; n++)
3064 // Calculate which part of the value to mask.
3065 uint32_t shift = calc_grp_kn(residual);
3066 // Calculate the residual for the next time around.
3067 residual &= ~(residual & (0xff << shift));
3073 // Calculate the value of Gn for the specified group index.
3074 // We return it in the form of an encoded constant-and-rotation.
3075 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3076 static typename elfcpp::Swap<32, big_endian>::Valtype
3077 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3080 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3083 for (int n = 0; n <= group; n++)
3085 // Calculate which part of the value to mask.
3086 shift = calc_grp_kn(residual);
3087 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3088 gn = residual & (0xff << shift);
3089 // Calculate the residual for the next time around.
3092 // Return Gn in the form of an encoded constant-and-rotation.
3093 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3097 // Handle ARM long branches.
3098 static typename This::Status
3099 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3100 unsigned char*, const Sized_symbol<32>*,
3101 const Arm_relobj<big_endian>*, unsigned int,
3102 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3104 // Handle THUMB long branches.
3105 static typename This::Status
3106 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3107 unsigned char*, const Sized_symbol<32>*,
3108 const Arm_relobj<big_endian>*, unsigned int,
3109 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3112 // Return the branch offset of a 32-bit THUMB branch.
3113 static inline int32_t
3114 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3116 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3117 // involving the J1 and J2 bits.
3118 uint32_t s = (upper_insn & (1U << 10)) >> 10;
3119 uint32_t upper = upper_insn & 0x3ffU;
3120 uint32_t lower = lower_insn & 0x7ffU;
3121 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3122 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3123 uint32_t i1 = j1 ^ s ? 0 : 1;
3124 uint32_t i2 = j2 ^ s ? 0 : 1;
3126 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3127 | (upper << 12) | (lower << 1));
3130 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3131 // UPPER_INSN is the original upper instruction of the branch. Caller is
3132 // responsible for overflow checking and BLX offset adjustment.
3133 static inline uint16_t
3134 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3136 uint32_t s = offset < 0 ? 1 : 0;
3137 uint32_t bits = static_cast<uint32_t>(offset);
3138 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3141 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3142 // LOWER_INSN is the original lower instruction of the branch. Caller is
3143 // responsible for overflow checking and BLX offset adjustment.
3144 static inline uint16_t
3145 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3147 uint32_t s = offset < 0 ? 1 : 0;
3148 uint32_t bits = static_cast<uint32_t>(offset);
3149 return ((lower_insn & ~0x2fffU)
3150 | ((((bits >> 23) & 1) ^ !s) << 13)
3151 | ((((bits >> 22) & 1) ^ !s) << 11)
3152 | ((bits >> 1) & 0x7ffU));
3155 // Return the branch offset of a 32-bit THUMB conditional branch.
3156 static inline int32_t
3157 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3159 uint32_t s = (upper_insn & 0x0400U) >> 10;
3160 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3161 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3162 uint32_t lower = (lower_insn & 0x07ffU);
3163 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3165 return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3168 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3169 // instruction. UPPER_INSN is the original upper instruction of the branch.
3170 // Caller is responsible for overflow checking.
3171 static inline uint16_t
3172 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3174 uint32_t s = offset < 0 ? 1 : 0;
3175 uint32_t bits = static_cast<uint32_t>(offset);
3176 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3179 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3180 // instruction. LOWER_INSN is the original lower instruction of the branch.
3181 // The caller is responsible for overflow checking.
3182 static inline uint16_t
3183 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3185 uint32_t bits = static_cast<uint32_t>(offset);
3186 uint32_t j2 = (bits & 0x00080000U) >> 19;
3187 uint32_t j1 = (bits & 0x00040000U) >> 18;
3188 uint32_t lo = (bits & 0x00000ffeU) >> 1;
3190 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3193 // R_ARM_ABS8: S + A
3194 static inline typename This::Status
3195 abs8(unsigned char* view,
3196 const Sized_relobj_file<32, big_endian>* object,
3197 const Symbol_value<32>* psymval)
3199 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3200 Valtype* wv = reinterpret_cast<Valtype*>(view);
3201 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3202 int32_t addend = Bits<8>::sign_extend32(val);
3203 Arm_address x = psymval->value(object, addend);
3204 val = Bits<32>::bit_select32(val, x, 0xffU);
3205 elfcpp::Swap<8, big_endian>::writeval(wv, val);
3207 // R_ARM_ABS8 permits signed or unsigned results.
3208 return (Bits<8>::has_signed_unsigned_overflow32(x)
3209 ? This::STATUS_OVERFLOW
3210 : This::STATUS_OKAY);
3213 // R_ARM_THM_ABS5: S + A
3214 static inline typename This::Status
3215 thm_abs5(unsigned char* view,
3216 const Sized_relobj_file<32, big_endian>* object,
3217 const Symbol_value<32>* psymval)
3219 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3220 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3221 Valtype* wv = reinterpret_cast<Valtype*>(view);
3222 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3223 Reltype addend = (val & 0x7e0U) >> 6;
3224 Reltype x = psymval->value(object, addend);
3225 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3226 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3227 return (Bits<5>::has_overflow32(x)
3228 ? This::STATUS_OVERFLOW
3229 : This::STATUS_OKAY);
3232 // R_ARM_ABS12: S + A
3233 static inline typename This::Status
3234 abs12(unsigned char* view,
3235 const Sized_relobj_file<32, big_endian>* object,
3236 const Symbol_value<32>* psymval)
3238 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3239 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3240 Valtype* wv = reinterpret_cast<Valtype*>(view);
3241 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3242 Reltype addend = val & 0x0fffU;
3243 Reltype x = psymval->value(object, addend);
3244 val = Bits<32>::bit_select32(val, x, 0x0fffU);
3245 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3246 return (Bits<12>::has_overflow32(x)
3247 ? This::STATUS_OVERFLOW
3248 : This::STATUS_OKAY);
3251 // R_ARM_ABS16: S + A
3252 static inline typename This::Status
3253 abs16(unsigned char* view,
3254 const Sized_relobj_file<32, big_endian>* object,
3255 const Symbol_value<32>* psymval)
3257 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3258 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3259 int32_t addend = Bits<16>::sign_extend32(val);
3260 Arm_address x = psymval->value(object, addend);
3261 val = Bits<32>::bit_select32(val, x, 0xffffU);
3262 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3264 // R_ARM_ABS16 permits signed or unsigned results.
3265 return (Bits<16>::has_signed_unsigned_overflow32(x)
3266 ? This::STATUS_OVERFLOW
3267 : This::STATUS_OKAY);
3270 // R_ARM_ABS32: (S + A) | T
3271 static inline typename This::Status
3272 abs32(unsigned char* view,
3273 const Sized_relobj_file<32, big_endian>* object,
3274 const Symbol_value<32>* psymval,
3275 Arm_address thumb_bit)
3277 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3278 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3279 Valtype x = psymval->value(object, addend) | thumb_bit;
3280 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3281 return This::STATUS_OKAY;
3284 // R_ARM_REL32: (S + A) | T - P
3285 static inline typename This::Status
3286 rel32(unsigned char* view,
3287 const Sized_relobj_file<32, big_endian>* object,
3288 const Symbol_value<32>* psymval,
3289 Arm_address address,
3290 Arm_address thumb_bit)
3292 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3293 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3294 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3295 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3296 return This::STATUS_OKAY;
3299 // R_ARM_THM_JUMP24: (S + A) | T - P
3300 static typename This::Status
3301 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3302 const Symbol_value<32>* psymval, Arm_address address,
3303 Arm_address thumb_bit);
3305 // R_ARM_THM_JUMP6: S + A – P
3306 static inline typename This::Status
3307 thm_jump6(unsigned char* view,
3308 const Sized_relobj_file<32, big_endian>* object,
3309 const Symbol_value<32>* psymval,
3310 Arm_address address)
3312 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3313 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3314 Valtype* wv = reinterpret_cast<Valtype*>(view);
3315 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3316 // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
3317 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3318 Reltype x = (psymval->value(object, addend) - address);
3319 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3320 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3321 // CZB does only forward jumps.
3322 return ((x > 0x007e)
3323 ? This::STATUS_OVERFLOW
3324 : This::STATUS_OKAY);
3327 // R_ARM_THM_JUMP8: S + A – P
3328 static inline typename This::Status
3329 thm_jump8(unsigned char* view,
3330 const Sized_relobj_file<32, big_endian>* object,
3331 const Symbol_value<32>* psymval,
3332 Arm_address address)
3334 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3335 Valtype* wv = reinterpret_cast<Valtype*>(view);
3336 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3337 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3338 int32_t x = (psymval->value(object, addend) - address);
3339 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3340 | ((x & 0x01fe) >> 1)));
3341 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3342 return (Bits<9>::has_overflow32(x)
3343 ? This::STATUS_OVERFLOW
3344 : This::STATUS_OKAY);
3347 // R_ARM_THM_JUMP11: S + A – P
3348 static inline typename This::Status
3349 thm_jump11(unsigned char* view,
3350 const Sized_relobj_file<32, big_endian>* object,
3351 const Symbol_value<32>* psymval,
3352 Arm_address address)
3354 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3355 Valtype* wv = reinterpret_cast<Valtype*>(view);
3356 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3357 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3358 int32_t x = (psymval->value(object, addend) - address);
3359 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3360 | ((x & 0x0ffe) >> 1)));
3361 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3362 return (Bits<12>::has_overflow32(x)
3363 ? This::STATUS_OVERFLOW
3364 : This::STATUS_OKAY);
3367 // R_ARM_BASE_PREL: B(S) + A - P
3368 static inline typename This::Status
3369 base_prel(unsigned char* view,
3371 Arm_address address)
3373 Base::rel32(view, origin - address);
3377 // R_ARM_BASE_ABS: B(S) + A
3378 static inline typename This::Status
3379 base_abs(unsigned char* view,
3382 Base::rel32(view, origin);
3386 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3387 static inline typename This::Status
3388 got_brel(unsigned char* view,
3389 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3391 Base::rel32(view, got_offset);
3392 return This::STATUS_OKAY;
3395 // R_ARM_GOT_PREL: GOT(S) + A - P
3396 static inline typename This::Status
3397 got_prel(unsigned char* view,
3398 Arm_address got_entry,
3399 Arm_address address)
3401 Base::rel32(view, got_entry - address);
3402 return This::STATUS_OKAY;
3405 // R_ARM_PREL: (S + A) | T - P
3406 static inline typename This::Status
3407 prel31(unsigned char* view,
3408 const Sized_relobj_file<32, big_endian>* object,
3409 const Symbol_value<32>* psymval,
3410 Arm_address address,
3411 Arm_address thumb_bit)
3413 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3414 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3415 Valtype addend = Bits<31>::sign_extend32(val);
3416 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3417 val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3418 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3419 return (Bits<31>::has_overflow32(x)
3420 ? This::STATUS_OVERFLOW
3421 : This::STATUS_OKAY);
3424 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3425 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3426 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3427 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3428 static inline typename This::Status
3429 movw(unsigned char* view,
3430 const Sized_relobj_file<32, big_endian>* object,
3431 const Symbol_value<32>* psymval,
3432 Arm_address relative_address_base,
3433 Arm_address thumb_bit,
3434 bool check_overflow)
3436 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3437 Valtype* wv = reinterpret_cast<Valtype*>(view);
3438 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3439 Valtype addend = This::extract_arm_movw_movt_addend(val);
3440 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3441 - relative_address_base);
3442 val = This::insert_val_arm_movw_movt(val, x);
3443 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3444 return ((check_overflow && Bits<16>::has_overflow32(x))
3445 ? This::STATUS_OVERFLOW
3446 : This::STATUS_OKAY);
3449 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3450 // R_ARM_MOVT_PREL: S + A - P
3451 // R_ARM_MOVT_BREL: S + A - B(S)
3452 static inline typename This::Status
3453 movt(unsigned char* view,
3454 const Sized_relobj_file<32, big_endian>* object,
3455 const Symbol_value<32>* psymval,
3456 Arm_address relative_address_base)
3458 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3459 Valtype* wv = reinterpret_cast<Valtype*>(view);
3460 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3461 Valtype addend = This::extract_arm_movw_movt_addend(val);
3462 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3463 val = This::insert_val_arm_movw_movt(val, x);
3464 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3465 // FIXME: IHI0044D says that we should check for overflow.
3466 return This::STATUS_OKAY;
3469 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3470 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3471 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3472 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3473 static inline typename This::Status
3474 thm_movw(unsigned char* view,
3475 const Sized_relobj_file<32, big_endian>* object,
3476 const Symbol_value<32>* psymval,
3477 Arm_address relative_address_base,
3478 Arm_address thumb_bit,
3479 bool check_overflow)
3481 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3482 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3483 Valtype* wv = reinterpret_cast<Valtype*>(view);
3484 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3485 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3486 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3488 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3489 val = This::insert_val_thumb_movw_movt(val, x);
3490 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3491 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3492 return ((check_overflow && Bits<16>::has_overflow32(x))
3493 ? This::STATUS_OVERFLOW
3494 : This::STATUS_OKAY);
3497 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3498 // R_ARM_THM_MOVT_PREL: S + A - P
3499 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3500 static inline typename This::Status
3501 thm_movt(unsigned char* view,
3502 const Sized_relobj_file<32, big_endian>* object,
3503 const Symbol_value<32>* psymval,
3504 Arm_address relative_address_base)
3506 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3507 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3508 Valtype* wv = reinterpret_cast<Valtype*>(view);
3509 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3510 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3511 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3512 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3513 val = This::insert_val_thumb_movw_movt(val, x);
3514 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3515 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3516 return This::STATUS_OKAY;
3519 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3520 static inline typename This::Status
3521 thm_alu11(unsigned char* view,
3522 const Sized_relobj_file<32, big_endian>* object,
3523 const Symbol_value<32>* psymval,
3524 Arm_address address,
3525 Arm_address thumb_bit)
3527 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3528 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3529 Valtype* wv = reinterpret_cast<Valtype*>(view);
3530 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3531 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3533 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3534 // -----------------------------------------------------------------------
3535 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3536 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3537 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3538 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3539 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3540 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3542 // Determine a sign for the addend.
3543 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3544 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3545 // Thumb2 addend encoding:
3546 // imm12 := i | imm3 | imm8
3547 int32_t addend = (insn & 0xff)
3548 | ((insn & 0x00007000) >> 4)
3549 | ((insn & 0x04000000) >> 15);
3550 // Apply a sign to the added.
3553 int32_t x = (psymval->value(object, addend) | thumb_bit)
3554 - (address & 0xfffffffc);
3555 Reltype val = abs(x);
3556 // Mask out the value and a distinct part of the ADD/SUB opcode
3557 // (bits 7:5 of opword).
3558 insn = (insn & 0xfb0f8f00)
3560 | ((val & 0x700) << 4)
3561 | ((val & 0x800) << 15);
3562 // Set the opcode according to whether the value to go in the
3563 // place is negative.
3567 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3568 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3569 return ((val > 0xfff) ?
3570 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3573 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3574 static inline typename This::Status
3575 thm_pc8(unsigned char* view,
3576 const Sized_relobj_file<32, big_endian>* object,
3577 const Symbol_value<32>* psymval,
3578 Arm_address address)
3580 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3581 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3582 Valtype* wv = reinterpret_cast<Valtype*>(view);
3583 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3584 Reltype addend = ((insn & 0x00ff) << 2);
3585 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3586 Reltype val = abs(x);
3587 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3589 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3590 return ((val > 0x03fc)
3591 ? This::STATUS_OVERFLOW
3592 : This::STATUS_OKAY);
3595 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3596 static inline typename This::Status
3597 thm_pc12(unsigned char* view,
3598 const Sized_relobj_file<32, big_endian>* object,
3599 const Symbol_value<32>* psymval,
3600 Arm_address address)
3602 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3603 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3604 Valtype* wv = reinterpret_cast<Valtype*>(view);
3605 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3606 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3607 // Determine a sign for the addend (positive if the U bit is 1).
3608 const int sign = (insn & 0x00800000) ? 1 : -1;
3609 int32_t addend = (insn & 0xfff);
3610 // Apply a sign to the added.
3613 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3614 Reltype val = abs(x);
3615 // Mask out and apply the value and the U bit.
3616 insn = (insn & 0xff7ff000) | (val & 0xfff);
3617 // Set the U bit according to whether the value to go in the
3618 // place is positive.
3622 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3623 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3624 return ((val > 0xfff) ?
3625 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3629 static inline typename This::Status
3630 v4bx(const Relocate_info<32, big_endian>* relinfo,
3631 unsigned char* view,
3632 const Arm_relobj<big_endian>* object,
3633 const Arm_address address,
3634 const bool is_interworking)
3637 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3638 Valtype* wv = reinterpret_cast<Valtype*>(view);
3639 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3641 // Ensure that we have a BX instruction.
3642 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3643 const uint32_t reg = (val & 0xf);
3644 if (is_interworking && reg != 0xf)
3646 Stub_table<big_endian>* stub_table =
3647 object->stub_table(relinfo->data_shndx);
3648 gold_assert(stub_table != NULL);
3650 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3651 gold_assert(stub != NULL);
3653 int32_t veneer_address =
3654 stub_table->address() + stub->offset() - 8 - address;
3655 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3656 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3657 // Replace with a branch to veneer (B <addr>)
3658 val = (val & 0xf0000000) | 0x0a000000
3659 | ((veneer_address >> 2) & 0x00ffffff);
3663 // Preserve Rm (lowest four bits) and the condition code
3664 // (highest four bits). Other bits encode MOV PC,Rm.
3665 val = (val & 0xf000000f) | 0x01a0f000;
3667 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3668 return This::STATUS_OKAY;
3671 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3672 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3673 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3674 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3675 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3676 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3677 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3678 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3679 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3680 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3681 static inline typename This::Status
3682 arm_grp_alu(unsigned char* view,
3683 const Sized_relobj_file<32, big_endian>* object,
3684 const Symbol_value<32>* psymval,
3686 Arm_address address,
3687 Arm_address thumb_bit,
3688 bool check_overflow)
3690 gold_assert(group >= 0 && group < 3);
3691 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3692 Valtype* wv = reinterpret_cast<Valtype*>(view);
3693 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3695 // ALU group relocations are allowed only for the ADD/SUB instructions.
3696 // (0x00800000 - ADD, 0x00400000 - SUB)
3697 const Valtype opcode = insn & 0x01e00000;
3698 if (opcode != 0x00800000 && opcode != 0x00400000)
3699 return This::STATUS_BAD_RELOC;
3701 // Determine a sign for the addend.
3702 const int sign = (opcode == 0x00800000) ? 1 : -1;
3703 // shifter = rotate_imm * 2
3704 const uint32_t shifter = (insn & 0xf00) >> 7;
3705 // Initial addend value.
3706 int32_t addend = insn & 0xff;
3707 // Rotate addend right by shifter.
3708 addend = (addend >> shifter) | (addend << (32 - shifter));
3709 // Apply a sign to the added.
3712 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3713 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3714 // Check for overflow if required
3716 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3717 return This::STATUS_OVERFLOW;
3719 // Mask out the value and the ADD/SUB part of the opcode; take care
3720 // not to destroy the S bit.
3722 // Set the opcode according to whether the value to go in the
3723 // place is negative.
3724 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3725 // Encode the offset (encoded Gn).
3728 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3729 return This::STATUS_OKAY;
3732 // R_ARM_LDR_PC_G0: S + A - P
3733 // R_ARM_LDR_PC_G1: S + A - P
3734 // R_ARM_LDR_PC_G2: S + A - P
3735 // R_ARM_LDR_SB_G0: S + A - B(S)
3736 // R_ARM_LDR_SB_G1: S + A - B(S)
3737 // R_ARM_LDR_SB_G2: S + A - B(S)
3738 static inline typename This::Status
3739 arm_grp_ldr(unsigned char* view,
3740 const Sized_relobj_file<32, big_endian>* object,
3741 const Symbol_value<32>* psymval,
3743 Arm_address address)
3745 gold_assert(group >= 0 && group < 3);
3746 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3747 Valtype* wv = reinterpret_cast<Valtype*>(view);
3748 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3750 const int sign = (insn & 0x00800000) ? 1 : -1;
3751 int32_t addend = (insn & 0xfff) * sign;
3752 int32_t x = (psymval->value(object, addend) - address);
3753 // Calculate the relevant G(n-1) value to obtain this stage residual.
3755 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3756 if (residual >= 0x1000)
3757 return This::STATUS_OVERFLOW;
3759 // Mask out the value and U bit.
3761 // Set the U bit for non-negative values.
3766 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3767 return This::STATUS_OKAY;
3770 // R_ARM_LDRS_PC_G0: S + A - P
3771 // R_ARM_LDRS_PC_G1: S + A - P
3772 // R_ARM_LDRS_PC_G2: S + A - P
3773 // R_ARM_LDRS_SB_G0: S + A - B(S)
3774 // R_ARM_LDRS_SB_G1: S + A - B(S)
3775 // R_ARM_LDRS_SB_G2: S + A - B(S)
3776 static inline typename This::Status
3777 arm_grp_ldrs(unsigned char* view,
3778 const Sized_relobj_file<32, big_endian>* object,
3779 const Symbol_value<32>* psymval,
3781 Arm_address address)
3783 gold_assert(group >= 0 && group < 3);
3784 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3785 Valtype* wv = reinterpret_cast<Valtype*>(view);
3786 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3788 const int sign = (insn & 0x00800000) ? 1 : -1;
3789 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3790 int32_t x = (psymval->value(object, addend) - address);
3791 // Calculate the relevant G(n-1) value to obtain this stage residual.
3793 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3794 if (residual >= 0x100)
3795 return This::STATUS_OVERFLOW;
3797 // Mask out the value and U bit.
3799 // Set the U bit for non-negative values.
3802 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3804 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3805 return This::STATUS_OKAY;
3808 // R_ARM_LDC_PC_G0: S + A - P
3809 // R_ARM_LDC_PC_G1: S + A - P
3810 // R_ARM_LDC_PC_G2: S + A - P
3811 // R_ARM_LDC_SB_G0: S + A - B(S)
3812 // R_ARM_LDC_SB_G1: S + A - B(S)
3813 // R_ARM_LDC_SB_G2: S + A - B(S)
3814 static inline typename This::Status
3815 arm_grp_ldc(unsigned char* view,
3816 const Sized_relobj_file<32, big_endian>* object,
3817 const Symbol_value<32>* psymval,
3819 Arm_address address)
3821 gold_assert(group >= 0 && group < 3);
3822 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3823 Valtype* wv = reinterpret_cast<Valtype*>(view);
3824 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3826 const int sign = (insn & 0x00800000) ? 1 : -1;
3827 int32_t addend = ((insn & 0xff) << 2) * sign;
3828 int32_t x = (psymval->value(object, addend) - address);
3829 // Calculate the relevant G(n-1) value to obtain this stage residual.
3831 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3832 if ((residual & 0x3) != 0 || residual >= 0x400)
3833 return This::STATUS_OVERFLOW;
3835 // Mask out the value and U bit.
3837 // Set the U bit for non-negative values.
3840 insn |= (residual >> 2);
3842 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3843 return This::STATUS_OKAY;
3847 // Relocate ARM long branches. This handles relocation types
3848 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3849 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3850 // undefined and we do not use PLT in this relocation. In such a case,
3851 // the branch is converted into an NOP.
3853 template<bool big_endian>
3854 typename Arm_relocate_functions<big_endian>::Status
3855 Arm_relocate_functions<big_endian>::arm_branch_common(
3856 unsigned int r_type,
3857 const Relocate_info<32, big_endian>* relinfo,
3858 unsigned char* view,
3859 const Sized_symbol<32>* gsym,
3860 const Arm_relobj<big_endian>* object,
3862 const Symbol_value<32>* psymval,
3863 Arm_address address,
3864 Arm_address thumb_bit,
3865 bool is_weakly_undefined_without_plt)
3867 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3868 Valtype* wv = reinterpret_cast<Valtype*>(view);
3869 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3871 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3872 && ((val & 0x0f000000UL) == 0x0a000000UL);
3873 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3874 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3875 && ((val & 0x0f000000UL) == 0x0b000000UL);
3876 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
3877 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
3879 // Check that the instruction is valid.
3880 if (r_type == elfcpp::R_ARM_CALL)
3882 if (!insn_is_uncond_bl && !insn_is_blx)
3883 return This::STATUS_BAD_RELOC;
3885 else if (r_type == elfcpp::R_ARM_JUMP24)
3887 if (!insn_is_b && !insn_is_cond_bl)
3888 return This::STATUS_BAD_RELOC;
3890 else if (r_type == elfcpp::R_ARM_PLT32)
3892 if (!insn_is_any_branch)
3893 return This::STATUS_BAD_RELOC;
3895 else if (r_type == elfcpp::R_ARM_XPC25)
3897 // FIXME: AAELF document IH0044C does not say much about it other
3898 // than it being obsolete.
3899 if (!insn_is_any_branch)
3900 return This::STATUS_BAD_RELOC;
3905 // A branch to an undefined weak symbol is turned into a jump to
3906 // the next instruction unless a PLT entry will be created.
3907 // Do the same for local undefined symbols.
3908 // The jump to the next instruction is optimized as a NOP depending
3909 // on the architecture.
3910 const Target_arm<big_endian>* arm_target =
3911 Target_arm<big_endian>::default_target();
3912 if (is_weakly_undefined_without_plt)
3914 gold_assert(!parameters->options().relocatable());
3915 Valtype cond = val & 0xf0000000U;
3916 if (arm_target->may_use_arm_nop())
3917 val = cond | 0x0320f000;
3919 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
3920 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3921 return This::STATUS_OKAY;
3924 Valtype addend = Bits<26>::sign_extend32(val << 2);
3925 Valtype branch_target = psymval->value(object, addend);
3926 int32_t branch_offset = branch_target - address;
3928 // We need a stub if the branch offset is too large or if we need
3930 bool may_use_blx = arm_target->may_use_v5t_interworking();
3931 Reloc_stub* stub = NULL;
3933 if (!parameters->options().relocatable()
3934 && (Bits<26>::has_overflow32(branch_offset)
3935 || ((thumb_bit != 0)
3936 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
3938 Valtype unadjusted_branch_target = psymval->value(object, 0);
3940 Stub_type stub_type =
3941 Reloc_stub::stub_type_for_reloc(r_type, address,
3942 unadjusted_branch_target,
3944 if (stub_type != arm_stub_none)
3946 Stub_table<big_endian>* stub_table =
3947 object->stub_table(relinfo->data_shndx);
3948 gold_assert(stub_table != NULL);
3950 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
3951 stub = stub_table->find_reloc_stub(stub_key);
3952 gold_assert(stub != NULL);
3953 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
3954 branch_target = stub_table->address() + stub->offset() + addend;
3955 branch_offset = branch_target - address;
3956 gold_assert(!Bits<26>::has_overflow32(branch_offset));
3960 // At this point, if we still need to switch mode, the instruction
3961 // must either be a BLX or a BL that can be converted to a BLX.
3965 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
3966 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
3969 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
3970 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3971 return (Bits<26>::has_overflow32(branch_offset)
3972 ? This::STATUS_OVERFLOW
3973 : This::STATUS_OKAY);
3976 // Relocate THUMB long branches. This handles relocation types
3977 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
3978 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3979 // undefined and we do not use PLT in this relocation. In such a case,
3980 // the branch is converted into an NOP.
3982 template<bool big_endian>
3983 typename Arm_relocate_functions<big_endian>::Status
3984 Arm_relocate_functions<big_endian>::thumb_branch_common(
3985 unsigned int r_type,
3986 const Relocate_info<32, big_endian>* relinfo,
3987 unsigned char* view,
3988 const Sized_symbol<32>* gsym,
3989 const Arm_relobj<big_endian>* object,
3991 const Symbol_value<32>* psymval,
3992 Arm_address address,
3993 Arm_address thumb_bit,
3994 bool is_weakly_undefined_without_plt)
3996 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3997 Valtype* wv = reinterpret_cast<Valtype*>(view);
3998 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
3999 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4001 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4003 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4004 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4006 // Check that the instruction is valid.
4007 if (r_type == elfcpp::R_ARM_THM_CALL)
4009 if (!is_bl_insn && !is_blx_insn)
4010 return This::STATUS_BAD_RELOC;
4012 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4014 // This cannot be a BLX.
4016 return This::STATUS_BAD_RELOC;
4018 else if (r_type == elfcpp::R_ARM_THM_XPC22)
4020 // Check for Thumb to Thumb call.
4022 return This::STATUS_BAD_RELOC;
4025 gold_warning(_("%s: Thumb BLX instruction targets "
4026 "thumb function '%s'."),
4027 object->name().c_str(),
4028 (gsym ? gsym->name() : "(local)"));
4029 // Convert BLX to BL.
4030 lower_insn |= 0x1000U;
4036 // A branch to an undefined weak symbol is turned into a jump to
4037 // the next instruction unless a PLT entry will be created.
4038 // The jump to the next instruction is optimized as a NOP.W for
4039 // Thumb-2 enabled architectures.
4040 const Target_arm<big_endian>* arm_target =
4041 Target_arm<big_endian>::default_target();
4042 if (is_weakly_undefined_without_plt)
4044 gold_assert(!parameters->options().relocatable());
4045 if (arm_target->may_use_thumb2_nop())
4047 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4048 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4052 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4053 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4055 return This::STATUS_OKAY;
4058 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4059 Arm_address branch_target = psymval->value(object, addend);
4061 // For BLX, bit 1 of target address comes from bit 1 of base address.
4062 bool may_use_blx = arm_target->may_use_v5t_interworking();
4063 if (thumb_bit == 0 && may_use_blx)
4064 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4066 int32_t branch_offset = branch_target - address;
4068 // We need a stub if the branch offset is too large or if we need
4070 bool thumb2 = arm_target->using_thumb2();
4071 if (!parameters->options().relocatable()
4072 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4073 || (thumb2 && Bits<25>::has_overflow32(branch_offset))
4074 || ((thumb_bit == 0)
4075 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4076 || r_type == elfcpp::R_ARM_THM_JUMP24))))
4078 Arm_address unadjusted_branch_target = psymval->value(object, 0);
4080 Stub_type stub_type =
4081 Reloc_stub::stub_type_for_reloc(r_type, address,
4082 unadjusted_branch_target,
4085 if (stub_type != arm_stub_none)
4087 Stub_table<big_endian>* stub_table =
4088 object->stub_table(relinfo->data_shndx);
4089 gold_assert(stub_table != NULL);
4091 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4092 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4093 gold_assert(stub != NULL);
4094 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4095 branch_target = stub_table->address() + stub->offset() + addend;
4096 if (thumb_bit == 0 && may_use_blx)
4097 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4098 branch_offset = branch_target - address;
4102 // At this point, if we still need to switch mode, the instruction
4103 // must either be a BLX or a BL that can be converted to a BLX.
4106 gold_assert(may_use_blx
4107 && (r_type == elfcpp::R_ARM_THM_CALL
4108 || r_type == elfcpp::R_ARM_THM_XPC22));
4109 // Make sure this is a BLX.
4110 lower_insn &= ~0x1000U;
4114 // Make sure this is a BL.
4115 lower_insn |= 0x1000U;
4118 // For a BLX instruction, make sure that the relocation is rounded up
4119 // to a word boundary. This follows the semantics of the instruction
4120 // which specifies that bit 1 of the target address will come from bit
4121 // 1 of the base address.
4122 if ((lower_insn & 0x5000U) == 0x4000U)
4123 gold_assert((branch_offset & 3) == 0);
4125 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4126 // We use the Thumb-2 encoding, which is safe even if dealing with
4127 // a Thumb-1 instruction by virtue of our overflow check above. */
4128 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4129 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4131 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4132 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4134 gold_assert(!Bits<25>::has_overflow32(branch_offset));
4137 ? Bits<25>::has_overflow32(branch_offset)
4138 : Bits<23>::has_overflow32(branch_offset))
4139 ? This::STATUS_OVERFLOW
4140 : This::STATUS_OKAY);
4143 // Relocate THUMB-2 long conditional branches.
4144 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4145 // undefined and we do not use PLT in this relocation. In such a case,
4146 // the branch is converted into an NOP.
4148 template<bool big_endian>
4149 typename Arm_relocate_functions<big_endian>::Status
4150 Arm_relocate_functions<big_endian>::thm_jump19(
4151 unsigned char* view,
4152 const Arm_relobj<big_endian>* object,
4153 const Symbol_value<32>* psymval,
4154 Arm_address address,
4155 Arm_address thumb_bit)
4157 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4158 Valtype* wv = reinterpret_cast<Valtype*>(view);
4159 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4160 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4161 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4163 Arm_address branch_target = psymval->value(object, addend);
4164 int32_t branch_offset = branch_target - address;
4166 // ??? Should handle interworking? GCC might someday try to
4167 // use this for tail calls.
4168 // FIXME: We do support thumb entry to PLT yet.
4171 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4172 return This::STATUS_BAD_RELOC;
4175 // Put RELOCATION back into the insn.
4176 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4177 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4179 // Put the relocated value back in the object file:
4180 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4181 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4183 return (Bits<21>::has_overflow32(branch_offset)
4184 ? This::STATUS_OVERFLOW
4185 : This::STATUS_OKAY);
4188 // Get the GOT section, creating it if necessary.
4190 template<bool big_endian>
4191 Arm_output_data_got<big_endian>*
4192 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4194 if (this->got_ == NULL)
4196 gold_assert(symtab != NULL && layout != NULL);
4198 // When using -z now, we can treat .got as a relro section.
4199 // Without -z now, it is modified after program startup by lazy
4201 bool is_got_relro = parameters->options().now();
4202 Output_section_order got_order = (is_got_relro
4206 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4207 // .got.plt sections in output. The output .got section contains both
4208 // PLT and non-PLT GOT entries.
4209 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4211 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4212 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4213 this->got_, got_order, is_got_relro);
4215 // The old GNU linker creates a .got.plt section. We just
4216 // create another set of data in the .got section. Note that we
4217 // always create a PLT if we create a GOT, although the PLT
4219 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4220 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4221 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4222 this->got_plt_, got_order, is_got_relro);
4224 // The first three entries are reserved.
4225 this->got_plt_->set_current_data_size(3 * 4);
4227 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4228 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4229 Symbol_table::PREDEFINED,
4231 0, 0, elfcpp::STT_OBJECT,
4233 elfcpp::STV_HIDDEN, 0,
4239 // Get the dynamic reloc section, creating it if necessary.
4241 template<bool big_endian>
4242 typename Target_arm<big_endian>::Reloc_section*
4243 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4245 if (this->rel_dyn_ == NULL)
4247 gold_assert(layout != NULL);
4248 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4249 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4250 elfcpp::SHF_ALLOC, this->rel_dyn_,
4251 ORDER_DYNAMIC_RELOCS, false);
4253 return this->rel_dyn_;
4256 // Insn_template methods.
4258 // Return byte size of an instruction template.
4261 Insn_template::size() const
4263 switch (this->type())
4266 case THUMB16_SPECIAL_TYPE:
4277 // Return alignment of an instruction template.
4280 Insn_template::alignment() const
4282 switch (this->type())
4285 case THUMB16_SPECIAL_TYPE:
4296 // Stub_template methods.
4298 Stub_template::Stub_template(
4299 Stub_type type, const Insn_template* insns,
4301 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4302 entry_in_thumb_mode_(false), relocs_()
4306 // Compute byte size and alignment of stub template.
4307 for (size_t i = 0; i < insn_count; i++)
4309 unsigned insn_alignment = insns[i].alignment();
4310 size_t insn_size = insns[i].size();
4311 gold_assert((offset & (insn_alignment - 1)) == 0);
4312 this->alignment_ = std::max(this->alignment_, insn_alignment);
4313 switch (insns[i].type())
4315 case Insn_template::THUMB16_TYPE:
4316 case Insn_template::THUMB16_SPECIAL_TYPE:
4318 this->entry_in_thumb_mode_ = true;
4321 case Insn_template::THUMB32_TYPE:
4322 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4323 this->relocs_.push_back(Reloc(i, offset));
4325 this->entry_in_thumb_mode_ = true;
4328 case Insn_template::ARM_TYPE:
4329 // Handle cases where the target is encoded within the
4331 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4332 this->relocs_.push_back(Reloc(i, offset));
4335 case Insn_template::DATA_TYPE:
4336 // Entry point cannot be data.
4337 gold_assert(i != 0);
4338 this->relocs_.push_back(Reloc(i, offset));
4344 offset += insn_size;
4346 this->size_ = offset;
4351 // Template to implement do_write for a specific target endianness.
4353 template<bool big_endian>
4355 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4357 const Stub_template* stub_template = this->stub_template();
4358 const Insn_template* insns = stub_template->insns();
4360 // FIXME: We do not handle BE8 encoding yet.
4361 unsigned char* pov = view;
4362 for (size_t i = 0; i < stub_template->insn_count(); i++)
4364 switch (insns[i].type())
4366 case Insn_template::THUMB16_TYPE:
4367 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff);
4369 case Insn_template::THUMB16_SPECIAL_TYPE:
4370 elfcpp::Swap<16, big_endian>::writeval(
4372 this->thumb16_special(i));
4374 case Insn_template::THUMB32_TYPE:
4376 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4377 uint32_t lo = insns[i].data() & 0xffff;
4378 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4379 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4382 case Insn_template::ARM_TYPE:
4383 case Insn_template::DATA_TYPE:
4384 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4389 pov += insns[i].size();
4391 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4394 // Reloc_stub::Key methods.
4396 // Dump a Key as a string for debugging.
4399 Reloc_stub::Key::name() const
4401 if (this->r_sym_ == invalid_index)
4403 // Global symbol key name
4404 // <stub-type>:<symbol name>:<addend>.
4405 const std::string sym_name = this->u_.symbol->name();
4406 // We need to print two hex number and two colons. So just add 100 bytes
4407 // to the symbol name size.
4408 size_t len = sym_name.size() + 100;
4409 char* buffer = new char[len];
4410 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4411 sym_name.c_str(), this->addend_);
4412 gold_assert(c > 0 && c < static_cast<int>(len));
4414 return std::string(buffer);
4418 // local symbol key name
4419 // <stub-type>:<object>:<r_sym>:<addend>.
4420 const size_t len = 200;
4422 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4423 this->u_.relobj, this->r_sym_, this->addend_);
4424 gold_assert(c > 0 && c < static_cast<int>(len));
4425 return std::string(buffer);
4429 // Reloc_stub methods.
4431 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4432 // LOCATION to DESTINATION.
4433 // This code is based on the arm_type_of_stub function in
4434 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4438 Reloc_stub::stub_type_for_reloc(
4439 unsigned int r_type,
4440 Arm_address location,
4441 Arm_address destination,
4442 bool target_is_thumb)
4444 Stub_type stub_type = arm_stub_none;
4446 // This is a bit ugly but we want to avoid using a templated class for
4447 // big and little endianities.
4449 bool should_force_pic_veneer;
4452 if (parameters->target().is_big_endian())
4454 const Target_arm<true>* big_endian_target =
4455 Target_arm<true>::default_target();
4456 may_use_blx = big_endian_target->may_use_v5t_interworking();
4457 should_force_pic_veneer = big_endian_target->should_force_pic_veneer();
4458 thumb2 = big_endian_target->using_thumb2();
4459 thumb_only = big_endian_target->using_thumb_only();
4463 const Target_arm<false>* little_endian_target =
4464 Target_arm<false>::default_target();
4465 may_use_blx = little_endian_target->may_use_v5t_interworking();
4466 should_force_pic_veneer = little_endian_target->should_force_pic_veneer();
4467 thumb2 = little_endian_target->using_thumb2();
4468 thumb_only = little_endian_target->using_thumb_only();
4471 int64_t branch_offset;
4472 bool output_is_position_independent =
4473 parameters->options().output_is_position_independent();
4474 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4476 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4477 // base address (instruction address + 4).
4478 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4479 destination = Bits<32>::bit_select32(destination, location, 0x2);
4480 branch_offset = static_cast<int64_t>(destination) - location;
4482 // Handle cases where:
4483 // - this call goes too far (different Thumb/Thumb2 max
4485 // - it's a Thumb->Arm call and blx is not available, or it's a
4486 // Thumb->Arm branch (not bl). A stub is needed in this case.
4488 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4489 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4491 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4492 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4493 || ((!target_is_thumb)
4494 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4495 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4497 if (target_is_thumb)
4502 stub_type = (output_is_position_independent
4503 || should_force_pic_veneer)
4506 && (r_type == elfcpp::R_ARM_THM_CALL))
4507 // V5T and above. Stub starts with ARM code, so
4508 // we must be able to switch mode before
4509 // reaching it, which is only possible for 'bl'
4510 // (ie R_ARM_THM_CALL relocation).
4511 ? arm_stub_long_branch_any_thumb_pic
4512 // On V4T, use Thumb code only.
4513 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4517 && (r_type == elfcpp::R_ARM_THM_CALL))
4518 ? arm_stub_long_branch_any_any // V5T and above.
4519 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4523 stub_type = (output_is_position_independent
4524 || should_force_pic_veneer)
4525 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4526 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4533 // FIXME: We should check that the input section is from an
4534 // object that has interwork enabled.
4536 stub_type = (output_is_position_independent
4537 || should_force_pic_veneer)
4540 && (r_type == elfcpp::R_ARM_THM_CALL))
4541 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4542 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4546 && (r_type == elfcpp::R_ARM_THM_CALL))
4547 ? arm_stub_long_branch_any_any // V5T and above.
4548 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4550 // Handle v4t short branches.
4551 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4552 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4553 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4554 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4558 else if (r_type == elfcpp::R_ARM_CALL
4559 || r_type == elfcpp::R_ARM_JUMP24
4560 || r_type == elfcpp::R_ARM_PLT32)
4562 branch_offset = static_cast<int64_t>(destination) - location;
4563 if (target_is_thumb)
4567 // FIXME: We should check that the input section is from an
4568 // object that has interwork enabled.
4570 // We have an extra 2-bytes reach because of
4571 // the mode change (bit 24 (H) of BLX encoding).
4572 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4573 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4574 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4575 || (r_type == elfcpp::R_ARM_JUMP24)
4576 || (r_type == elfcpp::R_ARM_PLT32))
4578 stub_type = (output_is_position_independent
4579 || should_force_pic_veneer)
4582 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4583 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4587 ? arm_stub_long_branch_any_any // V5T and above.
4588 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4594 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4595 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4597 stub_type = (output_is_position_independent
4598 || should_force_pic_veneer)
4599 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4600 : arm_stub_long_branch_any_any; /// non-PIC.
4608 // Cortex_a8_stub methods.
4610 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4611 // I is the position of the instruction template in the stub template.
4614 Cortex_a8_stub::do_thumb16_special(size_t i)
4616 // The only use of this is to copy condition code from a conditional
4617 // branch being worked around to the corresponding conditional branch in
4619 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4621 uint16_t data = this->stub_template()->insns()[i].data();
4622 gold_assert((data & 0xff00U) == 0xd000U);
4623 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4627 // Stub_factory methods.
4629 Stub_factory::Stub_factory()
4631 // The instruction template sequences are declared as static
4632 // objects and initialized first time the constructor runs.
4634 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4635 // to reach the stub if necessary.
4636 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4638 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4639 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4640 // dcd R_ARM_ABS32(X)
4643 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4645 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4647 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4648 Insn_template::arm_insn(0xe12fff1c), // bx ip
4649 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4650 // dcd R_ARM_ABS32(X)
4653 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4654 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4656 Insn_template::thumb16_insn(0xb401), // push {r0}
4657 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4658 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4659 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4660 Insn_template::thumb16_insn(0x4760), // bx ip
4661 Insn_template::thumb16_insn(0xbf00), // nop
4662 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4663 // dcd R_ARM_ABS32(X)
4666 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4668 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4670 Insn_template::thumb16_insn(0x4778), // bx pc
4671 Insn_template::thumb16_insn(0x46c0), // nop
4672 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4673 Insn_template::arm_insn(0xe12fff1c), // bx ip
4674 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4675 // dcd R_ARM_ABS32(X)
4678 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4680 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4682 Insn_template::thumb16_insn(0x4778), // bx pc
4683 Insn_template::thumb16_insn(0x46c0), // nop
4684 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4685 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4686 // dcd R_ARM_ABS32(X)
4689 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4690 // one, when the destination is close enough.
4691 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4693 Insn_template::thumb16_insn(0x4778), // bx pc
4694 Insn_template::thumb16_insn(0x46c0), // nop
4695 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4698 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4699 // blx to reach the stub if necessary.
4700 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4702 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4703 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4704 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4705 // dcd R_ARM_REL32(X-4)
4708 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4709 // blx to reach the stub if necessary. We can not add into pc;
4710 // it is not guaranteed to mode switch (different in ARMv6 and
4712 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4714 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4715 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4716 Insn_template::arm_insn(0xe12fff1c), // bx ip
4717 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4718 // dcd R_ARM_REL32(X)
4721 // V4T ARM -> ARM long branch stub, PIC.
4722 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4724 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4725 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4726 Insn_template::arm_insn(0xe12fff1c), // bx ip
4727 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4728 // dcd R_ARM_REL32(X)
4731 // V4T Thumb -> ARM long branch stub, PIC.
4732 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4734 Insn_template::thumb16_insn(0x4778), // bx pc
4735 Insn_template::thumb16_insn(0x46c0), // nop
4736 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4737 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4738 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4739 // dcd R_ARM_REL32(X)
4742 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4744 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4746 Insn_template::thumb16_insn(0xb401), // push {r0}
4747 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4748 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4749 Insn_template::thumb16_insn(0x4484), // add ip, r0
4750 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4751 Insn_template::thumb16_insn(0x4760), // bx ip
4752 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4753 // dcd R_ARM_REL32(X)
4756 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4758 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4760 Insn_template::thumb16_insn(0x4778), // bx pc
4761 Insn_template::thumb16_insn(0x46c0), // nop
4762 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4763 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4764 Insn_template::arm_insn(0xe12fff1c), // bx ip
4765 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4766 // dcd R_ARM_REL32(X)
4769 // Cortex-A8 erratum-workaround stubs.
4771 // Stub used for conditional branches (which may be beyond +/-1MB away,
4772 // so we can't use a conditional branch to reach this stub).
4779 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4781 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4782 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4783 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4787 // Stub used for b.w and bl.w instructions.
4789 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4791 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4794 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4796 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4799 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4800 // instruction (which switches to ARM mode) to point to this stub. Jump to
4801 // the real destination using an ARM-mode branch.
4802 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4804 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4807 // Stub used to provide an interworking for R_ARM_V4BX relocation
4808 // (bx r[n] instruction).
4809 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4811 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4812 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4813 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4816 // Fill in the stub template look-up table. Stub templates are constructed
4817 // per instance of Stub_factory for fast look-up without locking
4818 // in a thread-enabled environment.
4820 this->stub_templates_[arm_stub_none] =
4821 new Stub_template(arm_stub_none, NULL, 0);
4823 #define DEF_STUB(x) \
4827 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
4828 Stub_type type = arm_stub_##x; \
4829 this->stub_templates_[type] = \
4830 new Stub_template(type, elf32_arm_stub_##x, array_size); \
4838 // Stub_table methods.
4840 // Remove all Cortex-A8 stub.
4842 template<bool big_endian>
4844 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
4846 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4847 p != this->cortex_a8_stubs_.end();
4850 this->cortex_a8_stubs_.clear();
4853 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
4855 template<bool big_endian>
4857 Stub_table<big_endian>::relocate_stub(
4859 const Relocate_info<32, big_endian>* relinfo,
4860 Target_arm<big_endian>* arm_target,
4861 Output_section* output_section,
4862 unsigned char* view,
4863 Arm_address address,
4864 section_size_type view_size)
4866 const Stub_template* stub_template = stub->stub_template();
4867 if (stub_template->reloc_count() != 0)
4869 // Adjust view to cover the stub only.
4870 section_size_type offset = stub->offset();
4871 section_size_type stub_size = stub_template->size();
4872 gold_assert(offset + stub_size <= view_size);
4874 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
4875 address + offset, stub_size);
4879 // Relocate all stubs in this stub table.
4881 template<bool big_endian>
4883 Stub_table<big_endian>::relocate_stubs(
4884 const Relocate_info<32, big_endian>* relinfo,
4885 Target_arm<big_endian>* arm_target,
4886 Output_section* output_section,
4887 unsigned char* view,
4888 Arm_address address,
4889 section_size_type view_size)
4891 // If we are passed a view bigger than the stub table's. we need to
4893 gold_assert(address == this->address()
4895 == static_cast<section_size_type>(this->data_size())));
4897 // Relocate all relocation stubs.
4898 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4899 p != this->reloc_stubs_.end();
4901 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4902 address, view_size);
4904 // Relocate all Cortex-A8 stubs.
4905 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
4906 p != this->cortex_a8_stubs_.end();
4908 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
4909 address, view_size);
4911 // Relocate all ARM V4BX stubs.
4912 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
4913 p != this->arm_v4bx_stubs_.end();
4917 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
4918 address, view_size);
4922 // Write out the stubs to file.
4924 template<bool big_endian>
4926 Stub_table<big_endian>::do_write(Output_file* of)
4928 off_t offset = this->offset();
4929 const section_size_type oview_size =
4930 convert_to_section_size_type(this->data_size());
4931 unsigned char* const oview = of->get_output_view(offset, oview_size);
4933 // Write relocation stubs.
4934 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
4935 p != this->reloc_stubs_.end();
4938 Reloc_stub* stub = p->second;
4939 Arm_address address = this->address() + stub->offset();
4941 == align_address(address,
4942 stub->stub_template()->alignment()));
4943 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4947 // Write Cortex-A8 stubs.
4948 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4949 p != this->cortex_a8_stubs_.end();
4952 Cortex_a8_stub* stub = p->second;
4953 Arm_address address = this->address() + stub->offset();
4955 == align_address(address,
4956 stub->stub_template()->alignment()));
4957 stub->write(oview + stub->offset(), stub->stub_template()->size(),
4961 // Write ARM V4BX relocation stubs.
4962 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
4963 p != this->arm_v4bx_stubs_.end();
4969 Arm_address address = this->address() + (*p)->offset();
4971 == align_address(address,
4972 (*p)->stub_template()->alignment()));
4973 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
4977 of->write_output_view(this->offset(), oview_size, oview);
4980 // Update the data size and address alignment of the stub table at the end
4981 // of a relaxation pass. Return true if either the data size or the
4982 // alignment changed in this relaxation pass.
4984 template<bool big_endian>
4986 Stub_table<big_endian>::update_data_size_and_addralign()
4988 // Go over all stubs in table to compute data size and address alignment.
4989 off_t size = this->reloc_stubs_size_;
4990 unsigned addralign = this->reloc_stubs_addralign_;
4992 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
4993 p != this->cortex_a8_stubs_.end();
4996 const Stub_template* stub_template = p->second->stub_template();
4997 addralign = std::max(addralign, stub_template->alignment());
4998 size = (align_address(size, stub_template->alignment())
4999 + stub_template->size());
5002 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5003 p != this->arm_v4bx_stubs_.end();
5009 const Stub_template* stub_template = (*p)->stub_template();
5010 addralign = std::max(addralign, stub_template->alignment());
5011 size = (align_address(size, stub_template->alignment())
5012 + stub_template->size());
5015 // Check if either data size or alignment changed in this pass.
5016 // Update prev_data_size_ and prev_addralign_. These will be used
5017 // as the current data size and address alignment for the next pass.
5018 bool changed = size != this->prev_data_size_;
5019 this->prev_data_size_ = size;
5021 if (addralign != this->prev_addralign_)
5023 this->prev_addralign_ = addralign;
5028 // Finalize the stubs. This sets the offsets of the stubs within the stub
5029 // table. It also marks all input sections needing Cortex-A8 workaround.
5031 template<bool big_endian>
5033 Stub_table<big_endian>::finalize_stubs()
5035 off_t off = this->reloc_stubs_size_;
5036 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5037 p != this->cortex_a8_stubs_.end();
5040 Cortex_a8_stub* stub = p->second;
5041 const Stub_template* stub_template = stub->stub_template();
5042 uint64_t stub_addralign = stub_template->alignment();
5043 off = align_address(off, stub_addralign);
5044 stub->set_offset(off);
5045 off += stub_template->size();
5047 // Mark input section so that we can determine later if a code section
5048 // needs the Cortex-A8 workaround quickly.
5049 Arm_relobj<big_endian>* arm_relobj =
5050 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5051 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5054 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5055 p != this->arm_v4bx_stubs_.end();
5061 const Stub_template* stub_template = (*p)->stub_template();
5062 uint64_t stub_addralign = stub_template->alignment();
5063 off = align_address(off, stub_addralign);
5064 (*p)->set_offset(off);
5065 off += stub_template->size();
5068 gold_assert(off <= this->prev_data_size_);
5071 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5072 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5073 // of the address range seen by the linker.
5075 template<bool big_endian>
5077 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5078 Target_arm<big_endian>* arm_target,
5079 unsigned char* view,
5080 Arm_address view_address,
5081 section_size_type view_size)
5083 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5084 for (Cortex_a8_stub_list::const_iterator p =
5085 this->cortex_a8_stubs_.lower_bound(view_address);
5086 ((p != this->cortex_a8_stubs_.end())
5087 && (p->first < (view_address + view_size)));
5090 // We do not store the THUMB bit in the LSB of either the branch address
5091 // or the stub offset. There is no need to strip the LSB.
5092 Arm_address branch_address = p->first;
5093 const Cortex_a8_stub* stub = p->second;
5094 Arm_address stub_address = this->address() + stub->offset();
5096 // Offset of the branch instruction relative to this view.
5097 section_size_type offset =
5098 convert_to_section_size_type(branch_address - view_address);
5099 gold_assert((offset + 4) <= view_size);
5101 arm_target->apply_cortex_a8_workaround(stub, stub_address,
5102 view + offset, branch_address);
5106 // Arm_input_section methods.
5108 // Initialize an Arm_input_section.
5110 template<bool big_endian>
5112 Arm_input_section<big_endian>::init()
5114 Relobj* relobj = this->relobj();
5115 unsigned int shndx = this->shndx();
5117 // We have to cache original size, alignment and contents to avoid locking
5118 // the original file.
5119 this->original_addralign_ =
5120 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5122 // This is not efficient but we expect only a small number of relaxed
5123 // input sections for stubs.
5124 section_size_type section_size;
5125 const unsigned char* section_contents =
5126 relobj->section_contents(shndx, §ion_size, false);
5127 this->original_size_ =
5128 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5130 gold_assert(this->original_contents_ == NULL);
5131 this->original_contents_ = new unsigned char[section_size];
5132 memcpy(this->original_contents_, section_contents, section_size);
5134 // We want to make this look like the original input section after
5135 // output sections are finalized.
5136 Output_section* os = relobj->output_section(shndx);
5137 off_t offset = relobj->output_section_offset(shndx);
5138 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5139 this->set_address(os->address() + offset);
5140 this->set_file_offset(os->offset() + offset);
5142 this->set_current_data_size(this->original_size_);
5143 this->finalize_data_size();
5146 template<bool big_endian>
5148 Arm_input_section<big_endian>::do_write(Output_file* of)
5150 // We have to write out the original section content.
5151 gold_assert(this->original_contents_ != NULL);
5152 of->write(this->offset(), this->original_contents_,
5153 this->original_size_);
5155 // If this owns a stub table and it is not empty, write it.
5156 if (this->is_stub_table_owner() && !this->stub_table_->empty())
5157 this->stub_table_->write(of);
5160 // Finalize data size.
5162 template<bool big_endian>
5164 Arm_input_section<big_endian>::set_final_data_size()
5166 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5168 if (this->is_stub_table_owner())
5170 this->stub_table_->finalize_data_size();
5171 off = align_address(off, this->stub_table_->addralign());
5172 off += this->stub_table_->data_size();
5174 this->set_data_size(off);
5177 // Reset address and file offset.
5179 template<bool big_endian>
5181 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5183 // Size of the original input section contents.
5184 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5186 // If this is a stub table owner, account for the stub table size.
5187 if (this->is_stub_table_owner())
5189 Stub_table<big_endian>* stub_table = this->stub_table_;
5191 // Reset the stub table's address and file offset. The
5192 // current data size for child will be updated after that.
5193 stub_table_->reset_address_and_file_offset();
5194 off = align_address(off, stub_table_->addralign());
5195 off += stub_table->current_data_size();
5198 this->set_current_data_size(off);
5201 // Arm_exidx_cantunwind methods.
5203 // Write this to Output file OF for a fixed endianness.
5205 template<bool big_endian>
5207 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5209 off_t offset = this->offset();
5210 const section_size_type oview_size = 8;
5211 unsigned char* const oview = of->get_output_view(offset, oview_size);
5213 Output_section* os = this->relobj_->output_section(this->shndx_);
5214 gold_assert(os != NULL);
5216 Arm_relobj<big_endian>* arm_relobj =
5217 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5218 Arm_address output_offset =
5219 arm_relobj->get_output_section_offset(this->shndx_);
5220 Arm_address section_start;
5221 section_size_type section_size;
5223 // Find out the end of the text section referred by this.
5224 if (output_offset != Arm_relobj<big_endian>::invalid_address)
5226 section_start = os->address() + output_offset;
5227 const Arm_exidx_input_section* exidx_input_section =
5228 arm_relobj->exidx_input_section_by_link(this->shndx_);
5229 gold_assert(exidx_input_section != NULL);
5231 convert_to_section_size_type(exidx_input_section->text_size());
5235 // Currently this only happens for a relaxed section.
5236 const Output_relaxed_input_section* poris =
5237 os->find_relaxed_input_section(this->relobj_, this->shndx_);
5238 gold_assert(poris != NULL);
5239 section_start = poris->address();
5240 section_size = convert_to_section_size_type(poris->data_size());
5243 // We always append this to the end of an EXIDX section.
5244 Arm_address output_address = section_start + section_size;
5246 // Write out the entry. The first word either points to the beginning
5247 // or after the end of a text section. The second word is the special
5248 // EXIDX_CANTUNWIND value.
5249 uint32_t prel31_offset = output_address - this->address();
5250 if (Bits<31>::has_overflow32(offset))
5251 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5252 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5253 prel31_offset & 0x7fffffffU);
5254 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5255 elfcpp::EXIDX_CANTUNWIND);
5257 of->write_output_view(this->offset(), oview_size, oview);
5260 // Arm_exidx_merged_section methods.
5262 // Constructor for Arm_exidx_merged_section.
5263 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5264 // SECTION_OFFSET_MAP points to a section offset map describing how
5265 // parts of the input section are mapped to output. DELETED_BYTES is
5266 // the number of bytes deleted from the EXIDX input section.
5268 Arm_exidx_merged_section::Arm_exidx_merged_section(
5269 const Arm_exidx_input_section& exidx_input_section,
5270 const Arm_exidx_section_offset_map& section_offset_map,
5271 uint32_t deleted_bytes)
5272 : Output_relaxed_input_section(exidx_input_section.relobj(),
5273 exidx_input_section.shndx(),
5274 exidx_input_section.addralign()),
5275 exidx_input_section_(exidx_input_section),
5276 section_offset_map_(section_offset_map)
5278 // If we retain or discard the whole EXIDX input section, we would
5280 gold_assert(deleted_bytes != 0
5281 && deleted_bytes != this->exidx_input_section_.size());
5283 // Fix size here so that we do not need to implement set_final_data_size.
5284 uint32_t size = exidx_input_section.size() - deleted_bytes;
5285 this->set_data_size(size);
5286 this->fix_data_size();
5288 // Allocate buffer for section contents and build contents.
5289 this->section_contents_ = new unsigned char[size];
5292 // Build the contents of a merged EXIDX output section.
5295 Arm_exidx_merged_section::build_contents(
5296 const unsigned char* original_contents,
5297 section_size_type original_size)
5299 // Go over spans of input offsets and write only those that are not
5301 section_offset_type in_start = 0;
5302 section_offset_type out_start = 0;
5303 section_offset_type in_max =
5304 convert_types<section_offset_type>(original_size);
5305 section_offset_type out_max =
5306 convert_types<section_offset_type>(this->data_size());
5307 for (Arm_exidx_section_offset_map::const_iterator p =
5308 this->section_offset_map_.begin();
5309 p != this->section_offset_map_.end();
5312 section_offset_type in_end = p->first;
5313 gold_assert(in_end >= in_start);
5314 section_offset_type out_end = p->second;
5315 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5318 size_t out_chunk_size =
5319 convert_types<size_t>(out_end - out_start + 1);
5321 gold_assert(out_chunk_size == in_chunk_size
5322 && in_end < in_max && out_end < out_max);
5324 memcpy(this->section_contents_ + out_start,
5325 original_contents + in_start,
5327 out_start += out_chunk_size;
5329 in_start += in_chunk_size;
5333 // Given an input OBJECT, an input section index SHNDX within that
5334 // object, and an OFFSET relative to the start of that input
5335 // section, return whether or not the corresponding offset within
5336 // the output section is known. If this function returns true, it
5337 // sets *POUTPUT to the output offset. The value -1 indicates that
5338 // this input offset is being discarded.
5341 Arm_exidx_merged_section::do_output_offset(
5342 const Relobj* relobj,
5344 section_offset_type offset,
5345 section_offset_type* poutput) const
5347 // We only handle offsets for the original EXIDX input section.
5348 if (relobj != this->exidx_input_section_.relobj()
5349 || shndx != this->exidx_input_section_.shndx())
5352 section_offset_type section_size =
5353 convert_types<section_offset_type>(this->exidx_input_section_.size());
5354 if (offset < 0 || offset >= section_size)
5355 // Input offset is out of valid range.
5359 // We need to look up the section offset map to determine the output
5360 // offset. Find the reference point in map that is first offset
5361 // bigger than or equal to this offset.
5362 Arm_exidx_section_offset_map::const_iterator p =
5363 this->section_offset_map_.lower_bound(offset);
5365 // The section offset maps are build such that this should not happen if
5366 // input offset is in the valid range.
5367 gold_assert(p != this->section_offset_map_.end());
5369 // We need to check if this is dropped.
5370 section_offset_type ref = p->first;
5371 section_offset_type mapped_ref = p->second;
5373 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5374 // Offset is present in output.
5375 *poutput = mapped_ref + (offset - ref);
5377 // Offset is discarded owing to EXIDX entry merging.
5384 // Write this to output file OF.
5387 Arm_exidx_merged_section::do_write(Output_file* of)
5389 off_t offset = this->offset();
5390 const section_size_type oview_size = this->data_size();
5391 unsigned char* const oview = of->get_output_view(offset, oview_size);
5393 Output_section* os = this->relobj()->output_section(this->shndx());
5394 gold_assert(os != NULL);
5396 memcpy(oview, this->section_contents_, oview_size);
5397 of->write_output_view(this->offset(), oview_size, oview);
5400 // Arm_exidx_fixup methods.
5402 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5403 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5404 // points to the end of the last seen EXIDX section.
5407 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5409 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5410 && this->last_input_section_ != NULL)
5412 Relobj* relobj = this->last_input_section_->relobj();
5413 unsigned int text_shndx = this->last_input_section_->link();
5414 Arm_exidx_cantunwind* cantunwind =
5415 new Arm_exidx_cantunwind(relobj, text_shndx);
5416 this->exidx_output_section_->add_output_section_data(cantunwind);
5417 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5421 // Process an EXIDX section entry in input. Return whether this entry
5422 // can be deleted in the output. SECOND_WORD in the second word of the
5426 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5429 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5431 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5432 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5433 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5435 else if ((second_word & 0x80000000) != 0)
5437 // Inlined unwinding data. Merge if equal to previous.
5438 delete_entry = (merge_exidx_entries_
5439 && this->last_unwind_type_ == UT_INLINED_ENTRY
5440 && this->last_inlined_entry_ == second_word);
5441 this->last_unwind_type_ = UT_INLINED_ENTRY;
5442 this->last_inlined_entry_ = second_word;
5446 // Normal table entry. In theory we could merge these too,
5447 // but duplicate entries are likely to be much less common.
5448 delete_entry = false;
5449 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5451 return delete_entry;
5454 // Update the current section offset map during EXIDX section fix-up.
5455 // If there is no map, create one. INPUT_OFFSET is the offset of a
5456 // reference point, DELETED_BYTES is the number of deleted by in the
5457 // section so far. If DELETE_ENTRY is true, the reference point and
5458 // all offsets after the previous reference point are discarded.
5461 Arm_exidx_fixup::update_offset_map(
5462 section_offset_type input_offset,
5463 section_size_type deleted_bytes,
5466 if (this->section_offset_map_ == NULL)
5467 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5468 section_offset_type output_offset;
5470 output_offset = Arm_exidx_input_section::invalid_offset;
5472 output_offset = input_offset - deleted_bytes;
5473 (*this->section_offset_map_)[input_offset] = output_offset;
5476 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5477 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5478 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5479 // If some entries are merged, also store a pointer to a newly created
5480 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5481 // owns the map and is responsible for releasing it after use.
5483 template<bool big_endian>
5485 Arm_exidx_fixup::process_exidx_section(
5486 const Arm_exidx_input_section* exidx_input_section,
5487 const unsigned char* section_contents,
5488 section_size_type section_size,
5489 Arm_exidx_section_offset_map** psection_offset_map)
5491 Relobj* relobj = exidx_input_section->relobj();
5492 unsigned shndx = exidx_input_section->shndx();
5494 if ((section_size % 8) != 0)
5496 // Something is wrong with this section. Better not touch it.
5497 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5498 relobj->name().c_str(), shndx);
5499 this->last_input_section_ = exidx_input_section;
5500 this->last_unwind_type_ = UT_NONE;
5504 uint32_t deleted_bytes = 0;
5505 bool prev_delete_entry = false;
5506 gold_assert(this->section_offset_map_ == NULL);
5508 for (section_size_type i = 0; i < section_size; i += 8)
5510 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5512 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5513 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5515 bool delete_entry = this->process_exidx_entry(second_word);
5517 // Entry deletion causes changes in output offsets. We use a std::map
5518 // to record these. And entry (x, y) means input offset x
5519 // is mapped to output offset y. If y is invalid_offset, then x is
5520 // dropped in the output. Because of the way std::map::lower_bound
5521 // works, we record the last offset in a region w.r.t to keeping or
5522 // dropping. If there is no entry (x0, y0) for an input offset x0,
5523 // the output offset y0 of it is determined by the output offset y1 of
5524 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5525 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5527 if (delete_entry != prev_delete_entry && i != 0)
5528 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5530 // Update total deleted bytes for this entry.
5534 prev_delete_entry = delete_entry;
5537 // If section offset map is not NULL, make an entry for the end of
5539 if (this->section_offset_map_ != NULL)
5540 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5542 *psection_offset_map = this->section_offset_map_;
5543 this->section_offset_map_ = NULL;
5544 this->last_input_section_ = exidx_input_section;
5546 // Set the first output text section so that we can link the EXIDX output
5547 // section to it. Ignore any EXIDX input section that is completely merged.
5548 if (this->first_output_text_section_ == NULL
5549 && deleted_bytes != section_size)
5551 unsigned int link = exidx_input_section->link();
5552 Output_section* os = relobj->output_section(link);
5553 gold_assert(os != NULL);
5554 this->first_output_text_section_ = os;
5557 return deleted_bytes;
5560 // Arm_output_section methods.
5562 // Create a stub group for input sections from BEGIN to END. OWNER
5563 // points to the input section to be the owner a new stub table.
5565 template<bool big_endian>
5567 Arm_output_section<big_endian>::create_stub_group(
5568 Input_section_list::const_iterator begin,
5569 Input_section_list::const_iterator end,
5570 Input_section_list::const_iterator owner,
5571 Target_arm<big_endian>* target,
5572 std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5575 // We use a different kind of relaxed section in an EXIDX section.
5576 // The static casting from Output_relaxed_input_section to
5577 // Arm_input_section is invalid in an EXIDX section. We are okay
5578 // because we should not be calling this for an EXIDX section.
5579 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5581 // Currently we convert ordinary input sections into relaxed sections only
5582 // at this point but we may want to support creating relaxed input section
5583 // very early. So we check here to see if owner is already a relaxed
5586 Arm_input_section<big_endian>* arm_input_section;
5587 if (owner->is_relaxed_input_section())
5590 Arm_input_section<big_endian>::as_arm_input_section(
5591 owner->relaxed_input_section());
5595 gold_assert(owner->is_input_section());
5596 // Create a new relaxed input section. We need to lock the original
5598 Task_lock_obj<Object> tl(task, owner->relobj());
5600 target->new_arm_input_section(owner->relobj(), owner->shndx());
5601 new_relaxed_sections->push_back(arm_input_section);
5604 // Create a stub table.
5605 Stub_table<big_endian>* stub_table =
5606 target->new_stub_table(arm_input_section);
5608 arm_input_section->set_stub_table(stub_table);
5610 Input_section_list::const_iterator p = begin;
5611 Input_section_list::const_iterator prev_p;
5613 // Look for input sections or relaxed input sections in [begin ... end].
5616 if (p->is_input_section() || p->is_relaxed_input_section())
5618 // The stub table information for input sections live
5619 // in their objects.
5620 Arm_relobj<big_endian>* arm_relobj =
5621 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5622 arm_relobj->set_stub_table(p->shndx(), stub_table);
5626 while (prev_p != end);
5629 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5630 // of stub groups. We grow a stub group by adding input section until the
5631 // size is just below GROUP_SIZE. The last input section will be converted
5632 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5633 // input section after the stub table, effectively double the group size.
5635 // This is similar to the group_sections() function in elf32-arm.c but is
5636 // implemented differently.
5638 template<bool big_endian>
5640 Arm_output_section<big_endian>::group_sections(
5641 section_size_type group_size,
5642 bool stubs_always_after_branch,
5643 Target_arm<big_endian>* target,
5646 // We only care about sections containing code.
5647 if ((this->flags() & elfcpp::SHF_EXECINSTR) == 0)
5650 // States for grouping.
5653 // No group is being built.
5655 // A group is being built but the stub table is not found yet.
5656 // We keep group a stub group until the size is just under GROUP_SIZE.
5657 // The last input section in the group will be used as the stub table.
5658 FINDING_STUB_SECTION,
5659 // A group is being built and we have already found a stub table.
5660 // We enter this state to grow a stub group by adding input section
5661 // after the stub table. This effectively doubles the group size.
5665 // Any newly created relaxed sections are stored here.
5666 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5668 State state = NO_GROUP;
5669 section_size_type off = 0;
5670 section_size_type group_begin_offset = 0;
5671 section_size_type group_end_offset = 0;
5672 section_size_type stub_table_end_offset = 0;
5673 Input_section_list::const_iterator group_begin =
5674 this->input_sections().end();
5675 Input_section_list::const_iterator stub_table =
5676 this->input_sections().end();
5677 Input_section_list::const_iterator group_end = this->input_sections().end();
5678 for (Input_section_list::const_iterator p = this->input_sections().begin();
5679 p != this->input_sections().end();
5682 section_size_type section_begin_offset =
5683 align_address(off, p->addralign());
5684 section_size_type section_end_offset =
5685 section_begin_offset + p->data_size();
5687 // Check to see if we should group the previously seen sections.
5693 case FINDING_STUB_SECTION:
5694 // Adding this section makes the group larger than GROUP_SIZE.
5695 if (section_end_offset - group_begin_offset >= group_size)
5697 if (stubs_always_after_branch)
5699 gold_assert(group_end != this->input_sections().end());
5700 this->create_stub_group(group_begin, group_end, group_end,
5701 target, &new_relaxed_sections,
5707 // But wait, there's more! Input sections up to
5708 // stub_group_size bytes after the stub table can be
5709 // handled by it too.
5710 state = HAS_STUB_SECTION;
5711 stub_table = group_end;
5712 stub_table_end_offset = group_end_offset;
5717 case HAS_STUB_SECTION:
5718 // Adding this section makes the post stub-section group larger
5720 if (section_end_offset - stub_table_end_offset >= group_size)
5722 gold_assert(group_end != this->input_sections().end());
5723 this->create_stub_group(group_begin, group_end, stub_table,
5724 target, &new_relaxed_sections, task);
5733 // If we see an input section and currently there is no group, start
5734 // a new one. Skip any empty sections. We look at the data size
5735 // instead of calling p->relobj()->section_size() to avoid locking.
5736 if ((p->is_input_section() || p->is_relaxed_input_section())
5737 && (p->data_size() != 0))
5739 if (state == NO_GROUP)
5741 state = FINDING_STUB_SECTION;
5743 group_begin_offset = section_begin_offset;
5746 // Keep track of the last input section seen.
5748 group_end_offset = section_end_offset;
5751 off = section_end_offset;
5754 // Create a stub group for any ungrouped sections.
5755 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5757 gold_assert(group_end != this->input_sections().end());
5758 this->create_stub_group(group_begin, group_end,
5759 (state == FINDING_STUB_SECTION
5762 target, &new_relaxed_sections, task);
5765 // Convert input section into relaxed input section in a batch.
5766 if (!new_relaxed_sections.empty())
5767 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5769 // Update the section offsets
5770 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5772 Arm_relobj<big_endian>* arm_relobj =
5773 Arm_relobj<big_endian>::as_arm_relobj(
5774 new_relaxed_sections[i]->relobj());
5775 unsigned int shndx = new_relaxed_sections[i]->shndx();
5776 // Tell Arm_relobj that this input section is converted.
5777 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5781 // Append non empty text sections in this to LIST in ascending
5782 // order of their position in this.
5784 template<bool big_endian>
5786 Arm_output_section<big_endian>::append_text_sections_to_list(
5787 Text_section_list* list)
5789 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5791 for (Input_section_list::const_iterator p = this->input_sections().begin();
5792 p != this->input_sections().end();
5795 // We only care about plain or relaxed input sections. We also
5796 // ignore any merged sections.
5797 if (p->is_input_section() || p->is_relaxed_input_section())
5798 list->push_back(Text_section_list::value_type(p->relobj(),
5803 template<bool big_endian>
5805 Arm_output_section<big_endian>::fix_exidx_coverage(
5807 const Text_section_list& sorted_text_sections,
5808 Symbol_table* symtab,
5809 bool merge_exidx_entries,
5812 // We should only do this for the EXIDX output section.
5813 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5815 // We don't want the relaxation loop to undo these changes, so we discard
5816 // the current saved states and take another one after the fix-up.
5817 this->discard_states();
5819 // Remove all input sections.
5820 uint64_t address = this->address();
5821 typedef std::list<Output_section::Input_section> Input_section_list;
5822 Input_section_list input_sections;
5823 this->reset_address_and_file_offset();
5824 this->get_input_sections(address, std::string(""), &input_sections);
5826 if (!this->input_sections().empty())
5827 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
5829 // Go through all the known input sections and record them.
5830 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5831 typedef Unordered_map<Section_id, const Output_section::Input_section*,
5832 Section_id_hash> Text_to_exidx_map;
5833 Text_to_exidx_map text_to_exidx_map;
5834 for (Input_section_list::const_iterator p = input_sections.begin();
5835 p != input_sections.end();
5838 // This should never happen. At this point, we should only see
5839 // plain EXIDX input sections.
5840 gold_assert(!p->is_relaxed_input_section());
5841 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
5844 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
5846 // Go over the sorted text sections.
5847 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
5848 Section_id_set processed_input_sections;
5849 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
5850 p != sorted_text_sections.end();
5853 Relobj* relobj = p->first;
5854 unsigned int shndx = p->second;
5856 Arm_relobj<big_endian>* arm_relobj =
5857 Arm_relobj<big_endian>::as_arm_relobj(relobj);
5858 const Arm_exidx_input_section* exidx_input_section =
5859 arm_relobj->exidx_input_section_by_link(shndx);
5861 // If this text section has no EXIDX section or if the EXIDX section
5862 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
5863 // of the last seen EXIDX section.
5864 if (exidx_input_section == NULL || exidx_input_section->has_errors())
5866 exidx_fixup.add_exidx_cantunwind_as_needed();
5870 Relobj* exidx_relobj = exidx_input_section->relobj();
5871 unsigned int exidx_shndx = exidx_input_section->shndx();
5872 Section_id sid(exidx_relobj, exidx_shndx);
5873 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
5874 if (iter == text_to_exidx_map.end())
5876 // This is odd. We have not seen this EXIDX input section before.
5877 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
5878 // issue a warning instead. We assume the user knows what he
5879 // or she is doing. Otherwise, this is an error.
5880 if (layout->script_options()->saw_sections_clause())
5881 gold_warning(_("unwinding may not work because EXIDX input section"
5882 " %u of %s is not in EXIDX output section"),
5883 exidx_shndx, exidx_relobj->name().c_str());
5885 gold_error(_("unwinding may not work because EXIDX input section"
5886 " %u of %s is not in EXIDX output section"),
5887 exidx_shndx, exidx_relobj->name().c_str());
5889 exidx_fixup.add_exidx_cantunwind_as_needed();
5893 // We need to access the contents of the EXIDX section, lock the
5895 Task_lock_obj<Object> tl(task, exidx_relobj);
5896 section_size_type exidx_size;
5897 const unsigned char* exidx_contents =
5898 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
5900 // Fix up coverage and append input section to output data list.
5901 Arm_exidx_section_offset_map* section_offset_map = NULL;
5902 uint32_t deleted_bytes =
5903 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
5906 §ion_offset_map);
5908 if (deleted_bytes == exidx_input_section->size())
5910 // The whole EXIDX section got merged. Remove it from output.
5911 gold_assert(section_offset_map == NULL);
5912 exidx_relobj->set_output_section(exidx_shndx, NULL);
5914 // All local symbols defined in this input section will be dropped.
5915 // We need to adjust output local symbol count.
5916 arm_relobj->set_output_local_symbol_count_needs_update();
5918 else if (deleted_bytes > 0)
5920 // Some entries are merged. We need to convert this EXIDX input
5921 // section into a relaxed section.
5922 gold_assert(section_offset_map != NULL);
5924 Arm_exidx_merged_section* merged_section =
5925 new Arm_exidx_merged_section(*exidx_input_section,
5926 *section_offset_map, deleted_bytes);
5927 merged_section->build_contents(exidx_contents, exidx_size);
5929 const std::string secname = exidx_relobj->section_name(exidx_shndx);
5930 this->add_relaxed_input_section(layout, merged_section, secname);
5931 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
5933 // All local symbols defined in discarded portions of this input
5934 // section will be dropped. We need to adjust output local symbol
5936 arm_relobj->set_output_local_symbol_count_needs_update();
5940 // Just add back the EXIDX input section.
5941 gold_assert(section_offset_map == NULL);
5942 const Output_section::Input_section* pis = iter->second;
5943 gold_assert(pis->is_input_section());
5944 this->add_script_input_section(*pis);
5947 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
5950 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
5951 exidx_fixup.add_exidx_cantunwind_as_needed();
5953 // Remove any known EXIDX input sections that are not processed.
5954 for (Input_section_list::const_iterator p = input_sections.begin();
5955 p != input_sections.end();
5958 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
5959 == processed_input_sections.end())
5961 // We discard a known EXIDX section because its linked
5962 // text section has been folded by ICF. We also discard an
5963 // EXIDX section with error, the output does not matter in this
5964 // case. We do this to avoid triggering asserts.
5965 Arm_relobj<big_endian>* arm_relobj =
5966 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5967 const Arm_exidx_input_section* exidx_input_section =
5968 arm_relobj->exidx_input_section_by_shndx(p->shndx());
5969 gold_assert(exidx_input_section != NULL);
5970 if (!exidx_input_section->has_errors())
5972 unsigned int text_shndx = exidx_input_section->link();
5973 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
5976 // Remove this from link. We also need to recount the
5978 p->relobj()->set_output_section(p->shndx(), NULL);
5979 arm_relobj->set_output_local_symbol_count_needs_update();
5983 // Link exidx output section to the first seen output section and
5984 // set correct entry size.
5985 this->set_link_section(exidx_fixup.first_output_text_section());
5986 this->set_entsize(8);
5988 // Make changes permanent.
5989 this->save_states();
5990 this->set_section_offsets_need_adjustment();
5993 // Link EXIDX output sections to text output sections.
5995 template<bool big_endian>
5997 Arm_output_section<big_endian>::set_exidx_section_link()
5999 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6000 if (!this->input_sections().empty())
6002 Input_section_list::const_iterator p = this->input_sections().begin();
6003 Arm_relobj<big_endian>* arm_relobj =
6004 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6005 unsigned exidx_shndx = p->shndx();
6006 const Arm_exidx_input_section* exidx_input_section =
6007 arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6008 gold_assert(exidx_input_section != NULL);
6009 unsigned int text_shndx = exidx_input_section->link();
6010 Output_section* os = arm_relobj->output_section(text_shndx);
6011 this->set_link_section(os);
6015 // Arm_relobj methods.
6017 // Determine if an input section is scannable for stub processing. SHDR is
6018 // the header of the section and SHNDX is the section index. OS is the output
6019 // section for the input section and SYMTAB is the global symbol table used to
6020 // look up ICF information.
6022 template<bool big_endian>
6024 Arm_relobj<big_endian>::section_is_scannable(
6025 const elfcpp::Shdr<32, big_endian>& shdr,
6027 const Output_section* os,
6028 const Symbol_table* symtab)
6030 // Skip any empty sections, unallocated sections or sections whose
6031 // type are not SHT_PROGBITS.
6032 if (shdr.get_sh_size() == 0
6033 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6034 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6037 // Skip any discarded or ICF'ed sections.
6038 if (os == NULL || symtab->is_section_folded(this, shndx))
6041 // If this requires special offset handling, check to see if it is
6042 // a relaxed section. If this is not, then it is a merged section that
6043 // we cannot handle.
6044 if (this->is_output_section_offset_invalid(shndx))
6046 const Output_relaxed_input_section* poris =
6047 os->find_relaxed_input_section(this, shndx);
6055 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6056 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6058 template<bool big_endian>
6060 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6061 const elfcpp::Shdr<32, big_endian>& shdr,
6062 const Relobj::Output_sections& out_sections,
6063 const Symbol_table* symtab,
6064 const unsigned char* pshdrs)
6066 unsigned int sh_type = shdr.get_sh_type();
6067 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6070 // Ignore empty section.
6071 off_t sh_size = shdr.get_sh_size();
6075 // Ignore reloc section with unexpected symbol table. The
6076 // error will be reported in the final link.
6077 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6080 unsigned int reloc_size;
6081 if (sh_type == elfcpp::SHT_REL)
6082 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6084 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6086 // Ignore reloc section with unexpected entsize or uneven size.
6087 // The error will be reported in the final link.
6088 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6091 // Ignore reloc section with bad info. This error will be
6092 // reported in the final link.
6093 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6094 if (index >= this->shnum())
6097 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6098 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6099 return this->section_is_scannable(text_shdr, index,
6100 out_sections[index], symtab);
6103 // Return the output address of either a plain input section or a relaxed
6104 // input section. SHNDX is the section index. We define and use this
6105 // instead of calling Output_section::output_address because that is slow
6106 // for large output.
6108 template<bool big_endian>
6110 Arm_relobj<big_endian>::simple_input_section_output_address(
6114 if (this->is_output_section_offset_invalid(shndx))
6116 const Output_relaxed_input_section* poris =
6117 os->find_relaxed_input_section(this, shndx);
6118 // We do not handle merged sections here.
6119 gold_assert(poris != NULL);
6120 return poris->address();
6123 return os->address() + this->get_output_section_offset(shndx);
6126 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6127 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6129 template<bool big_endian>
6131 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6132 const elfcpp::Shdr<32, big_endian>& shdr,
6135 const Symbol_table* symtab)
6137 if (!this->section_is_scannable(shdr, shndx, os, symtab))
6140 // If the section does not cross any 4K-boundaries, it does not need to
6142 Arm_address address = this->simple_input_section_output_address(shndx, os);
6143 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6149 // Scan a section for Cortex-A8 workaround.
6151 template<bool big_endian>
6153 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6154 const elfcpp::Shdr<32, big_endian>& shdr,
6157 Target_arm<big_endian>* arm_target)
6159 // Look for the first mapping symbol in this section. It should be
6161 Mapping_symbol_position section_start(shndx, 0);
6162 typename Mapping_symbols_info::const_iterator p =
6163 this->mapping_symbols_info_.lower_bound(section_start);
6165 // There are no mapping symbols for this section. Treat it as a data-only
6166 // section. Issue a warning if section is marked as containing
6168 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6170 if ((this->section_flags(shndx) & elfcpp::SHF_EXECINSTR) != 0)
6171 gold_warning(_("cannot scan executable section %u of %s for Cortex-A8 "
6172 "erratum because it has no mapping symbols."),
6173 shndx, this->name().c_str());
6177 Arm_address output_address =
6178 this->simple_input_section_output_address(shndx, os);
6180 // Get the section contents.
6181 section_size_type input_view_size = 0;
6182 const unsigned char* input_view =
6183 this->section_contents(shndx, &input_view_size, false);
6185 // We need to go through the mapping symbols to determine what to
6186 // scan. There are two reasons. First, we should look at THUMB code and
6187 // THUMB code only. Second, we only want to look at the 4K-page boundary
6188 // to speed up the scanning.
6190 while (p != this->mapping_symbols_info_.end()
6191 && p->first.first == shndx)
6193 typename Mapping_symbols_info::const_iterator next =
6194 this->mapping_symbols_info_.upper_bound(p->first);
6196 // Only scan part of a section with THUMB code.
6197 if (p->second == 't')
6199 // Determine the end of this range.
6200 section_size_type span_start =
6201 convert_to_section_size_type(p->first.second);
6202 section_size_type span_end;
6203 if (next != this->mapping_symbols_info_.end()
6204 && next->first.first == shndx)
6205 span_end = convert_to_section_size_type(next->first.second);
6207 span_end = convert_to_section_size_type(shdr.get_sh_size());
6209 if (((span_start + output_address) & ~0xfffUL)
6210 != ((span_end + output_address - 1) & ~0xfffUL))
6212 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6213 span_start, span_end,
6223 // Scan relocations for stub generation.
6225 template<bool big_endian>
6227 Arm_relobj<big_endian>::scan_sections_for_stubs(
6228 Target_arm<big_endian>* arm_target,
6229 const Symbol_table* symtab,
6230 const Layout* layout)
6232 unsigned int shnum = this->shnum();
6233 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6235 // Read the section headers.
6236 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6240 // To speed up processing, we set up hash tables for fast lookup of
6241 // input offsets to output addresses.
6242 this->initialize_input_to_output_maps();
6244 const Relobj::Output_sections& out_sections(this->output_sections());
6246 Relocate_info<32, big_endian> relinfo;
6247 relinfo.symtab = symtab;
6248 relinfo.layout = layout;
6249 relinfo.object = this;
6251 // Do relocation stubs scanning.
6252 const unsigned char* p = pshdrs + shdr_size;
6253 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6255 const elfcpp::Shdr<32, big_endian> shdr(p);
6256 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6259 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6260 Arm_address output_offset = this->get_output_section_offset(index);
6261 Arm_address output_address;
6262 if (output_offset != invalid_address)
6263 output_address = out_sections[index]->address() + output_offset;
6266 // Currently this only happens for a relaxed section.
6267 const Output_relaxed_input_section* poris =
6268 out_sections[index]->find_relaxed_input_section(this, index);
6269 gold_assert(poris != NULL);
6270 output_address = poris->address();
6273 // Get the relocations.
6274 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6278 // Get the section contents. This does work for the case in which
6279 // we modify the contents of an input section. We need to pass the
6280 // output view under such circumstances.
6281 section_size_type input_view_size = 0;
6282 const unsigned char* input_view =
6283 this->section_contents(index, &input_view_size, false);
6285 relinfo.reloc_shndx = i;
6286 relinfo.data_shndx = index;
6287 unsigned int sh_type = shdr.get_sh_type();
6288 unsigned int reloc_size;
6289 if (sh_type == elfcpp::SHT_REL)
6290 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6292 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6294 Output_section* os = out_sections[index];
6295 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6296 shdr.get_sh_size() / reloc_size,
6298 output_offset == invalid_address,
6299 input_view, output_address,
6304 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6305 // after its relocation section, if there is one, is processed for
6306 // relocation stubs. Merging this loop with the one above would have been
6307 // complicated since we would have had to make sure that relocation stub
6308 // scanning is done first.
6309 if (arm_target->fix_cortex_a8())
6311 const unsigned char* p = pshdrs + shdr_size;
6312 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6314 const elfcpp::Shdr<32, big_endian> shdr(p);
6315 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6318 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6323 // After we've done the relocations, we release the hash tables,
6324 // since we no longer need them.
6325 this->free_input_to_output_maps();
6328 // Count the local symbols. The ARM backend needs to know if a symbol
6329 // is a THUMB function or not. For global symbols, it is easy because
6330 // the Symbol object keeps the ELF symbol type. For local symbol it is
6331 // harder because we cannot access this information. So we override the
6332 // do_count_local_symbol in parent and scan local symbols to mark
6333 // THUMB functions. This is not the most efficient way but I do not want to
6334 // slow down other ports by calling a per symbol target hook inside
6335 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6337 template<bool big_endian>
6339 Arm_relobj<big_endian>::do_count_local_symbols(
6340 Stringpool_template<char>* pool,
6341 Stringpool_template<char>* dynpool)
6343 // We need to fix-up the values of any local symbols whose type are
6346 // Ask parent to count the local symbols.
6347 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6348 const unsigned int loccount = this->local_symbol_count();
6352 // Initialize the thumb function bit-vector.
6353 std::vector<bool> empty_vector(loccount, false);
6354 this->local_symbol_is_thumb_function_.swap(empty_vector);
6356 // Read the symbol table section header.
6357 const unsigned int symtab_shndx = this->symtab_shndx();
6358 elfcpp::Shdr<32, big_endian>
6359 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6360 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6362 // Read the local symbols.
6363 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6364 gold_assert(loccount == symtabshdr.get_sh_info());
6365 off_t locsize = loccount * sym_size;
6366 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6367 locsize, true, true);
6369 // For mapping symbol processing, we need to read the symbol names.
6370 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6371 if (strtab_shndx >= this->shnum())
6373 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6377 elfcpp::Shdr<32, big_endian>
6378 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6379 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6381 this->error(_("symbol table name section has wrong type: %u"),
6382 static_cast<unsigned int>(strtabshdr.get_sh_type()));
6385 const char* pnames =
6386 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6387 strtabshdr.get_sh_size(),
6390 // Loop over the local symbols and mark any local symbols pointing
6391 // to THUMB functions.
6393 // Skip the first dummy symbol.
6395 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6396 this->local_values();
6397 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6399 elfcpp::Sym<32, big_endian> sym(psyms);
6400 elfcpp::STT st_type = sym.get_st_type();
6401 Symbol_value<32>& lv((*plocal_values)[i]);
6402 Arm_address input_value = lv.input_value();
6404 // Check to see if this is a mapping symbol.
6405 const char* sym_name = pnames + sym.get_st_name();
6406 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6409 unsigned int input_shndx =
6410 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6411 gold_assert(is_ordinary);
6413 // Strip of LSB in case this is a THUMB symbol.
6414 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6415 this->mapping_symbols_info_[msp] = sym_name[1];
6418 if (st_type == elfcpp::STT_ARM_TFUNC
6419 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6421 // This is a THUMB function. Mark this and canonicalize the
6422 // symbol value by setting LSB.
6423 this->local_symbol_is_thumb_function_[i] = true;
6424 if ((input_value & 1) == 0)
6425 lv.set_input_value(input_value | 1);
6430 // Relocate sections.
6431 template<bool big_endian>
6433 Arm_relobj<big_endian>::do_relocate_sections(
6434 const Symbol_table* symtab,
6435 const Layout* layout,
6436 const unsigned char* pshdrs,
6438 typename Sized_relobj_file<32, big_endian>::Views* pviews)
6440 // Call parent to relocate sections.
6441 Sized_relobj_file<32, big_endian>::do_relocate_sections(symtab, layout,
6442 pshdrs, of, pviews);
6444 // We do not generate stubs if doing a relocatable link.
6445 if (parameters->options().relocatable())
6448 // Relocate stub tables.
6449 unsigned int shnum = this->shnum();
6451 Target_arm<big_endian>* arm_target =
6452 Target_arm<big_endian>::default_target();
6454 Relocate_info<32, big_endian> relinfo;
6455 relinfo.symtab = symtab;
6456 relinfo.layout = layout;
6457 relinfo.object = this;
6459 for (unsigned int i = 1; i < shnum; ++i)
6461 Arm_input_section<big_endian>* arm_input_section =
6462 arm_target->find_arm_input_section(this, i);
6464 if (arm_input_section != NULL
6465 && arm_input_section->is_stub_table_owner()
6466 && !arm_input_section->stub_table()->empty())
6468 // We cannot discard a section if it owns a stub table.
6469 Output_section* os = this->output_section(i);
6470 gold_assert(os != NULL);
6472 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6473 relinfo.reloc_shdr = NULL;
6474 relinfo.data_shndx = i;
6475 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6477 gold_assert((*pviews)[i].view != NULL);
6479 // We are passed the output section view. Adjust it to cover the
6481 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6482 gold_assert((stub_table->address() >= (*pviews)[i].address)
6483 && ((stub_table->address() + stub_table->data_size())
6484 <= (*pviews)[i].address + (*pviews)[i].view_size));
6486 off_t offset = stub_table->address() - (*pviews)[i].address;
6487 unsigned char* view = (*pviews)[i].view + offset;
6488 Arm_address address = stub_table->address();
6489 section_size_type view_size = stub_table->data_size();
6491 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6495 // Apply Cortex A8 workaround if applicable.
6496 if (this->section_has_cortex_a8_workaround(i))
6498 unsigned char* view = (*pviews)[i].view;
6499 Arm_address view_address = (*pviews)[i].address;
6500 section_size_type view_size = (*pviews)[i].view_size;
6501 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6503 // Adjust view to cover section.
6504 Output_section* os = this->output_section(i);
6505 gold_assert(os != NULL);
6506 Arm_address section_address =
6507 this->simple_input_section_output_address(i, os);
6508 uint64_t section_size = this->section_size(i);
6510 gold_assert(section_address >= view_address
6511 && ((section_address + section_size)
6512 <= (view_address + view_size)));
6514 unsigned char* section_view = view + (section_address - view_address);
6516 // Apply the Cortex-A8 workaround to the output address range
6517 // corresponding to this input section.
6518 stub_table->apply_cortex_a8_workaround_to_address_range(
6527 // Find the linked text section of an EXIDX section by looking at the first
6528 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6529 // must be linked to its associated code section via the sh_link field of
6530 // its section header. However, some tools are broken and the link is not
6531 // always set. LD just drops such an EXIDX section silently, causing the
6532 // associated code not unwindabled. Here we try a little bit harder to
6533 // discover the linked code section.
6535 // PSHDR points to the section header of a relocation section of an EXIDX
6536 // section. If we can find a linked text section, return true and
6537 // store the text section index in the location PSHNDX. Otherwise
6540 template<bool big_endian>
6542 Arm_relobj<big_endian>::find_linked_text_section(
6543 const unsigned char* pshdr,
6544 const unsigned char* psyms,
6545 unsigned int* pshndx)
6547 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6549 // If there is no relocation, we cannot find the linked text section.
6551 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6552 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6554 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6555 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6557 // Get the relocations.
6558 const unsigned char* prelocs =
6559 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6561 // Find the REL31 relocation for the first word of the first EXIDX entry.
6562 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6564 Arm_address r_offset;
6565 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6566 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6568 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6569 r_info = reloc.get_r_info();
6570 r_offset = reloc.get_r_offset();
6574 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6575 r_info = reloc.get_r_info();
6576 r_offset = reloc.get_r_offset();
6579 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6580 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6583 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6585 || r_sym >= this->local_symbol_count()
6589 // This is the relocation for the first word of the first EXIDX entry.
6590 // We expect to see a local section symbol.
6591 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6592 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6593 if (sym.get_st_type() == elfcpp::STT_SECTION)
6597 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6598 gold_assert(is_ordinary);
6608 // Make an EXIDX input section object for an EXIDX section whose index is
6609 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6610 // is the section index of the linked text section.
6612 template<bool big_endian>
6614 Arm_relobj<big_endian>::make_exidx_input_section(
6616 const elfcpp::Shdr<32, big_endian>& shdr,
6617 unsigned int text_shndx,
6618 const elfcpp::Shdr<32, big_endian>& text_shdr)
6620 // Create an Arm_exidx_input_section object for this EXIDX section.
6621 Arm_exidx_input_section* exidx_input_section =
6622 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6623 shdr.get_sh_addralign(),
6624 text_shdr.get_sh_size());
6626 gold_assert(this->exidx_section_map_[shndx] == NULL);
6627 this->exidx_section_map_[shndx] = exidx_input_section;
6629 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6631 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6632 this->section_name(shndx).c_str(), shndx, text_shndx,
6633 this->name().c_str());
6634 exidx_input_section->set_has_errors();
6636 else if (this->exidx_section_map_[text_shndx] != NULL)
6638 unsigned other_exidx_shndx =
6639 this->exidx_section_map_[text_shndx]->shndx();
6640 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6642 this->section_name(shndx).c_str(), shndx,
6643 this->section_name(other_exidx_shndx).c_str(),
6644 other_exidx_shndx, this->section_name(text_shndx).c_str(),
6645 text_shndx, this->name().c_str());
6646 exidx_input_section->set_has_errors();
6649 this->exidx_section_map_[text_shndx] = exidx_input_section;
6651 // Check section flags of text section.
6652 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6654 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6656 this->section_name(shndx).c_str(), shndx,
6657 this->section_name(text_shndx).c_str(), text_shndx,
6658 this->name().c_str());
6659 exidx_input_section->set_has_errors();
6661 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6662 // I would like to make this an error but currently ld just ignores
6664 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6666 this->section_name(shndx).c_str(), shndx,
6667 this->section_name(text_shndx).c_str(), text_shndx,
6668 this->name().c_str());
6671 // Read the symbol information.
6673 template<bool big_endian>
6675 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6677 // Call parent class to read symbol information.
6678 Sized_relobj_file<32, big_endian>::do_read_symbols(sd);
6680 // If this input file is a binary file, it has no processor
6681 // specific flags and attributes section.
6682 Input_file::Format format = this->input_file()->format();
6683 if (format != Input_file::FORMAT_ELF)
6685 gold_assert(format == Input_file::FORMAT_BINARY);
6686 this->merge_flags_and_attributes_ = false;
6690 // Read processor-specific flags in ELF file header.
6691 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6692 elfcpp::Elf_sizes<32>::ehdr_size,
6694 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6695 this->processor_specific_flags_ = ehdr.get_e_flags();
6697 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6699 std::vector<unsigned int> deferred_exidx_sections;
6700 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6701 const unsigned char* pshdrs = sd->section_headers->data();
6702 const unsigned char* ps = pshdrs + shdr_size;
6703 bool must_merge_flags_and_attributes = false;
6704 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6706 elfcpp::Shdr<32, big_endian> shdr(ps);
6708 // Sometimes an object has no contents except the section name string
6709 // table and an empty symbol table with the undefined symbol. We
6710 // don't want to merge processor-specific flags from such an object.
6711 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6713 // Symbol table is not empty.
6714 const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6715 elfcpp::Elf_sizes<32>::sym_size;
6716 if (shdr.get_sh_size() > sym_size)
6717 must_merge_flags_and_attributes = true;
6719 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6720 // If this is neither an empty symbol table nor a string table,
6722 must_merge_flags_and_attributes = true;
6724 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6726 gold_assert(this->attributes_section_data_ == NULL);
6727 section_offset_type section_offset = shdr.get_sh_offset();
6728 section_size_type section_size =
6729 convert_to_section_size_type(shdr.get_sh_size());
6730 const unsigned char* view =
6731 this->get_view(section_offset, section_size, true, false);
6732 this->attributes_section_data_ =
6733 new Attributes_section_data(view, section_size);
6735 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6737 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6738 if (text_shndx == elfcpp::SHN_UNDEF)
6739 deferred_exidx_sections.push_back(i);
6742 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6743 + text_shndx * shdr_size);
6744 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6746 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6747 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6748 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6749 this->section_name(i).c_str(), this->name().c_str());
6754 if (!must_merge_flags_and_attributes)
6756 gold_assert(deferred_exidx_sections.empty());
6757 this->merge_flags_and_attributes_ = false;
6761 // Some tools are broken and they do not set the link of EXIDX sections.
6762 // We look at the first relocation to figure out the linked sections.
6763 if (!deferred_exidx_sections.empty())
6765 // We need to go over the section headers again to find the mapping
6766 // from sections being relocated to their relocation sections. This is
6767 // a bit inefficient as we could do that in the loop above. However,
6768 // we do not expect any deferred EXIDX sections normally. So we do not
6769 // want to slow down the most common path.
6770 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
6771 Reloc_map reloc_map;
6772 ps = pshdrs + shdr_size;
6773 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6775 elfcpp::Shdr<32, big_endian> shdr(ps);
6776 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
6777 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
6779 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
6780 if (info_shndx >= this->shnum())
6781 gold_error(_("relocation section %u has invalid info %u"),
6783 Reloc_map::value_type value(info_shndx, i);
6784 std::pair<Reloc_map::iterator, bool> result =
6785 reloc_map.insert(value);
6787 gold_error(_("section %u has multiple relocation sections "
6789 info_shndx, i, reloc_map[info_shndx]);
6793 // Read the symbol table section header.
6794 const unsigned int symtab_shndx = this->symtab_shndx();
6795 elfcpp::Shdr<32, big_endian>
6796 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6797 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6799 // Read the local symbols.
6800 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6801 const unsigned int loccount = this->local_symbol_count();
6802 gold_assert(loccount == symtabshdr.get_sh_info());
6803 off_t locsize = loccount * sym_size;
6804 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6805 locsize, true, true);
6807 // Process the deferred EXIDX sections.
6808 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
6810 unsigned int shndx = deferred_exidx_sections[i];
6811 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
6812 unsigned int text_shndx = elfcpp::SHN_UNDEF;
6813 Reloc_map::const_iterator it = reloc_map.find(shndx);
6814 if (it != reloc_map.end())
6815 find_linked_text_section(pshdrs + it->second * shdr_size,
6816 psyms, &text_shndx);
6817 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6818 + text_shndx * shdr_size);
6819 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
6824 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
6825 // sections for unwinding. These sections are referenced implicitly by
6826 // text sections linked in the section headers. If we ignore these implicit
6827 // references, the .ARM.exidx sections and any .ARM.extab sections they use
6828 // will be garbage-collected incorrectly. Hence we override the same function
6829 // in the base class to handle these implicit references.
6831 template<bool big_endian>
6833 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
6835 Read_relocs_data* rd)
6837 // First, call base class method to process relocations in this object.
6838 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
6840 // If --gc-sections is not specified, there is nothing more to do.
6841 // This happens when --icf is used but --gc-sections is not.
6842 if (!parameters->options().gc_sections())
6845 unsigned int shnum = this->shnum();
6846 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6847 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6851 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
6852 // to these from the linked text sections.
6853 const unsigned char* ps = pshdrs + shdr_size;
6854 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
6856 elfcpp::Shdr<32, big_endian> shdr(ps);
6857 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6859 // Found an .ARM.exidx section, add it to the set of reachable
6860 // sections from its linked text section.
6861 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6862 symtab->gc()->add_reference(this, text_shndx, this, i);
6867 // Update output local symbol count. Owing to EXIDX entry merging, some local
6868 // symbols will be removed in output. Adjust output local symbol count
6869 // accordingly. We can only changed the static output local symbol count. It
6870 // is too late to change the dynamic symbols.
6872 template<bool big_endian>
6874 Arm_relobj<big_endian>::update_output_local_symbol_count()
6876 // Caller should check that this needs updating. We want caller checking
6877 // because output_local_symbol_count_needs_update() is most likely inlined.
6878 gold_assert(this->output_local_symbol_count_needs_update_);
6880 gold_assert(this->symtab_shndx() != -1U);
6881 if (this->symtab_shndx() == 0)
6883 // This object has no symbols. Weird but legal.
6887 // Read the symbol table section header.
6888 const unsigned int symtab_shndx = this->symtab_shndx();
6889 elfcpp::Shdr<32, big_endian>
6890 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6891 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6893 // Read the local symbols.
6894 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6895 const unsigned int loccount = this->local_symbol_count();
6896 gold_assert(loccount == symtabshdr.get_sh_info());
6897 off_t locsize = loccount * sym_size;
6898 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6899 locsize, true, true);
6901 // Loop over the local symbols.
6903 typedef typename Sized_relobj_file<32, big_endian>::Output_sections
6905 const Output_sections& out_sections(this->output_sections());
6906 unsigned int shnum = this->shnum();
6907 unsigned int count = 0;
6908 // Skip the first, dummy, symbol.
6910 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6912 elfcpp::Sym<32, big_endian> sym(psyms);
6914 Symbol_value<32>& lv((*this->local_values())[i]);
6916 // This local symbol was already discarded by do_count_local_symbols.
6917 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
6921 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
6926 Output_section* os = out_sections[shndx];
6928 // This local symbol no longer has an output section. Discard it.
6931 lv.set_no_output_symtab_entry();
6935 // Currently we only discard parts of EXIDX input sections.
6936 // We explicitly check for a merged EXIDX input section to avoid
6937 // calling Output_section_data::output_offset unless necessary.
6938 if ((this->get_output_section_offset(shndx) == invalid_address)
6939 && (this->exidx_input_section_by_shndx(shndx) != NULL))
6941 section_offset_type output_offset =
6942 os->output_offset(this, shndx, lv.input_value());
6943 if (output_offset == -1)
6945 // This symbol is defined in a part of an EXIDX input section
6946 // that is discarded due to entry merging.
6947 lv.set_no_output_symtab_entry();
6956 this->set_output_local_symbol_count(count);
6957 this->output_local_symbol_count_needs_update_ = false;
6960 // Arm_dynobj methods.
6962 // Read the symbol information.
6964 template<bool big_endian>
6966 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6968 // Call parent class to read symbol information.
6969 Sized_dynobj<32, big_endian>::do_read_symbols(sd);
6971 // Read processor-specific flags in ELF file header.
6972 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6973 elfcpp::Elf_sizes<32>::ehdr_size,
6975 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6976 this->processor_specific_flags_ = ehdr.get_e_flags();
6978 // Read the attributes section if there is one.
6979 // We read from the end because gas seems to put it near the end of
6980 // the section headers.
6981 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6982 const unsigned char* ps =
6983 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
6984 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
6986 elfcpp::Shdr<32, big_endian> shdr(ps);
6987 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6989 section_offset_type section_offset = shdr.get_sh_offset();
6990 section_size_type section_size =
6991 convert_to_section_size_type(shdr.get_sh_size());
6992 const unsigned char* view =
6993 this->get_view(section_offset, section_size, true, false);
6994 this->attributes_section_data_ =
6995 new Attributes_section_data(view, section_size);
7001 // Stub_addend_reader methods.
7003 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7005 template<bool big_endian>
7006 elfcpp::Elf_types<32>::Elf_Swxword
7007 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7008 unsigned int r_type,
7009 const unsigned char* view,
7010 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7012 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7016 case elfcpp::R_ARM_CALL:
7017 case elfcpp::R_ARM_JUMP24:
7018 case elfcpp::R_ARM_PLT32:
7020 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7021 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7022 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7023 return Bits<26>::sign_extend32(val << 2);
7026 case elfcpp::R_ARM_THM_CALL:
7027 case elfcpp::R_ARM_THM_JUMP24:
7028 case elfcpp::R_ARM_THM_XPC22:
7030 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7031 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7032 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7033 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7034 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7037 case elfcpp::R_ARM_THM_JUMP19:
7039 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7040 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7041 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7042 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7043 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7051 // Arm_output_data_got methods.
7053 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7054 // The first one is initialized to be 1, which is the module index for
7055 // the main executable and the second one 0. A reloc of the type
7056 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7057 // be applied by gold. GSYM is a global symbol.
7059 template<bool big_endian>
7061 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7062 unsigned int got_type,
7065 if (gsym->has_got_offset(got_type))
7068 // We are doing a static link. Just mark it as belong to module 1,
7070 unsigned int got_offset = this->add_constant(1);
7071 gsym->set_got_offset(got_type, got_offset);
7072 got_offset = this->add_constant(0);
7073 this->static_relocs_.push_back(Static_reloc(got_offset,
7074 elfcpp::R_ARM_TLS_DTPOFF32,
7078 // Same as the above but for a local symbol.
7080 template<bool big_endian>
7082 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7083 unsigned int got_type,
7084 Sized_relobj_file<32, big_endian>* object,
7087 if (object->local_has_got_offset(index, got_type))
7090 // We are doing a static link. Just mark it as belong to module 1,
7092 unsigned int got_offset = this->add_constant(1);
7093 object->set_local_got_offset(index, got_type, got_offset);
7094 got_offset = this->add_constant(0);
7095 this->static_relocs_.push_back(Static_reloc(got_offset,
7096 elfcpp::R_ARM_TLS_DTPOFF32,
7100 template<bool big_endian>
7102 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7104 // Call parent to write out GOT.
7105 Output_data_got<32, big_endian>::do_write(of);
7107 // We are done if there is no fix up.
7108 if (this->static_relocs_.empty())
7111 gold_assert(parameters->doing_static_link());
7113 const off_t offset = this->offset();
7114 const section_size_type oview_size =
7115 convert_to_section_size_type(this->data_size());
7116 unsigned char* const oview = of->get_output_view(offset, oview_size);
7118 Output_segment* tls_segment = this->layout_->tls_segment();
7119 gold_assert(tls_segment != NULL);
7121 // The thread pointer $tp points to the TCB, which is followed by the
7122 // TLS. So we need to adjust $tp relative addressing by this amount.
7123 Arm_address aligned_tcb_size =
7124 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7126 for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7128 Static_reloc& reloc(this->static_relocs_[i]);
7131 if (!reloc.symbol_is_global())
7133 Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7134 const Symbol_value<32>* psymval =
7135 reloc.relobj()->local_symbol(reloc.index());
7137 // We are doing static linking. Issue an error and skip this
7138 // relocation if the symbol is undefined or in a discarded_section.
7140 unsigned int shndx = psymval->input_shndx(&is_ordinary);
7141 if ((shndx == elfcpp::SHN_UNDEF)
7143 && shndx != elfcpp::SHN_UNDEF
7144 && !object->is_section_included(shndx)
7145 && !this->symbol_table_->is_section_folded(object, shndx)))
7147 gold_error(_("undefined or discarded local symbol %u from "
7148 " object %s in GOT"),
7149 reloc.index(), reloc.relobj()->name().c_str());
7153 value = psymval->value(object, 0);
7157 const Symbol* gsym = reloc.symbol();
7158 gold_assert(gsym != NULL);
7159 if (gsym->is_forwarder())
7160 gsym = this->symbol_table_->resolve_forwards(gsym);
7162 // We are doing static linking. Issue an error and skip this
7163 // relocation if the symbol is undefined or in a discarded_section
7164 // unless it is a weakly_undefined symbol.
7165 if ((gsym->is_defined_in_discarded_section()
7166 || gsym->is_undefined())
7167 && !gsym->is_weak_undefined())
7169 gold_error(_("undefined or discarded symbol %s in GOT"),
7174 if (!gsym->is_weak_undefined())
7176 const Sized_symbol<32>* sym =
7177 static_cast<const Sized_symbol<32>*>(gsym);
7178 value = sym->value();
7184 unsigned got_offset = reloc.got_offset();
7185 gold_assert(got_offset < oview_size);
7187 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7188 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7190 switch (reloc.r_type())
7192 case elfcpp::R_ARM_TLS_DTPOFF32:
7195 case elfcpp::R_ARM_TLS_TPOFF32:
7196 x = value + aligned_tcb_size;
7201 elfcpp::Swap<32, big_endian>::writeval(wv, x);
7204 of->write_output_view(offset, oview_size, oview);
7207 // A class to handle the PLT data.
7208 // This is an abstract base class that handles most of the linker details
7209 // but does not know the actual contents of PLT entries. The derived
7210 // classes below fill in those details.
7212 template<bool big_endian>
7213 class Output_data_plt_arm : public Output_section_data
7216 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7219 Output_data_plt_arm(Layout*, uint64_t addralign, Output_data_space*);
7221 // Add an entry to the PLT.
7223 add_entry(Symbol* gsym);
7225 // Return the .rel.plt section data.
7226 const Reloc_section*
7228 { return this->rel_; }
7230 // Return the number of PLT entries.
7233 { return this->count_; }
7235 // Return the offset of the first non-reserved PLT entry.
7237 first_plt_entry_offset() const
7238 { return this->do_first_plt_entry_offset(); }
7240 // Return the size of a PLT entry.
7242 get_plt_entry_size() const
7243 { return this->do_get_plt_entry_size(); }
7246 // Fill in the first PLT entry.
7248 fill_first_plt_entry(unsigned char* pov,
7249 Arm_address got_address,
7250 Arm_address plt_address)
7251 { this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7254 fill_plt_entry(unsigned char* pov,
7255 Arm_address got_address,
7256 Arm_address plt_address,
7257 unsigned int got_offset,
7258 unsigned int plt_offset)
7259 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7261 virtual unsigned int
7262 do_first_plt_entry_offset() const = 0;
7264 virtual unsigned int
7265 do_get_plt_entry_size() const = 0;
7268 do_fill_first_plt_entry(unsigned char* pov,
7269 Arm_address got_address,
7270 Arm_address plt_address) = 0;
7273 do_fill_plt_entry(unsigned char* pov,
7274 Arm_address got_address,
7275 Arm_address plt_address,
7276 unsigned int got_offset,
7277 unsigned int plt_offset) = 0;
7280 do_adjust_output_section(Output_section* os);
7282 // Write to a map file.
7284 do_print_to_mapfile(Mapfile* mapfile) const
7285 { mapfile->print_output_data(this, _("** PLT")); }
7288 // Set the final size.
7290 set_final_data_size()
7292 this->set_data_size(this->first_plt_entry_offset()
7293 + this->count_ * this->get_plt_entry_size());
7296 // Write out the PLT data.
7298 do_write(Output_file*);
7300 // The reloc section.
7301 Reloc_section* rel_;
7302 // The .got.plt section.
7303 Output_data_space* got_plt_;
7304 // The number of PLT entries.
7305 unsigned int count_;
7308 // Create the PLT section. The ordinary .got section is an argument,
7309 // since we need to refer to the start. We also create our own .got
7310 // section just for PLT entries.
7312 template<bool big_endian>
7313 Output_data_plt_arm<big_endian>::Output_data_plt_arm(Layout* layout,
7315 Output_data_space* got_plt)
7316 : Output_section_data(addralign), got_plt_(got_plt), count_(0)
7318 this->rel_ = new Reloc_section(false);
7319 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7320 elfcpp::SHF_ALLOC, this->rel_,
7321 ORDER_DYNAMIC_PLT_RELOCS, false);
7324 template<bool big_endian>
7326 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7331 // Add an entry to the PLT.
7333 template<bool big_endian>
7335 Output_data_plt_arm<big_endian>::add_entry(Symbol* gsym)
7337 gold_assert(!gsym->has_plt_offset());
7339 // Note that when setting the PLT offset we skip the initial
7340 // reserved PLT entry.
7341 gsym->set_plt_offset((this->count_) * this->get_plt_entry_size()
7342 + this->first_plt_entry_offset());
7346 section_offset_type got_offset = this->got_plt_->current_data_size();
7348 // Every PLT entry needs a GOT entry which points back to the PLT
7349 // entry (this will be changed by the dynamic linker, normally
7350 // lazily when the function is called).
7351 this->got_plt_->set_current_data_size(got_offset + 4);
7353 // Every PLT entry needs a reloc.
7354 gsym->set_needs_dynsym_entry();
7355 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7358 // Note that we don't need to save the symbol. The contents of the
7359 // PLT are independent of which symbols are used. The symbols only
7360 // appear in the relocations.
7363 template<bool big_endian>
7364 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7367 Output_data_plt_arm_standard(Layout* layout, Output_data_space* got_plt)
7368 : Output_data_plt_arm<big_endian>(layout, 4, got_plt)
7372 // Return the offset of the first non-reserved PLT entry.
7373 virtual unsigned int
7374 do_first_plt_entry_offset() const
7375 { return sizeof(first_plt_entry); }
7377 // Return the size of a PLT entry.
7378 virtual unsigned int
7379 do_get_plt_entry_size() const
7380 { return sizeof(plt_entry); }
7383 do_fill_first_plt_entry(unsigned char* pov,
7384 Arm_address got_address,
7385 Arm_address plt_address);
7388 do_fill_plt_entry(unsigned char* pov,
7389 Arm_address got_address,
7390 Arm_address plt_address,
7391 unsigned int got_offset,
7392 unsigned int plt_offset);
7395 // Template for the first PLT entry.
7396 static const uint32_t first_plt_entry[5];
7398 // Template for subsequent PLT entries.
7399 static const uint32_t plt_entry[3];
7403 // FIXME: This is not very flexible. Right now this has only been tested
7404 // on armv5te. If we are to support additional architecture features like
7405 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7407 // The first entry in the PLT.
7408 template<bool big_endian>
7409 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7411 0xe52de004, // str lr, [sp, #-4]!
7412 0xe59fe004, // ldr lr, [pc, #4]
7413 0xe08fe00e, // add lr, pc, lr
7414 0xe5bef008, // ldr pc, [lr, #8]!
7415 0x00000000, // &GOT[0] - .
7418 template<bool big_endian>
7420 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7422 Arm_address got_address,
7423 Arm_address plt_address)
7425 // Write first PLT entry. All but the last word are constants.
7426 const size_t num_first_plt_words = (sizeof(first_plt_entry)
7427 / sizeof(plt_entry[0]));
7428 for (size_t i = 0; i < num_first_plt_words - 1; i++)
7429 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
7430 // Last word in first PLT entry is &GOT[0] - .
7431 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7432 got_address - (plt_address + 16));
7435 // Subsequent entries in the PLT.
7437 template<bool big_endian>
7438 const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
7440 0xe28fc600, // add ip, pc, #0xNN00000
7441 0xe28cca00, // add ip, ip, #0xNN000
7442 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7445 template<bool big_endian>
7447 Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
7449 Arm_address got_address,
7450 Arm_address plt_address,
7451 unsigned int got_offset,
7452 unsigned int plt_offset)
7454 int32_t offset = ((got_address + got_offset)
7455 - (plt_address + plt_offset + 8));
7457 gold_assert(offset >= 0 && offset < 0x0fffffff);
7458 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7459 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7460 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7461 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7462 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7463 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
7466 // Write out the PLT. This uses the hand-coded instructions above,
7467 // and adjusts them as needed. This is all specified by the arm ELF
7468 // Processor Supplement.
7470 template<bool big_endian>
7472 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
7474 const off_t offset = this->offset();
7475 const section_size_type oview_size =
7476 convert_to_section_size_type(this->data_size());
7477 unsigned char* const oview = of->get_output_view(offset, oview_size);
7479 const off_t got_file_offset = this->got_plt_->offset();
7480 const section_size_type got_size =
7481 convert_to_section_size_type(this->got_plt_->data_size());
7482 unsigned char* const got_view = of->get_output_view(got_file_offset,
7484 unsigned char* pov = oview;
7486 Arm_address plt_address = this->address();
7487 Arm_address got_address = this->got_plt_->address();
7489 // Write first PLT entry.
7490 this->fill_first_plt_entry(pov, got_address, plt_address);
7491 pov += this->first_plt_entry_offset();
7493 unsigned char* got_pov = got_view;
7495 memset(got_pov, 0, 12);
7498 unsigned int plt_offset = this->first_plt_entry_offset();
7499 unsigned int got_offset = 12;
7500 const unsigned int count = this->count_;
7501 for (unsigned int i = 0;
7504 pov += this->get_plt_entry_size(),
7506 plt_offset += this->get_plt_entry_size(),
7509 // Set and adjust the PLT entry itself.
7510 this->fill_plt_entry(pov, got_address, plt_address,
7511 got_offset, plt_offset);
7513 // Set the entry in the GOT.
7514 elfcpp::Swap<32, big_endian>::writeval(got_pov, plt_address);
7517 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
7518 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
7520 of->write_output_view(offset, oview_size, oview);
7521 of->write_output_view(got_file_offset, got_size, got_view);
7524 // Create a PLT entry for a global symbol.
7526 template<bool big_endian>
7528 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
7531 if (gsym->has_plt_offset())
7534 if (this->plt_ == NULL)
7536 // Create the GOT sections first.
7537 this->got_section(symtab, layout);
7539 this->plt_ = this->make_data_plt(layout, this->got_plt_);
7541 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
7543 | elfcpp::SHF_EXECINSTR),
7544 this->plt_, ORDER_PLT, false);
7546 this->plt_->add_entry(gsym);
7549 // Return the number of entries in the PLT.
7551 template<bool big_endian>
7553 Target_arm<big_endian>::plt_entry_count() const
7555 if (this->plt_ == NULL)
7557 return this->plt_->entry_count();
7560 // Return the offset of the first non-reserved PLT entry.
7562 template<bool big_endian>
7564 Target_arm<big_endian>::first_plt_entry_offset() const
7566 return this->plt_->first_plt_entry_offset();
7569 // Return the size of each PLT entry.
7571 template<bool big_endian>
7573 Target_arm<big_endian>::plt_entry_size() const
7575 return this->plt_->get_plt_entry_size();
7578 // Get the section to use for TLS_DESC relocations.
7580 template<bool big_endian>
7581 typename Target_arm<big_endian>::Reloc_section*
7582 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
7584 return this->plt_section()->rel_tls_desc(layout);
7587 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
7589 template<bool big_endian>
7591 Target_arm<big_endian>::define_tls_base_symbol(
7592 Symbol_table* symtab,
7595 if (this->tls_base_symbol_defined_)
7598 Output_segment* tls_segment = layout->tls_segment();
7599 if (tls_segment != NULL)
7601 bool is_exec = parameters->options().output_is_executable();
7602 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
7603 Symbol_table::PREDEFINED,
7607 elfcpp::STV_HIDDEN, 0,
7609 ? Symbol::SEGMENT_END
7610 : Symbol::SEGMENT_START),
7613 this->tls_base_symbol_defined_ = true;
7616 // Create a GOT entry for the TLS module index.
7618 template<bool big_endian>
7620 Target_arm<big_endian>::got_mod_index_entry(
7621 Symbol_table* symtab,
7623 Sized_relobj_file<32, big_endian>* object)
7625 if (this->got_mod_index_offset_ == -1U)
7627 gold_assert(symtab != NULL && layout != NULL && object != NULL);
7628 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
7629 unsigned int got_offset;
7630 if (!parameters->doing_static_link())
7632 got_offset = got->add_constant(0);
7633 Reloc_section* rel_dyn = this->rel_dyn_section(layout);
7634 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
7639 // We are doing a static link. Just mark it as belong to module 1,
7641 got_offset = got->add_constant(1);
7644 got->add_constant(0);
7645 this->got_mod_index_offset_ = got_offset;
7647 return this->got_mod_index_offset_;
7650 // Optimize the TLS relocation type based on what we know about the
7651 // symbol. IS_FINAL is true if the final address of this symbol is
7652 // known at link time.
7654 template<bool big_endian>
7655 tls::Tls_optimization
7656 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
7658 // FIXME: Currently we do not do any TLS optimization.
7659 return tls::TLSOPT_NONE;
7662 // Get the Reference_flags for a particular relocation.
7664 template<bool big_endian>
7666 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
7670 case elfcpp::R_ARM_NONE:
7671 case elfcpp::R_ARM_V4BX:
7672 case elfcpp::R_ARM_GNU_VTENTRY:
7673 case elfcpp::R_ARM_GNU_VTINHERIT:
7674 // No symbol reference.
7677 case elfcpp::R_ARM_ABS32:
7678 case elfcpp::R_ARM_ABS16:
7679 case elfcpp::R_ARM_ABS12:
7680 case elfcpp::R_ARM_THM_ABS5:
7681 case elfcpp::R_ARM_ABS8:
7682 case elfcpp::R_ARM_BASE_ABS:
7683 case elfcpp::R_ARM_MOVW_ABS_NC:
7684 case elfcpp::R_ARM_MOVT_ABS:
7685 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7686 case elfcpp::R_ARM_THM_MOVT_ABS:
7687 case elfcpp::R_ARM_ABS32_NOI:
7688 return Symbol::ABSOLUTE_REF;
7690 case elfcpp::R_ARM_REL32:
7691 case elfcpp::R_ARM_LDR_PC_G0:
7692 case elfcpp::R_ARM_SBREL32:
7693 case elfcpp::R_ARM_THM_PC8:
7694 case elfcpp::R_ARM_BASE_PREL:
7695 case elfcpp::R_ARM_MOVW_PREL_NC:
7696 case elfcpp::R_ARM_MOVT_PREL:
7697 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7698 case elfcpp::R_ARM_THM_MOVT_PREL:
7699 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7700 case elfcpp::R_ARM_THM_PC12:
7701 case elfcpp::R_ARM_REL32_NOI:
7702 case elfcpp::R_ARM_ALU_PC_G0_NC:
7703 case elfcpp::R_ARM_ALU_PC_G0:
7704 case elfcpp::R_ARM_ALU_PC_G1_NC:
7705 case elfcpp::R_ARM_ALU_PC_G1:
7706 case elfcpp::R_ARM_ALU_PC_G2:
7707 case elfcpp::R_ARM_LDR_PC_G1:
7708 case elfcpp::R_ARM_LDR_PC_G2:
7709 case elfcpp::R_ARM_LDRS_PC_G0:
7710 case elfcpp::R_ARM_LDRS_PC_G1:
7711 case elfcpp::R_ARM_LDRS_PC_G2:
7712 case elfcpp::R_ARM_LDC_PC_G0:
7713 case elfcpp::R_ARM_LDC_PC_G1:
7714 case elfcpp::R_ARM_LDC_PC_G2:
7715 case elfcpp::R_ARM_ALU_SB_G0_NC:
7716 case elfcpp::R_ARM_ALU_SB_G0:
7717 case elfcpp::R_ARM_ALU_SB_G1_NC:
7718 case elfcpp::R_ARM_ALU_SB_G1:
7719 case elfcpp::R_ARM_ALU_SB_G2:
7720 case elfcpp::R_ARM_LDR_SB_G0:
7721 case elfcpp::R_ARM_LDR_SB_G1:
7722 case elfcpp::R_ARM_LDR_SB_G2:
7723 case elfcpp::R_ARM_LDRS_SB_G0:
7724 case elfcpp::R_ARM_LDRS_SB_G1:
7725 case elfcpp::R_ARM_LDRS_SB_G2:
7726 case elfcpp::R_ARM_LDC_SB_G0:
7727 case elfcpp::R_ARM_LDC_SB_G1:
7728 case elfcpp::R_ARM_LDC_SB_G2:
7729 case elfcpp::R_ARM_MOVW_BREL_NC:
7730 case elfcpp::R_ARM_MOVT_BREL:
7731 case elfcpp::R_ARM_MOVW_BREL:
7732 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7733 case elfcpp::R_ARM_THM_MOVT_BREL:
7734 case elfcpp::R_ARM_THM_MOVW_BREL:
7735 case elfcpp::R_ARM_GOTOFF32:
7736 case elfcpp::R_ARM_GOTOFF12:
7737 case elfcpp::R_ARM_SBREL31:
7738 return Symbol::RELATIVE_REF;
7740 case elfcpp::R_ARM_PLT32:
7741 case elfcpp::R_ARM_CALL:
7742 case elfcpp::R_ARM_JUMP24:
7743 case elfcpp::R_ARM_THM_CALL:
7744 case elfcpp::R_ARM_THM_JUMP24:
7745 case elfcpp::R_ARM_THM_JUMP19:
7746 case elfcpp::R_ARM_THM_JUMP6:
7747 case elfcpp::R_ARM_THM_JUMP11:
7748 case elfcpp::R_ARM_THM_JUMP8:
7749 // R_ARM_PREL31 is not used to relocate call/jump instructions but
7750 // in unwind tables. It may point to functions via PLTs.
7751 // So we treat it like call/jump relocations above.
7752 case elfcpp::R_ARM_PREL31:
7753 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
7755 case elfcpp::R_ARM_GOT_BREL:
7756 case elfcpp::R_ARM_GOT_ABS:
7757 case elfcpp::R_ARM_GOT_PREL:
7759 return Symbol::ABSOLUTE_REF;
7761 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
7762 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
7763 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
7764 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
7765 case elfcpp::R_ARM_TLS_LE32: // Local-exec
7766 return Symbol::TLS_REF;
7768 case elfcpp::R_ARM_TARGET1:
7769 case elfcpp::R_ARM_TARGET2:
7770 case elfcpp::R_ARM_COPY:
7771 case elfcpp::R_ARM_GLOB_DAT:
7772 case elfcpp::R_ARM_JUMP_SLOT:
7773 case elfcpp::R_ARM_RELATIVE:
7774 case elfcpp::R_ARM_PC24:
7775 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
7776 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
7777 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
7779 // Not expected. We will give an error later.
7784 // Report an unsupported relocation against a local symbol.
7786 template<bool big_endian>
7788 Target_arm<big_endian>::Scan::unsupported_reloc_local(
7789 Sized_relobj_file<32, big_endian>* object,
7790 unsigned int r_type)
7792 gold_error(_("%s: unsupported reloc %u against local symbol"),
7793 object->name().c_str(), r_type);
7796 // We are about to emit a dynamic relocation of type R_TYPE. If the
7797 // dynamic linker does not support it, issue an error. The GNU linker
7798 // only issues a non-PIC error for an allocated read-only section.
7799 // Here we know the section is allocated, but we don't know that it is
7800 // read-only. But we check for all the relocation types which the
7801 // glibc dynamic linker supports, so it seems appropriate to issue an
7802 // error even if the section is not read-only.
7804 template<bool big_endian>
7806 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
7807 unsigned int r_type)
7811 // These are the relocation types supported by glibc for ARM.
7812 case elfcpp::R_ARM_RELATIVE:
7813 case elfcpp::R_ARM_COPY:
7814 case elfcpp::R_ARM_GLOB_DAT:
7815 case elfcpp::R_ARM_JUMP_SLOT:
7816 case elfcpp::R_ARM_ABS32:
7817 case elfcpp::R_ARM_ABS32_NOI:
7818 case elfcpp::R_ARM_PC24:
7819 // FIXME: The following 3 types are not supported by Android's dynamic
7821 case elfcpp::R_ARM_TLS_DTPMOD32:
7822 case elfcpp::R_ARM_TLS_DTPOFF32:
7823 case elfcpp::R_ARM_TLS_TPOFF32:
7828 // This prevents us from issuing more than one error per reloc
7829 // section. But we can still wind up issuing more than one
7830 // error per object file.
7831 if (this->issued_non_pic_error_)
7833 const Arm_reloc_property* reloc_property =
7834 arm_reloc_property_table->get_reloc_property(r_type);
7835 gold_assert(reloc_property != NULL);
7836 object->error(_("requires unsupported dynamic reloc %s; "
7837 "recompile with -fPIC"),
7838 reloc_property->name().c_str());
7839 this->issued_non_pic_error_ = true;
7843 case elfcpp::R_ARM_NONE:
7848 // Scan a relocation for a local symbol.
7849 // FIXME: This only handles a subset of relocation types used by Android
7850 // on ARM v5te devices.
7852 template<bool big_endian>
7854 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
7857 Sized_relobj_file<32, big_endian>* object,
7858 unsigned int data_shndx,
7859 Output_section* output_section,
7860 const elfcpp::Rel<32, big_endian>& reloc,
7861 unsigned int r_type,
7862 const elfcpp::Sym<32, big_endian>& lsym)
7864 r_type = get_real_reloc_type(r_type);
7867 case elfcpp::R_ARM_NONE:
7868 case elfcpp::R_ARM_V4BX:
7869 case elfcpp::R_ARM_GNU_VTENTRY:
7870 case elfcpp::R_ARM_GNU_VTINHERIT:
7873 case elfcpp::R_ARM_ABS32:
7874 case elfcpp::R_ARM_ABS32_NOI:
7875 // If building a shared library (or a position-independent
7876 // executable), we need to create a dynamic relocation for
7877 // this location. The relocation applied at link time will
7878 // apply the link-time value, so we flag the location with
7879 // an R_ARM_RELATIVE relocation so the dynamic loader can
7880 // relocate it easily.
7881 if (parameters->options().output_is_position_independent())
7883 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7884 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7885 // If we are to add more other reloc types than R_ARM_ABS32,
7886 // we need to add check_non_pic(object, r_type) here.
7887 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
7888 output_section, data_shndx,
7889 reloc.get_r_offset());
7893 case elfcpp::R_ARM_ABS16:
7894 case elfcpp::R_ARM_ABS12:
7895 case elfcpp::R_ARM_THM_ABS5:
7896 case elfcpp::R_ARM_ABS8:
7897 case elfcpp::R_ARM_BASE_ABS:
7898 case elfcpp::R_ARM_MOVW_ABS_NC:
7899 case elfcpp::R_ARM_MOVT_ABS:
7900 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
7901 case elfcpp::R_ARM_THM_MOVT_ABS:
7902 // If building a shared library (or a position-independent
7903 // executable), we need to create a dynamic relocation for
7904 // this location. Because the addend needs to remain in the
7905 // data section, we need to be careful not to apply this
7906 // relocation statically.
7907 if (parameters->options().output_is_position_independent())
7909 check_non_pic(object, r_type);
7910 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
7911 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
7912 if (lsym.get_st_type() != elfcpp::STT_SECTION)
7913 rel_dyn->add_local(object, r_sym, r_type, output_section,
7914 data_shndx, reloc.get_r_offset());
7917 gold_assert(lsym.get_st_value() == 0);
7918 unsigned int shndx = lsym.get_st_shndx();
7920 shndx = object->adjust_sym_shndx(r_sym, shndx,
7923 object->error(_("section symbol %u has bad shndx %u"),
7926 rel_dyn->add_local_section(object, shndx,
7927 r_type, output_section,
7928 data_shndx, reloc.get_r_offset());
7933 case elfcpp::R_ARM_REL32:
7934 case elfcpp::R_ARM_LDR_PC_G0:
7935 case elfcpp::R_ARM_SBREL32:
7936 case elfcpp::R_ARM_THM_CALL:
7937 case elfcpp::R_ARM_THM_PC8:
7938 case elfcpp::R_ARM_BASE_PREL:
7939 case elfcpp::R_ARM_PLT32:
7940 case elfcpp::R_ARM_CALL:
7941 case elfcpp::R_ARM_JUMP24:
7942 case elfcpp::R_ARM_THM_JUMP24:
7943 case elfcpp::R_ARM_SBREL31:
7944 case elfcpp::R_ARM_PREL31:
7945 case elfcpp::R_ARM_MOVW_PREL_NC:
7946 case elfcpp::R_ARM_MOVT_PREL:
7947 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
7948 case elfcpp::R_ARM_THM_MOVT_PREL:
7949 case elfcpp::R_ARM_THM_JUMP19:
7950 case elfcpp::R_ARM_THM_JUMP6:
7951 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
7952 case elfcpp::R_ARM_THM_PC12:
7953 case elfcpp::R_ARM_REL32_NOI:
7954 case elfcpp::R_ARM_ALU_PC_G0_NC:
7955 case elfcpp::R_ARM_ALU_PC_G0:
7956 case elfcpp::R_ARM_ALU_PC_G1_NC:
7957 case elfcpp::R_ARM_ALU_PC_G1:
7958 case elfcpp::R_ARM_ALU_PC_G2:
7959 case elfcpp::R_ARM_LDR_PC_G1:
7960 case elfcpp::R_ARM_LDR_PC_G2:
7961 case elfcpp::R_ARM_LDRS_PC_G0:
7962 case elfcpp::R_ARM_LDRS_PC_G1:
7963 case elfcpp::R_ARM_LDRS_PC_G2:
7964 case elfcpp::R_ARM_LDC_PC_G0:
7965 case elfcpp::R_ARM_LDC_PC_G1:
7966 case elfcpp::R_ARM_LDC_PC_G2:
7967 case elfcpp::R_ARM_ALU_SB_G0_NC:
7968 case elfcpp::R_ARM_ALU_SB_G0:
7969 case elfcpp::R_ARM_ALU_SB_G1_NC:
7970 case elfcpp::R_ARM_ALU_SB_G1:
7971 case elfcpp::R_ARM_ALU_SB_G2:
7972 case elfcpp::R_ARM_LDR_SB_G0:
7973 case elfcpp::R_ARM_LDR_SB_G1:
7974 case elfcpp::R_ARM_LDR_SB_G2:
7975 case elfcpp::R_ARM_LDRS_SB_G0:
7976 case elfcpp::R_ARM_LDRS_SB_G1:
7977 case elfcpp::R_ARM_LDRS_SB_G2:
7978 case elfcpp::R_ARM_LDC_SB_G0:
7979 case elfcpp::R_ARM_LDC_SB_G1:
7980 case elfcpp::R_ARM_LDC_SB_G2:
7981 case elfcpp::R_ARM_MOVW_BREL_NC:
7982 case elfcpp::R_ARM_MOVT_BREL:
7983 case elfcpp::R_ARM_MOVW_BREL:
7984 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
7985 case elfcpp::R_ARM_THM_MOVT_BREL:
7986 case elfcpp::R_ARM_THM_MOVW_BREL:
7987 case elfcpp::R_ARM_THM_JUMP11:
7988 case elfcpp::R_ARM_THM_JUMP8:
7989 // We don't need to do anything for a relative addressing relocation
7990 // against a local symbol if it does not reference the GOT.
7993 case elfcpp::R_ARM_GOTOFF32:
7994 case elfcpp::R_ARM_GOTOFF12:
7995 // We need a GOT section:
7996 target->got_section(symtab, layout);
7999 case elfcpp::R_ARM_GOT_BREL:
8000 case elfcpp::R_ARM_GOT_PREL:
8002 // The symbol requires a GOT entry.
8003 Arm_output_data_got<big_endian>* got =
8004 target->got_section(symtab, layout);
8005 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8006 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8008 // If we are generating a shared object, we need to add a
8009 // dynamic RELATIVE relocation for this symbol's GOT entry.
8010 if (parameters->options().output_is_position_independent())
8012 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8013 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8014 rel_dyn->add_local_relative(
8015 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8016 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8022 case elfcpp::R_ARM_TARGET1:
8023 case elfcpp::R_ARM_TARGET2:
8024 // This should have been mapped to another type already.
8026 case elfcpp::R_ARM_COPY:
8027 case elfcpp::R_ARM_GLOB_DAT:
8028 case elfcpp::R_ARM_JUMP_SLOT:
8029 case elfcpp::R_ARM_RELATIVE:
8030 // These are relocations which should only be seen by the
8031 // dynamic linker, and should never be seen here.
8032 gold_error(_("%s: unexpected reloc %u in object file"),
8033 object->name().c_str(), r_type);
8037 // These are initial TLS relocs, which are expected when
8039 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8040 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8041 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8042 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8043 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8045 bool output_is_shared = parameters->options().shared();
8046 const tls::Tls_optimization optimized_type
8047 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8051 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8052 if (optimized_type == tls::TLSOPT_NONE)
8054 // Create a pair of GOT entries for the module index and
8055 // dtv-relative offset.
8056 Arm_output_data_got<big_endian>* got
8057 = target->got_section(symtab, layout);
8058 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8059 unsigned int shndx = lsym.get_st_shndx();
8061 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8064 object->error(_("local symbol %u has bad shndx %u"),
8069 if (!parameters->doing_static_link())
8070 got->add_local_pair_with_rel(object, r_sym, shndx,
8072 target->rel_dyn_section(layout),
8073 elfcpp::R_ARM_TLS_DTPMOD32, 0);
8075 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8079 // FIXME: TLS optimization not supported yet.
8083 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8084 if (optimized_type == tls::TLSOPT_NONE)
8086 // Create a GOT entry for the module index.
8087 target->got_mod_index_entry(symtab, layout, object);
8090 // FIXME: TLS optimization not supported yet.
8094 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8097 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8098 layout->set_has_static_tls();
8099 if (optimized_type == tls::TLSOPT_NONE)
8101 // Create a GOT entry for the tp-relative offset.
8102 Arm_output_data_got<big_endian>* got
8103 = target->got_section(symtab, layout);
8104 unsigned int r_sym =
8105 elfcpp::elf_r_sym<32>(reloc.get_r_info());
8106 if (!parameters->doing_static_link())
8107 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8108 target->rel_dyn_section(layout),
8109 elfcpp::R_ARM_TLS_TPOFF32);
8110 else if (!object->local_has_got_offset(r_sym,
8111 GOT_TYPE_TLS_OFFSET))
8113 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8114 unsigned int got_offset =
8115 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8116 got->add_static_reloc(got_offset,
8117 elfcpp::R_ARM_TLS_TPOFF32, object,
8122 // FIXME: TLS optimization not supported yet.
8126 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8127 layout->set_has_static_tls();
8128 if (output_is_shared)
8130 // We need to create a dynamic relocation.
8131 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8132 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8133 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8134 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8135 output_section, data_shndx,
8136 reloc.get_r_offset());
8146 case elfcpp::R_ARM_PC24:
8147 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8148 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8149 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8151 unsupported_reloc_local(object, r_type);
8156 // Report an unsupported relocation against a global symbol.
8158 template<bool big_endian>
8160 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8161 Sized_relobj_file<32, big_endian>* object,
8162 unsigned int r_type,
8165 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8166 object->name().c_str(), r_type, gsym->demangled_name().c_str());
8169 template<bool big_endian>
8171 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8172 unsigned int r_type)
8176 case elfcpp::R_ARM_PC24:
8177 case elfcpp::R_ARM_THM_CALL:
8178 case elfcpp::R_ARM_PLT32:
8179 case elfcpp::R_ARM_CALL:
8180 case elfcpp::R_ARM_JUMP24:
8181 case elfcpp::R_ARM_THM_JUMP24:
8182 case elfcpp::R_ARM_SBREL31:
8183 case elfcpp::R_ARM_PREL31:
8184 case elfcpp::R_ARM_THM_JUMP19:
8185 case elfcpp::R_ARM_THM_JUMP6:
8186 case elfcpp::R_ARM_THM_JUMP11:
8187 case elfcpp::R_ARM_THM_JUMP8:
8188 // All the relocations above are branches except SBREL31 and PREL31.
8192 // Be conservative and assume this is a function pointer.
8197 template<bool big_endian>
8199 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8202 Target_arm<big_endian>* target,
8203 Sized_relobj_file<32, big_endian>*,
8206 const elfcpp::Rel<32, big_endian>&,
8207 unsigned int r_type,
8208 const elfcpp::Sym<32, big_endian>&)
8210 r_type = target->get_real_reloc_type(r_type);
8211 return possible_function_pointer_reloc(r_type);
8214 template<bool big_endian>
8216 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8219 Target_arm<big_endian>* target,
8220 Sized_relobj_file<32, big_endian>*,
8223 const elfcpp::Rel<32, big_endian>&,
8224 unsigned int r_type,
8227 // GOT is not a function.
8228 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8231 r_type = target->get_real_reloc_type(r_type);
8232 return possible_function_pointer_reloc(r_type);
8235 // Scan a relocation for a global symbol.
8237 template<bool big_endian>
8239 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8242 Sized_relobj_file<32, big_endian>* object,
8243 unsigned int data_shndx,
8244 Output_section* output_section,
8245 const elfcpp::Rel<32, big_endian>& reloc,
8246 unsigned int r_type,
8249 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8250 // section. We check here to avoid creating a dynamic reloc against
8251 // _GLOBAL_OFFSET_TABLE_.
8252 if (!target->has_got_section()
8253 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8254 target->got_section(symtab, layout);
8256 r_type = get_real_reloc_type(r_type);
8259 case elfcpp::R_ARM_NONE:
8260 case elfcpp::R_ARM_V4BX:
8261 case elfcpp::R_ARM_GNU_VTENTRY:
8262 case elfcpp::R_ARM_GNU_VTINHERIT:
8265 case elfcpp::R_ARM_ABS32:
8266 case elfcpp::R_ARM_ABS16:
8267 case elfcpp::R_ARM_ABS12:
8268 case elfcpp::R_ARM_THM_ABS5:
8269 case elfcpp::R_ARM_ABS8:
8270 case elfcpp::R_ARM_BASE_ABS:
8271 case elfcpp::R_ARM_MOVW_ABS_NC:
8272 case elfcpp::R_ARM_MOVT_ABS:
8273 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8274 case elfcpp::R_ARM_THM_MOVT_ABS:
8275 case elfcpp::R_ARM_ABS32_NOI:
8276 // Absolute addressing relocations.
8278 // Make a PLT entry if necessary.
8279 if (this->symbol_needs_plt_entry(gsym))
8281 target->make_plt_entry(symtab, layout, gsym);
8282 // Since this is not a PC-relative relocation, we may be
8283 // taking the address of a function. In that case we need to
8284 // set the entry in the dynamic symbol table to the address of
8286 if (gsym->is_from_dynobj() && !parameters->options().shared())
8287 gsym->set_needs_dynsym_value();
8289 // Make a dynamic relocation if necessary.
8290 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8292 if (gsym->may_need_copy_reloc())
8294 target->copy_reloc(symtab, layout, object,
8295 data_shndx, output_section, gsym, reloc);
8297 else if ((r_type == elfcpp::R_ARM_ABS32
8298 || r_type == elfcpp::R_ARM_ABS32_NOI)
8299 && gsym->can_use_relative_reloc(false))
8301 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8302 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
8303 output_section, object,
8304 data_shndx, reloc.get_r_offset());
8308 check_non_pic(object, r_type);
8309 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8310 rel_dyn->add_global(gsym, r_type, output_section, object,
8311 data_shndx, reloc.get_r_offset());
8317 case elfcpp::R_ARM_GOTOFF32:
8318 case elfcpp::R_ARM_GOTOFF12:
8319 // We need a GOT section.
8320 target->got_section(symtab, layout);
8323 case elfcpp::R_ARM_REL32:
8324 case elfcpp::R_ARM_LDR_PC_G0:
8325 case elfcpp::R_ARM_SBREL32:
8326 case elfcpp::R_ARM_THM_PC8:
8327 case elfcpp::R_ARM_BASE_PREL:
8328 case elfcpp::R_ARM_MOVW_PREL_NC:
8329 case elfcpp::R_ARM_MOVT_PREL:
8330 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8331 case elfcpp::R_ARM_THM_MOVT_PREL:
8332 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8333 case elfcpp::R_ARM_THM_PC12:
8334 case elfcpp::R_ARM_REL32_NOI:
8335 case elfcpp::R_ARM_ALU_PC_G0_NC:
8336 case elfcpp::R_ARM_ALU_PC_G0:
8337 case elfcpp::R_ARM_ALU_PC_G1_NC:
8338 case elfcpp::R_ARM_ALU_PC_G1:
8339 case elfcpp::R_ARM_ALU_PC_G2:
8340 case elfcpp::R_ARM_LDR_PC_G1:
8341 case elfcpp::R_ARM_LDR_PC_G2:
8342 case elfcpp::R_ARM_LDRS_PC_G0:
8343 case elfcpp::R_ARM_LDRS_PC_G1:
8344 case elfcpp::R_ARM_LDRS_PC_G2:
8345 case elfcpp::R_ARM_LDC_PC_G0:
8346 case elfcpp::R_ARM_LDC_PC_G1:
8347 case elfcpp::R_ARM_LDC_PC_G2:
8348 case elfcpp::R_ARM_ALU_SB_G0_NC:
8349 case elfcpp::R_ARM_ALU_SB_G0:
8350 case elfcpp::R_ARM_ALU_SB_G1_NC:
8351 case elfcpp::R_ARM_ALU_SB_G1:
8352 case elfcpp::R_ARM_ALU_SB_G2:
8353 case elfcpp::R_ARM_LDR_SB_G0:
8354 case elfcpp::R_ARM_LDR_SB_G1:
8355 case elfcpp::R_ARM_LDR_SB_G2:
8356 case elfcpp::R_ARM_LDRS_SB_G0:
8357 case elfcpp::R_ARM_LDRS_SB_G1:
8358 case elfcpp::R_ARM_LDRS_SB_G2:
8359 case elfcpp::R_ARM_LDC_SB_G0:
8360 case elfcpp::R_ARM_LDC_SB_G1:
8361 case elfcpp::R_ARM_LDC_SB_G2:
8362 case elfcpp::R_ARM_MOVW_BREL_NC:
8363 case elfcpp::R_ARM_MOVT_BREL:
8364 case elfcpp::R_ARM_MOVW_BREL:
8365 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8366 case elfcpp::R_ARM_THM_MOVT_BREL:
8367 case elfcpp::R_ARM_THM_MOVW_BREL:
8368 // Relative addressing relocations.
8370 // Make a dynamic relocation if necessary.
8371 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
8373 if (target->may_need_copy_reloc(gsym))
8375 target->copy_reloc(symtab, layout, object,
8376 data_shndx, output_section, gsym, reloc);
8380 check_non_pic(object, r_type);
8381 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8382 rel_dyn->add_global(gsym, r_type, output_section, object,
8383 data_shndx, reloc.get_r_offset());
8389 case elfcpp::R_ARM_THM_CALL:
8390 case elfcpp::R_ARM_PLT32:
8391 case elfcpp::R_ARM_CALL:
8392 case elfcpp::R_ARM_JUMP24:
8393 case elfcpp::R_ARM_THM_JUMP24:
8394 case elfcpp::R_ARM_SBREL31:
8395 case elfcpp::R_ARM_PREL31:
8396 case elfcpp::R_ARM_THM_JUMP19:
8397 case elfcpp::R_ARM_THM_JUMP6:
8398 case elfcpp::R_ARM_THM_JUMP11:
8399 case elfcpp::R_ARM_THM_JUMP8:
8400 // All the relocation above are branches except for the PREL31 ones.
8401 // A PREL31 relocation can point to a personality function in a shared
8402 // library. In that case we want to use a PLT because we want to
8403 // call the personality routine and the dynamic linkers we care about
8404 // do not support dynamic PREL31 relocations. An REL31 relocation may
8405 // point to a function whose unwinding behaviour is being described but
8406 // we will not mistakenly generate a PLT for that because we should use
8407 // a local section symbol.
8409 // If the symbol is fully resolved, this is just a relative
8410 // local reloc. Otherwise we need a PLT entry.
8411 if (gsym->final_value_is_known())
8413 // If building a shared library, we can also skip the PLT entry
8414 // if the symbol is defined in the output file and is protected
8416 if (gsym->is_defined()
8417 && !gsym->is_from_dynobj()
8418 && !gsym->is_preemptible())
8420 target->make_plt_entry(symtab, layout, gsym);
8423 case elfcpp::R_ARM_GOT_BREL:
8424 case elfcpp::R_ARM_GOT_ABS:
8425 case elfcpp::R_ARM_GOT_PREL:
8427 // The symbol requires a GOT entry.
8428 Arm_output_data_got<big_endian>* got =
8429 target->got_section(symtab, layout);
8430 if (gsym->final_value_is_known())
8431 got->add_global(gsym, GOT_TYPE_STANDARD);
8434 // If this symbol is not fully resolved, we need to add a
8435 // GOT entry with a dynamic relocation.
8436 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8437 if (gsym->is_from_dynobj()
8438 || gsym->is_undefined()
8439 || gsym->is_preemptible()
8440 || (gsym->visibility() == elfcpp::STV_PROTECTED
8441 && parameters->options().shared()))
8442 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
8443 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
8446 if (got->add_global(gsym, GOT_TYPE_STANDARD))
8447 rel_dyn->add_global_relative(
8448 gsym, elfcpp::R_ARM_RELATIVE, got,
8449 gsym->got_offset(GOT_TYPE_STANDARD));
8455 case elfcpp::R_ARM_TARGET1:
8456 case elfcpp::R_ARM_TARGET2:
8457 // These should have been mapped to other types already.
8459 case elfcpp::R_ARM_COPY:
8460 case elfcpp::R_ARM_GLOB_DAT:
8461 case elfcpp::R_ARM_JUMP_SLOT:
8462 case elfcpp::R_ARM_RELATIVE:
8463 // These are relocations which should only be seen by the
8464 // dynamic linker, and should never be seen here.
8465 gold_error(_("%s: unexpected reloc %u in object file"),
8466 object->name().c_str(), r_type);
8469 // These are initial tls relocs, which are expected when
8471 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8472 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8473 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8474 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8475 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8477 const bool is_final = gsym->final_value_is_known();
8478 const tls::Tls_optimization optimized_type
8479 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
8482 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8483 if (optimized_type == tls::TLSOPT_NONE)
8485 // Create a pair of GOT entries for the module index and
8486 // dtv-relative offset.
8487 Arm_output_data_got<big_endian>* got
8488 = target->got_section(symtab, layout);
8489 if (!parameters->doing_static_link())
8490 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
8491 target->rel_dyn_section(layout),
8492 elfcpp::R_ARM_TLS_DTPMOD32,
8493 elfcpp::R_ARM_TLS_DTPOFF32);
8495 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
8498 // FIXME: TLS optimization not supported yet.
8502 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8503 if (optimized_type == tls::TLSOPT_NONE)
8505 // Create a GOT entry for the module index.
8506 target->got_mod_index_entry(symtab, layout, object);
8509 // FIXME: TLS optimization not supported yet.
8513 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8516 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8517 layout->set_has_static_tls();
8518 if (optimized_type == tls::TLSOPT_NONE)
8520 // Create a GOT entry for the tp-relative offset.
8521 Arm_output_data_got<big_endian>* got
8522 = target->got_section(symtab, layout);
8523 if (!parameters->doing_static_link())
8524 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
8525 target->rel_dyn_section(layout),
8526 elfcpp::R_ARM_TLS_TPOFF32);
8527 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
8529 got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
8530 unsigned int got_offset =
8531 gsym->got_offset(GOT_TYPE_TLS_OFFSET);
8532 got->add_static_reloc(got_offset,
8533 elfcpp::R_ARM_TLS_TPOFF32, gsym);
8537 // FIXME: TLS optimization not supported yet.
8541 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8542 layout->set_has_static_tls();
8543 if (parameters->options().shared())
8545 // We need to create a dynamic relocation.
8546 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8547 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
8548 output_section, object,
8549 data_shndx, reloc.get_r_offset());
8559 case elfcpp::R_ARM_PC24:
8560 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8561 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8562 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8564 unsupported_reloc_global(object, r_type, gsym);
8569 // Process relocations for gc.
8571 template<bool big_endian>
8573 Target_arm<big_endian>::gc_process_relocs(
8574 Symbol_table* symtab,
8576 Sized_relobj_file<32, big_endian>* object,
8577 unsigned int data_shndx,
8579 const unsigned char* prelocs,
8581 Output_section* output_section,
8582 bool needs_special_offset_handling,
8583 size_t local_symbol_count,
8584 const unsigned char* plocal_symbols)
8586 typedef Target_arm<big_endian> Arm;
8587 typedef typename Target_arm<big_endian>::Scan Scan;
8589 gold::gc_process_relocs<32, big_endian, Arm, elfcpp::SHT_REL, Scan,
8590 typename Target_arm::Relocatable_size_for_reloc>(
8599 needs_special_offset_handling,
8604 // Scan relocations for a section.
8606 template<bool big_endian>
8608 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
8610 Sized_relobj_file<32, big_endian>* object,
8611 unsigned int data_shndx,
8612 unsigned int sh_type,
8613 const unsigned char* prelocs,
8615 Output_section* output_section,
8616 bool needs_special_offset_handling,
8617 size_t local_symbol_count,
8618 const unsigned char* plocal_symbols)
8620 typedef typename Target_arm<big_endian>::Scan Scan;
8621 if (sh_type == elfcpp::SHT_RELA)
8623 gold_error(_("%s: unsupported RELA reloc section"),
8624 object->name().c_str());
8628 gold::scan_relocs<32, big_endian, Target_arm, elfcpp::SHT_REL, Scan>(
8637 needs_special_offset_handling,
8642 // Finalize the sections.
8644 template<bool big_endian>
8646 Target_arm<big_endian>::do_finalize_sections(
8648 const Input_objects* input_objects,
8651 bool merged_any_attributes = false;
8652 // Merge processor-specific flags.
8653 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
8654 p != input_objects->relobj_end();
8657 Arm_relobj<big_endian>* arm_relobj =
8658 Arm_relobj<big_endian>::as_arm_relobj(*p);
8659 if (arm_relobj->merge_flags_and_attributes())
8661 this->merge_processor_specific_flags(
8663 arm_relobj->processor_specific_flags());
8664 this->merge_object_attributes(arm_relobj->name().c_str(),
8665 arm_relobj->attributes_section_data());
8666 merged_any_attributes = true;
8670 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
8671 p != input_objects->dynobj_end();
8674 Arm_dynobj<big_endian>* arm_dynobj =
8675 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
8676 this->merge_processor_specific_flags(
8678 arm_dynobj->processor_specific_flags());
8679 this->merge_object_attributes(arm_dynobj->name().c_str(),
8680 arm_dynobj->attributes_section_data());
8681 merged_any_attributes = true;
8684 // Create an empty uninitialized attribute section if we still don't have it
8685 // at this moment. This happens if there is no attributes sections in all
8687 if (this->attributes_section_data_ == NULL)
8688 this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
8690 const Object_attribute* cpu_arch_attr =
8691 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
8692 // Check if we need to use Cortex-A8 workaround.
8693 if (parameters->options().user_set_fix_cortex_a8())
8694 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
8697 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
8698 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
8700 const Object_attribute* cpu_arch_profile_attr =
8701 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
8702 this->fix_cortex_a8_ =
8703 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
8704 && (cpu_arch_profile_attr->int_value() == 'A'
8705 || cpu_arch_profile_attr->int_value() == 0));
8708 // Check if we can use V4BX interworking.
8709 // The V4BX interworking stub contains BX instruction,
8710 // which is not specified for some profiles.
8711 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
8712 && !this->may_use_v4t_interworking())
8713 gold_error(_("unable to provide V4BX reloc interworking fix up; "
8714 "the target profile does not support BX instruction"));
8716 // Fill in some more dynamic tags.
8717 const Reloc_section* rel_plt = (this->plt_ == NULL
8719 : this->plt_->rel_plt());
8720 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
8721 this->rel_dyn_, true, false);
8723 // Emit any relocs we saved in an attempt to avoid generating COPY
8725 if (this->copy_relocs_.any_saved_relocs())
8726 this->copy_relocs_.emit(this->rel_dyn_section(layout));
8728 // Handle the .ARM.exidx section.
8729 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
8731 if (!parameters->options().relocatable())
8733 if (exidx_section != NULL
8734 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
8736 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
8737 // the .ARM.exidx section.
8738 if (!layout->script_options()->saw_phdrs_clause())
8740 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
8743 Output_segment* exidx_segment =
8744 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
8745 exidx_segment->add_output_section_to_nonload(exidx_section,
8751 // Create an .ARM.attributes section if we have merged any attributes
8753 if (merged_any_attributes)
8755 Output_attributes_section_data* attributes_section =
8756 new Output_attributes_section_data(*this->attributes_section_data_);
8757 layout->add_output_section_data(".ARM.attributes",
8758 elfcpp::SHT_ARM_ATTRIBUTES, 0,
8759 attributes_section, ORDER_INVALID,
8763 // Fix up links in section EXIDX headers.
8764 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
8765 p != layout->section_list().end();
8767 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
8769 Arm_output_section<big_endian>* os =
8770 Arm_output_section<big_endian>::as_arm_output_section(*p);
8771 os->set_exidx_section_link();
8775 // Return whether a direct absolute static relocation needs to be applied.
8776 // In cases where Scan::local() or Scan::global() has created
8777 // a dynamic relocation other than R_ARM_RELATIVE, the addend
8778 // of the relocation is carried in the data, and we must not
8779 // apply the static relocation.
8781 template<bool big_endian>
8783 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
8784 const Sized_symbol<32>* gsym,
8785 unsigned int r_type,
8787 Output_section* output_section)
8789 // If the output section is not allocated, then we didn't call
8790 // scan_relocs, we didn't create a dynamic reloc, and we must apply
8792 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
8795 int ref_flags = Scan::get_reference_flags(r_type);
8797 // For local symbols, we will have created a non-RELATIVE dynamic
8798 // relocation only if (a) the output is position independent,
8799 // (b) the relocation is absolute (not pc- or segment-relative), and
8800 // (c) the relocation is not 32 bits wide.
8802 return !(parameters->options().output_is_position_independent()
8803 && (ref_flags & Symbol::ABSOLUTE_REF)
8806 // For global symbols, we use the same helper routines used in the
8807 // scan pass. If we did not create a dynamic relocation, or if we
8808 // created a RELATIVE dynamic relocation, we should apply the static
8810 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
8811 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
8812 && gsym->can_use_relative_reloc(ref_flags
8813 & Symbol::FUNCTION_CALL);
8814 return !has_dyn || is_rel;
8817 // Perform a relocation.
8819 template<bool big_endian>
8821 Target_arm<big_endian>::Relocate::relocate(
8822 const Relocate_info<32, big_endian>* relinfo,
8824 Output_section* output_section,
8826 const elfcpp::Rel<32, big_endian>& rel,
8827 unsigned int r_type,
8828 const Sized_symbol<32>* gsym,
8829 const Symbol_value<32>* psymval,
8830 unsigned char* view,
8831 Arm_address address,
8832 section_size_type view_size)
8834 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
8836 r_type = get_real_reloc_type(r_type);
8837 const Arm_reloc_property* reloc_property =
8838 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
8839 if (reloc_property == NULL)
8841 std::string reloc_name =
8842 arm_reloc_property_table->reloc_name_in_error_message(r_type);
8843 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
8844 _("cannot relocate %s in object file"),
8845 reloc_name.c_str());
8849 const Arm_relobj<big_endian>* object =
8850 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
8852 // If the final branch target of a relocation is THUMB instruction, this
8853 // is 1. Otherwise it is 0.
8854 Arm_address thumb_bit = 0;
8855 Symbol_value<32> symval;
8856 bool is_weakly_undefined_without_plt = false;
8857 bool have_got_offset = false;
8858 unsigned int got_offset = 0;
8860 // If the relocation uses the GOT entry of a symbol instead of the symbol
8861 // itself, we don't care about whether the symbol is defined or what kind
8863 if (reloc_property->uses_got_entry())
8865 // Get the GOT offset.
8866 // The GOT pointer points to the end of the GOT section.
8867 // We need to subtract the size of the GOT section to get
8868 // the actual offset to use in the relocation.
8869 // TODO: We should move GOT offset computing code in TLS relocations
8873 case elfcpp::R_ARM_GOT_BREL:
8874 case elfcpp::R_ARM_GOT_PREL:
8877 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
8878 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
8879 - target->got_size());
8883 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8884 gold_assert(object->local_has_got_offset(r_sym,
8885 GOT_TYPE_STANDARD));
8886 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
8887 - target->got_size());
8889 have_got_offset = true;
8896 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
8900 // This is a global symbol. Determine if we use PLT and if the
8901 // final target is THUMB.
8902 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
8904 // This uses a PLT, change the symbol value.
8905 symval.set_output_value(target->plt_section()->address()
8906 + gsym->plt_offset());
8909 else if (gsym->is_weak_undefined())
8911 // This is a weakly undefined symbol and we do not use PLT
8912 // for this relocation. A branch targeting this symbol will
8913 // be converted into an NOP.
8914 is_weakly_undefined_without_plt = true;
8916 else if (gsym->is_undefined() && reloc_property->uses_symbol())
8918 // This relocation uses the symbol value but the symbol is
8919 // undefined. Exit early and have the caller reporting an
8925 // Set thumb bit if symbol:
8926 // -Has type STT_ARM_TFUNC or
8927 // -Has type STT_FUNC, is defined and with LSB in value set.
8929 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
8930 || (gsym->type() == elfcpp::STT_FUNC
8931 && !gsym->is_undefined()
8932 && ((psymval->value(object, 0) & 1) != 0)))
8939 // This is a local symbol. Determine if the final target is THUMB.
8940 // We saved this information when all the local symbols were read.
8941 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
8942 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
8943 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
8948 // This is a fake relocation synthesized for a stub. It does not have
8949 // a real symbol. We just look at the LSB of the symbol value to
8950 // determine if the target is THUMB or not.
8951 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
8954 // Strip LSB if this points to a THUMB target.
8956 && reloc_property->uses_thumb_bit()
8957 && ((psymval->value(object, 0) & 1) != 0))
8959 Arm_address stripped_value =
8960 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
8961 symval.set_output_value(stripped_value);
8965 // To look up relocation stubs, we need to pass the symbol table index of
8967 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
8969 // Get the addressing origin of the output segment defining the
8970 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
8971 Arm_address sym_origin = 0;
8972 if (reloc_property->uses_symbol_base())
8974 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
8975 // R_ARM_BASE_ABS with the NULL symbol will give the
8976 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
8977 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
8978 sym_origin = target->got_plt_section()->address();
8979 else if (gsym == NULL)
8981 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
8982 sym_origin = gsym->output_segment()->vaddr();
8983 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
8984 sym_origin = gsym->output_data()->address();
8986 // TODO: Assumes the segment base to be zero for the global symbols
8987 // till the proper support for the segment-base-relative addressing
8988 // will be implemented. This is consistent with GNU ld.
8991 // For relative addressing relocation, find out the relative address base.
8992 Arm_address relative_address_base = 0;
8993 switch(reloc_property->relative_address_base())
8995 case Arm_reloc_property::RAB_NONE:
8996 // Relocations with relative address bases RAB_TLS and RAB_tp are
8997 // handled by relocate_tls. So we do not need to do anything here.
8998 case Arm_reloc_property::RAB_TLS:
8999 case Arm_reloc_property::RAB_tp:
9001 case Arm_reloc_property::RAB_B_S:
9002 relative_address_base = sym_origin;
9004 case Arm_reloc_property::RAB_GOT_ORG:
9005 relative_address_base = target->got_plt_section()->address();
9007 case Arm_reloc_property::RAB_P:
9008 relative_address_base = address;
9010 case Arm_reloc_property::RAB_Pa:
9011 relative_address_base = address & 0xfffffffcU;
9017 typename Arm_relocate_functions::Status reloc_status =
9018 Arm_relocate_functions::STATUS_OKAY;
9019 bool check_overflow = reloc_property->checks_overflow();
9022 case elfcpp::R_ARM_NONE:
9025 case elfcpp::R_ARM_ABS8:
9026 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9027 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9030 case elfcpp::R_ARM_ABS12:
9031 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9032 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9035 case elfcpp::R_ARM_ABS16:
9036 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9037 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9040 case elfcpp::R_ARM_ABS32:
9041 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9042 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9046 case elfcpp::R_ARM_ABS32_NOI:
9047 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9048 // No thumb bit for this relocation: (S + A)
9049 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9053 case elfcpp::R_ARM_MOVW_ABS_NC:
9054 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9055 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9060 case elfcpp::R_ARM_MOVT_ABS:
9061 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9062 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9065 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9066 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9067 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9068 0, thumb_bit, false);
9071 case elfcpp::R_ARM_THM_MOVT_ABS:
9072 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9073 reloc_status = Arm_relocate_functions::thm_movt(view, object,
9077 case elfcpp::R_ARM_MOVW_PREL_NC:
9078 case elfcpp::R_ARM_MOVW_BREL_NC:
9079 case elfcpp::R_ARM_MOVW_BREL:
9081 Arm_relocate_functions::movw(view, object, psymval,
9082 relative_address_base, thumb_bit,
9086 case elfcpp::R_ARM_MOVT_PREL:
9087 case elfcpp::R_ARM_MOVT_BREL:
9089 Arm_relocate_functions::movt(view, object, psymval,
9090 relative_address_base);
9093 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9094 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9095 case elfcpp::R_ARM_THM_MOVW_BREL:
9097 Arm_relocate_functions::thm_movw(view, object, psymval,
9098 relative_address_base,
9099 thumb_bit, check_overflow);
9102 case elfcpp::R_ARM_THM_MOVT_PREL:
9103 case elfcpp::R_ARM_THM_MOVT_BREL:
9105 Arm_relocate_functions::thm_movt(view, object, psymval,
9106 relative_address_base);
9109 case elfcpp::R_ARM_REL32:
9110 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9111 address, thumb_bit);
9114 case elfcpp::R_ARM_THM_ABS5:
9115 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9116 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9119 // Thumb long branches.
9120 case elfcpp::R_ARM_THM_CALL:
9121 case elfcpp::R_ARM_THM_XPC22:
9122 case elfcpp::R_ARM_THM_JUMP24:
9124 Arm_relocate_functions::thumb_branch_common(
9125 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9126 thumb_bit, is_weakly_undefined_without_plt);
9129 case elfcpp::R_ARM_GOTOFF32:
9131 Arm_address got_origin;
9132 got_origin = target->got_plt_section()->address();
9133 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9134 got_origin, thumb_bit);
9138 case elfcpp::R_ARM_BASE_PREL:
9139 gold_assert(gsym != NULL);
9141 Arm_relocate_functions::base_prel(view, sym_origin, address);
9144 case elfcpp::R_ARM_BASE_ABS:
9145 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9146 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9149 case elfcpp::R_ARM_GOT_BREL:
9150 gold_assert(have_got_offset);
9151 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9154 case elfcpp::R_ARM_GOT_PREL:
9155 gold_assert(have_got_offset);
9156 // Get the address origin for GOT PLT, which is allocated right
9157 // after the GOT section, to calculate an absolute address of
9158 // the symbol GOT entry (got_origin + got_offset).
9159 Arm_address got_origin;
9160 got_origin = target->got_plt_section()->address();
9161 reloc_status = Arm_relocate_functions::got_prel(view,
9162 got_origin + got_offset,
9166 case elfcpp::R_ARM_PLT32:
9167 case elfcpp::R_ARM_CALL:
9168 case elfcpp::R_ARM_JUMP24:
9169 case elfcpp::R_ARM_XPC25:
9170 gold_assert(gsym == NULL
9171 || gsym->has_plt_offset()
9172 || gsym->final_value_is_known()
9173 || (gsym->is_defined()
9174 && !gsym->is_from_dynobj()
9175 && !gsym->is_preemptible()));
9177 Arm_relocate_functions::arm_branch_common(
9178 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9179 thumb_bit, is_weakly_undefined_without_plt);
9182 case elfcpp::R_ARM_THM_JUMP19:
9184 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9188 case elfcpp::R_ARM_THM_JUMP6:
9190 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9193 case elfcpp::R_ARM_THM_JUMP8:
9195 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9198 case elfcpp::R_ARM_THM_JUMP11:
9200 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9203 case elfcpp::R_ARM_PREL31:
9204 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9205 address, thumb_bit);
9208 case elfcpp::R_ARM_V4BX:
9209 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9211 const bool is_v4bx_interworking =
9212 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9214 Arm_relocate_functions::v4bx(relinfo, view, object, address,
9215 is_v4bx_interworking);
9219 case elfcpp::R_ARM_THM_PC8:
9221 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9224 case elfcpp::R_ARM_THM_PC12:
9226 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
9229 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9231 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
9235 case elfcpp::R_ARM_ALU_PC_G0_NC:
9236 case elfcpp::R_ARM_ALU_PC_G0:
9237 case elfcpp::R_ARM_ALU_PC_G1_NC:
9238 case elfcpp::R_ARM_ALU_PC_G1:
9239 case elfcpp::R_ARM_ALU_PC_G2:
9240 case elfcpp::R_ARM_ALU_SB_G0_NC:
9241 case elfcpp::R_ARM_ALU_SB_G0:
9242 case elfcpp::R_ARM_ALU_SB_G1_NC:
9243 case elfcpp::R_ARM_ALU_SB_G1:
9244 case elfcpp::R_ARM_ALU_SB_G2:
9246 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
9247 reloc_property->group_index(),
9248 relative_address_base,
9249 thumb_bit, check_overflow);
9252 case elfcpp::R_ARM_LDR_PC_G0:
9253 case elfcpp::R_ARM_LDR_PC_G1:
9254 case elfcpp::R_ARM_LDR_PC_G2:
9255 case elfcpp::R_ARM_LDR_SB_G0:
9256 case elfcpp::R_ARM_LDR_SB_G1:
9257 case elfcpp::R_ARM_LDR_SB_G2:
9259 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
9260 reloc_property->group_index(),
9261 relative_address_base);
9264 case elfcpp::R_ARM_LDRS_PC_G0:
9265 case elfcpp::R_ARM_LDRS_PC_G1:
9266 case elfcpp::R_ARM_LDRS_PC_G2:
9267 case elfcpp::R_ARM_LDRS_SB_G0:
9268 case elfcpp::R_ARM_LDRS_SB_G1:
9269 case elfcpp::R_ARM_LDRS_SB_G2:
9271 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
9272 reloc_property->group_index(),
9273 relative_address_base);
9276 case elfcpp::R_ARM_LDC_PC_G0:
9277 case elfcpp::R_ARM_LDC_PC_G1:
9278 case elfcpp::R_ARM_LDC_PC_G2:
9279 case elfcpp::R_ARM_LDC_SB_G0:
9280 case elfcpp::R_ARM_LDC_SB_G1:
9281 case elfcpp::R_ARM_LDC_SB_G2:
9283 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
9284 reloc_property->group_index(),
9285 relative_address_base);
9288 // These are initial tls relocs, which are expected when
9290 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9291 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9292 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9293 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9294 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9296 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
9297 view, address, view_size);
9300 // The known and unknown unsupported and/or deprecated relocations.
9301 case elfcpp::R_ARM_PC24:
9302 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9303 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9304 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9306 // Just silently leave the method. We should get an appropriate error
9307 // message in the scan methods.
9311 // Report any errors.
9312 switch (reloc_status)
9314 case Arm_relocate_functions::STATUS_OKAY:
9316 case Arm_relocate_functions::STATUS_OVERFLOW:
9317 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9318 _("relocation overflow in %s"),
9319 reloc_property->name().c_str());
9321 case Arm_relocate_functions::STATUS_BAD_RELOC:
9322 gold_error_at_location(
9326 _("unexpected opcode while processing relocation %s"),
9327 reloc_property->name().c_str());
9336 // Perform a TLS relocation.
9338 template<bool big_endian>
9339 inline typename Arm_relocate_functions<big_endian>::Status
9340 Target_arm<big_endian>::Relocate::relocate_tls(
9341 const Relocate_info<32, big_endian>* relinfo,
9342 Target_arm<big_endian>* target,
9344 const elfcpp::Rel<32, big_endian>& rel,
9345 unsigned int r_type,
9346 const Sized_symbol<32>* gsym,
9347 const Symbol_value<32>* psymval,
9348 unsigned char* view,
9349 elfcpp::Elf_types<32>::Elf_Addr address,
9350 section_size_type /*view_size*/ )
9352 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
9353 typedef Relocate_functions<32, big_endian> RelocFuncs;
9354 Output_segment* tls_segment = relinfo->layout->tls_segment();
9356 const Sized_relobj_file<32, big_endian>* object = relinfo->object;
9358 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
9360 const bool is_final = (gsym == NULL
9361 ? !parameters->options().shared()
9362 : gsym->final_value_is_known());
9363 const tls::Tls_optimization optimized_type
9364 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9367 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9369 unsigned int got_type = GOT_TYPE_TLS_PAIR;
9370 unsigned int got_offset;
9373 gold_assert(gsym->has_got_offset(got_type));
9374 got_offset = gsym->got_offset(got_type) - target->got_size();
9378 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9379 gold_assert(object->local_has_got_offset(r_sym, got_type));
9380 got_offset = (object->local_got_offset(r_sym, got_type)
9381 - target->got_size());
9383 if (optimized_type == tls::TLSOPT_NONE)
9385 Arm_address got_entry =
9386 target->got_plt_section()->address() + got_offset;
9388 // Relocate the field with the PC relative offset of the pair of
9390 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9391 return ArmRelocFuncs::STATUS_OKAY;
9396 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9397 if (optimized_type == tls::TLSOPT_NONE)
9399 // Relocate the field with the offset of the GOT entry for
9400 // the module index.
9401 unsigned int got_offset;
9402 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
9403 - target->got_size());
9404 Arm_address got_entry =
9405 target->got_plt_section()->address() + got_offset;
9407 // Relocate the field with the PC relative offset of the pair of
9409 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9410 return ArmRelocFuncs::STATUS_OKAY;
9414 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9415 RelocFuncs::rel32_unaligned(view, value);
9416 return ArmRelocFuncs::STATUS_OKAY;
9418 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9419 if (optimized_type == tls::TLSOPT_NONE)
9421 // Relocate the field with the offset of the GOT entry for
9422 // the tp-relative offset of the symbol.
9423 unsigned int got_type = GOT_TYPE_TLS_OFFSET;
9424 unsigned int got_offset;
9427 gold_assert(gsym->has_got_offset(got_type));
9428 got_offset = gsym->got_offset(got_type);
9432 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9433 gold_assert(object->local_has_got_offset(r_sym, got_type));
9434 got_offset = object->local_got_offset(r_sym, got_type);
9437 // All GOT offsets are relative to the end of the GOT.
9438 got_offset -= target->got_size();
9440 Arm_address got_entry =
9441 target->got_plt_section()->address() + got_offset;
9443 // Relocate the field with the PC relative offset of the GOT entry.
9444 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
9445 return ArmRelocFuncs::STATUS_OKAY;
9449 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9450 // If we're creating a shared library, a dynamic relocation will
9451 // have been created for this location, so do not apply it now.
9452 if (!parameters->options().shared())
9454 gold_assert(tls_segment != NULL);
9456 // $tp points to the TCB, which is followed by the TLS, so we
9457 // need to add TCB size to the offset.
9458 Arm_address aligned_tcb_size =
9459 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
9460 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
9463 return ArmRelocFuncs::STATUS_OKAY;
9469 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9470 _("unsupported reloc %u"),
9472 return ArmRelocFuncs::STATUS_BAD_RELOC;
9475 // Relocate section data.
9477 template<bool big_endian>
9479 Target_arm<big_endian>::relocate_section(
9480 const Relocate_info<32, big_endian>* relinfo,
9481 unsigned int sh_type,
9482 const unsigned char* prelocs,
9484 Output_section* output_section,
9485 bool needs_special_offset_handling,
9486 unsigned char* view,
9487 Arm_address address,
9488 section_size_type view_size,
9489 const Reloc_symbol_changes* reloc_symbol_changes)
9491 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
9492 gold_assert(sh_type == elfcpp::SHT_REL);
9494 // See if we are relocating a relaxed input section. If so, the view
9495 // covers the whole output section and we need to adjust accordingly.
9496 if (needs_special_offset_handling)
9498 const Output_relaxed_input_section* poris =
9499 output_section->find_relaxed_input_section(relinfo->object,
9500 relinfo->data_shndx);
9503 Arm_address section_address = poris->address();
9504 section_size_type section_size = poris->data_size();
9506 gold_assert((section_address >= address)
9507 && ((section_address + section_size)
9508 <= (address + view_size)));
9510 off_t offset = section_address - address;
9513 view_size = section_size;
9517 gold::relocate_section<32, big_endian, Target_arm, elfcpp::SHT_REL,
9524 needs_special_offset_handling,
9528 reloc_symbol_changes);
9531 // Return the size of a relocation while scanning during a relocatable
9534 template<bool big_endian>
9536 Target_arm<big_endian>::Relocatable_size_for_reloc::get_size_for_reloc(
9537 unsigned int r_type,
9540 r_type = get_real_reloc_type(r_type);
9541 const Arm_reloc_property* arp =
9542 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9547 std::string reloc_name =
9548 arm_reloc_property_table->reloc_name_in_error_message(r_type);
9549 gold_error(_("%s: unexpected %s in object file"),
9550 object->name().c_str(), reloc_name.c_str());
9555 // Scan the relocs during a relocatable link.
9557 template<bool big_endian>
9559 Target_arm<big_endian>::scan_relocatable_relocs(
9560 Symbol_table* symtab,
9562 Sized_relobj_file<32, big_endian>* object,
9563 unsigned int data_shndx,
9564 unsigned int sh_type,
9565 const unsigned char* prelocs,
9567 Output_section* output_section,
9568 bool needs_special_offset_handling,
9569 size_t local_symbol_count,
9570 const unsigned char* plocal_symbols,
9571 Relocatable_relocs* rr)
9573 gold_assert(sh_type == elfcpp::SHT_REL);
9575 typedef Arm_scan_relocatable_relocs<big_endian, elfcpp::SHT_REL,
9576 Relocatable_size_for_reloc> Scan_relocatable_relocs;
9578 gold::scan_relocatable_relocs<32, big_endian, elfcpp::SHT_REL,
9579 Scan_relocatable_relocs>(
9587 needs_special_offset_handling,
9593 // Relocate a section during a relocatable link.
9595 template<bool big_endian>
9597 Target_arm<big_endian>::relocate_for_relocatable(
9598 const Relocate_info<32, big_endian>* relinfo,
9599 unsigned int sh_type,
9600 const unsigned char* prelocs,
9602 Output_section* output_section,
9603 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
9604 const Relocatable_relocs* rr,
9605 unsigned char* view,
9606 Arm_address view_address,
9607 section_size_type view_size,
9608 unsigned char* reloc_view,
9609 section_size_type reloc_view_size)
9611 gold_assert(sh_type == elfcpp::SHT_REL);
9613 gold::relocate_for_relocatable<32, big_endian, elfcpp::SHT_REL>(
9618 offset_in_output_section,
9627 // Perform target-specific processing in a relocatable link. This is
9628 // only used if we use the relocation strategy RELOC_SPECIAL.
9630 template<bool big_endian>
9632 Target_arm<big_endian>::relocate_special_relocatable(
9633 const Relocate_info<32, big_endian>* relinfo,
9634 unsigned int sh_type,
9635 const unsigned char* preloc_in,
9637 Output_section* output_section,
9638 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
9639 unsigned char* view,
9640 elfcpp::Elf_types<32>::Elf_Addr view_address,
9642 unsigned char* preloc_out)
9644 // We can only handle REL type relocation sections.
9645 gold_assert(sh_type == elfcpp::SHT_REL);
9647 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
9648 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
9650 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
9652 const Arm_relobj<big_endian>* object =
9653 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9654 const unsigned int local_count = object->local_symbol_count();
9656 Reltype reloc(preloc_in);
9657 Reltype_write reloc_write(preloc_out);
9659 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
9660 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9661 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
9663 const Arm_reloc_property* arp =
9664 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9665 gold_assert(arp != NULL);
9667 // Get the new symbol index.
9668 // We only use RELOC_SPECIAL strategy in local relocations.
9669 gold_assert(r_sym < local_count);
9671 // We are adjusting a section symbol. We need to find
9672 // the symbol table index of the section symbol for
9673 // the output section corresponding to input section
9674 // in which this symbol is defined.
9676 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
9677 gold_assert(is_ordinary);
9678 Output_section* os = object->output_section(shndx);
9679 gold_assert(os != NULL);
9680 gold_assert(os->needs_symtab_index());
9681 unsigned int new_symndx = os->symtab_index();
9683 // Get the new offset--the location in the output section where
9684 // this relocation should be applied.
9686 Arm_address offset = reloc.get_r_offset();
9687 Arm_address new_offset;
9688 if (offset_in_output_section != invalid_address)
9689 new_offset = offset + offset_in_output_section;
9692 section_offset_type sot_offset =
9693 convert_types<section_offset_type, Arm_address>(offset);
9694 section_offset_type new_sot_offset =
9695 output_section->output_offset(object, relinfo->data_shndx,
9697 gold_assert(new_sot_offset != -1);
9698 new_offset = new_sot_offset;
9701 // In an object file, r_offset is an offset within the section.
9702 // In an executable or dynamic object, generated by
9703 // --emit-relocs, r_offset is an absolute address.
9704 if (!parameters->options().relocatable())
9706 new_offset += view_address;
9707 if (offset_in_output_section != invalid_address)
9708 new_offset -= offset_in_output_section;
9711 reloc_write.put_r_offset(new_offset);
9712 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
9714 // Handle the reloc addend.
9715 // The relocation uses a section symbol in the input file.
9716 // We are adjusting it to use a section symbol in the output
9717 // file. The input section symbol refers to some address in
9718 // the input section. We need the relocation in the output
9719 // file to refer to that same address. This adjustment to
9720 // the addend is the same calculation we use for a simple
9721 // absolute relocation for the input section symbol.
9723 const Symbol_value<32>* psymval = object->local_symbol(r_sym);
9725 // Handle THUMB bit.
9726 Symbol_value<32> symval;
9727 Arm_address thumb_bit =
9728 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9730 && arp->uses_thumb_bit()
9731 && ((psymval->value(object, 0) & 1) != 0))
9733 Arm_address stripped_value =
9734 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9735 symval.set_output_value(stripped_value);
9739 unsigned char* paddend = view + offset;
9740 typename Arm_relocate_functions<big_endian>::Status reloc_status =
9741 Arm_relocate_functions<big_endian>::STATUS_OKAY;
9744 case elfcpp::R_ARM_ABS8:
9745 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
9749 case elfcpp::R_ARM_ABS12:
9750 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
9754 case elfcpp::R_ARM_ABS16:
9755 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
9759 case elfcpp::R_ARM_THM_ABS5:
9760 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
9765 case elfcpp::R_ARM_MOVW_ABS_NC:
9766 case elfcpp::R_ARM_MOVW_PREL_NC:
9767 case elfcpp::R_ARM_MOVW_BREL_NC:
9768 case elfcpp::R_ARM_MOVW_BREL:
9769 reloc_status = Arm_relocate_functions<big_endian>::movw(
9770 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9773 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9774 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9775 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9776 case elfcpp::R_ARM_THM_MOVW_BREL:
9777 reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
9778 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
9781 case elfcpp::R_ARM_THM_CALL:
9782 case elfcpp::R_ARM_THM_XPC22:
9783 case elfcpp::R_ARM_THM_JUMP24:
9785 Arm_relocate_functions<big_endian>::thumb_branch_common(
9786 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9790 case elfcpp::R_ARM_PLT32:
9791 case elfcpp::R_ARM_CALL:
9792 case elfcpp::R_ARM_JUMP24:
9793 case elfcpp::R_ARM_XPC25:
9795 Arm_relocate_functions<big_endian>::arm_branch_common(
9796 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
9800 case elfcpp::R_ARM_THM_JUMP19:
9802 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
9803 psymval, 0, thumb_bit);
9806 case elfcpp::R_ARM_THM_JUMP6:
9808 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
9812 case elfcpp::R_ARM_THM_JUMP8:
9814 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
9818 case elfcpp::R_ARM_THM_JUMP11:
9820 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
9824 case elfcpp::R_ARM_PREL31:
9826 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
9830 case elfcpp::R_ARM_THM_PC8:
9832 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
9836 case elfcpp::R_ARM_THM_PC12:
9838 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
9842 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9844 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
9848 // These relocation truncate relocation results so we cannot handle them
9849 // in a relocatable link.
9850 case elfcpp::R_ARM_MOVT_ABS:
9851 case elfcpp::R_ARM_THM_MOVT_ABS:
9852 case elfcpp::R_ARM_MOVT_PREL:
9853 case elfcpp::R_ARM_MOVT_BREL:
9854 case elfcpp::R_ARM_THM_MOVT_PREL:
9855 case elfcpp::R_ARM_THM_MOVT_BREL:
9856 case elfcpp::R_ARM_ALU_PC_G0_NC:
9857 case elfcpp::R_ARM_ALU_PC_G0:
9858 case elfcpp::R_ARM_ALU_PC_G1_NC:
9859 case elfcpp::R_ARM_ALU_PC_G1:
9860 case elfcpp::R_ARM_ALU_PC_G2:
9861 case elfcpp::R_ARM_ALU_SB_G0_NC:
9862 case elfcpp::R_ARM_ALU_SB_G0:
9863 case elfcpp::R_ARM_ALU_SB_G1_NC:
9864 case elfcpp::R_ARM_ALU_SB_G1:
9865 case elfcpp::R_ARM_ALU_SB_G2:
9866 case elfcpp::R_ARM_LDR_PC_G0:
9867 case elfcpp::R_ARM_LDR_PC_G1:
9868 case elfcpp::R_ARM_LDR_PC_G2:
9869 case elfcpp::R_ARM_LDR_SB_G0:
9870 case elfcpp::R_ARM_LDR_SB_G1:
9871 case elfcpp::R_ARM_LDR_SB_G2:
9872 case elfcpp::R_ARM_LDRS_PC_G0:
9873 case elfcpp::R_ARM_LDRS_PC_G1:
9874 case elfcpp::R_ARM_LDRS_PC_G2:
9875 case elfcpp::R_ARM_LDRS_SB_G0:
9876 case elfcpp::R_ARM_LDRS_SB_G1:
9877 case elfcpp::R_ARM_LDRS_SB_G2:
9878 case elfcpp::R_ARM_LDC_PC_G0:
9879 case elfcpp::R_ARM_LDC_PC_G1:
9880 case elfcpp::R_ARM_LDC_PC_G2:
9881 case elfcpp::R_ARM_LDC_SB_G0:
9882 case elfcpp::R_ARM_LDC_SB_G1:
9883 case elfcpp::R_ARM_LDC_SB_G2:
9884 gold_error(_("cannot handle %s in a relocatable link"),
9885 arp->name().c_str());
9892 // Report any errors.
9893 switch (reloc_status)
9895 case Arm_relocate_functions<big_endian>::STATUS_OKAY:
9897 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
9898 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9899 _("relocation overflow in %s"),
9900 arp->name().c_str());
9902 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
9903 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
9904 _("unexpected opcode while processing relocation %s"),
9905 arp->name().c_str());
9912 // Return the value to use for a dynamic symbol which requires special
9913 // treatment. This is how we support equality comparisons of function
9914 // pointers across shared library boundaries, as described in the
9915 // processor specific ABI supplement.
9917 template<bool big_endian>
9919 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
9921 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
9922 return this->plt_section()->address() + gsym->plt_offset();
9925 // Map platform-specific relocs to real relocs
9927 template<bool big_endian>
9929 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type)
9933 case elfcpp::R_ARM_TARGET1:
9934 // This is either R_ARM_ABS32 or R_ARM_REL32;
9935 return elfcpp::R_ARM_ABS32;
9937 case elfcpp::R_ARM_TARGET2:
9938 // This can be any reloc type but usually is R_ARM_GOT_PREL
9939 return elfcpp::R_ARM_GOT_PREL;
9946 // Whether if two EABI versions V1 and V2 are compatible.
9948 template<bool big_endian>
9950 Target_arm<big_endian>::are_eabi_versions_compatible(
9951 elfcpp::Elf_Word v1,
9952 elfcpp::Elf_Word v2)
9954 // v4 and v5 are the same spec before and after it was released,
9955 // so allow mixing them.
9956 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
9957 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
9958 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
9964 // Combine FLAGS from an input object called NAME and the processor-specific
9965 // flags in the ELF header of the output. Much of this is adapted from the
9966 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
9967 // in bfd/elf32-arm.c.
9969 template<bool big_endian>
9971 Target_arm<big_endian>::merge_processor_specific_flags(
9972 const std::string& name,
9973 elfcpp::Elf_Word flags)
9975 if (this->are_processor_specific_flags_set())
9977 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
9979 // Nothing to merge if flags equal to those in output.
9980 if (flags == out_flags)
9983 // Complain about various flag mismatches.
9984 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
9985 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
9986 if (!this->are_eabi_versions_compatible(version1, version2)
9987 && parameters->options().warn_mismatch())
9988 gold_error(_("Source object %s has EABI version %d but output has "
9989 "EABI version %d."),
9991 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
9992 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
9996 // If the input is the default architecture and had the default
9997 // flags then do not bother setting the flags for the output
9998 // architecture, instead allow future merges to do this. If no
9999 // future merges ever set these flags then they will retain their
10000 // uninitialised values, which surprise surprise, correspond
10001 // to the default values.
10005 // This is the first time, just copy the flags.
10006 // We only copy the EABI version for now.
10007 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10011 // Adjust ELF file header.
10012 template<bool big_endian>
10014 Target_arm<big_endian>::do_adjust_elf_header(
10015 unsigned char* view,
10018 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10020 elfcpp::Ehdr<32, big_endian> ehdr(view);
10021 unsigned char e_ident[elfcpp::EI_NIDENT];
10022 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10024 if (elfcpp::arm_eabi_version(this->processor_specific_flags())
10025 == elfcpp::EF_ARM_EABI_UNKNOWN)
10026 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10028 e_ident[elfcpp::EI_OSABI] = 0;
10029 e_ident[elfcpp::EI_ABIVERSION] = 0;
10031 // FIXME: Do EF_ARM_BE8 adjustment.
10033 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10034 oehdr.put_e_ident(e_ident);
10037 // do_make_elf_object to override the same function in the base class.
10038 // We need to use a target-specific sub-class of
10039 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10040 // Hence we need to have our own ELF object creation.
10042 template<bool big_endian>
10044 Target_arm<big_endian>::do_make_elf_object(
10045 const std::string& name,
10046 Input_file* input_file,
10047 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10049 int et = ehdr.get_e_type();
10050 // ET_EXEC files are valid input for --just-symbols/-R,
10051 // and we treat them as relocatable objects.
10052 if (et == elfcpp::ET_REL
10053 || (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10055 Arm_relobj<big_endian>* obj =
10056 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10060 else if (et == elfcpp::ET_DYN)
10062 Sized_dynobj<32, big_endian>* obj =
10063 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10069 gold_error(_("%s: unsupported ELF file type %d"),
10075 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10076 // Returns -1 if no architecture could be read.
10077 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10079 template<bool big_endian>
10081 Target_arm<big_endian>::get_secondary_compatible_arch(
10082 const Attributes_section_data* pasd)
10084 const Object_attribute* known_attributes =
10085 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10087 // Note: the tag and its argument below are uleb128 values, though
10088 // currently-defined values fit in one byte for each.
10089 const std::string& sv =
10090 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10092 && sv.data()[0] == elfcpp::Tag_CPU_arch
10093 && (sv.data()[1] & 128) != 128)
10094 return sv.data()[1];
10096 // This tag is "safely ignorable", so don't complain if it looks funny.
10100 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10101 // The tag is removed if ARCH is -1.
10102 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10104 template<bool big_endian>
10106 Target_arm<big_endian>::set_secondary_compatible_arch(
10107 Attributes_section_data* pasd,
10110 Object_attribute* known_attributes =
10111 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10115 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10119 // Note: the tag and its argument below are uleb128 values, though
10120 // currently-defined values fit in one byte for each.
10122 sv[0] = elfcpp::Tag_CPU_arch;
10123 gold_assert(arch != 0);
10127 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10130 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10132 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10134 template<bool big_endian>
10136 Target_arm<big_endian>::tag_cpu_arch_combine(
10139 int* secondary_compat_out,
10141 int secondary_compat)
10143 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10144 static const int v6t2[] =
10146 T(V6T2), // PRE_V4.
10156 static const int v6k[] =
10169 static const int v7[] =
10183 static const int v6_m[] =
10198 static const int v6s_m[] =
10214 static const int v7e_m[] =
10221 T(V7E_M), // V5TEJ.
10228 T(V7E_M), // V6S_M.
10231 static const int v4t_plus_v6_m[] =
10238 T(V5TEJ), // V5TEJ.
10245 T(V6S_M), // V6S_M.
10246 T(V7E_M), // V7E_M.
10247 T(V4T_PLUS_V6_M) // V4T plus V6_M.
10249 static const int* comb[] =
10257 // Pseudo-architecture.
10261 // Check we've not got a higher architecture than we know about.
10263 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
10265 gold_error(_("%s: unknown CPU architecture"), name);
10269 // Override old tag if we have a Tag_also_compatible_with on the output.
10271 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
10272 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
10273 oldtag = T(V4T_PLUS_V6_M);
10275 // And override the new tag if we have a Tag_also_compatible_with on the
10278 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
10279 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
10280 newtag = T(V4T_PLUS_V6_M);
10282 // Architectures before V6KZ add features monotonically.
10283 int tagh = std::max(oldtag, newtag);
10284 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
10287 int tagl = std::min(oldtag, newtag);
10288 int result = comb[tagh - T(V6T2)][tagl];
10290 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
10291 // as the canonical version.
10292 if (result == T(V4T_PLUS_V6_M))
10295 *secondary_compat_out = T(V6_M);
10298 *secondary_compat_out = -1;
10302 gold_error(_("%s: conflicting CPU architectures %d/%d"),
10303 name, oldtag, newtag);
10311 // Helper to print AEABI enum tag value.
10313 template<bool big_endian>
10315 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
10317 static const char* aeabi_enum_names[] =
10318 { "", "variable-size", "32-bit", "" };
10319 const size_t aeabi_enum_names_size =
10320 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
10322 if (value < aeabi_enum_names_size)
10323 return std::string(aeabi_enum_names[value]);
10327 sprintf(buffer, "<unknown value %u>", value);
10328 return std::string(buffer);
10332 // Return the string value to store in TAG_CPU_name.
10334 template<bool big_endian>
10336 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
10338 static const char* name_table[] = {
10339 // These aren't real CPU names, but we can't guess
10340 // that from the architecture version alone.
10356 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
10358 if (value < name_table_size)
10359 return std::string(name_table[value]);
10363 sprintf(buffer, "<unknown CPU value %u>", value);
10364 return std::string(buffer);
10368 // Merge object attributes from input file called NAME with those of the
10369 // output. The input object attributes are in the object pointed by PASD.
10371 template<bool big_endian>
10373 Target_arm<big_endian>::merge_object_attributes(
10375 const Attributes_section_data* pasd)
10377 // Return if there is no attributes section data.
10381 // If output has no object attributes, just copy.
10382 const int vendor = Object_attribute::OBJ_ATTR_PROC;
10383 if (this->attributes_section_data_ == NULL)
10385 this->attributes_section_data_ = new Attributes_section_data(*pasd);
10386 Object_attribute* out_attr =
10387 this->attributes_section_data_->known_attributes(vendor);
10389 // We do not output objects with Tag_MPextension_use_legacy - we move
10390 // the attribute's value to Tag_MPextension_use. */
10391 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
10393 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
10394 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
10395 != out_attr[elfcpp::Tag_MPextension_use].int_value())
10397 gold_error(_("%s has both the current and legacy "
10398 "Tag_MPextension_use attributes"),
10402 out_attr[elfcpp::Tag_MPextension_use] =
10403 out_attr[elfcpp::Tag_MPextension_use_legacy];
10404 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
10405 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
10411 const Object_attribute* in_attr = pasd->known_attributes(vendor);
10412 Object_attribute* out_attr =
10413 this->attributes_section_data_->known_attributes(vendor);
10415 // This needs to happen before Tag_ABI_FP_number_model is merged. */
10416 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
10417 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
10419 // Ignore mismatches if the object doesn't use floating point. */
10420 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() == 0)
10421 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
10422 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
10423 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() != 0
10424 && parameters->options().warn_mismatch())
10425 gold_error(_("%s uses VFP register arguments, output does not"),
10429 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
10431 // Merge this attribute with existing attributes.
10434 case elfcpp::Tag_CPU_raw_name:
10435 case elfcpp::Tag_CPU_name:
10436 // These are merged after Tag_CPU_arch.
10439 case elfcpp::Tag_ABI_optimization_goals:
10440 case elfcpp::Tag_ABI_FP_optimization_goals:
10441 // Use the first value seen.
10444 case elfcpp::Tag_CPU_arch:
10446 unsigned int saved_out_attr = out_attr->int_value();
10447 // Merge Tag_CPU_arch and Tag_also_compatible_with.
10448 int secondary_compat =
10449 this->get_secondary_compatible_arch(pasd);
10450 int secondary_compat_out =
10451 this->get_secondary_compatible_arch(
10452 this->attributes_section_data_);
10453 out_attr[i].set_int_value(
10454 tag_cpu_arch_combine(name, out_attr[i].int_value(),
10455 &secondary_compat_out,
10456 in_attr[i].int_value(),
10457 secondary_compat));
10458 this->set_secondary_compatible_arch(this->attributes_section_data_,
10459 secondary_compat_out);
10461 // Merge Tag_CPU_name and Tag_CPU_raw_name.
10462 if (out_attr[i].int_value() == saved_out_attr)
10463 ; // Leave the names alone.
10464 else if (out_attr[i].int_value() == in_attr[i].int_value())
10466 // The output architecture has been changed to match the
10467 // input architecture. Use the input names.
10468 out_attr[elfcpp::Tag_CPU_name].set_string_value(
10469 in_attr[elfcpp::Tag_CPU_name].string_value());
10470 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
10471 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
10475 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
10476 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
10479 // If we still don't have a value for Tag_CPU_name,
10480 // make one up now. Tag_CPU_raw_name remains blank.
10481 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
10483 const std::string cpu_name =
10484 this->tag_cpu_name_value(out_attr[i].int_value());
10485 // FIXME: If we see an unknown CPU, this will be set
10486 // to "<unknown CPU n>", where n is the attribute value.
10487 // This is different from BFD, which leaves the name alone.
10488 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
10493 case elfcpp::Tag_ARM_ISA_use:
10494 case elfcpp::Tag_THUMB_ISA_use:
10495 case elfcpp::Tag_WMMX_arch:
10496 case elfcpp::Tag_Advanced_SIMD_arch:
10497 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
10498 case elfcpp::Tag_ABI_FP_rounding:
10499 case elfcpp::Tag_ABI_FP_exceptions:
10500 case elfcpp::Tag_ABI_FP_user_exceptions:
10501 case elfcpp::Tag_ABI_FP_number_model:
10502 case elfcpp::Tag_VFP_HP_extension:
10503 case elfcpp::Tag_CPU_unaligned_access:
10504 case elfcpp::Tag_T2EE_use:
10505 case elfcpp::Tag_Virtualization_use:
10506 case elfcpp::Tag_MPextension_use:
10507 // Use the largest value specified.
10508 if (in_attr[i].int_value() > out_attr[i].int_value())
10509 out_attr[i].set_int_value(in_attr[i].int_value());
10512 case elfcpp::Tag_ABI_align8_preserved:
10513 case elfcpp::Tag_ABI_PCS_RO_data:
10514 // Use the smallest value specified.
10515 if (in_attr[i].int_value() < out_attr[i].int_value())
10516 out_attr[i].set_int_value(in_attr[i].int_value());
10519 case elfcpp::Tag_ABI_align8_needed:
10520 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
10521 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
10522 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
10525 // This error message should be enabled once all non-conforming
10526 // binaries in the toolchain have had the attributes set
10528 // gold_error(_("output 8-byte data alignment conflicts with %s"),
10532 case elfcpp::Tag_ABI_FP_denormal:
10533 case elfcpp::Tag_ABI_PCS_GOT_use:
10535 // These tags have 0 = don't care, 1 = strong requirement,
10536 // 2 = weak requirement.
10537 static const int order_021[3] = {0, 2, 1};
10539 // Use the "greatest" from the sequence 0, 2, 1, or the largest
10540 // value if greater than 2 (for future-proofing).
10541 if ((in_attr[i].int_value() > 2
10542 && in_attr[i].int_value() > out_attr[i].int_value())
10543 || (in_attr[i].int_value() <= 2
10544 && out_attr[i].int_value() <= 2
10545 && (order_021[in_attr[i].int_value()]
10546 > order_021[out_attr[i].int_value()])))
10547 out_attr[i].set_int_value(in_attr[i].int_value());
10551 case elfcpp::Tag_CPU_arch_profile:
10552 if (out_attr[i].int_value() != in_attr[i].int_value())
10554 // 0 will merge with anything.
10555 // 'A' and 'S' merge to 'A'.
10556 // 'R' and 'S' merge to 'R'.
10557 // 'M' and 'A|R|S' is an error.
10558 if (out_attr[i].int_value() == 0
10559 || (out_attr[i].int_value() == 'S'
10560 && (in_attr[i].int_value() == 'A'
10561 || in_attr[i].int_value() == 'R')))
10562 out_attr[i].set_int_value(in_attr[i].int_value());
10563 else if (in_attr[i].int_value() == 0
10564 || (in_attr[i].int_value() == 'S'
10565 && (out_attr[i].int_value() == 'A'
10566 || out_attr[i].int_value() == 'R')))
10568 else if (parameters->options().warn_mismatch())
10571 (_("conflicting architecture profiles %c/%c"),
10572 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
10573 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
10577 case elfcpp::Tag_VFP_arch:
10579 static const struct
10583 } vfp_versions[7] =
10594 // Values greater than 6 aren't defined, so just pick the
10596 if (in_attr[i].int_value() > 6
10597 && in_attr[i].int_value() > out_attr[i].int_value())
10599 *out_attr = *in_attr;
10602 // The output uses the superset of input features
10603 // (ISA version) and registers.
10604 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
10605 vfp_versions[out_attr[i].int_value()].ver);
10606 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
10607 vfp_versions[out_attr[i].int_value()].regs);
10608 // This assumes all possible supersets are also a valid
10611 for (newval = 6; newval > 0; newval--)
10613 if (regs == vfp_versions[newval].regs
10614 && ver == vfp_versions[newval].ver)
10617 out_attr[i].set_int_value(newval);
10620 case elfcpp::Tag_PCS_config:
10621 if (out_attr[i].int_value() == 0)
10622 out_attr[i].set_int_value(in_attr[i].int_value());
10623 else if (in_attr[i].int_value() != 0
10624 && out_attr[i].int_value() != 0
10625 && parameters->options().warn_mismatch())
10627 // It's sometimes ok to mix different configs, so this is only
10629 gold_warning(_("%s: conflicting platform configuration"), name);
10632 case elfcpp::Tag_ABI_PCS_R9_use:
10633 if (in_attr[i].int_value() != out_attr[i].int_value()
10634 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
10635 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
10636 && parameters->options().warn_mismatch())
10638 gold_error(_("%s: conflicting use of R9"), name);
10640 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
10641 out_attr[i].set_int_value(in_attr[i].int_value());
10643 case elfcpp::Tag_ABI_PCS_RW_data:
10644 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
10645 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10646 != elfcpp::AEABI_R9_SB)
10647 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
10648 != elfcpp::AEABI_R9_unused)
10649 && parameters->options().warn_mismatch())
10651 gold_error(_("%s: SB relative addressing conflicts with use "
10655 // Use the smallest value specified.
10656 if (in_attr[i].int_value() < out_attr[i].int_value())
10657 out_attr[i].set_int_value(in_attr[i].int_value());
10659 case elfcpp::Tag_ABI_PCS_wchar_t:
10660 if (out_attr[i].int_value()
10661 && in_attr[i].int_value()
10662 && out_attr[i].int_value() != in_attr[i].int_value()
10663 && parameters->options().warn_mismatch()
10664 && parameters->options().wchar_size_warning())
10666 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
10667 "use %u-byte wchar_t; use of wchar_t values "
10668 "across objects may fail"),
10669 name, in_attr[i].int_value(),
10670 out_attr[i].int_value());
10672 else if (in_attr[i].int_value() && !out_attr[i].int_value())
10673 out_attr[i].set_int_value(in_attr[i].int_value());
10675 case elfcpp::Tag_ABI_enum_size:
10676 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
10678 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
10679 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
10681 // The existing object is compatible with anything.
10682 // Use whatever requirements the new object has.
10683 out_attr[i].set_int_value(in_attr[i].int_value());
10685 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
10686 && out_attr[i].int_value() != in_attr[i].int_value()
10687 && parameters->options().warn_mismatch()
10688 && parameters->options().enum_size_warning())
10690 unsigned int in_value = in_attr[i].int_value();
10691 unsigned int out_value = out_attr[i].int_value();
10692 gold_warning(_("%s uses %s enums yet the output is to use "
10693 "%s enums; use of enum values across objects "
10696 this->aeabi_enum_name(in_value).c_str(),
10697 this->aeabi_enum_name(out_value).c_str());
10701 case elfcpp::Tag_ABI_VFP_args:
10704 case elfcpp::Tag_ABI_WMMX_args:
10705 if (in_attr[i].int_value() != out_attr[i].int_value()
10706 && parameters->options().warn_mismatch())
10708 gold_error(_("%s uses iWMMXt register arguments, output does "
10713 case Object_attribute::Tag_compatibility:
10714 // Merged in target-independent code.
10716 case elfcpp::Tag_ABI_HardFP_use:
10717 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
10718 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
10719 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
10720 out_attr[i].set_int_value(3);
10721 else if (in_attr[i].int_value() > out_attr[i].int_value())
10722 out_attr[i].set_int_value(in_attr[i].int_value());
10724 case elfcpp::Tag_ABI_FP_16bit_format:
10725 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
10727 if (in_attr[i].int_value() != out_attr[i].int_value()
10728 && parameters->options().warn_mismatch())
10729 gold_error(_("fp16 format mismatch between %s and output"),
10732 if (in_attr[i].int_value() != 0)
10733 out_attr[i].set_int_value(in_attr[i].int_value());
10736 case elfcpp::Tag_DIV_use:
10737 // This tag is set to zero if we can use UDIV and SDIV in Thumb
10738 // mode on a v7-M or v7-R CPU; to one if we can not use UDIV or
10739 // SDIV at all; and to two if we can use UDIV or SDIV on a v7-A
10740 // CPU. We will merge as follows: If the input attribute's value
10741 // is one then the output attribute's value remains unchanged. If
10742 // the input attribute's value is zero or two then if the output
10743 // attribute's value is one the output value is set to the input
10744 // value, otherwise the output value must be the same as the
10746 if (in_attr[i].int_value() != 1 && out_attr[i].int_value() != 1)
10748 if (in_attr[i].int_value() != out_attr[i].int_value())
10750 gold_error(_("DIV usage mismatch between %s and output"),
10755 if (in_attr[i].int_value() != 1)
10756 out_attr[i].set_int_value(in_attr[i].int_value());
10760 case elfcpp::Tag_MPextension_use_legacy:
10761 // We don't output objects with Tag_MPextension_use_legacy - we
10762 // move the value to Tag_MPextension_use.
10763 if (in_attr[i].int_value() != 0
10764 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
10766 if (in_attr[elfcpp::Tag_MPextension_use].int_value()
10767 != in_attr[i].int_value())
10769 gold_error(_("%s has has both the current and legacy "
10770 "Tag_MPextension_use attributes"),
10775 if (in_attr[i].int_value()
10776 > out_attr[elfcpp::Tag_MPextension_use].int_value())
10777 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
10781 case elfcpp::Tag_nodefaults:
10782 // This tag is set if it exists, but the value is unused (and is
10783 // typically zero). We don't actually need to do anything here -
10784 // the merge happens automatically when the type flags are merged
10787 case elfcpp::Tag_also_compatible_with:
10788 // Already done in Tag_CPU_arch.
10790 case elfcpp::Tag_conformance:
10791 // Keep the attribute if it matches. Throw it away otherwise.
10792 // No attribute means no claim to conform.
10793 if (in_attr[i].string_value() != out_attr[i].string_value())
10794 out_attr[i].set_string_value("");
10799 const char* err_object = NULL;
10801 // The "known_obj_attributes" table does contain some undefined
10802 // attributes. Ensure that there are unused.
10803 if (out_attr[i].int_value() != 0
10804 || out_attr[i].string_value() != "")
10805 err_object = "output";
10806 else if (in_attr[i].int_value() != 0
10807 || in_attr[i].string_value() != "")
10810 if (err_object != NULL
10811 && parameters->options().warn_mismatch())
10813 // Attribute numbers >=64 (mod 128) can be safely ignored.
10814 if ((i & 127) < 64)
10815 gold_error(_("%s: unknown mandatory EABI object attribute "
10819 gold_warning(_("%s: unknown EABI object attribute %d"),
10823 // Only pass on attributes that match in both inputs.
10824 if (!in_attr[i].matches(out_attr[i]))
10826 out_attr[i].set_int_value(0);
10827 out_attr[i].set_string_value("");
10832 // If out_attr was copied from in_attr then it won't have a type yet.
10833 if (in_attr[i].type() && !out_attr[i].type())
10834 out_attr[i].set_type(in_attr[i].type());
10837 // Merge Tag_compatibility attributes and any common GNU ones.
10838 this->attributes_section_data_->merge(name, pasd);
10840 // Check for any attributes not known on ARM.
10841 typedef Vendor_object_attributes::Other_attributes Other_attributes;
10842 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
10843 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
10844 Other_attributes* out_other_attributes =
10845 this->attributes_section_data_->other_attributes(vendor);
10846 Other_attributes::iterator out_iter = out_other_attributes->begin();
10848 while (in_iter != in_other_attributes->end()
10849 || out_iter != out_other_attributes->end())
10851 const char* err_object = NULL;
10854 // The tags for each list are in numerical order.
10855 // If the tags are equal, then merge.
10856 if (out_iter != out_other_attributes->end()
10857 && (in_iter == in_other_attributes->end()
10858 || in_iter->first > out_iter->first))
10860 // This attribute only exists in output. We can't merge, and we
10861 // don't know what the tag means, so delete it.
10862 err_object = "output";
10863 err_tag = out_iter->first;
10864 int saved_tag = out_iter->first;
10865 delete out_iter->second;
10866 out_other_attributes->erase(out_iter);
10867 out_iter = out_other_attributes->upper_bound(saved_tag);
10869 else if (in_iter != in_other_attributes->end()
10870 && (out_iter != out_other_attributes->end()
10871 || in_iter->first < out_iter->first))
10873 // This attribute only exists in input. We can't merge, and we
10874 // don't know what the tag means, so ignore it.
10876 err_tag = in_iter->first;
10879 else // The tags are equal.
10881 // As present, all attributes in the list are unknown, and
10882 // therefore can't be merged meaningfully.
10883 err_object = "output";
10884 err_tag = out_iter->first;
10886 // Only pass on attributes that match in both inputs.
10887 if (!in_iter->second->matches(*(out_iter->second)))
10889 // No match. Delete the attribute.
10890 int saved_tag = out_iter->first;
10891 delete out_iter->second;
10892 out_other_attributes->erase(out_iter);
10893 out_iter = out_other_attributes->upper_bound(saved_tag);
10897 // Matched. Keep the attribute and move to the next.
10903 if (err_object && parameters->options().warn_mismatch())
10905 // Attribute numbers >=64 (mod 128) can be safely ignored. */
10906 if ((err_tag & 127) < 64)
10908 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
10909 err_object, err_tag);
10913 gold_warning(_("%s: unknown EABI object attribute %d"),
10914 err_object, err_tag);
10920 // Stub-generation methods for Target_arm.
10922 // Make a new Arm_input_section object.
10924 template<bool big_endian>
10925 Arm_input_section<big_endian>*
10926 Target_arm<big_endian>::new_arm_input_section(
10928 unsigned int shndx)
10930 Section_id sid(relobj, shndx);
10932 Arm_input_section<big_endian>* arm_input_section =
10933 new Arm_input_section<big_endian>(relobj, shndx);
10934 arm_input_section->init();
10936 // Register new Arm_input_section in map for look-up.
10937 std::pair<typename Arm_input_section_map::iterator, bool> ins =
10938 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
10940 // Make sure that it we have not created another Arm_input_section
10941 // for this input section already.
10942 gold_assert(ins.second);
10944 return arm_input_section;
10947 // Find the Arm_input_section object corresponding to the SHNDX-th input
10948 // section of RELOBJ.
10950 template<bool big_endian>
10951 Arm_input_section<big_endian>*
10952 Target_arm<big_endian>::find_arm_input_section(
10954 unsigned int shndx) const
10956 Section_id sid(relobj, shndx);
10957 typename Arm_input_section_map::const_iterator p =
10958 this->arm_input_section_map_.find(sid);
10959 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
10962 // Make a new stub table.
10964 template<bool big_endian>
10965 Stub_table<big_endian>*
10966 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
10968 Stub_table<big_endian>* stub_table =
10969 new Stub_table<big_endian>(owner);
10970 this->stub_tables_.push_back(stub_table);
10972 stub_table->set_address(owner->address() + owner->data_size());
10973 stub_table->set_file_offset(owner->offset() + owner->data_size());
10974 stub_table->finalize_data_size();
10979 // Scan a relocation for stub generation.
10981 template<bool big_endian>
10983 Target_arm<big_endian>::scan_reloc_for_stub(
10984 const Relocate_info<32, big_endian>* relinfo,
10985 unsigned int r_type,
10986 const Sized_symbol<32>* gsym,
10987 unsigned int r_sym,
10988 const Symbol_value<32>* psymval,
10989 elfcpp::Elf_types<32>::Elf_Swxword addend,
10990 Arm_address address)
10992 const Arm_relobj<big_endian>* arm_relobj =
10993 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
10995 bool target_is_thumb;
10996 Symbol_value<32> symval;
10999 // This is a global symbol. Determine if we use PLT and if the
11000 // final target is THUMB.
11001 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11003 // This uses a PLT, change the symbol value.
11004 symval.set_output_value(this->plt_section()->address()
11005 + gsym->plt_offset());
11007 target_is_thumb = false;
11009 else if (gsym->is_undefined())
11010 // There is no need to generate a stub symbol is undefined.
11015 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
11016 || (gsym->type() == elfcpp::STT_FUNC
11017 && !gsym->is_undefined()
11018 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
11023 // This is a local symbol. Determine if the final target is THUMB.
11024 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11027 // Strip LSB if this points to a THUMB target.
11028 const Arm_reloc_property* reloc_property =
11029 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11030 gold_assert(reloc_property != NULL);
11031 if (target_is_thumb
11032 && reloc_property->uses_thumb_bit()
11033 && ((psymval->value(arm_relobj, 0) & 1) != 0))
11035 Arm_address stripped_value =
11036 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11037 symval.set_output_value(stripped_value);
11041 // Get the symbol value.
11042 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11044 // Owing to pipelining, the PC relative branches below actually skip
11045 // two instructions when the branch offset is 0.
11046 Arm_address destination;
11049 case elfcpp::R_ARM_CALL:
11050 case elfcpp::R_ARM_JUMP24:
11051 case elfcpp::R_ARM_PLT32:
11053 destination = value + addend + 8;
11055 case elfcpp::R_ARM_THM_CALL:
11056 case elfcpp::R_ARM_THM_XPC22:
11057 case elfcpp::R_ARM_THM_JUMP24:
11058 case elfcpp::R_ARM_THM_JUMP19:
11060 destination = value + addend + 4;
11063 gold_unreachable();
11066 Reloc_stub* stub = NULL;
11067 Stub_type stub_type =
11068 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11070 if (stub_type != arm_stub_none)
11072 // Try looking up an existing stub from a stub table.
11073 Stub_table<big_endian>* stub_table =
11074 arm_relobj->stub_table(relinfo->data_shndx);
11075 gold_assert(stub_table != NULL);
11077 // Locate stub by destination.
11078 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11080 // Create a stub if there is not one already
11081 stub = stub_table->find_reloc_stub(stub_key);
11084 // create a new stub and add it to stub table.
11085 stub = this->stub_factory().make_reloc_stub(stub_type);
11086 stub_table->add_reloc_stub(stub, stub_key);
11089 // Record the destination address.
11090 stub->set_destination_address(destination
11091 | (target_is_thumb ? 1 : 0));
11094 // For Cortex-A8, we need to record a relocation at 4K page boundary.
11095 if (this->fix_cortex_a8_
11096 && (r_type == elfcpp::R_ARM_THM_JUMP24
11097 || r_type == elfcpp::R_ARM_THM_JUMP19
11098 || r_type == elfcpp::R_ARM_THM_CALL
11099 || r_type == elfcpp::R_ARM_THM_XPC22)
11100 && (address & 0xfffU) == 0xffeU)
11102 // Found a candidate. Note we haven't checked the destination is
11103 // within 4K here: if we do so (and don't create a record) we can't
11104 // tell that a branch should have been relocated when scanning later.
11105 this->cortex_a8_relocs_info_[address] =
11106 new Cortex_a8_reloc(stub, r_type,
11107 destination | (target_is_thumb ? 1 : 0));
11111 // This function scans a relocation sections for stub generation.
11112 // The template parameter Relocate must be a class type which provides
11113 // a single function, relocate(), which implements the machine
11114 // specific part of a relocation.
11116 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
11117 // SHT_REL or SHT_RELA.
11119 // PRELOCS points to the relocation data. RELOC_COUNT is the number
11120 // of relocs. OUTPUT_SECTION is the output section.
11121 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
11122 // mapped to output offsets.
11124 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
11125 // VIEW_SIZE is the size. These refer to the input section, unless
11126 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
11127 // the output section.
11129 template<bool big_endian>
11130 template<int sh_type>
11132 Target_arm<big_endian>::scan_reloc_section_for_stubs(
11133 const Relocate_info<32, big_endian>* relinfo,
11134 const unsigned char* prelocs,
11135 size_t reloc_count,
11136 Output_section* output_section,
11137 bool needs_special_offset_handling,
11138 const unsigned char* view,
11139 elfcpp::Elf_types<32>::Elf_Addr view_address,
11142 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
11143 const int reloc_size =
11144 Reloc_types<sh_type, 32, big_endian>::reloc_size;
11146 Arm_relobj<big_endian>* arm_object =
11147 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11148 unsigned int local_count = arm_object->local_symbol_count();
11150 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
11152 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
11154 Reltype reloc(prelocs);
11156 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
11157 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
11158 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
11160 r_type = this->get_real_reloc_type(r_type);
11162 // Only a few relocation types need stubs.
11163 if ((r_type != elfcpp::R_ARM_CALL)
11164 && (r_type != elfcpp::R_ARM_JUMP24)
11165 && (r_type != elfcpp::R_ARM_PLT32)
11166 && (r_type != elfcpp::R_ARM_THM_CALL)
11167 && (r_type != elfcpp::R_ARM_THM_XPC22)
11168 && (r_type != elfcpp::R_ARM_THM_JUMP24)
11169 && (r_type != elfcpp::R_ARM_THM_JUMP19)
11170 && (r_type != elfcpp::R_ARM_V4BX))
11173 section_offset_type offset =
11174 convert_to_section_size_type(reloc.get_r_offset());
11176 if (needs_special_offset_handling)
11178 offset = output_section->output_offset(relinfo->object,
11179 relinfo->data_shndx,
11185 // Create a v4bx stub if --fix-v4bx-interworking is used.
11186 if (r_type == elfcpp::R_ARM_V4BX)
11188 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
11190 // Get the BX instruction.
11191 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
11192 const Valtype* wv =
11193 reinterpret_cast<const Valtype*>(view + offset);
11194 elfcpp::Elf_types<32>::Elf_Swxword insn =
11195 elfcpp::Swap<32, big_endian>::readval(wv);
11196 const uint32_t reg = (insn & 0xf);
11200 // Try looking up an existing stub from a stub table.
11201 Stub_table<big_endian>* stub_table =
11202 arm_object->stub_table(relinfo->data_shndx);
11203 gold_assert(stub_table != NULL);
11205 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
11207 // create a new stub and add it to stub table.
11208 Arm_v4bx_stub* stub =
11209 this->stub_factory().make_arm_v4bx_stub(reg);
11210 gold_assert(stub != NULL);
11211 stub_table->add_arm_v4bx_stub(stub);
11219 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
11220 elfcpp::Elf_types<32>::Elf_Swxword addend =
11221 stub_addend_reader(r_type, view + offset, reloc);
11223 const Sized_symbol<32>* sym;
11225 Symbol_value<32> symval;
11226 const Symbol_value<32> *psymval;
11227 bool is_defined_in_discarded_section;
11228 unsigned int shndx;
11229 if (r_sym < local_count)
11232 psymval = arm_object->local_symbol(r_sym);
11234 // If the local symbol belongs to a section we are discarding,
11235 // and that section is a debug section, try to find the
11236 // corresponding kept section and map this symbol to its
11237 // counterpart in the kept section. The symbol must not
11238 // correspond to a section we are folding.
11240 shndx = psymval->input_shndx(&is_ordinary);
11241 is_defined_in_discarded_section =
11243 && shndx != elfcpp::SHN_UNDEF
11244 && !arm_object->is_section_included(shndx)
11245 && !relinfo->symtab->is_section_folded(arm_object, shndx));
11247 // We need to compute the would-be final value of this local
11249 if (!is_defined_in_discarded_section)
11251 typedef Sized_relobj_file<32, big_endian> ObjType;
11252 typename ObjType::Compute_final_local_value_status status =
11253 arm_object->compute_final_local_value(r_sym, psymval, &symval,
11255 if (status == ObjType::CFLV_OK)
11257 // Currently we cannot handle a branch to a target in
11258 // a merged section. If this is the case, issue an error
11259 // and also free the merge symbol value.
11260 if (!symval.has_output_value())
11262 const std::string& section_name =
11263 arm_object->section_name(shndx);
11264 arm_object->error(_("cannot handle branch to local %u "
11265 "in a merged section %s"),
11266 r_sym, section_name.c_str());
11272 // We cannot determine the final value.
11279 const Symbol* gsym;
11280 gsym = arm_object->global_symbol(r_sym);
11281 gold_assert(gsym != NULL);
11282 if (gsym->is_forwarder())
11283 gsym = relinfo->symtab->resolve_forwards(gsym);
11285 sym = static_cast<const Sized_symbol<32>*>(gsym);
11286 if (sym->has_symtab_index() && sym->symtab_index() != -1U)
11287 symval.set_output_symtab_index(sym->symtab_index());
11289 symval.set_no_output_symtab_entry();
11291 // We need to compute the would-be final value of this global
11293 const Symbol_table* symtab = relinfo->symtab;
11294 const Sized_symbol<32>* sized_symbol =
11295 symtab->get_sized_symbol<32>(gsym);
11296 Symbol_table::Compute_final_value_status status;
11297 Arm_address value =
11298 symtab->compute_final_value<32>(sized_symbol, &status);
11300 // Skip this if the symbol has not output section.
11301 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
11303 symval.set_output_value(value);
11305 if (gsym->type() == elfcpp::STT_TLS)
11306 symval.set_is_tls_symbol();
11307 else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
11308 symval.set_is_ifunc_symbol();
11311 is_defined_in_discarded_section =
11312 (gsym->is_defined_in_discarded_section()
11313 && gsym->is_undefined());
11317 Symbol_value<32> symval2;
11318 if (is_defined_in_discarded_section)
11320 if (comdat_behavior == CB_UNDETERMINED)
11322 std::string name = arm_object->section_name(relinfo->data_shndx);
11323 comdat_behavior = get_comdat_behavior(name.c_str());
11325 if (comdat_behavior == CB_PRETEND)
11327 // FIXME: This case does not work for global symbols.
11328 // We have no place to store the original section index.
11329 // Fortunately this does not matter for comdat sections,
11330 // only for sections explicitly discarded by a linker
11333 typename elfcpp::Elf_types<32>::Elf_Addr value =
11334 arm_object->map_to_kept_section(shndx, &found);
11336 symval2.set_output_value(value + psymval->input_value());
11338 symval2.set_output_value(0);
11342 if (comdat_behavior == CB_WARNING)
11343 gold_warning_at_location(relinfo, i, offset,
11344 _("relocation refers to discarded "
11346 symval2.set_output_value(0);
11348 symval2.set_no_output_symtab_entry();
11349 psymval = &symval2;
11352 // If symbol is a section symbol, we don't know the actual type of
11353 // destination. Give up.
11354 if (psymval->is_section_symbol())
11357 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
11358 addend, view_address + offset);
11362 // Scan an input section for stub generation.
11364 template<bool big_endian>
11366 Target_arm<big_endian>::scan_section_for_stubs(
11367 const Relocate_info<32, big_endian>* relinfo,
11368 unsigned int sh_type,
11369 const unsigned char* prelocs,
11370 size_t reloc_count,
11371 Output_section* output_section,
11372 bool needs_special_offset_handling,
11373 const unsigned char* view,
11374 Arm_address view_address,
11375 section_size_type view_size)
11377 if (sh_type == elfcpp::SHT_REL)
11378 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
11383 needs_special_offset_handling,
11387 else if (sh_type == elfcpp::SHT_RELA)
11388 // We do not support RELA type relocations yet. This is provided for
11390 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
11395 needs_special_offset_handling,
11400 gold_unreachable();
11403 // Group input sections for stub generation.
11405 // We group input sections in an output section so that the total size,
11406 // including any padding space due to alignment is smaller than GROUP_SIZE
11407 // unless the only input section in group is bigger than GROUP_SIZE already.
11408 // Then an ARM stub table is created to follow the last input section
11409 // in group. For each group an ARM stub table is created an is placed
11410 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
11411 // extend the group after the stub table.
11413 template<bool big_endian>
11415 Target_arm<big_endian>::group_sections(
11417 section_size_type group_size,
11418 bool stubs_always_after_branch,
11421 // Group input sections and insert stub table
11422 Layout::Section_list section_list;
11423 layout->get_allocated_sections(§ion_list);
11424 for (Layout::Section_list::const_iterator p = section_list.begin();
11425 p != section_list.end();
11428 Arm_output_section<big_endian>* output_section =
11429 Arm_output_section<big_endian>::as_arm_output_section(*p);
11430 output_section->group_sections(group_size, stubs_always_after_branch,
11435 // Relaxation hook. This is where we do stub generation.
11437 template<bool big_endian>
11439 Target_arm<big_endian>::do_relax(
11441 const Input_objects* input_objects,
11442 Symbol_table* symtab,
11446 // No need to generate stubs if this is a relocatable link.
11447 gold_assert(!parameters->options().relocatable());
11449 // If this is the first pass, we need to group input sections into
11451 bool done_exidx_fixup = false;
11452 typedef typename Stub_table_list::iterator Stub_table_iterator;
11455 // Determine the stub group size. The group size is the absolute
11456 // value of the parameter --stub-group-size. If --stub-group-size
11457 // is passed a negative value, we restrict stubs to be always after
11458 // the stubbed branches.
11459 int32_t stub_group_size_param =
11460 parameters->options().stub_group_size();
11461 bool stubs_always_after_branch = stub_group_size_param < 0;
11462 section_size_type stub_group_size = abs(stub_group_size_param);
11464 if (stub_group_size == 1)
11467 // Thumb branch range is +-4MB has to be used as the default
11468 // maximum size (a given section can contain both ARM and Thumb
11469 // code, so the worst case has to be taken into account). If we are
11470 // fixing cortex-a8 errata, the branch range has to be even smaller,
11471 // since wide conditional branch has a range of +-1MB only.
11473 // This value is 48K less than that, which allows for 4096
11474 // 12-byte stubs. If we exceed that, then we will fail to link.
11475 // The user will have to relink with an explicit group size
11477 stub_group_size = 4145152;
11480 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
11481 // page as the first half of a 32-bit branch straddling two 4K pages.
11482 // This is a crude way of enforcing that. In addition, long conditional
11483 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
11484 // erratum, limit the group size to (1M - 12k) to avoid unreachable
11485 // cortex-A8 stubs from long conditional branches.
11486 if (this->fix_cortex_a8_)
11488 stubs_always_after_branch = true;
11489 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
11490 stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
11493 group_sections(layout, stub_group_size, stubs_always_after_branch, task);
11495 // Also fix .ARM.exidx section coverage.
11496 Arm_output_section<big_endian>* exidx_output_section = NULL;
11497 for (Layout::Section_list::const_iterator p =
11498 layout->section_list().begin();
11499 p != layout->section_list().end();
11501 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
11503 if (exidx_output_section == NULL)
11504 exidx_output_section =
11505 Arm_output_section<big_endian>::as_arm_output_section(*p);
11507 // We cannot handle this now.
11508 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
11509 "non-relocatable link"),
11510 exidx_output_section->name(),
11514 if (exidx_output_section != NULL)
11516 this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
11518 done_exidx_fixup = true;
11523 // If this is not the first pass, addresses and file offsets have
11524 // been reset at this point, set them here.
11525 for (Stub_table_iterator sp = this->stub_tables_.begin();
11526 sp != this->stub_tables_.end();
11529 Arm_input_section<big_endian>* owner = (*sp)->owner();
11530 off_t off = align_address(owner->original_size(),
11531 (*sp)->addralign());
11532 (*sp)->set_address_and_file_offset(owner->address() + off,
11533 owner->offset() + off);
11537 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
11538 // beginning of each relaxation pass, just blow away all the stubs.
11539 // Alternatively, we could selectively remove only the stubs and reloc
11540 // information for code sections that have moved since the last pass.
11541 // That would require more book-keeping.
11542 if (this->fix_cortex_a8_)
11544 // Clear all Cortex-A8 reloc information.
11545 for (typename Cortex_a8_relocs_info::const_iterator p =
11546 this->cortex_a8_relocs_info_.begin();
11547 p != this->cortex_a8_relocs_info_.end();
11550 this->cortex_a8_relocs_info_.clear();
11552 // Remove all Cortex-A8 stubs.
11553 for (Stub_table_iterator sp = this->stub_tables_.begin();
11554 sp != this->stub_tables_.end();
11556 (*sp)->remove_all_cortex_a8_stubs();
11559 // Scan relocs for relocation stubs
11560 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11561 op != input_objects->relobj_end();
11564 Arm_relobj<big_endian>* arm_relobj =
11565 Arm_relobj<big_endian>::as_arm_relobj(*op);
11566 // Lock the object so we can read from it. This is only called
11567 // single-threaded from Layout::finalize, so it is OK to lock.
11568 Task_lock_obj<Object> tl(task, arm_relobj);
11569 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
11572 // Check all stub tables to see if any of them have their data sizes
11573 // or addresses alignments changed. These are the only things that
11575 bool any_stub_table_changed = false;
11576 Unordered_set<const Output_section*> sections_needing_adjustment;
11577 for (Stub_table_iterator sp = this->stub_tables_.begin();
11578 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
11581 if ((*sp)->update_data_size_and_addralign())
11583 // Update data size of stub table owner.
11584 Arm_input_section<big_endian>* owner = (*sp)->owner();
11585 uint64_t address = owner->address();
11586 off_t offset = owner->offset();
11587 owner->reset_address_and_file_offset();
11588 owner->set_address_and_file_offset(address, offset);
11590 sections_needing_adjustment.insert(owner->output_section());
11591 any_stub_table_changed = true;
11595 // Output_section_data::output_section() returns a const pointer but we
11596 // need to update output sections, so we record all output sections needing
11597 // update above and scan the sections here to find out what sections need
11599 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
11600 p != layout->section_list().end();
11603 if (sections_needing_adjustment.find(*p)
11604 != sections_needing_adjustment.end())
11605 (*p)->set_section_offsets_need_adjustment();
11608 // Stop relaxation if no EXIDX fix-up and no stub table change.
11609 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
11611 // Finalize the stubs in the last relaxation pass.
11612 if (!continue_relaxation)
11614 for (Stub_table_iterator sp = this->stub_tables_.begin();
11615 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
11617 (*sp)->finalize_stubs();
11619 // Update output local symbol counts of objects if necessary.
11620 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
11621 op != input_objects->relobj_end();
11624 Arm_relobj<big_endian>* arm_relobj =
11625 Arm_relobj<big_endian>::as_arm_relobj(*op);
11627 // Update output local symbol counts. We need to discard local
11628 // symbols defined in parts of input sections that are discarded by
11630 if (arm_relobj->output_local_symbol_count_needs_update())
11632 // We need to lock the object's file to update it.
11633 Task_lock_obj<Object> tl(task, arm_relobj);
11634 arm_relobj->update_output_local_symbol_count();
11639 return continue_relaxation;
11642 // Relocate a stub.
11644 template<bool big_endian>
11646 Target_arm<big_endian>::relocate_stub(
11648 const Relocate_info<32, big_endian>* relinfo,
11649 Output_section* output_section,
11650 unsigned char* view,
11651 Arm_address address,
11652 section_size_type view_size)
11655 const Stub_template* stub_template = stub->stub_template();
11656 for (size_t i = 0; i < stub_template->reloc_count(); i++)
11658 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
11659 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
11661 unsigned int r_type = insn->r_type();
11662 section_size_type reloc_offset = stub_template->reloc_offset(i);
11663 section_size_type reloc_size = insn->size();
11664 gold_assert(reloc_offset + reloc_size <= view_size);
11666 // This is the address of the stub destination.
11667 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
11668 Symbol_value<32> symval;
11669 symval.set_output_value(target);
11671 // Synthesize a fake reloc just in case. We don't have a symbol so
11673 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
11674 memset(reloc_buffer, 0, sizeof(reloc_buffer));
11675 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
11676 reloc_write.put_r_offset(reloc_offset);
11677 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
11678 elfcpp::Rel<32, big_endian> rel(reloc_buffer);
11680 relocate.relocate(relinfo, this, output_section,
11681 this->fake_relnum_for_stubs, rel, r_type,
11682 NULL, &symval, view + reloc_offset,
11683 address + reloc_offset, reloc_size);
11687 // Determine whether an object attribute tag takes an integer, a
11690 template<bool big_endian>
11692 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
11694 if (tag == Object_attribute::Tag_compatibility)
11695 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11696 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
11697 else if (tag == elfcpp::Tag_nodefaults)
11698 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
11699 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
11700 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
11701 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
11703 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
11705 return ((tag & 1) != 0
11706 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
11707 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
11710 // Reorder attributes.
11712 // The ABI defines that Tag_conformance should be emitted first, and that
11713 // Tag_nodefaults should be second (if either is defined). This sets those
11714 // two positions, and bumps up the position of all the remaining tags to
11717 template<bool big_endian>
11719 Target_arm<big_endian>::do_attributes_order(int num) const
11721 // Reorder the known object attributes in output. We want to move
11722 // Tag_conformance to position 4 and Tag_conformance to position 5
11723 // and shift everything between 4 .. Tag_conformance - 1 to make room.
11725 return elfcpp::Tag_conformance;
11727 return elfcpp::Tag_nodefaults;
11728 if ((num - 2) < elfcpp::Tag_nodefaults)
11730 if ((num - 1) < elfcpp::Tag_conformance)
11735 // Scan a span of THUMB code for Cortex-A8 erratum.
11737 template<bool big_endian>
11739 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
11740 Arm_relobj<big_endian>* arm_relobj,
11741 unsigned int shndx,
11742 section_size_type span_start,
11743 section_size_type span_end,
11744 const unsigned char* view,
11745 Arm_address address)
11747 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
11749 // The opcode is BLX.W, BL.W, B.W, Bcc.W
11750 // The branch target is in the same 4KB region as the
11751 // first half of the branch.
11752 // The instruction before the branch is a 32-bit
11753 // length non-branch instruction.
11754 section_size_type i = span_start;
11755 bool last_was_32bit = false;
11756 bool last_was_branch = false;
11757 while (i < span_end)
11759 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11760 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
11761 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
11762 bool is_blx = false, is_b = false;
11763 bool is_bl = false, is_bcc = false;
11765 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
11768 // Load the rest of the insn (in manual-friendly order).
11769 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
11771 // Encoding T4: B<c>.W.
11772 is_b = (insn & 0xf800d000U) == 0xf0009000U;
11773 // Encoding T1: BL<c>.W.
11774 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
11775 // Encoding T2: BLX<c>.W.
11776 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
11777 // Encoding T3: B<c>.W (not permitted in IT block).
11778 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
11779 && (insn & 0x07f00000U) != 0x03800000U);
11782 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
11784 // If this instruction is a 32-bit THUMB branch that crosses a 4K
11785 // page boundary and it follows 32-bit non-branch instruction,
11786 // we need to work around.
11787 if (is_32bit_branch
11788 && ((address + i) & 0xfffU) == 0xffeU
11790 && !last_was_branch)
11792 // Check to see if there is a relocation stub for this branch.
11793 bool force_target_arm = false;
11794 bool force_target_thumb = false;
11795 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
11796 Cortex_a8_relocs_info::const_iterator p =
11797 this->cortex_a8_relocs_info_.find(address + i);
11799 if (p != this->cortex_a8_relocs_info_.end())
11801 cortex_a8_reloc = p->second;
11802 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
11804 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11805 && !target_is_thumb)
11806 force_target_arm = true;
11807 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
11808 && target_is_thumb)
11809 force_target_thumb = true;
11813 Stub_type stub_type = arm_stub_none;
11815 // Check if we have an offending branch instruction.
11816 uint16_t upper_insn = (insn >> 16) & 0xffffU;
11817 uint16_t lower_insn = insn & 0xffffU;
11818 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
11820 if (cortex_a8_reloc != NULL
11821 && cortex_a8_reloc->reloc_stub() != NULL)
11822 // We've already made a stub for this instruction, e.g.
11823 // it's a long branch or a Thumb->ARM stub. Assume that
11824 // stub will suffice to work around the A8 erratum (see
11825 // setting of always_after_branch above).
11829 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
11831 stub_type = arm_stub_a8_veneer_b_cond;
11833 else if (is_b || is_bl || is_blx)
11835 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
11840 stub_type = (is_blx
11841 ? arm_stub_a8_veneer_blx
11843 ? arm_stub_a8_veneer_bl
11844 : arm_stub_a8_veneer_b));
11847 if (stub_type != arm_stub_none)
11849 Arm_address pc_for_insn = address + i + 4;
11851 // The original instruction is a BL, but the target is
11852 // an ARM instruction. If we were not making a stub,
11853 // the BL would have been converted to a BLX. Use the
11854 // BLX stub instead in that case.
11855 if (this->may_use_v5t_interworking() && force_target_arm
11856 && stub_type == arm_stub_a8_veneer_bl)
11858 stub_type = arm_stub_a8_veneer_blx;
11862 // Conversely, if the original instruction was
11863 // BLX but the target is Thumb mode, use the BL stub.
11864 else if (force_target_thumb
11865 && stub_type == arm_stub_a8_veneer_blx)
11867 stub_type = arm_stub_a8_veneer_bl;
11875 // If we found a relocation, use the proper destination,
11876 // not the offset in the (unrelocated) instruction.
11877 // Note this is always done if we switched the stub type above.
11878 if (cortex_a8_reloc != NULL)
11879 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
11881 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
11883 // Add a new stub if destination address in in the same page.
11884 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
11886 Cortex_a8_stub* stub =
11887 this->stub_factory_.make_cortex_a8_stub(stub_type,
11891 Stub_table<big_endian>* stub_table =
11892 arm_relobj->stub_table(shndx);
11893 gold_assert(stub_table != NULL);
11894 stub_table->add_cortex_a8_stub(address + i, stub);
11899 i += insn_32bit ? 4 : 2;
11900 last_was_32bit = insn_32bit;
11901 last_was_branch = is_32bit_branch;
11905 // Apply the Cortex-A8 workaround.
11907 template<bool big_endian>
11909 Target_arm<big_endian>::apply_cortex_a8_workaround(
11910 const Cortex_a8_stub* stub,
11911 Arm_address stub_address,
11912 unsigned char* insn_view,
11913 Arm_address insn_address)
11915 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
11916 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
11917 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
11918 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
11919 off_t branch_offset = stub_address - (insn_address + 4);
11921 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
11922 switch (stub->stub_template()->type())
11924 case arm_stub_a8_veneer_b_cond:
11925 // For a conditional branch, we re-write it to be an unconditional
11926 // branch to the stub. We use the THUMB-2 encoding here.
11927 upper_insn = 0xf000U;
11928 lower_insn = 0xb800U;
11930 case arm_stub_a8_veneer_b:
11931 case arm_stub_a8_veneer_bl:
11932 case arm_stub_a8_veneer_blx:
11933 if ((lower_insn & 0x5000U) == 0x4000U)
11934 // For a BLX instruction, make sure that the relocation is
11935 // rounded up to a word boundary. This follows the semantics of
11936 // the instruction which specifies that bit 1 of the target
11937 // address will come from bit 1 of the base address.
11938 branch_offset = (branch_offset + 2) & ~3;
11940 // Put BRANCH_OFFSET back into the insn.
11941 gold_assert(!Bits<25>::has_overflow32(branch_offset));
11942 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
11943 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
11947 gold_unreachable();
11950 // Put the relocated value back in the object file:
11951 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
11952 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
11955 // Target selector for ARM. Note this is never instantiated directly.
11956 // It's only used in Target_selector_arm_nacl, below.
11958 template<bool big_endian>
11959 class Target_selector_arm : public Target_selector
11962 Target_selector_arm()
11963 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
11964 (big_endian ? "elf32-bigarm" : "elf32-littlearm"),
11965 (big_endian ? "armelfb" : "armelf"))
11969 do_instantiate_target()
11970 { return new Target_arm<big_endian>(); }
11973 // Fix .ARM.exidx section coverage.
11975 template<bool big_endian>
11977 Target_arm<big_endian>::fix_exidx_coverage(
11979 const Input_objects* input_objects,
11980 Arm_output_section<big_endian>* exidx_section,
11981 Symbol_table* symtab,
11984 // We need to look at all the input sections in output in ascending
11985 // order of of output address. We do that by building a sorted list
11986 // of output sections by addresses. Then we looks at the output sections
11987 // in order. The input sections in an output section are already sorted
11988 // by addresses within the output section.
11990 typedef std::set<Output_section*, output_section_address_less_than>
11991 Sorted_output_section_list;
11992 Sorted_output_section_list sorted_output_sections;
11994 // Find out all the output sections of input sections pointed by
11995 // EXIDX input sections.
11996 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
11997 p != input_objects->relobj_end();
12000 Arm_relobj<big_endian>* arm_relobj =
12001 Arm_relobj<big_endian>::as_arm_relobj(*p);
12002 std::vector<unsigned int> shndx_list;
12003 arm_relobj->get_exidx_shndx_list(&shndx_list);
12004 for (size_t i = 0; i < shndx_list.size(); ++i)
12006 const Arm_exidx_input_section* exidx_input_section =
12007 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12008 gold_assert(exidx_input_section != NULL);
12009 if (!exidx_input_section->has_errors())
12011 unsigned int text_shndx = exidx_input_section->link();
12012 Output_section* os = arm_relobj->output_section(text_shndx);
12013 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12014 sorted_output_sections.insert(os);
12019 // Go over the output sections in ascending order of output addresses.
12020 typedef typename Arm_output_section<big_endian>::Text_section_list
12022 Text_section_list sorted_text_sections;
12023 for (typename Sorted_output_section_list::iterator p =
12024 sorted_output_sections.begin();
12025 p != sorted_output_sections.end();
12028 Arm_output_section<big_endian>* arm_output_section =
12029 Arm_output_section<big_endian>::as_arm_output_section(*p);
12030 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12033 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12034 merge_exidx_entries(), task);
12037 template<bool big_endian>
12039 Target_arm<big_endian>::do_define_standard_symbols(
12040 Symbol_table* symtab,
12043 // Handle the .ARM.exidx section.
12044 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12046 if (exidx_section != NULL)
12048 // Create __exidx_start and __exidx_end symbols.
12049 symtab->define_in_output_data("__exidx_start",
12051 Symbol_table::PREDEFINED,
12055 elfcpp::STT_NOTYPE,
12056 elfcpp::STB_GLOBAL,
12057 elfcpp::STV_HIDDEN,
12059 false, // offset_is_from_end
12060 true); // only_if_ref
12062 symtab->define_in_output_data("__exidx_end",
12064 Symbol_table::PREDEFINED,
12068 elfcpp::STT_NOTYPE,
12069 elfcpp::STB_GLOBAL,
12070 elfcpp::STV_HIDDEN,
12072 true, // offset_is_from_end
12073 true); // only_if_ref
12077 // Define __exidx_start and __exidx_end even when .ARM.exidx
12078 // section is missing to match ld's behaviour.
12079 symtab->define_as_constant("__exidx_start", NULL,
12080 Symbol_table::PREDEFINED,
12081 0, 0, elfcpp::STT_OBJECT,
12082 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12084 symtab->define_as_constant("__exidx_end", NULL,
12085 Symbol_table::PREDEFINED,
12086 0, 0, elfcpp::STT_OBJECT,
12087 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12092 // NaCl variant. It uses different PLT contents.
12094 template<bool big_endian>
12095 class Output_data_plt_arm_nacl;
12097 template<bool big_endian>
12098 class Target_arm_nacl : public Target_arm<big_endian>
12102 : Target_arm<big_endian>(&arm_nacl_info)
12106 virtual Output_data_plt_arm<big_endian>*
12107 do_make_data_plt(Layout* layout, Output_data_space* got_plt)
12108 { return new Output_data_plt_arm_nacl<big_endian>(layout, got_plt); }
12111 static const Target::Target_info arm_nacl_info;
12114 template<bool big_endian>
12115 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
12118 big_endian, // is_big_endian
12119 elfcpp::EM_ARM, // machine_code
12120 false, // has_make_symbol
12121 false, // has_resolve
12122 false, // has_code_fill
12123 true, // is_default_stack_executable
12124 false, // can_icf_inline_merge_sections
12126 "/lib/ld-nacl-arm.so.1", // dynamic_linker
12127 0x20000, // default_text_segment_address
12128 0x10000, // abi_pagesize (overridable by -z max-page-size)
12129 0x10000, // common_pagesize (overridable by -z common-page-size)
12130 true, // isolate_execinstr
12131 0x10000000, // rosegment_gap
12132 elfcpp::SHN_UNDEF, // small_common_shndx
12133 elfcpp::SHN_UNDEF, // large_common_shndx
12134 0, // small_common_section_flags
12135 0, // large_common_section_flags
12136 ".ARM.attributes", // attributes_section
12137 "aeabi" // attributes_vendor
12140 template<bool big_endian>
12141 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
12144 Output_data_plt_arm_nacl(Layout* layout, Output_data_space* got_plt)
12145 : Output_data_plt_arm<big_endian>(layout, 16, got_plt)
12149 // Return the offset of the first non-reserved PLT entry.
12150 virtual unsigned int
12151 do_first_plt_entry_offset() const
12152 { return sizeof(first_plt_entry); }
12154 // Return the size of a PLT entry.
12155 virtual unsigned int
12156 do_get_plt_entry_size() const
12157 { return sizeof(plt_entry); }
12160 do_fill_first_plt_entry(unsigned char* pov,
12161 Arm_address got_address,
12162 Arm_address plt_address);
12165 do_fill_plt_entry(unsigned char* pov,
12166 Arm_address got_address,
12167 Arm_address plt_address,
12168 unsigned int got_offset,
12169 unsigned int plt_offset);
12172 inline uint32_t arm_movw_immediate(uint32_t value)
12174 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
12177 inline uint32_t arm_movt_immediate(uint32_t value)
12179 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
12182 // Template for the first PLT entry.
12183 static const uint32_t first_plt_entry[16];
12185 // Template for subsequent PLT entries.
12186 static const uint32_t plt_entry[4];
12189 // The first entry in the PLT.
12190 template<bool big_endian>
12191 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
12194 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
12195 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
12196 0xe08cc00f, // add ip, ip, pc
12197 0xe52dc008, // str ip, [sp, #-8]!
12199 0xe3ccc103, // bic ip, ip, #0xc0000000
12200 0xe59cc000, // ldr ip, [ip]
12201 0xe3ccc13f, // bic ip, ip, #0xc000000f
12202 0xe12fff1c, // bx ip
12208 0xe50dc004, // str ip, [sp, #-4]
12210 0xe3ccc103, // bic ip, ip, #0xc0000000
12211 0xe59cc000, // ldr ip, [ip]
12212 0xe3ccc13f, // bic ip, ip, #0xc000000f
12213 0xe12fff1c, // bx ip
12216 template<bool big_endian>
12218 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
12219 unsigned char* pov,
12220 Arm_address got_address,
12221 Arm_address plt_address)
12223 // Write first PLT entry. All but first two words are constants.
12224 const size_t num_first_plt_words = (sizeof(first_plt_entry)
12225 / sizeof(first_plt_entry[0]));
12227 int32_t got_displacement = got_address + 8 - (plt_address + 16);
12229 elfcpp::Swap<32, big_endian>::writeval
12230 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
12231 elfcpp::Swap<32, big_endian>::writeval
12232 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
12234 for (size_t i = 2; i < num_first_plt_words; ++i)
12235 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
12238 // Subsequent entries in the PLT.
12240 template<bool big_endian>
12241 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
12243 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
12244 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
12245 0xe08cc00f, // add ip, ip, pc
12246 0xea000000, // b .Lplt_tail
12249 template<bool big_endian>
12251 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
12252 unsigned char* pov,
12253 Arm_address got_address,
12254 Arm_address plt_address,
12255 unsigned int got_offset,
12256 unsigned int plt_offset)
12258 // Calculate the displacement between the PLT slot and the
12259 // common tail that's part of the special initial PLT slot.
12260 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
12261 - (plt_address + plt_offset
12262 + sizeof(plt_entry) + sizeof(uint32_t)));
12263 gold_assert((tail_displacement & 3) == 0);
12264 tail_displacement >>= 2;
12266 gold_assert ((tail_displacement & 0xff000000) == 0
12267 || (-tail_displacement & 0xff000000) == 0);
12269 // Calculate the displacement between the PLT slot and the entry
12270 // in the GOT. The offset accounts for the value produced by
12271 // adding to pc in the penultimate instruction of the PLT stub.
12272 const int32_t got_displacement = (got_address + got_offset
12273 - (plt_address + sizeof(plt_entry)));
12275 elfcpp::Swap<32, big_endian>::writeval
12276 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
12277 elfcpp::Swap<32, big_endian>::writeval
12278 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
12279 elfcpp::Swap<32, big_endian>::writeval
12280 (pov + 8, plt_entry[2]);
12281 elfcpp::Swap<32, big_endian>::writeval
12282 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
12285 // Target selectors.
12287 template<bool big_endian>
12288 class Target_selector_arm_nacl
12289 : public Target_selector_nacl<Target_selector_arm<big_endian>,
12290 Target_arm_nacl<big_endian> >
12293 Target_selector_arm_nacl()
12294 : Target_selector_nacl<Target_selector_arm<big_endian>,
12295 Target_arm_nacl<big_endian> >(
12297 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
12298 big_endian ? "armelfb_nacl" : "armelf_nacl")
12302 Target_selector_arm_nacl<false> target_selector_arm;
12303 Target_selector_arm_nacl<true> target_selector_armbe;
12305 } // End anonymous namespace.