1 This is as.info, produced by makeinfo version 4.8 from as.texinfo.
3 INFO-DIR-SECTION Software development
5 * As: (as). The GNU assembler.
6 * Gas: (as). The GNU assembler.
9 This file documents the GNU Assembler "as".
11 Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
12 2000, 2001, 2002, 2006, 2007, 2008, 2009, 2010, 2011 Free Software
15 Permission is granted to copy, distribute and/or modify this document
16 under the terms of the GNU Free Documentation License, Version 1.3 or
17 any later version published by the Free Software Foundation; with no
18 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
19 Texts. A copy of the license is included in the section entitled "GNU
20 Free Documentation License".
23 File: as.info, Node: Top, Next: Overview, Up: (dir)
28 This file is a user guide to the GNU assembler `as' (GNU Binutils)
31 This document is distributed under the terms of the GNU Free
32 Documentation License. A copy of the license is included in the
33 section entitled "GNU Free Documentation License".
38 * Invoking:: Command-Line Options
40 * Sections:: Sections and Relocation
42 * Expressions:: Expressions
43 * Pseudo Ops:: Assembler Directives
45 * Object Attributes:: Object Attributes
46 * Machine Dependencies:: Machine Dependent Features
47 * Reporting Bugs:: Reporting Bugs
48 * Acknowledgements:: Who Did What
49 * GNU Free Documentation License:: GNU Free Documentation License
53 File: as.info, Node: Overview, Next: Invoking, Prev: Top, Up: Top
58 Here is a brief summary of how to invoke `as'. For details, see *Note
59 Command-Line Options: Invoking.
61 as [-a[cdghlns][=FILE]] [-alternate] [-D]
62 [-compress-debug-sections] [-nocompress-debug-sections]
63 [-debug-prefix-map OLD=NEW]
64 [-defsym SYM=VAL] [-f] [-g] [-gstabs]
65 [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J]
66 [-K] [-L] [-listing-lhs-width=NUM]
67 [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM]
68 [-listing-cont-lines=NUM] [-keep-locals] [-o
69 OBJFILE] [-R] [-reduce-memory-overheads] [-statistics]
70 [-v] [-version] [-version] [-W] [-warn]
71 [-fatal-warnings] [-w] [-x] [-Z] [@FILE]
72 [-size-check=[error|warning]]
73 [-target-help] [TARGET-OPTIONS]
76 _Target AArch64 options:_
79 _Target Alpha options:_
81 [-mdebug | -no-mdebug]
82 [-replace | -noreplace]
83 [-relax] [-g] [-GSIZE]
91 [-mcpu=PROCESSOR[+EXTENSION...]]
92 [-march=ARCHITECTURE[+EXTENSION...]]
93 [-mfpu=FLOATING-POINT-FORMAT]
98 [-mapcs-32|-mapcs-26|-mapcs-float|
100 [-mthumb-interwork] [-k]
102 _Target Blackfin options:_
103 [-mcpu=PROCESSOR[-SIREVISION]]
108 _Target CRIS options:_
109 [-underscore | -no-underscore]
111 [-emulation=criself | -emulation=crisaout]
112 [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32]
114 _Target D10V options:_
117 _Target D30V options:_
120 _Target EPIPHANY options:_
121 [-mepiphany|-mepiphany16]
123 _Target H8/300 options:_
126 _Target i386 options:_
128 [-march=CPU[+EXTENSION...]] [-mtune=CPU]
130 _Target i960 options:_
131 [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
135 _Target IA-64 options:_
136 [-mconstant-gp|-mauto-pic]
137 [-milp32|-milp64|-mlp64|-mp64]
139 [-mtune=itanium1|-mtune=itanium2]
140 [-munwind-check=warning|-munwind-check=error]
141 [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
142 [-x|-xexplicit] [-xauto] [-xdebug]
144 _Target IP2K options:_
145 [-mip2022|-mip2022ext]
147 _Target M32C options:_
148 [-m32c|-m16c] [-relax] [-h-tick-hex]
150 _Target M32R options:_
151 [-m32rx|-[no-]warn-explicit-parallel-conflicts|
154 _Target M680X0 options:_
155 [-l] [-m68000|-m68010|-m68020|...]
157 _Target M68HC11 options:_
158 [-m68hc11|-m68hc12|-m68hcs12|-mm9s12x|-mm9s12xg]
160 [-mshort-double|-mlong-double]
161 [-force-long-branches] [-short-branches]
162 [-strict-direct-mode] [-print-insn-syntax]
163 [-print-opcodes] [-generate-example]
165 _Target MCORE options:_
166 [-jsri2bsr] [-sifilter] [-relax]
168 _Target MICROBLAZE options:_
170 _Target MIPS options:_
171 [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]]
172 [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared]
173 [-non_shared] [-xgot [-mvxworks-pic]
174 [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
175 [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
176 [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
177 [-mips64] [-mips64r2]
178 [-construct-floats] [-no-construct-floats]
179 [-trap] [-no-break] [-break] [-no-trap]
180 [-mips16] [-no-mips16]
181 [-mmicromips] [-mno-micromips]
182 [-msmartmips] [-mno-smartmips]
183 [-mips3d] [-no-mips3d]
186 [-mdspr2] [-mno-dspr2]
189 [-mfix7000] [-mno-fix7000]
190 [-mfix-vr4120] [-mno-fix-vr4120]
191 [-mfix-vr4130] [-mno-fix-vr4130]
192 [-mdebug] [-no-mdebug]
195 _Target MMIX options:_
196 [-fixed-special-register-names] [-globalize-symbols]
197 [-gnu-syntax] [-relax] [-no-predefined-symbols]
198 [-no-expand] [-no-merge-gregs] [-x]
199 [-linker-allocated-gregs]
201 _Target PDP11 options:_
202 [-mpic|-mno-pic] [-mall] [-mno-extensions]
203 [-mEXTENSION|-mno-EXTENSION]
206 _Target picoJava options:_
209 _Target PowerPC options:_
211 [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|-m403|-m405|
212 -m440|-m464|-m476|-m7400|-m7410|-m7450|-m7455|-m750cl|-mppc64|
213 -m620|-me500|-e500x2|-me500mc|-me500mc64|-me5500|-me6500|-mppc64bridge|
214 -mbooke|-mpower4|-mpr4|-mpower5|-mpwr5|-mpwr5x|-mpower6|-mpwr6|
215 -mpower7|-mpw7|-ma2|-mcell|-mspe|-mtitan|-me300|-mcom]
216 [-many] [-maltivec|-mvsx]
217 [-mregnames|-mno-regnames]
218 [-mrelocatable|-mrelocatable-lib|-K PIC] [-memb]
219 [-mlittle|-mlittle-endian|-le|-mbig|-mbig-endian|-be]
220 [-msolaris|-mno-solaris]
224 [-mlittle-endian|-mbig-endian]
225 [-m32bit-ints|-m16bit-ints]
226 [-m32bit-doubles|-m64bit-doubles]
228 _Target s390 options:_
229 [-m31|-m64] [-mesa|-mzarch] [-march=CPU]
230 [-mregnames|-mno-regnames]
233 _Target SCORE options:_
234 [-EB][-EL][-FIXDD][-NWARN]
235 [-SCORE5][-SCORE5U][-SCORE7][-SCORE3]
236 [-march=score7][-march=score3]
237 [-USE_R1][-KPIC][-O0][-G NUM][-V]
239 _Target SPARC options:_
240 [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
241 -Av8plus|-Av8plusa|-Av9|-Av9a]
242 [-xarch=v8plus|-xarch=v8plusa] [-bump]
245 _Target TIC54X options:_
246 [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
247 [-merrors-to-file <FILENAME>|-me <FILENAME>]
250 _Target TIC6X options:_
251 [-march=ARCH] [-mbig-endian|-mlittle-endian]
252 [-mdsbt|-mno-dsbt] [-mpid=no|-mpid=near|-mpid=far]
255 _Target TILE-Gx options:_
256 [-m32|-m64][-EB][-EL]
259 _Target Xtensa options:_
260 [-[no-]text-section-literals] [-[no-]absolute-literals]
261 [-[no-]target-align] [-[no-]longcalls]
263 [-rename-section OLDNAME=NEWNAME]
266 _Target Z80 options:_
268 [ -ignore-undocumented-instructions] [-Wnud]
269 [ -ignore-unportable-instructions] [-Wnup]
270 [ -warn-undocumented-instructions] [-Wud]
271 [ -warn-unportable-instructions] [-Wup]
272 [ -forbid-undocumented-instructions] [-Fud]
273 [ -forbid-unportable-instructions] [-Fup]
276 Read command-line options from FILE. The options read are
277 inserted in place of the original @FILE option. If FILE does not
278 exist, or cannot be read, then the option will be treated
279 literally, and not removed.
281 Options in FILE are separated by whitespace. A whitespace
282 character may be included in an option by surrounding the entire
283 option in either single or double quotes. Any character
284 (including a backslash) may be included by prefixing the character
285 to be included with a backslash. The FILE may itself contain
286 additional @FILE options; any such options will be processed
290 Turn on listings, in any of a variety of ways:
293 omit false conditionals
296 omit debugging directives
299 include general information, like as version and options
303 include high-level source
309 include macro expansions
312 omit forms processing
318 set the name of the listing file
320 You may combine these options; for example, use `-aln' for assembly
321 listing without forms processing. The `=file' option, if used,
322 must be the last one. By itself, `-a' defaults to `-ahls'.
325 Begin in alternate macro mode. *Note `.altmacro': Altmacro.
327 `--compress-debug-sections'
328 Compress DWARF debug sections using zlib. The debug sections are
329 renamed to begin with `.zdebug', and the resulting object file may
330 not be compatible with older linkers and object file utilities.
332 `--nocompress-debug-sections'
333 Do not compress DWARF debug sections. This is the default.
336 Ignored. This option is accepted for script compatibility with
337 calls to other assemblers.
339 `--debug-prefix-map OLD=NEW'
340 When assembling files in directory `OLD', record debugging
341 information describing them as in `NEW' instead.
344 Define the symbol SYM to be VALUE before assembling the input file.
345 VALUE must be an integer constant. As in C, a leading `0x'
346 indicates a hexadecimal value, and a leading `0' indicates an octal
347 value. The value of the symbol can be overridden inside a source
348 file via the use of a `.set' pseudo-op.
351 "fast"--skip whitespace and comment preprocessing (assume source is
356 Generate debugging information for each assembler source line
357 using whichever debug format is preferred by the target. This
358 currently means either STABS, ECOFF or DWARF2.
361 Generate stabs debugging information for each assembler line. This
362 may help debugging assembler code, if the debugger can handle it.
365 Generate stabs debugging information for each assembler line, with
366 GNU extensions that probably only gdb can handle, and that could
367 make other debuggers crash or refuse to read your program. This
368 may help debugging assembler code. Currently the only GNU
369 extension is the location of the current working directory at
373 Generate DWARF2 debugging information for each assembler line.
374 This may help debugging assembler code, if the debugger can handle
375 it. Note--this option is only supported by some targets, not all
379 `--size-check=warning'
380 Issue an error or warning for invalid ELF .size directive.
383 Print a summary of the command line options and exit.
386 Print a summary of all target specific options and exit.
389 Add directory DIR to the search list for `.include' directives.
392 Don't warn about signed overflow.
395 Issue warnings when difference tables altered for long
400 Keep (in the symbol table) local symbols. These symbols start with
401 system-specific local label prefixes, typically `.L' for ELF
402 systems or `L' for traditional a.out systems. *Note Symbol
405 `--listing-lhs-width=NUMBER'
406 Set the maximum width, in words, of the output data column for an
407 assembler listing to NUMBER.
409 `--listing-lhs-width2=NUMBER'
410 Set the maximum width, in words, of the output data column for
411 continuation lines in an assembler listing to NUMBER.
413 `--listing-rhs-width=NUMBER'
414 Set the maximum width of an input source line, as displayed in a
415 listing, to NUMBER bytes.
417 `--listing-cont-lines=NUMBER'
418 Set the maximum number of lines printed in a listing for a single
419 line of input to NUMBER + 1.
422 Name the object-file output from `as' OBJFILE.
425 Fold the data section into the text section.
427 Set the default size of GAS's hash tables to a prime number close
428 to NUMBER. Increasing this value can reduce the length of time it
429 takes the assembler to perform its tasks, at the expense of
430 increasing the assembler's memory requirements. Similarly
431 reducing this value can reduce the memory requirements at the
434 `--reduce-memory-overheads'
435 This option reduces GAS's memory requirements, at the expense of
436 making the assembly processes slower. Currently this switch is a
437 synonym for `--hash-size=4051', but in the future it may have
438 other effects as well.
441 Print the maximum space (in bytes) and total time (in seconds)
444 `--strip-local-absolute'
445 Remove local absolute symbols from the outgoing symbol table.
449 Print the `as' version.
452 Print the `as' version and exit.
456 Suppress warning messages.
459 Treat warnings as errors.
462 Don't suppress warning messages or treat them as errors.
471 Generate an object file even after errors.
474 Standard input, or source files to assemble.
477 *Note AArch64 Options::, for the options available when as is
478 configured for the 64-bit mode of the ARM Architecture (AArch64).
480 *Note Alpha Options::, for the options available when as is
481 configured for an Alpha processor.
483 The following options are available when as is configured for an ARC
487 This option selects the core processor variant.
490 Select either big-endian (-EB) or little-endian (-EL) output.
492 The following options are available when as is configured for the ARM
495 `-mcpu=PROCESSOR[+EXTENSION...]'
496 Specify which ARM processor variant is the target.
498 `-march=ARCHITECTURE[+EXTENSION...]'
499 Specify which ARM architecture variant is used by the target.
501 `-mfpu=FLOATING-POINT-FORMAT'
502 Select which Floating Point architecture is the target.
505 Select which floating point ABI is in use.
508 Enable Thumb only instruction decoding.
510 `-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant'
511 Select which procedure calling convention is in use.
514 Select either big-endian (-EB) or little-endian (-EL) output.
517 Specify that the code has been generated with interworking between
518 Thumb and ARM code in mind.
521 Specify that PIC code has been generated.
523 *Note Blackfin Options::, for the options available when as is
524 configured for the Blackfin processor family.
526 See the info pages for documentation of the CRIS-specific options.
528 The following options are available when as is configured for a D10V
531 Optimize output by parallelizing instructions.
533 The following options are available when as is configured for a D30V
536 Optimize output by parallelizing instructions.
539 Warn when nops are generated.
542 Warn when a nop after a 32-bit multiply instruction is generated.
544 The following options are available when as is configured for the
545 Adapteva EPIPHANY series.
547 *Note Epiphany Options::, for the options available when as is
548 configured for an Epiphany processor.
550 *Note i386-Options::, for the options available when as is
551 configured for an i386 processor.
553 The following options are available when as is configured for the
554 Intel 80960 processor.
556 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
557 Specify which variant of the 960 architecture is the target.
560 Add code to collect statistics about branches taken.
563 Do not alter compare-and-branch instructions for long
564 displacements; error if necessary.
567 The following options are available when as is configured for the
571 Specifies that the extended IP2022 instructions are allowed.
574 Restores the default behaviour, which restricts the permitted
575 instructions to just the basic IP2022 ones.
578 The following options are available when as is configured for the
579 Renesas M32C and M16C processors.
582 Assemble M32C instructions.
585 Assemble M16C instructions (the default).
588 Enable support for link-time relaxations.
591 Support H'00 style hex constants in addition to 0x00 style.
594 The following options are available when as is configured for the
595 Renesas M32R (formerly Mitsubishi M32R) series.
598 Specify which processor in the M32R family is the target. The
599 default is normally the M32R, but this option changes it to the
602 `--warn-explicit-parallel-conflicts or --Wp'
603 Produce warning messages when questionable parallel constructs are
606 `--no-warn-explicit-parallel-conflicts or --Wnp'
607 Do not produce warning messages when questionable parallel
608 constructs are encountered.
611 The following options are available when as is configured for the
612 Motorola 68000 series.
615 Shorten references to undefined symbols, to one word instead of
618 `-m68000 | -m68008 | -m68010 | -m68020 | -m68030'
619 `| -m68040 | -m68060 | -m68302 | -m68331 | -m68332'
620 `| -m68333 | -m68340 | -mcpu32 | -m5200'
621 Specify what processor in the 68000 family is the target. The
622 default is normally the 68020, but this can be changed at
625 `-m68881 | -m68882 | -mno-68881 | -mno-68882'
626 The target machine does (or does not) have a floating-point
627 coprocessor. The default is to assume a coprocessor for 68020,
628 68030, and cpu32. Although the basic 68000 is not compatible with
629 the 68881, a combination of the two can be specified, since it's
630 possible to do emulation of the coprocessor instructions with the
633 `-m68851 | -mno-68851'
634 The target machine does (or does not) have a memory-management
635 unit coprocessor. The default is to assume an MMU for 68020 and
639 For details about the PDP-11 machine dependent features options, see
640 *Note PDP-11-Options::.
643 Generate position-independent (or position-dependent) code. The
648 Enable all instruction set extensions. This is the default.
651 Disable all instruction set extensions.
653 `-mEXTENSION | -mno-EXTENSION'
654 Enable (or disable) a particular instruction set extension.
657 Enable the instruction set extensions supported by a particular
658 CPU, and disable all other extensions.
661 Enable the instruction set extensions supported by a particular
662 machine model, and disable all other extensions.
664 The following options are available when as is configured for a
668 Generate "big endian" format output.
671 Generate "little endian" format output.
674 The following options are available when as is configured for the
675 Motorola 68HC11 or 68HC12 series.
677 `-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg'
678 Specify what processor is the target. The default is defined by
679 the configuration option when building the assembler.
682 Instruct the linker to offset RAM addresses from S12X address
683 space into XGATE address space.
686 Specify to use the 16-bit integer ABI.
689 Specify to use the 32-bit integer ABI.
692 Specify to use the 32-bit double ABI.
695 Specify to use the 64-bit double ABI.
697 `--force-long-branches'
698 Relative branches are turned into absolute ones. This concerns
699 conditional branches, unconditional branches and branches to a sub
702 `-S | --short-branches'
703 Do not turn relative branches into absolute ones when the offset
706 `--strict-direct-mode'
707 Do not turn the direct addressing mode into extended addressing
708 mode when the instruction does not support direct addressing mode.
710 `--print-insn-syntax'
711 Print the syntax of instruction in case of error.
714 Print the list of instructions with syntax and then exit.
717 Print an example of instruction for each possible instruction and
718 then exit. This option is only useful for testing `as'.
721 The following options are available when `as' is configured for the
724 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
725 `-Av8plus | -Av8plusa | -Av9 | -Av9a'
726 Explicitly select a variant of the SPARC architecture.
728 `-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9'
729 and `-Av9a' select a 64 bit environment.
731 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
732 UltraSPARC extensions.
734 `-xarch=v8plus | -xarch=v8plusa'
735 For compatibility with the Solaris v9 assembler. These options are
736 equivalent to -Av8plus and -Av8plusa, respectively.
739 Warn when the assembler switches to another architecture.
741 The following options are available when as is configured for the
745 Enable extended addressing mode. All addresses and relocations
746 will assume extended addressing (usually 23 bits).
749 Sets the CPU version being compiled for.
751 `-merrors-to-file FILENAME'
752 Redirect error output to a file, for broken systems which don't
753 support such behaviour in the shell.
755 The following options are available when as is configured for a MIPS
759 This option sets the largest size of an object that can be
760 referenced implicitly with the `gp' register. It is only accepted
761 for targets that use ECOFF format, such as a DECstation running
762 Ultrix. The default value is 8.
765 Generate "big endian" format output.
768 Generate "little endian" format output.
779 Generate code for a particular MIPS Instruction Set Architecture
780 level. `-mips1' is an alias for `-march=r3000', `-mips2' is an
781 alias for `-march=r6000', `-mips3' is an alias for `-march=r4000'
782 and `-mips4' is an alias for `-march=r8000'. `-mips5', `-mips32',
783 `-mips32r2', `-mips64', and `-mips64r2' correspond to generic
784 `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64
785 Release 2' ISA processors, respectively.
788 Generate code for a particular MIPS cpu.
791 Schedule and tune for a particular MIPS cpu.
795 Cause nops to be inserted if the read of the destination register
796 of an mfhi or mflo instruction occurs in the following two
801 Cause stabs-style debugging output to go into an ECOFF-style
802 .mdebug section instead of the standard ELF .stabs sections.
806 Control generation of `.pdr' sections.
810 The register sizes are normally inferred from the ISA and ABI, but
811 these flags force a certain group of registers to be treated as 32
812 bits wide at all times. `-mgp32' controls the size of
813 general-purpose registers and `-mfp32' controls the size of
814 floating-point registers.
818 Generate code for the MIPS 16 processor. This is equivalent to
819 putting `.set mips16' at the start of the assembly file.
820 `-no-mips16' turns off this option.
824 Generate code for the microMIPS processor. This is equivalent to
825 putting `.set micromips' at the start of the assembly file.
826 `-mno-micromips' turns off this option. This is equivalent to
827 putting `.set nomicromips' at the start of the assembly file.
831 Enables the SmartMIPS extension to the MIPS32 instruction set.
832 This is equivalent to putting `.set smartmips' at the start of the
833 assembly file. `-mno-smartmips' turns off this option.
837 Generate code for the MIPS-3D Application Specific Extension.
838 This tells the assembler to accept MIPS-3D instructions.
839 `-no-mips3d' turns off this option.
843 Generate code for the MDMX Application Specific Extension. This
844 tells the assembler to accept MDMX instructions. `-no-mdmx' turns
849 Generate code for the DSP Release 1 Application Specific Extension.
850 This tells the assembler to accept DSP Release 1 instructions.
851 `-mno-dsp' turns off this option.
855 Generate code for the DSP Release 2 Application Specific Extension.
856 This option implies -mdsp. This tells the assembler to accept DSP
857 Release 2 instructions. `-mno-dspr2' turns off this option.
861 Generate code for the MT Application Specific Extension. This
862 tells the assembler to accept MT instructions. `-mno-mt' turns
867 Generate code for the MCU Application Specific Extension. This
868 tells the assembler to accept MCU instructions. `-mno-mcu' turns
872 `--no-construct-floats'
873 The `--no-construct-floats' option disables the construction of
874 double width floating point constants by loading the two halves of
875 the value into the two single width floating point registers that
876 make up the double width register. By default
877 `--construct-floats' is selected, allowing construction of these
878 floating point constants.
881 This option causes `as' to emulate `as' configured for some other
882 target, in all respects, including output format (choosing between
883 ELF and ECOFF only), handling of pseudo-opcodes which may generate
884 debugging information or store symbol table information, and
885 default endianness. The available configuration names are:
886 `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf',
887 `mipsbelf'. The first two do not alter the default endianness
888 from that of the primary target for which the assembler was
889 configured; the others change the default to little- or big-endian
890 as indicated by the `b' or `l' in the name. Using `-EB' or `-EL'
891 will override the endianness selection in any case.
893 This option is currently supported only when the primary target
894 `as' is configured for is a MIPS ELF or ECOFF target.
895 Furthermore, the primary target or others specified with
896 `--enable-targets=...' at configuration time must include support
897 for the other format, if both are to be available. For example,
898 the Irix 5 configuration includes support for both.
900 Eventually, this option will support more configurations, with more
901 fine-grained control over the assembler's behavior, and will be
902 supported for more processors.
905 `as' ignores this option. It is accepted for compatibility with
912 Control how to deal with multiplication overflow and division by
913 zero. `--trap' or `--no-break' (which are synonyms) take a trap
914 exception (and only work for Instruction Set Architecture level 2
915 and higher); `--break' or `--no-trap' (also synonyms, and the
916 default) take a break exception.
919 When this option is used, `as' will issue a warning every time it
920 generates a nop instruction from a macro.
922 The following options are available when as is configured for an
927 Enable or disable the JSRI to BSR transformation. By default this
928 is enabled. The command line option `-nojsri2bsr' can be used to
933 Enable or disable the silicon filter behaviour. By default this
934 is disabled. The default can be overridden by the `-sifilter'
938 Alter jump instructions for long displacements.
941 Select the cpu type on the target hardware. This controls which
942 instructions can be assembled.
945 Assemble for a big endian target.
948 Assemble for a little endian target.
951 See the info pages for documentation of the MMIX-specific options.
953 *Note PowerPC-Opts::, for the options available when as is configured
954 for a PowerPC processor.
956 See the info pages for documentation of the RX-specific options.
958 The following options are available when as is configured for the
959 s390 processor family.
963 Select the word size, either 31/32 bits or 64 bits.
968 Select the architecture mode, either the Enterprise System
969 Architecture (esa) or the z/Architecture mode (zarch).
972 Specify which s390 processor variant is the target, `g6', `g6',
973 `z900', `z990', `z9-109', `z9-ec', or `z10'.
977 Allow or disallow symbolic names for registers.
980 Warn whenever the operand for a base or index register has been
981 specified but evaluates to zero.
983 *Note TIC6X Options::, for the options available when as is
984 configured for a TMS320C6000 processor.
986 *Note TILE-Gx Options::, for the options available when as is
987 configured for a TILE-Gx processor.
989 *Note Xtensa Options::, for the options available when as is
990 configured for an Xtensa processor.
992 The following options are available when as is configured for a Z80
995 Assemble for Z80 processor.
998 Assemble for R800 processor.
1000 `-ignore-undocumented-instructions'
1002 Assemble undocumented Z80 instructions that also work on R800
1005 `-ignore-unportable-instructions'
1007 Assemble all undocumented Z80 instructions without warning.
1009 `-warn-undocumented-instructions'
1011 Issue a warning for undocumented Z80 instructions that also work
1014 `-warn-unportable-instructions'
1016 Issue a warning for undocumented Z80 instructions that do not work
1019 `-forbid-undocumented-instructions'
1021 Treat all undocumented instructions as errors.
1023 `-forbid-unportable-instructions'
1025 Treat undocumented Z80 instructions that do not work on R800 as
1030 * Manual:: Structure of this Manual
1031 * GNU Assembler:: The GNU Assembler
1032 * Object Formats:: Object File Formats
1033 * Command Line:: Command Line
1034 * Input Files:: Input Files
1035 * Object:: Output (Object) File
1036 * Errors:: Error and Warning Messages
1039 File: as.info, Node: Manual, Next: GNU Assembler, Up: Overview
1041 1.1 Structure of this Manual
1042 ============================
1044 This manual is intended to describe what you need to know to use GNU
1045 `as'. We cover the syntax expected in source files, including notation
1046 for symbols, constants, and expressions; the directives that `as'
1047 understands; and of course how to invoke `as'.
1049 This manual also describes some of the machine-dependent features of
1050 various flavors of the assembler.
1052 On the other hand, this manual is _not_ intended as an introduction
1053 to programming in assembly language--let alone programming in general!
1054 In a similar vein, we make no attempt to introduce the machine
1055 architecture; we do _not_ describe the instruction set, standard
1056 mnemonics, registers or addressing modes that are standard to a
1057 particular architecture. You may want to consult the manufacturer's
1058 machine architecture manual for this information.
1061 File: as.info, Node: GNU Assembler, Next: Object Formats, Prev: Manual, Up: Overview
1063 1.2 The GNU Assembler
1064 =====================
1066 GNU `as' is really a family of assemblers. If you use (or have used)
1067 the GNU assembler on one architecture, you should find a fairly similar
1068 environment when you use it on another architecture. Each version has
1069 much in common with the others, including object file formats, most
1070 assembler directives (often called "pseudo-ops") and assembler syntax.
1072 `as' is primarily intended to assemble the output of the GNU C
1073 compiler `gcc' for use by the linker `ld'. Nevertheless, we've tried
1074 to make `as' assemble correctly everything that other assemblers for
1075 the same machine would assemble. Any exceptions are documented
1076 explicitly (*note Machine Dependencies::). This doesn't mean `as'
1077 always uses the same syntax as another assembler for the same
1078 architecture; for example, we know of several incompatible versions of
1079 680x0 assembly language syntax.
1081 Unlike older assemblers, `as' is designed to assemble a source
1082 program in one pass of the source file. This has a subtle impact on the
1083 `.org' directive (*note `.org': Org.).
1086 File: as.info, Node: Object Formats, Next: Command Line, Prev: GNU Assembler, Up: Overview
1088 1.3 Object File Formats
1089 =======================
1091 The GNU assembler can be configured to produce several alternative
1092 object file formats. For the most part, this does not affect how you
1093 write assembly language programs; but directives for debugging symbols
1094 are typically different in different file formats. *Note Symbol
1095 Attributes: Symbol Attributes.
1098 File: as.info, Node: Command Line, Next: Input Files, Prev: Object Formats, Up: Overview
1103 After the program name `as', the command line may contain options and
1104 file names. Options may appear in any order, and may be before, after,
1105 or between file names. The order of file names is significant.
1107 `--' (two hyphens) by itself names the standard input file
1108 explicitly, as one of the files for `as' to assemble.
1110 Except for `--' any command line argument that begins with a hyphen
1111 (`-') is an option. Each option changes the behavior of `as'. No
1112 option changes the way another option works. An option is a `-'
1113 followed by one or more letters; the case of the letter is important.
1114 All options are optional.
1116 Some options expect exactly one file name to follow them. The file
1117 name may either immediately follow the option's letter (compatible with
1118 older assemblers) or it may be the next command argument (GNU
1119 standard). These two command lines are equivalent:
1121 as -o my-object-file.o mumble.s
1122 as -omy-object-file.o mumble.s
1125 File: as.info, Node: Input Files, Next: Object, Prev: Command Line, Up: Overview
1130 We use the phrase "source program", abbreviated "source", to describe
1131 the program input to one run of `as'. The program may be in one or
1132 more files; how the source is partitioned into files doesn't change the
1133 meaning of the source.
1135 The source program is a concatenation of the text in all the files,
1136 in the order specified.
1138 Each time you run `as' it assembles exactly one source program. The
1139 source program is made up of one or more files. (The standard input is
1142 You give `as' a command line that has zero or more input file names.
1143 The input files are read (from left file name to right). A command
1144 line argument (in any position) that has no special meaning is taken to
1145 be an input file name.
1147 If you give `as' no file names it attempts to read one input file
1148 from the `as' standard input, which is normally your terminal. You may
1149 have to type <ctl-D> to tell `as' there is no more program to assemble.
1151 Use `--' if you need to explicitly name the standard input file in
1154 If the source is empty, `as' produces a small, empty object file.
1156 Filenames and Line-numbers
1157 --------------------------
1159 There are two ways of locating a line in the input file (or files) and
1160 either may be used in reporting error messages. One way refers to a
1161 line number in a physical file; the other refers to a line number in a
1162 "logical" file. *Note Error and Warning Messages: Errors.
1164 "Physical files" are those files named in the command line given to
1167 "Logical files" are simply names declared explicitly by assembler
1168 directives; they bear no relation to physical files. Logical file
1169 names help error messages reflect the original source file, when `as'
1170 source is itself synthesized from other files. `as' understands the
1171 `#' directives emitted by the `gcc' preprocessor. See also *Note
1175 File: as.info, Node: Object, Next: Errors, Prev: Input Files, Up: Overview
1177 1.6 Output (Object) File
1178 ========================
1180 Every time you run `as' it produces an output file, which is your
1181 assembly language program translated into numbers. This file is the
1182 object file. Its default name is `a.out'. You can give it another
1183 name by using the `-o' option. Conventionally, object file names end
1184 with `.o'. The default name is used for historical reasons: older
1185 assemblers were capable of assembling self-contained programs directly
1186 into a runnable program. (For some formats, this isn't currently
1187 possible, but it can be done for the `a.out' format.)
1189 The object file is meant for input to the linker `ld'. It contains
1190 assembled program code, information to help `ld' integrate the
1191 assembled program into a runnable file, and (optionally) symbolic
1192 information for the debugger.
1195 File: as.info, Node: Errors, Prev: Object, Up: Overview
1197 1.7 Error and Warning Messages
1198 ==============================
1200 `as' may write warnings and error messages to the standard error file
1201 (usually your terminal). This should not happen when a compiler runs
1202 `as' automatically. Warnings report an assumption made so that `as'
1203 could keep assembling a flawed program; errors report a grave problem
1204 that stops the assembly.
1206 Warning messages have the format
1208 file_name:NNN:Warning Message Text
1210 (where NNN is a line number). If a logical file name has been given
1211 (*note `.file': File.) it is used for the filename, otherwise the name
1212 of the current input file is used. If a logical line number was given
1213 (*note `.line': Line.) then it is used to calculate the number printed,
1214 otherwise the actual line in the current source file is printed. The
1215 message text is intended to be self explanatory (in the grand Unix
1218 Error messages have the format
1219 file_name:NNN:FATAL:Error Message Text
1220 The file name and line number are derived as for warning messages.
1221 The actual message text may be rather less explanatory because many of
1222 them aren't supposed to happen.
1225 File: as.info, Node: Invoking, Next: Syntax, Prev: Overview, Up: Top
1227 2 Command-Line Options
1228 **********************
1230 This chapter describes command-line options available in _all_ versions
1231 of the GNU assembler; see *Note Machine Dependencies::, for options
1232 specific to particular machine architectures.
1234 If you are invoking `as' via the GNU C compiler, you can use the
1235 `-Wa' option to pass arguments through to the assembler. The assembler
1236 arguments must be separated from each other (and the `-Wa') by commas.
1239 gcc -c -g -O -Wa,-alh,-L file.c
1241 This passes two options to the assembler: `-alh' (emit a listing to
1242 standard output with high-level and assembly source) and `-L' (retain
1243 local symbols in the symbol table).
1245 Usually you do not need to use this `-Wa' mechanism, since many
1246 compiler command-line options are automatically passed to the assembler
1247 by the compiler. (You can call the GNU compiler driver with the `-v'
1248 option to see precisely what options it passes to each compilation
1249 pass, including the assembler.)
1253 * a:: -a[cdghlns] enable listings
1254 * alternate:: --alternate enable alternate macro syntax
1255 * D:: -D for compatibility
1256 * f:: -f to work faster
1257 * I:: -I for .include search path
1259 * K:: -K for difference tables
1261 * L:: -L to retain local symbols
1262 * listing:: --listing-XXX to configure listing output
1263 * M:: -M or --mri to assemble in MRI compatibility mode
1264 * MD:: --MD for dependency tracking
1265 * o:: -o to name the object file
1266 * R:: -R to join data and text sections
1267 * statistics:: --statistics to see statistics about assembly
1268 * traditional-format:: --traditional-format for compatible output
1269 * v:: -v to announce version
1270 * W:: -W, --no-warn, --warn, --fatal-warnings to control warnings
1271 * Z:: -Z to make object file even after errors
1274 File: as.info, Node: a, Next: alternate, Up: Invoking
1276 2.1 Enable Listings: `-a[cdghlns]'
1277 ==================================
1279 These options enable listing output from the assembler. By itself,
1280 `-a' requests high-level, assembly, and symbols listing. You can use
1281 other letters to select specific options for the list: `-ah' requests a
1282 high-level language listing, `-al' requests an output-program assembly
1283 listing, and `-as' requests a symbol table listing. High-level
1284 listings require that a compiler debugging option like `-g' be used,
1285 and that assembly listings (`-al') be requested also.
1287 Use the `-ag' option to print a first section with general assembly
1288 information, like as version, switches passed, or time stamp.
1290 Use the `-ac' option to omit false conditionals from a listing. Any
1291 lines which are not assembled because of a false `.if' (or `.ifdef', or
1292 any other conditional), or a true `.if' followed by an `.else', will be
1293 omitted from the listing.
1295 Use the `-ad' option to omit debugging directives from the listing.
1297 Once you have specified one of these options, you can further control
1298 listing output and its appearance using the directives `.list',
1299 `.nolist', `.psize', `.eject', `.title', and `.sbttl'. The `-an'
1300 option turns off all forms processing. If you do not request listing
1301 output with one of the `-a' options, the listing-control directives
1304 The letters after `-a' may be combined into one option, _e.g._,
1307 Note if the assembler source is coming from the standard input (e.g.,
1308 because it is being created by `gcc' and the `-pipe' command line switch
1309 is being used) then the listing will not contain any comments or
1310 preprocessor directives. This is because the listing code buffers
1311 input source lines from stdin only after they have been preprocessed by
1312 the assembler. This reduces memory usage and makes the code more
1316 File: as.info, Node: alternate, Next: D, Prev: a, Up: Invoking
1321 Begin in alternate macro mode, see *Note `.altmacro': Altmacro.
1324 File: as.info, Node: D, Next: f, Prev: alternate, Up: Invoking
1329 This option has no effect whatsoever, but it is accepted to make it more
1330 likely that scripts written for other assemblers also work with `as'.
1333 File: as.info, Node: f, Next: I, Prev: D, Up: Invoking
1335 2.4 Work Faster: `-f'
1336 =====================
1338 `-f' should only be used when assembling programs written by a
1339 (trusted) compiler. `-f' stops the assembler from doing whitespace and
1340 comment preprocessing on the input file(s) before assembling them.
1341 *Note Preprocessing: Preprocessing.
1343 _Warning:_ if you use `-f' when the files actually need to be
1344 preprocessed (if they contain comments, for example), `as' does
1348 File: as.info, Node: I, Next: K, Prev: f, Up: Invoking
1350 2.5 `.include' Search Path: `-I' PATH
1351 =====================================
1353 Use this option to add a PATH to the list of directories `as' searches
1354 for files specified in `.include' directives (*note `.include':
1355 Include.). You may use `-I' as many times as necessary to include a
1356 variety of paths. The current working directory is always searched
1357 first; after that, `as' searches any `-I' directories in the same order
1358 as they were specified (left to right) on the command line.
1361 File: as.info, Node: K, Next: L, Prev: I, Up: Invoking
1363 2.6 Difference Tables: `-K'
1364 ===========================
1366 `as' sometimes alters the code emitted for directives of the form
1367 `.word SYM1-SYM2'. *Note `.word': Word. You can use the `-K' option
1368 if you want a warning issued when this is done.
1371 File: as.info, Node: L, Next: listing, Prev: K, Up: Invoking
1373 2.7 Include Local Symbols: `-L'
1374 ===============================
1376 Symbols beginning with system-specific local label prefixes, typically
1377 `.L' for ELF systems or `L' for traditional a.out systems, are called
1378 "local symbols". *Note Symbol Names::. Normally you do not see such
1379 symbols when debugging, because they are intended for the use of
1380 programs (like compilers) that compose assembler programs, not for your
1381 notice. Normally both `as' and `ld' discard such symbols, so you do
1382 not normally debug with them.
1384 This option tells `as' to retain those local symbols in the object
1385 file. Usually if you do this you also tell the linker `ld' to preserve
1389 File: as.info, Node: listing, Next: M, Prev: L, Up: Invoking
1391 2.8 Configuring listing output: `--listing'
1392 ===========================================
1394 The listing feature of the assembler can be enabled via the command
1395 line switch `-a' (*note a::). This feature combines the input source
1396 file(s) with a hex dump of the corresponding locations in the output
1397 object file, and displays them as a listing file. The format of this
1398 listing can be controlled by directives inside the assembler source
1399 (i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl'
1400 (*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::)
1401 and also by the following switches:
1403 `--listing-lhs-width=`number''
1404 Sets the maximum width, in words, of the first line of the hex
1405 byte dump. This dump appears on the left hand side of the listing
1408 `--listing-lhs-width2=`number''
1409 Sets the maximum width, in words, of any further lines of the hex
1410 byte dump for a given input source line. If this value is not
1411 specified, it defaults to being the same as the value specified
1412 for `--listing-lhs-width'. If neither switch is used the default
1415 `--listing-rhs-width=`number''
1416 Sets the maximum width, in characters, of the source line that is
1417 displayed alongside the hex dump. The default value for this
1418 parameter is 100. The source line is displayed on the right hand
1419 side of the listing output.
1421 `--listing-cont-lines=`number''
1422 Sets the maximum number of continuation lines of hex dump that
1423 will be displayed for a given single line of source input. The
1427 File: as.info, Node: M, Next: MD, Prev: listing, Up: Invoking
1429 2.9 Assemble in MRI Compatibility Mode: `-M'
1430 ============================================
1432 The `-M' or `--mri' option selects MRI compatibility mode. This
1433 changes the syntax and pseudo-op handling of `as' to make it compatible
1434 with the `ASM68K' or the `ASM960' (depending upon the configured
1435 target) assembler from Microtec Research. The exact nature of the MRI
1436 syntax will not be documented here; see the MRI manuals for more
1437 information. Note in particular that the handling of macros and macro
1438 arguments is somewhat different. The purpose of this option is to
1439 permit assembling existing MRI assembler code using `as'.
1441 The MRI compatibility is not complete. Certain operations of the
1442 MRI assembler depend upon its object file format, and can not be
1443 supported using other object file formats. Supporting these would
1444 require enhancing each object file format individually. These are:
1446 * global symbols in common section
1448 The m68k MRI assembler supports common sections which are merged
1449 by the linker. Other object file formats do not support this.
1450 `as' handles common sections by treating them as a single common
1451 symbol. It permits local symbols to be defined within a common
1452 section, but it can not support global symbols, since it has no
1453 way to describe them.
1455 * complex relocations
1457 The MRI assemblers support relocations against a negated section
1458 address, and relocations which combine the start addresses of two
1459 or more sections. These are not support by other object file
1462 * `END' pseudo-op specifying start address
1464 The MRI `END' pseudo-op permits the specification of a start
1465 address. This is not supported by other object file formats. The
1466 start address may instead be specified using the `-e' option to
1467 the linker, or in a linker script.
1469 * `IDNT', `.ident' and `NAME' pseudo-ops
1471 The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
1472 name to the output file. This is not supported by other object
1477 The m68k MRI `ORG' pseudo-op begins an absolute section at a given
1478 address. This differs from the usual `as' `.org' pseudo-op, which
1479 changes the location within the current section. Absolute
1480 sections are not supported by other object file formats. The
1481 address of a section may be assigned within a linker script.
1483 There are some other features of the MRI assembler which are not
1484 supported by `as', typically either because they are difficult or
1485 because they seem of little consequence. Some of these may be
1486 supported in future releases.
1490 EBCDIC strings are not supported.
1492 * packed binary coded decimal
1494 Packed binary coded decimal is not supported. This means that the
1495 `DC.P' and `DCB.P' pseudo-ops are not supported.
1499 The m68k `FEQU' pseudo-op is not supported.
1503 The m68k `NOOBJ' pseudo-op is not supported.
1505 * `OPT' branch control options
1507 The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL',
1508 and `BRW'--are ignored. `as' automatically relaxes all branches,
1509 whether forward or backward, to an appropriate size, so these
1510 options serve no purpose.
1512 * `OPT' list control options
1514 The following m68k `OPT' list control options are ignored: `C',
1515 `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'.
1517 * other `OPT' options
1519 The following m68k `OPT' options are ignored: `NEST', `O', `OLD',
1520 `OP', `P', `PCO', `PCR', `PCS', `R'.
1522 * `OPT' `D' option is default
1524 The m68k `OPT' `D' option is the default, unlike the MRI assembler.
1525 `OPT NOD' may be used to turn it off.
1529 The m68k `XREF' pseudo-op is ignored.
1531 * `.debug' pseudo-op
1533 The i960 `.debug' pseudo-op is not supported.
1535 * `.extended' pseudo-op
1537 The i960 `.extended' pseudo-op is not supported.
1539 * `.list' pseudo-op.
1541 The various options of the i960 `.list' pseudo-op are not
1544 * `.optimize' pseudo-op
1546 The i960 `.optimize' pseudo-op is not supported.
1548 * `.output' pseudo-op
1550 The i960 `.output' pseudo-op is not supported.
1552 * `.setreal' pseudo-op
1554 The i960 `.setreal' pseudo-op is not supported.
1558 File: as.info, Node: MD, Next: o, Prev: M, Up: Invoking
1560 2.10 Dependency Tracking: `--MD'
1561 ================================
1563 `as' can generate a dependency file for the file it creates. This file
1564 consists of a single rule suitable for `make' describing the
1565 dependencies of the main source file.
1567 The rule is written to the file named in its argument.
1569 This feature is used in the automatic updating of makefiles.
1572 File: as.info, Node: o, Next: R, Prev: MD, Up: Invoking
1574 2.11 Name the Object File: `-o'
1575 ===============================
1577 There is always one object file output when you run `as'. By default
1578 it has the name `a.out' (or `b.out', for Intel 960 targets only). You
1579 use this option (which takes exactly one filename) to give the object
1580 file a different name.
1582 Whatever the object file is called, `as' overwrites any existing
1583 file of the same name.
1586 File: as.info, Node: R, Next: statistics, Prev: o, Up: Invoking
1588 2.12 Join Data and Text Sections: `-R'
1589 ======================================
1591 `-R' tells `as' to write the object file as if all data-section data
1592 lives in the text section. This is only done at the very last moment:
1593 your binary data are the same, but data section parts are relocated
1594 differently. The data section part of your object file is zero bytes
1595 long because all its bytes are appended to the text section. (*Note
1596 Sections and Relocation: Sections.)
1598 When you specify `-R' it would be possible to generate shorter
1599 address displacements (because we do not have to cross between text and
1600 data section). We refrain from doing this simply for compatibility with
1601 older versions of `as'. In future, `-R' may work this way.
1603 When `as' is configured for COFF or ELF output, this option is only
1604 useful if you use sections named `.text' and `.data'.
1606 `-R' is not supported for any of the HPPA targets. Using `-R'
1607 generates a warning from `as'.
1610 File: as.info, Node: statistics, Next: traditional-format, Prev: R, Up: Invoking
1612 2.13 Display Assembly Statistics: `--statistics'
1613 ================================================
1615 Use `--statistics' to display two statistics about the resources used by
1616 `as': the maximum amount of space allocated during the assembly (in
1617 bytes), and the total execution time taken for the assembly (in CPU
1621 File: as.info, Node: traditional-format, Next: v, Prev: statistics, Up: Invoking
1623 2.14 Compatible Output: `--traditional-format'
1624 ==============================================
1626 For some targets, the output of `as' is different in some ways from the
1627 output of some existing assembler. This switch requests `as' to use
1628 the traditional format instead.
1630 For example, it disables the exception frame optimizations which
1631 `as' normally does by default on `gcc' output.
1634 File: as.info, Node: v, Next: W, Prev: traditional-format, Up: Invoking
1636 2.15 Announce Version: `-v'
1637 ===========================
1639 You can find out what version of as is running by including the option
1640 `-v' (which you can also spell as `-version') on the command line.
1643 File: as.info, Node: W, Next: Z, Prev: v, Up: Invoking
1645 2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings'
1646 ======================================================================
1648 `as' should never give a warning or error message when assembling
1649 compiler output. But programs written by people often cause `as' to
1650 give a warning that a particular assumption was made. All such
1651 warnings are directed to the standard error file.
1653 If you use the `-W' and `--no-warn' options, no warnings are issued.
1654 This only affects the warning messages: it does not change any
1655 particular of how `as' assembles your file. Errors, which stop the
1656 assembly, are still reported.
1658 If you use the `--fatal-warnings' option, `as' considers files that
1659 generate warnings to be in error.
1661 You can switch these options off again by specifying `--warn', which
1662 causes warnings to be output as usual.
1665 File: as.info, Node: Z, Prev: W, Up: Invoking
1667 2.17 Generate Object File in Spite of Errors: `-Z'
1668 ==================================================
1670 After an error message, `as' normally produces no output. If for some
1671 reason you are interested in object file output even after `as' gives
1672 an error message on your program, use the `-Z' option. If there are
1673 any errors, `as' continues anyways, and writes an object file after a
1674 final warning message of the form `N errors, M warnings, generating bad
1678 File: as.info, Node: Syntax, Next: Sections, Prev: Invoking, Up: Top
1683 This chapter describes the machine-independent syntax allowed in a
1684 source file. `as' syntax is similar to what many other assemblers use;
1685 it is inspired by the BSD 4.2 assembler, except that `as' does not
1686 assemble Vax bit-fields.
1690 * Preprocessing:: Preprocessing
1691 * Whitespace:: Whitespace
1692 * Comments:: Comments
1693 * Symbol Intro:: Symbols
1694 * Statements:: Statements
1695 * Constants:: Constants
1698 File: as.info, Node: Preprocessing, Next: Whitespace, Up: Syntax
1703 The `as' internal preprocessor:
1704 * adjusts and removes extra whitespace. It leaves one space or tab
1705 before the keywords on a line, and turns any other whitespace on
1706 the line into a single space.
1708 * removes all comments, replacing them with a single space, or an
1709 appropriate number of newlines.
1711 * converts character constants into the appropriate numeric values.
1713 It does not do macro processing, include file handling, or anything
1714 else you may get from your C compiler's preprocessor. You can do
1715 include file processing with the `.include' directive (*note
1716 `.include': Include.). You can use the GNU C compiler driver to get
1717 other "CPP" style preprocessing by giving the input file a `.S' suffix.
1718 *Note Options Controlling the Kind of Output: (gcc.info)Overall
1721 Excess whitespace, comments, and character constants cannot be used
1722 in the portions of the input text that are not preprocessed.
1724 If the first line of an input file is `#NO_APP' or if you use the
1725 `-f' option, whitespace and comments are not removed from the input
1726 file. Within an input file, you can ask for whitespace and comment
1727 removal in specific portions of the by putting a line that says `#APP'
1728 before the text that may contain whitespace or comments, and putting a
1729 line that says `#NO_APP' after this text. This feature is mainly
1730 intend to support `asm' statements in compilers whose output is
1731 otherwise free of comments and whitespace.
1734 File: as.info, Node: Whitespace, Next: Comments, Prev: Preprocessing, Up: Syntax
1739 "Whitespace" is one or more blanks or tabs, in any order. Whitespace
1740 is used to separate symbols, and to make programs neater for people to
1741 read. Unless within character constants (*note Character Constants:
1742 Characters.), any whitespace means the same as exactly one space.
1745 File: as.info, Node: Comments, Next: Symbol Intro, Prev: Whitespace, Up: Syntax
1750 There are two ways of rendering comments to `as'. In both cases the
1751 comment is equivalent to one space.
1753 Anything from `/*' through the next `*/' is a comment. This means
1754 you may not nest these comments.
1757 The only way to include a newline ('\n') in a comment
1758 is to use this sort of comment.
1761 /* This sort of comment does not nest. */
1763 Anything from a "line comment" character up to the next newline is
1764 considered a comment and is ignored. The line comment character is
1765 target specific, and some targets multiple comment characters. Some
1766 targets also have line comment characters that only work if they are
1767 the first character on a line. Some targets use a sequence of two
1768 characters to introduce a line comment. Some targets can also change
1769 their line comment characters depending upon command line options that
1770 have been used. For more details see the _Syntax_ section in the
1771 documentation for individual targets.
1773 If the line comment character is the hash sign (`#') then it still
1774 has the special ability to enable and disable preprocessing (*note
1775 Preprocessing::) and to specify logical line numbers:
1777 To be compatible with past assemblers, lines that begin with `#'
1778 have a special interpretation. Following the `#' should be an absolute
1779 expression (*note Expressions::): the logical line number of the _next_
1780 line. Then a string (*note Strings: Strings.) is allowed: if present
1781 it is a new logical file name. The rest of the line, if any, should be
1784 If the first non-whitespace characters on the line are not numeric,
1785 the line is ignored. (Just like a comment.)
1787 # This is an ordinary comment.
1788 # 42-6 "new_file_name" # New logical file name
1789 # This is logical line # 36.
1790 This feature is deprecated, and may disappear from future versions
1794 File: as.info, Node: Symbol Intro, Next: Statements, Prev: Comments, Up: Syntax
1799 A "symbol" is one or more characters chosen from the set of all letters
1800 (both upper and lower case), digits and the three characters `_.$'. On
1801 most machines, you can also use `$' in symbol names; exceptions are
1802 noted in *Note Machine Dependencies::. No symbol may begin with a
1803 digit. Case is significant. There is no length limit: all characters
1804 are significant. Multibyte characters are supported. Symbols are
1805 delimited by characters not in that set, or by the beginning of a file
1806 (since the source program must end with a newline, the end of a file is
1807 not a possible symbol delimiter). *Note Symbols::.
1810 File: as.info, Node: Statements, Next: Constants, Prev: Symbol Intro, Up: Syntax
1815 A "statement" ends at a newline character (`\n') or a "line separator
1816 character". The line separator character is target specific and
1817 described in the _Syntax_ section of each target's documentation. Not
1818 all targets support a line separator character. The newline or line
1819 separator character is considered to be part of the preceding
1820 statement. Newlines and separators within character constants are an
1821 exception: they do not end statements.
1823 It is an error to end any statement with end-of-file: the last
1824 character of any input file should be a newline.
1826 An empty statement is allowed, and may include whitespace. It is
1829 A statement begins with zero or more labels, optionally followed by a
1830 key symbol which determines what kind of statement it is. The key
1831 symbol determines the syntax of the rest of the statement. If the
1832 symbol begins with a dot `.' then the statement is an assembler
1833 directive: typically valid for any computer. If the symbol begins with
1834 a letter the statement is an assembly language "instruction": it
1835 assembles into a machine language instruction. Different versions of
1836 `as' for different computers recognize different instructions. In
1837 fact, the same symbol may represent a different instruction in a
1838 different computer's assembly language.
1840 A label is a symbol immediately followed by a colon (`:').
1841 Whitespace before a label or after a colon is permitted, but you may not
1842 have whitespace between a label's symbol and its colon. *Note Labels::.
1844 For HPPA targets, labels need not be immediately followed by a
1845 colon, but the definition of a label must begin in column zero. This
1846 also implies that only one label may be defined on each line.
1848 label: .directive followed by something
1849 another_label: # This is an empty statement.
1850 instruction operand_1, operand_2, ...
1853 File: as.info, Node: Constants, Prev: Statements, Up: Syntax
1858 A constant is a number, written so that its value is known by
1859 inspection, without knowing any context. Like this:
1860 .byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
1861 .ascii "Ring the bell\7" # A string constant.
1862 .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum.
1863 .float 0f-314159265358979323846264338327\
1864 95028841971.693993751E-40 # - pi, a flonum.
1868 * Characters:: Character Constants
1869 * Numbers:: Number Constants
1872 File: as.info, Node: Characters, Next: Numbers, Up: Constants
1874 3.6.1 Character Constants
1875 -------------------------
1877 There are two kinds of character constants. A "character" stands for
1878 one character in one byte and its value may be used in numeric
1879 expressions. String constants (properly called string _literals_) are
1880 potentially many bytes and their values may not be used in arithmetic
1886 * Chars:: Characters
1889 File: as.info, Node: Strings, Next: Chars, Up: Characters
1894 A "string" is written between double-quotes. It may contain
1895 double-quotes or null characters. The way to get special characters
1896 into a string is to "escape" these characters: precede them with a
1897 backslash `\' character. For example `\\' represents one backslash:
1898 the first `\' is an escape which tells `as' to interpret the second
1899 character literally as a backslash (which prevents `as' from
1900 recognizing the second `\' as an escape character). The complete list
1904 Mnemonic for backspace; for ASCII this is octal code 010.
1907 Mnemonic for FormFeed; for ASCII this is octal code 014.
1910 Mnemonic for newline; for ASCII this is octal code 012.
1913 Mnemonic for carriage-Return; for ASCII this is octal code 015.
1916 Mnemonic for horizontal Tab; for ASCII this is octal code 011.
1918 `\ DIGIT DIGIT DIGIT'
1919 An octal character code. The numeric code is 3 octal digits. For
1920 compatibility with other Unix systems, 8 and 9 are accepted as
1921 digits: for example, `\008' has the value 010, and `\009' the
1924 `\`x' HEX-DIGITS...'
1925 A hex character code. All trailing hex digits are combined.
1926 Either upper or lower case `x' works.
1929 Represents one `\' character.
1932 Represents one `"' character. Needed in strings to represent this
1933 character, because an unescaped `"' would end the string.
1936 Any other character when escaped by `\' gives a warning, but
1937 assembles as if the `\' was not present. The idea is that if you
1938 used an escape sequence you clearly didn't want the literal
1939 interpretation of the following character. However `as' has no
1940 other interpretation, so `as' knows it is giving you the wrong
1941 code and warns you of the fact.
1943 Which characters are escapable, and what those escapes represent,
1944 varies widely among assemblers. The current set is what we think the
1945 BSD 4.2 assembler recognizes, and is a subset of what most C compilers
1946 recognize. If you are in doubt, do not use an escape sequence.
1949 File: as.info, Node: Chars, Prev: Strings, Up: Characters
1954 A single character may be written as a single quote immediately
1955 followed by that character. The same escapes apply to characters as to
1956 strings. So if you want to write the character backslash, you must
1957 write `'\\' where the first `\' escapes the second `\'. As you can
1958 see, the quote is an acute accent, not a grave accent. A newline
1959 immediately following an acute accent is taken as a literal character
1960 and does not count as the end of a statement. The value of a character
1961 constant in a numeric expression is the machine's byte-wide code for
1962 that character. `as' assumes your character code is ASCII: `'A' means
1963 65, `'B' means 66, and so on.
1966 File: as.info, Node: Numbers, Prev: Characters, Up: Constants
1968 3.6.2 Number Constants
1969 ----------------------
1971 `as' distinguishes three kinds of numbers according to how they are
1972 stored in the target machine. _Integers_ are numbers that would fit
1973 into an `int' in the C language. _Bignums_ are integers, but they are
1974 stored in more than 32 bits. _Flonums_ are floating point numbers,
1979 * Integers:: Integers
1984 File: as.info, Node: Integers, Next: Bignums, Up: Numbers
1989 A binary integer is `0b' or `0B' followed by zero or more of the binary
1992 An octal integer is `0' followed by zero or more of the octal digits
1995 A decimal integer starts with a non-zero digit followed by zero or
1996 more digits (`0123456789').
1998 A hexadecimal integer is `0x' or `0X' followed by one or more
1999 hexadecimal digits chosen from `0123456789abcdefABCDEF'.
2001 Integers have the usual values. To denote a negative integer, use
2002 the prefix operator `-' discussed under expressions (*note Prefix
2003 Operators: Prefix Ops.).
2006 File: as.info, Node: Bignums, Next: Flonums, Prev: Integers, Up: Numbers
2011 A "bignum" has the same syntax and semantics as an integer except that
2012 the number (or its negative) takes more than 32 bits to represent in
2013 binary. The distinction is made because in some places integers are
2014 permitted while bignums are not.
2017 File: as.info, Node: Flonums, Prev: Bignums, Up: Numbers
2022 A "flonum" represents a floating point number. The translation is
2023 indirect: a decimal floating point number from the text is converted by
2024 `as' to a generic binary floating point number of more than sufficient
2025 precision. This generic floating point number is converted to a
2026 particular computer's floating point format (or formats) by a portion
2027 of `as' specialized to that computer.
2029 A flonum is written by writing (in order)
2030 * The digit `0'. (`0' is optional on the HPPA.)
2032 * A letter, to tell `as' the rest of the number is a flonum. `e' is
2033 recommended. Case is not important.
2035 On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the
2036 letter must be one of the letters `DFPRSX' (in upper or lower
2039 On the ARC, the letter must be one of the letters `DFRS' (in upper
2042 On the Intel 960 architecture, the letter must be one of the
2043 letters `DFT' (in upper or lower case).
2045 On the HPPA architecture, the letter must be `E' (upper case only).
2047 * An optional sign: either `+' or `-'.
2049 * An optional "integer part": zero or more decimal digits.
2051 * An optional "fractional part": `.' followed by zero or more
2054 * An optional exponent, consisting of:
2058 * Optional sign: either `+' or `-'.
2060 * One or more decimal digits.
2063 At least one of the integer part or the fractional part must be
2064 present. The floating point number has the usual base-10 value.
2066 `as' does all processing using integers. Flonums are computed
2067 independently of any floating point hardware in the computer running
2071 File: as.info, Node: Sections, Next: Symbols, Prev: Syntax, Up: Top
2073 4 Sections and Relocation
2074 *************************
2078 * Secs Background:: Background
2079 * Ld Sections:: Linker Sections
2080 * As Sections:: Assembler Internal Sections
2081 * Sub-Sections:: Sub-Sections
2085 File: as.info, Node: Secs Background, Next: Ld Sections, Up: Sections
2090 Roughly, a section is a range of addresses, with no gaps; all data "in"
2091 those addresses is treated the same for some particular purpose. For
2092 example there may be a "read only" section.
2094 The linker `ld' reads many object files (partial programs) and
2095 combines their contents to form a runnable program. When `as' emits an
2096 object file, the partial program is assumed to start at address 0.
2097 `ld' assigns the final addresses for the partial program, so that
2098 different partial programs do not overlap. This is actually an
2099 oversimplification, but it suffices to explain how `as' uses sections.
2101 `ld' moves blocks of bytes of your program to their run-time
2102 addresses. These blocks slide to their run-time addresses as rigid
2103 units; their length does not change and neither does the order of bytes
2104 within them. Such a rigid unit is called a _section_. Assigning
2105 run-time addresses to sections is called "relocation". It includes the
2106 task of adjusting mentions of object-file addresses so they refer to
2107 the proper run-time addresses. For the H8/300, and for the Renesas /
2108 SuperH SH, `as' pads sections if needed to ensure they end on a word
2109 (sixteen bit) boundary.
2111 An object file written by `as' has at least three sections, any of
2112 which may be empty. These are named "text", "data" and "bss" sections.
2114 When it generates COFF or ELF output, `as' can also generate
2115 whatever other named sections you specify using the `.section'
2116 directive (*note `.section': Section.). If you do not use any
2117 directives that place output in the `.text' or `.data' sections, these
2118 sections still exist, but are empty.
2120 When `as' generates SOM or ELF output for the HPPA, `as' can also
2121 generate whatever other named sections you specify using the `.space'
2122 and `.subspace' directives. See `HP9000 Series 800 Assembly Language
2123 Reference Manual' (HP 92432-90001) for details on the `.space' and
2124 `.subspace' assembler directives.
2126 Additionally, `as' uses different names for the standard text, data,
2127 and bss sections when generating SOM output. Program text is placed
2128 into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.
2130 Within the object file, the text section starts at address `0', the
2131 data section follows, and the bss section follows the data section.
2133 When generating either SOM or ELF output files on the HPPA, the text
2134 section starts at address `0', the data section at address `0x4000000',
2135 and the bss section follows the data section.
2137 To let `ld' know which data changes when the sections are relocated,
2138 and how to change that data, `as' also writes to the object file
2139 details of the relocation needed. To perform relocation `ld' must
2140 know, each time an address in the object file is mentioned:
2141 * Where in the object file is the beginning of this reference to an
2144 * How long (in bytes) is this reference?
2146 * Which section does the address refer to? What is the numeric
2148 (ADDRESS) - (START-ADDRESS OF SECTION)?
2150 * Is the reference to an address "Program-Counter relative"?
2152 In fact, every address `as' ever uses is expressed as
2153 (SECTION) + (OFFSET INTO SECTION)
2154 Further, most expressions `as' computes have this section-relative
2155 nature. (For some object formats, such as SOM for the HPPA, some
2156 expressions are symbol-relative instead.)
2158 In this manual we use the notation {SECNAME N} to mean "offset N
2159 into section SECNAME."
2161 Apart from text, data and bss sections you need to know about the
2162 "absolute" section. When `ld' mixes partial programs, addresses in the
2163 absolute section remain unchanged. For example, address `{absolute 0}'
2164 is "relocated" to run-time address 0 by `ld'. Although the linker
2165 never arranges two partial programs' data sections with overlapping
2166 addresses after linking, _by definition_ their absolute sections must
2167 overlap. Address `{absolute 239}' in one part of a program is always
2168 the same address when the program is running as address `{absolute
2169 239}' in any other part of the program.
2171 The idea of sections is extended to the "undefined" section. Any
2172 address whose section is unknown at assembly time is by definition
2173 rendered {undefined U}--where U is filled in later. Since numbers are
2174 always defined, the only way to generate an undefined address is to
2175 mention an undefined symbol. A reference to a named common block would
2176 be such a symbol: its value is unknown at assembly time so it has
2177 section _undefined_.
2179 By analogy the word _section_ is used to describe groups of sections
2180 in the linked program. `ld' puts all partial programs' text sections
2181 in contiguous addresses in the linked program. It is customary to
2182 refer to the _text section_ of a program, meaning all the addresses of
2183 all partial programs' text sections. Likewise for data and bss
2186 Some sections are manipulated by `ld'; others are invented for use
2187 of `as' and have no meaning except during assembly.
2190 File: as.info, Node: Ld Sections, Next: As Sections, Prev: Secs Background, Up: Sections
2195 `ld' deals with just four kinds of sections, summarized below.
2200 These sections hold your program. `as' and `ld' treat them as
2201 separate but equal sections. Anything you can say of one section
2202 is true of another. When the program is running, however, it is
2203 customary for the text section to be unalterable. The text
2204 section is often shared among processes: it contains instructions,
2205 constants and the like. The data section of a running program is
2206 usually alterable: for example, C variables would be stored in the
2210 This section contains zeroed bytes when your program begins
2211 running. It is used to hold uninitialized variables or common
2212 storage. The length of each partial program's bss section is
2213 important, but because it starts out containing zeroed bytes there
2214 is no need to store explicit zero bytes in the object file. The
2215 bss section was invented to eliminate those explicit zeros from
2219 Address 0 of this section is always "relocated" to runtime address
2220 0. This is useful if you want to refer to an address that `ld'
2221 must not change when relocating. In this sense we speak of
2222 absolute addresses being "unrelocatable": they do not change
2226 This "section" is a catch-all for address references to objects
2227 not in the preceding sections.
2229 An idealized example of three relocatable sections follows. The
2230 example uses the traditional section names `.text' and `.data'. Memory
2231 addresses are on the horizontal axis.
2234 partial program # 1: |ttttt|dddd|00|
2241 partial program # 2: |TTT|DDD|000|
2244 +--+---+-----+--+----+---+-----+~~
2245 linked program: | |TTT|ttttt| |dddd|DDD|00000|
2246 +--+---+-----+--+----+---+-----+~~
2251 File: as.info, Node: As Sections, Next: Sub-Sections, Prev: Ld Sections, Up: Sections
2253 4.3 Assembler Internal Sections
2254 ===============================
2256 These sections are meant only for the internal use of `as'. They have
2257 no meaning at run-time. You do not really need to know about these
2258 sections for most purposes; but they can be mentioned in `as' warning
2259 messages, so it might be helpful to have an idea of their meanings to
2260 `as'. These sections are used to permit the value of every expression
2261 in your assembly language program to be a section-relative address.
2263 ASSEMBLER-INTERNAL-LOGIC-ERROR!
2264 An internal assembler logic error has been found. This means
2265 there is a bug in the assembler.
2268 The assembler stores complex expression internally as combinations
2269 of symbols. When it needs to represent an expression as a symbol,
2270 it puts it in the expr section.
2273 File: as.info, Node: Sub-Sections, Next: bss, Prev: As Sections, Up: Sections
2278 Assembled bytes conventionally fall into two sections: text and data.
2279 You may have separate groups of data in named sections that you want to
2280 end up near to each other in the object file, even though they are not
2281 contiguous in the assembler source. `as' allows you to use
2282 "subsections" for this purpose. Within each section, there can be
2283 numbered subsections with values from 0 to 8192. Objects assembled
2284 into the same subsection go into the object file together with other
2285 objects in the same subsection. For example, a compiler might want to
2286 store constants in the text section, but might not want to have them
2287 interspersed with the program being assembled. In this case, the
2288 compiler could issue a `.text 0' before each section of code being
2289 output, and a `.text 1' before each group of constants being output.
2291 Subsections are optional. If you do not use subsections, everything
2292 goes in subsection number zero.
2294 Each subsection is zero-padded up to a multiple of four bytes.
2295 (Subsections may be padded a different amount on different flavors of
2298 Subsections appear in your object file in numeric order, lowest
2299 numbered to highest. (All this to be compatible with other people's
2300 assemblers.) The object file contains no representation of
2301 subsections; `ld' and other programs that manipulate object files see
2302 no trace of them. They just see all your text subsections as a text
2303 section, and all your data subsections as a data section.
2305 To specify which subsection you want subsequent statements assembled
2306 into, use a numeric argument to specify it, in a `.text EXPRESSION' or
2307 a `.data EXPRESSION' statement. When generating COFF output, you can
2308 also use an extra subsection argument with arbitrary named sections:
2309 `.section NAME, EXPRESSION'. When generating ELF output, you can also
2310 use the `.subsection' directive (*note SubSection::) to specify a
2311 subsection: `.subsection EXPRESSION'. EXPRESSION should be an absolute
2312 expression (*note Expressions::). If you just say `.text' then `.text
2313 0' is assumed. Likewise `.data' means `.data 0'. Assembly begins in
2314 `text 0'. For instance:
2315 .text 0 # The default subsection is text 0 anyway.
2316 .ascii "This lives in the first text subsection. *"
2318 .ascii "But this lives in the second text subsection."
2320 .ascii "This lives in the data section,"
2321 .ascii "in the first data subsection."
2323 .ascii "This lives in the first text section,"
2324 .ascii "immediately following the asterisk (*)."
2326 Each section has a "location counter" incremented by one for every
2327 byte assembled into that section. Because subsections are merely a
2328 convenience restricted to `as' there is no concept of a subsection
2329 location counter. There is no way to directly manipulate a location
2330 counter--but the `.align' directive changes it, and any label
2331 definition captures its current value. The location counter of the
2332 section where statements are being assembled is said to be the "active"
2336 File: as.info, Node: bss, Prev: Sub-Sections, Up: Sections
2341 The bss section is used for local common variable storage. You may
2342 allocate address space in the bss section, but you may not dictate data
2343 to load into it before your program executes. When your program starts
2344 running, all the contents of the bss section are zeroed bytes.
2346 The `.lcomm' pseudo-op defines a symbol in the bss section; see
2347 *Note `.lcomm': Lcomm.
2349 The `.comm' pseudo-op may be used to declare a common symbol, which
2350 is another form of uninitialized symbol; see *Note `.comm': Comm.
2352 When assembling for a target which supports multiple sections, such
2353 as ELF or COFF, you may switch into the `.bss' section and define
2354 symbols as usual; see *Note `.section': Section. You may only assemble
2355 zero values into the section. Typically the section will only contain
2356 symbol definitions and `.skip' directives (*note `.skip': Skip.).
2359 File: as.info, Node: Symbols, Next: Expressions, Prev: Sections, Up: Top
2364 Symbols are a central concept: the programmer uses symbols to name
2365 things, the linker uses symbols to link, and the debugger uses symbols
2368 _Warning:_ `as' does not place symbols in the object file in the
2369 same order they were declared. This may break some debuggers.
2374 * Setting Symbols:: Giving Symbols Other Values
2375 * Symbol Names:: Symbol Names
2376 * Dot:: The Special Dot Symbol
2377 * Symbol Attributes:: Symbol Attributes
2380 File: as.info, Node: Labels, Next: Setting Symbols, Up: Symbols
2385 A "label" is written as a symbol immediately followed by a colon `:'.
2386 The symbol then represents the current value of the active location
2387 counter, and is, for example, a suitable instruction operand. You are
2388 warned if you use the same symbol to represent two different locations:
2389 the first definition overrides any other definitions.
2391 On the HPPA, the usual form for a label need not be immediately
2392 followed by a colon, but instead must start in column zero. Only one
2393 label may be defined on a single line. To work around this, the HPPA
2394 version of `as' also provides a special directive `.label' for defining
2395 labels more flexibly.
2398 File: as.info, Node: Setting Symbols, Next: Symbol Names, Prev: Labels, Up: Symbols
2400 5.2 Giving Symbols Other Values
2401 ===============================
2403 A symbol can be given an arbitrary value by writing a symbol, followed
2404 by an equals sign `=', followed by an expression (*note Expressions::).
2405 This is equivalent to using the `.set' directive. *Note `.set': Set.
2406 In the same way, using a double equals sign `='`=' here represents an
2407 equivalent of the `.eqv' directive. *Note `.eqv': Eqv.
2409 Blackfin does not support symbol assignment with `='.
2412 File: as.info, Node: Symbol Names, Next: Dot, Prev: Setting Symbols, Up: Symbols
2417 Symbol names begin with a letter or with one of `._'. On most
2418 machines, you can also use `$' in symbol names; exceptions are noted in
2419 *Note Machine Dependencies::. That character may be followed by any
2420 string of digits, letters, dollar signs (unless otherwise noted for a
2421 particular target machine), and underscores.
2423 Case of letters is significant: `foo' is a different symbol name than
2426 Multibyte characters are supported. To generate a symbol name
2427 containing multibyte characters enclose it within double quotes and use
2428 escape codes. cf *Note Strings::. Generating a multibyte symbol name
2429 from a label is not currently supported.
2431 Each symbol has exactly one name. Each name in an assembly language
2432 program refers to exactly one symbol. You may use that symbol name any
2433 number of times in a program.
2438 A local symbol is any symbol beginning with certain local label
2439 prefixes. By default, the local label prefix is `.L' for ELF systems or
2440 `L' for traditional a.out systems, but each target may have its own set
2441 of local label prefixes. On the HPPA local symbols begin with `L$'.
2443 Local symbols are defined and used within the assembler, but they are
2444 normally not saved in object files. Thus, they are not visible when
2445 debugging. You may use the `-L' option (*note Include Local Symbols:
2446 `-L': L.) to retain the local symbols in the object files.
2451 Local labels help compilers and programmers use names temporarily.
2452 They create symbols which are guaranteed to be unique over the entire
2453 scope of the input source code and which can be referred to by a simple
2454 notation. To define a local label, write a label of the form `N:'
2455 (where N represents any positive integer). To refer to the most recent
2456 previous definition of that label write `Nb', using the same number as
2457 when you defined the label. To refer to the next definition of a local
2458 label, write `Nf'--the `b' stands for "backwards" and the `f' stands
2461 There is no restriction on how you can use these labels, and you can
2462 reuse them too. So that it is possible to repeatedly define the same
2463 local label (using the same number `N'), although you can only refer to
2464 the most recently defined local label of that number (for a backwards
2465 reference) or the next definition of a specific local label for a
2466 forward reference. It is also worth noting that the first 10 local
2467 labels (`0:'...`9:') are implemented in a slightly more efficient
2468 manner than the others.
2477 Which is the equivalent of:
2479 label_1: branch label_3
2480 label_2: branch label_1
2481 label_3: branch label_4
2482 label_4: branch label_3
2484 Local label names are only a notational device. They are immediately
2485 transformed into more conventional symbol names before the assembler
2486 uses them. The symbol names are stored in the symbol table, appear in
2487 error messages, and are optionally emitted to the object file. The
2488 names are constructed using these parts:
2490 `_local label prefix_'
2491 All local symbols begin with the system-specific local label
2492 prefix. Normally both `as' and `ld' forget symbols that start
2493 with the local label prefix. These labels are used for symbols
2494 you are never intended to see. If you use the `-L' option then
2495 `as' retains these symbols in the object file. If you also
2496 instruct `ld' to retain these symbols, you may use them in
2500 This is the number that was used in the local label definition.
2501 So if the label is written `55:' then the number is `55'.
2504 This unusual character is included so you do not accidentally
2505 invent a symbol of the same name. The character has ASCII value
2506 of `\002' (control-B).
2509 This is a serial number to keep the labels distinct. The first
2510 definition of `0:' gets the number `1'. The 15th definition of
2511 `0:' gets the number `15', and so on. Likewise the first
2512 definition of `1:' gets the number `1' and its 15th definition
2515 So for example, the first `1:' may be named `.L1C-B1', and the 44th
2516 `3:' may be named `.L3C-B44'.
2521 `as' also supports an even more local form of local labels called
2522 dollar labels. These labels go out of scope (i.e., they become
2523 undefined) as soon as a non-local label is defined. Thus they remain
2524 valid for only a small region of the input source code. Normal local
2525 labels, by contrast, remain in scope for the entire file, or until they
2526 are redefined by another occurrence of the same local label.
2528 Dollar labels are defined in exactly the same way as ordinary local
2529 labels, except that they have a dollar sign suffix to their numeric
2530 value, e.g., `55$:'.
2532 They can also be distinguished from ordinary local labels by their
2533 transformed names which use ASCII character `\001' (control-A) as the
2534 magic character to distinguish them from ordinary labels. For example,
2535 the fifth definition of `6$' may be named `.L6C-A5'.
2538 File: as.info, Node: Dot, Next: Symbol Attributes, Prev: Symbol Names, Up: Symbols
2540 5.4 The Special Dot Symbol
2541 ==========================
2543 The special symbol `.' refers to the current address that `as' is
2544 assembling into. Thus, the expression `melvin: .long .' defines
2545 `melvin' to contain its own address. Assigning a value to `.' is
2546 treated the same as a `.org' directive. Thus, the expression `.=.+4'
2547 is the same as saying `.space 4'.
2550 File: as.info, Node: Symbol Attributes, Prev: Dot, Up: Symbols
2552 5.5 Symbol Attributes
2553 =====================
2555 Every symbol has, as well as its name, the attributes "Value" and
2556 "Type". Depending on output format, symbols can also have auxiliary
2559 If you use a symbol without defining it, `as' assumes zero for all
2560 these attributes, and probably won't warn you. This makes the symbol
2561 an externally defined symbol, which is generally what you would want.
2565 * Symbol Value:: Value
2566 * Symbol Type:: Type
2569 * a.out Symbols:: Symbol Attributes: `a.out'
2571 * COFF Symbols:: Symbol Attributes for COFF
2573 * SOM Symbols:: Symbol Attributes for SOM
2576 File: as.info, Node: Symbol Value, Next: Symbol Type, Up: Symbol Attributes
2581 The value of a symbol is (usually) 32 bits. For a symbol which labels a
2582 location in the text, data, bss or absolute sections the value is the
2583 number of addresses from the start of that section to the label.
2584 Naturally for text, data and bss sections the value of a symbol changes
2585 as `ld' changes section base addresses during linking. Absolute
2586 symbols' values do not change during linking: that is why they are
2589 The value of an undefined symbol is treated in a special way. If it
2590 is 0 then the symbol is not defined in this assembler source file, and
2591 `ld' tries to determine its value from other files linked into the same
2592 program. You make this kind of symbol simply by mentioning a symbol
2593 name without defining it. A non-zero value represents a `.comm' common
2594 declaration. The value is how much common storage to reserve, in bytes
2595 (addresses). The symbol refers to the first address of the allocated
2599 File: as.info, Node: Symbol Type, Next: a.out Symbols, Prev: Symbol Value, Up: Symbol Attributes
2604 The type attribute of a symbol contains relocation (section)
2605 information, any flag settings indicating that a symbol is external, and
2606 (optionally), other information for linkers and debuggers. The exact
2607 format depends on the object-code output format in use.
2610 File: as.info, Node: a.out Symbols, Next: COFF Symbols, Prev: Symbol Type, Up: Symbol Attributes
2612 5.5.3 Symbol Attributes: `a.out'
2613 --------------------------------
2617 * Symbol Desc:: Descriptor
2618 * Symbol Other:: Other
2621 File: as.info, Node: Symbol Desc, Next: Symbol Other, Up: a.out Symbols
2626 This is an arbitrary 16-bit value. You may establish a symbol's
2627 descriptor value by using a `.desc' statement (*note `.desc': Desc.).
2628 A descriptor value means nothing to `as'.
2631 File: as.info, Node: Symbol Other, Prev: Symbol Desc, Up: a.out Symbols
2636 This is an arbitrary 8-bit value. It means nothing to `as'.
2639 File: as.info, Node: COFF Symbols, Next: SOM Symbols, Prev: a.out Symbols, Up: Symbol Attributes
2641 5.5.4 Symbol Attributes for COFF
2642 --------------------------------
2644 The COFF format supports a multitude of auxiliary symbol attributes;
2645 like the primary symbol attributes, they are set between `.def' and
2646 `.endef' directives.
2648 5.5.4.1 Primary Attributes
2649 ..........................
2651 The symbol name is set with `.def'; the value and type, respectively,
2652 with `.val' and `.type'.
2654 5.5.4.2 Auxiliary Attributes
2655 ............................
2657 The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and
2658 `.weak' can generate auxiliary symbol table information for COFF.
2661 File: as.info, Node: SOM Symbols, Prev: COFF Symbols, Up: Symbol Attributes
2663 5.5.5 Symbol Attributes for SOM
2664 -------------------------------
2666 The SOM format for the HPPA supports a multitude of symbol attributes
2667 set with the `.EXPORT' and `.IMPORT' directives.
2669 The attributes are described in `HP9000 Series 800 Assembly Language
2670 Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT'
2671 assembler directive documentation.
2674 File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top
2679 An "expression" specifies an address or numeric value. Whitespace may
2680 precede and/or follow an expression.
2682 The result of an expression must be an absolute number, or else an
2683 offset into a particular section. If an expression is not absolute,
2684 and there is not enough information when `as' sees the expression to
2685 know its section, a second pass over the source program might be
2686 necessary to interpret the expression--but the second pass is currently
2687 not implemented. `as' aborts with an error message in this situation.
2691 * Empty Exprs:: Empty Expressions
2692 * Integer Exprs:: Integer Expressions
2695 File: as.info, Node: Empty Exprs, Next: Integer Exprs, Up: Expressions
2697 6.1 Empty Expressions
2698 =====================
2700 An empty expression has no value: it is just whitespace or null.
2701 Wherever an absolute expression is required, you may omit the
2702 expression, and `as' assumes a value of (absolute) 0. This is
2703 compatible with other assemblers.
2706 File: as.info, Node: Integer Exprs, Prev: Empty Exprs, Up: Expressions
2708 6.2 Integer Expressions
2709 =======================
2711 An "integer expression" is one or more _arguments_ delimited by
2716 * Arguments:: Arguments
2717 * Operators:: Operators
2718 * Prefix Ops:: Prefix Operators
2719 * Infix Ops:: Infix Operators
2722 File: as.info, Node: Arguments, Next: Operators, Up: Integer Exprs
2727 "Arguments" are symbols, numbers or subexpressions. In other contexts
2728 arguments are sometimes called "arithmetic operands". In this manual,
2729 to avoid confusing them with the "instruction operands" of the machine
2730 language, we use the term "argument" to refer to parts of expressions
2731 only, reserving the word "operand" to refer only to machine instruction
2734 Symbols are evaluated to yield {SECTION NNN} where SECTION is one of
2735 text, data, bss, absolute, or undefined. NNN is a signed, 2's
2736 complement 32 bit integer.
2738 Numbers are usually integers.
2740 A number can be a flonum or bignum. In this case, you are warned
2741 that only the low order 32 bits are used, and `as' pretends these 32
2742 bits are an integer. You may write integer-manipulating instructions
2743 that act on exotic constants, compatible with other assemblers.
2745 Subexpressions are a left parenthesis `(' followed by an integer
2746 expression, followed by a right parenthesis `)'; or a prefix operator
2747 followed by an argument.
2750 File: as.info, Node: Operators, Next: Prefix Ops, Prev: Arguments, Up: Integer Exprs
2755 "Operators" are arithmetic functions, like `+' or `%'. Prefix
2756 operators are followed by an argument. Infix operators appear between
2757 their arguments. Operators may be preceded and/or followed by
2761 File: as.info, Node: Prefix Ops, Next: Infix Ops, Prev: Operators, Up: Integer Exprs
2763 6.2.3 Prefix Operator
2764 ---------------------
2766 `as' has the following "prefix operators". They each take one
2767 argument, which must be absolute.
2770 "Negation". Two's complement negation.
2773 "Complementation". Bitwise not.
2776 File: as.info, Node: Infix Ops, Prev: Prefix Ops, Up: Integer Exprs
2778 6.2.4 Infix Operators
2779 ---------------------
2781 "Infix operators" take two arguments, one on either side. Operators
2782 have precedence, but operations with equal precedence are performed left
2783 to right. Apart from `+' or `-', both arguments must be absolute, and
2784 the result is absolute.
2786 1. Highest Precedence
2792 "Division". Truncation is the same as the C operator `/'
2798 "Shift Left". Same as the C operator `<<'.
2801 "Shift Right". Same as the C operator `>>'.
2803 2. Intermediate precedence
2806 "Bitwise Inclusive Or".
2812 "Bitwise Exclusive Or".
2820 "Addition". If either argument is absolute, the result has
2821 the section of the other argument. You may not add together
2822 arguments from different sections.
2825 "Subtraction". If the right argument is absolute, the result
2826 has the section of the left argument. If both arguments are
2827 in the same section, the result is absolute. You may not
2828 subtract arguments from different sections.
2844 "Is Greater Than Or Equal To"
2847 "Is Less Than Or Equal To"
2849 The comparison operators can be used as infix operators. A
2850 true results has a value of -1 whereas a false result has a
2851 value of 0. Note, these operators perform signed
2854 4. Lowest Precedence
2862 These two logical operations can be used to combine the
2863 results of sub expressions. Note, unlike the comparison
2864 operators a true result returns a value of 1 but a false
2865 results does still return 0. Also note that the logical or
2866 operator has a slightly lower precedence than logical and.
2869 In short, it's only meaningful to add or subtract the _offsets_ in an
2870 address; you can only have a defined section in one of the two
2874 File: as.info, Node: Pseudo Ops, Next: Object Attributes, Prev: Expressions, Up: Top
2876 7 Assembler Directives
2877 **********************
2879 All assembler directives have names that begin with a period (`.').
2880 The rest of the name is letters, usually in lower case.
2882 This chapter discusses directives that are available regardless of
2883 the target machine configuration for the GNU assembler. Some machine
2884 configurations provide additional directives. *Note Machine
2891 * ABORT (COFF):: `.ABORT'
2893 * Align:: `.align ABS-EXPR , ABS-EXPR'
2894 * Altmacro:: `.altmacro'
2895 * Ascii:: `.ascii "STRING"'...
2896 * Asciz:: `.asciz "STRING"'...
2897 * Balign:: `.balign ABS-EXPR , ABS-EXPR'
2898 * Bundle directives:: `.bundle_align_mode ABS-EXPR', `.bundle_lock', `.bundle_unlock'
2899 * Byte:: `.byte EXPRESSIONS'
2900 * CFI directives:: `.cfi_startproc [simple]', `.cfi_endproc', etc.
2901 * Comm:: `.comm SYMBOL , LENGTH '
2902 * Data:: `.data SUBSECTION'
2906 * Desc:: `.desc SYMBOL, ABS-EXPRESSION'
2910 * Double:: `.double FLONUMS'
2913 * Elseif:: `.elseif'
2918 * Endfunc:: `.endfunc'
2920 * Equ:: `.equ SYMBOL, EXPRESSION'
2921 * Equiv:: `.equiv SYMBOL, EXPRESSION'
2922 * Eqv:: `.eqv SYMBOL, EXPRESSION'
2924 * Error:: `.error STRING'
2926 * Extern:: `.extern'
2929 * Fill:: `.fill REPEAT , SIZE , VALUE'
2930 * Float:: `.float FLONUMS'
2932 * Global:: `.global SYMBOL', `.globl SYMBOL'
2934 * Gnu_attribute:: `.gnu_attribute TAG,VALUE'
2935 * Hidden:: `.hidden NAMES'
2937 * hword:: `.hword EXPRESSIONS'
2939 * If:: `.if ABSOLUTE EXPRESSION'
2940 * Incbin:: `.incbin "FILE"[,SKIP[,COUNT]]'
2941 * Include:: `.include "FILE"'
2942 * Int:: `.int EXPRESSIONS'
2944 * Internal:: `.internal NAMES'
2946 * Irp:: `.irp SYMBOL,VALUES'...
2947 * Irpc:: `.irpc SYMBOL,VALUES'...
2948 * Lcomm:: `.lcomm SYMBOL , LENGTH'
2949 * Lflags:: `.lflags'
2951 * Line:: `.line LINE-NUMBER'
2953 * Linkonce:: `.linkonce [TYPE]'
2955 * Ln:: `.ln LINE-NUMBER'
2956 * Loc:: `.loc FILENO LINENO'
2957 * Loc_mark_labels:: `.loc_mark_labels ENABLE'
2959 * Local:: `.local NAMES'
2961 * Long:: `.long EXPRESSIONS'
2963 * Macro:: `.macro NAME ARGS'...
2965 * Noaltmacro:: `.noaltmacro'
2966 * Nolist:: `.nolist'
2967 * Octa:: `.octa BIGNUMS'
2968 * Offset:: `.offset LOC'
2969 * Org:: `.org NEW-LC, FILL'
2970 * P2align:: `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR'
2972 * PopSection:: `.popsection'
2973 * Previous:: `.previous'
2975 * Print:: `.print STRING'
2977 * Protected:: `.protected NAMES'
2979 * Psize:: `.psize LINES, COLUMNS'
2980 * Purgem:: `.purgem NAME'
2982 * PushSection:: `.pushsection NAME'
2984 * Quad:: `.quad BIGNUMS'
2985 * Reloc:: `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
2986 * Rept:: `.rept COUNT'
2987 * Sbttl:: `.sbttl "SUBHEADING"'
2989 * Scl:: `.scl CLASS'
2991 * Section:: `.section NAME[, FLAGS]'
2993 * Set:: `.set SYMBOL, EXPRESSION'
2994 * Short:: `.short EXPRESSIONS'
2995 * Single:: `.single FLONUMS'
2997 * Size:: `.size [NAME , EXPRESSION]'
2999 * Skip:: `.skip SIZE , FILL'
3001 * Sleb128:: `.sleb128 EXPRESSIONS'
3003 * Space:: `.space SIZE , FILL'
3005 * Stab:: `.stabd, .stabn, .stabs'
3007 * String:: `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"'
3008 * Struct:: `.struct EXPRESSION'
3010 * SubSection:: `.subsection'
3011 * Symver:: `.symver NAME,NAME2@NODENAME'
3014 * Tag:: `.tag STRUCTNAME'
3016 * Text:: `.text SUBSECTION'
3017 * Title:: `.title "HEADING"'
3019 * Type:: `.type <INT | NAME , TYPE DESCRIPTION>'
3021 * Uleb128:: `.uleb128 EXPRESSIONS'
3026 * Version:: `.version "STRING"'
3027 * VTableEntry:: `.vtable_entry TABLE, OFFSET'
3028 * VTableInherit:: `.vtable_inherit CHILD, PARENT'
3030 * Warning:: `.warning STRING'
3031 * Weak:: `.weak NAMES'
3032 * Weakref:: `.weakref ALIAS, SYMBOL'
3033 * Word:: `.word EXPRESSIONS'
3034 * Deprecated:: Deprecated Directives
3037 File: as.info, Node: Abort, Next: ABORT (COFF), Up: Pseudo Ops
3042 This directive stops the assembly immediately. It is for compatibility
3043 with other assemblers. The original idea was that the assembly
3044 language source would be piped into the assembler. If the sender of
3045 the source quit, it could use this directive tells `as' to quit also.
3046 One day `.abort' will not be supported.
3049 File: as.info, Node: ABORT (COFF), Next: Align, Prev: Abort, Up: Pseudo Ops
3054 When producing COFF output, `as' accepts this directive as a synonym
3058 File: as.info, Node: Align, Next: Altmacro, Prev: ABORT (COFF), Up: Pseudo Ops
3060 7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR'
3061 =========================================
3063 Pad the location counter (in the current subsection) to a particular
3064 storage boundary. The first expression (which must be absolute) is the
3065 alignment required, as described below.
3067 The second expression (also absolute) gives the fill value to be
3068 stored in the padding bytes. It (and the comma) may be omitted. If it
3069 is omitted, the padding bytes are normally zero. However, on some
3070 systems, if the section is marked as containing code and the fill value
3071 is omitted, the space is filled with no-op instructions.
3073 The third expression is also absolute, and is also optional. If it
3074 is present, it is the maximum number of bytes that should be skipped by
3075 this alignment directive. If doing the alignment would require
3076 skipping more bytes than the specified maximum, then the alignment is
3077 not done at all. You can omit the fill value (the second argument)
3078 entirely by simply using two commas after the required alignment; this
3079 can be useful if you want the alignment to be filled with no-op
3080 instructions when appropriate.
3082 The way the required alignment is specified varies from system to
3083 system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32,
3084 s390, sparc, tic4x, tic80 and xtensa, the first expression is the
3085 alignment request in bytes. For example `.align 8' advances the
3086 location counter until it is a multiple of 8. If the location counter
3087 is already a multiple of 8, no change is needed. For the tic54x, the
3088 first expression is the alignment request in words.
3090 For other systems, including ppc, i386 using a.out format, arm and
3091 strongarm, it is the number of low-order zero bits the location counter
3092 must have after advancement. For example `.align 3' advances the
3093 location counter until it a multiple of 8. If the location counter is
3094 already a multiple of 8, no change is needed.
3096 This inconsistency is due to the different behaviors of the various
3097 native assemblers for these systems which GAS must emulate. GAS also
3098 provides `.balign' and `.p2align' directives, described later, which
3099 have a consistent behavior across all architectures (but are specific
3103 File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops
3108 Enable alternate macro mode, enabling:
3110 `LOCAL NAME [ , ... ]'
3111 One additional directive, `LOCAL', is available. It is used to
3112 generate a string replacement for each of the NAME arguments, and
3113 replace any instances of NAME in each macro expansion. The
3114 replacement string is unique in the assembly, and different for
3115 each separate macro expansion. `LOCAL' allows you to write macros
3116 that define symbols, without fear of conflict between separate
3120 You can write strings delimited in these other ways besides
3124 You can delimit strings with single-quote characters.
3127 You can delimit strings with matching angle brackets.
3129 `single-character string escape'
3130 To include any single character literally in a string (even if the
3131 character would otherwise have some special meaning), you can
3132 prefix the character with `!' (an exclamation mark). For example,
3133 you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 >
3136 `Expression results as strings'
3137 You can write `%EXPR' to evaluate the expression EXPR and use the
3141 File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops
3143 7.5 `.ascii "STRING"'...
3144 ========================
3146 `.ascii' expects zero or more string literals (*note Strings::)
3147 separated by commas. It assembles each string (with no automatic
3148 trailing zero byte) into consecutive addresses.
3151 File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops
3153 7.6 `.asciz "STRING"'...
3154 ========================
3156 `.asciz' is just like `.ascii', but each string is followed by a zero
3157 byte. The "z" in `.asciz' stands for "zero".
3160 File: as.info, Node: Balign, Next: Bundle directives, Prev: Asciz, Up: Pseudo Ops
3162 7.7 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
3163 ==============================================
3165 Pad the location counter (in the current subsection) to a particular
3166 storage boundary. The first expression (which must be absolute) is the
3167 alignment request in bytes. For example `.balign 8' advances the
3168 location counter until it is a multiple of 8. If the location counter
3169 is already a multiple of 8, no change is needed.
3171 The second expression (also absolute) gives the fill value to be
3172 stored in the padding bytes. It (and the comma) may be omitted. If it
3173 is omitted, the padding bytes are normally zero. However, on some
3174 systems, if the section is marked as containing code and the fill value
3175 is omitted, the space is filled with no-op instructions.
3177 The third expression is also absolute, and is also optional. If it
3178 is present, it is the maximum number of bytes that should be skipped by
3179 this alignment directive. If doing the alignment would require
3180 skipping more bytes than the specified maximum, then the alignment is
3181 not done at all. You can omit the fill value (the second argument)
3182 entirely by simply using two commas after the required alignment; this
3183 can be useful if you want the alignment to be filled with no-op
3184 instructions when appropriate.
3186 The `.balignw' and `.balignl' directives are variants of the
3187 `.balign' directive. The `.balignw' directive treats the fill pattern
3188 as a two byte word value. The `.balignl' directives treats the fill
3189 pattern as a four byte longword value. For example, `.balignw
3190 4,0x368d' will align to a multiple of 4. If it skips two bytes, they
3191 will be filled in with the value 0x368d (the exact placement of the
3192 bytes depends upon the endianness of the processor). If it skips 1 or
3193 3 bytes, the fill value is undefined.
3196 File: as.info, Node: Bundle directives, Next: Byte, Prev: Balign, Up: Pseudo Ops
3198 7.8 `.bundle_align_mode ABS-EXPR'
3199 =================================
3201 `.bundle_align_mode' enables or disables "aligned instruction bundle"
3202 mode. In this mode, sequences of adjacent instructions are grouped
3203 into fixed-sized "bundles". If the argument is zero, this mode is
3204 disabled (which is the default state). If the argument it not zero, it
3205 gives the size of an instruction bundle as a power of two (as for the
3206 `.p2align' directive, *note P2align::).
3208 For some targets, it's an ABI requirement that no instruction may
3209 span a certain aligned boundary. A "bundle" is simply a sequence of
3210 instructions that starts on an aligned boundary. For example, if
3211 ABS-EXPR is `5' then the bundle size is 32, so each aligned chunk of 32
3212 bytes is a bundle. When aligned instruction bundle mode is in effect,
3213 no single instruction may span a boundary between bundles. If an
3214 instruction would start too close to the end of a bundle for the length
3215 of that particular instruction to fit within the bundle, then the space
3216 at the end of that bundle is filled with no-op instructions so the
3217 instruction starts in the next bundle. As a corollary, it's an error
3218 if any single instruction's encoding is longer than the bundle size.
3220 7.9 `.bundle_lock' and `.bundle_unlock'
3221 =======================================
3223 The `.bundle_lock' and directive `.bundle_unlock' directives allow
3224 explicit control over instruction bundle padding. These directives are
3225 only valid when `.bundle_align_mode' has been used to enable aligned
3226 instruction bundle mode. It's an error if they appear when
3227 `.bundle_align_mode' has not been used at all, or when the last
3228 directive was `.bundle_align_mode 0'.
3230 For some targets, it's an ABI requirement that certain instructions
3231 may appear only as part of specified permissible sequences of multiple
3232 instructions, all within the same bundle. A pair of `.bundle_lock' and
3233 `.bundle_unlock' directives define a "bundle-locked" instruction
3234 sequence. For purposes of aligned instruction bundle mode, a sequence
3235 starting with `.bundle_lock' and ending with `.bundle_unlock' is
3236 treated as a single instruction. That is, the entire sequence must fit
3237 into a single bundle and may not span a bundle boundary. If necessary,
3238 no-op instructions will be inserted before the first instruction of the
3239 sequence so that the whole sequence starts on an aligned bundle
3240 boundary. It's an error if the sequence is longer than the bundle size.
3242 For convenience when using `.bundle_lock' and `.bundle_unlock'
3243 inside assembler macros (*note Macro::), bundle-locked sequences may be
3244 nested. That is, a second `.bundle_lock' directive before the next
3245 `.bundle_unlock' directive has no effect except that it must be matched
3246 by another closing `.bundle_unlock' so that there is the same number of
3247 `.bundle_lock' and `.bundle_unlock' directives.
3250 File: as.info, Node: Byte, Next: CFI directives, Prev: Bundle directives, Up: Pseudo Ops
3252 7.10 `.byte EXPRESSIONS'
3253 ========================
3255 `.byte' expects zero or more expressions, separated by commas. Each
3256 expression is assembled into the next byte.
3259 File: as.info, Node: CFI directives, Next: Comm, Prev: Byte, Up: Pseudo Ops
3261 7.11 `.cfi_sections SECTION_LIST'
3262 =================================
3264 `.cfi_sections' may be used to specify whether CFI directives should
3265 emit `.eh_frame' section and/or `.debug_frame' section. If
3266 SECTION_LIST is `.eh_frame', `.eh_frame' is emitted, if SECTION_LIST is
3267 `.debug_frame', `.debug_frame' is emitted. To emit both use
3268 `.eh_frame, .debug_frame'. The default if this directive is not used
3269 is `.cfi_sections .eh_frame'.
3271 7.12 `.cfi_startproc [simple]'
3272 ==============================
3274 `.cfi_startproc' is used at the beginning of each function that should
3275 have an entry in `.eh_frame'. It initializes some internal data
3276 structures. Don't forget to close the function by `.cfi_endproc'.
3278 Unless `.cfi_startproc' is used along with parameter `simple' it
3279 also emits some architecture dependent initial CFI instructions.
3284 `.cfi_endproc' is used at the end of a function where it closes its
3285 unwind entry previously opened by `.cfi_startproc', and emits it to
3288 7.14 `.cfi_personality ENCODING [, EXP]'
3289 ========================================
3291 `.cfi_personality' defines personality routine and its encoding.
3292 ENCODING must be a constant determining how the personality should be
3293 encoded. If it is 255 (`DW_EH_PE_omit'), second argument is not
3294 present, otherwise second argument should be a constant or a symbol
3295 name. When using indirect encodings, the symbol provided should be the
3296 location where personality can be loaded from, not the personality
3297 routine itself. The default after `.cfi_startproc' is
3298 `.cfi_personality 0xff', no personality routine.
3300 7.15 `.cfi_lsda ENCODING [, EXP]'
3301 =================================
3303 `.cfi_lsda' defines LSDA and its encoding. ENCODING must be a constant
3304 determining how the LSDA should be encoded. If it is 255
3305 (`DW_EH_PE_omit'), second argument is not present, otherwise second
3306 argument should be a constant or a symbol name. The default after
3307 `.cfi_startproc' is `.cfi_lsda 0xff', no LSDA.
3309 7.16 `.cfi_def_cfa REGISTER, OFFSET'
3310 ====================================
3312 `.cfi_def_cfa' defines a rule for computing CFA as: take address from
3313 REGISTER and add OFFSET to it.
3315 7.17 `.cfi_def_cfa_register REGISTER'
3316 =====================================
3318 `.cfi_def_cfa_register' modifies a rule for computing CFA. From now on
3319 REGISTER will be used instead of the old one. Offset remains the same.
3321 7.18 `.cfi_def_cfa_offset OFFSET'
3322 =================================
3324 `.cfi_def_cfa_offset' modifies a rule for computing CFA. Register
3325 remains the same, but OFFSET is new. Note that it is the absolute
3326 offset that will be added to a defined register to compute CFA address.
3328 7.19 `.cfi_adjust_cfa_offset OFFSET'
3329 ====================================
3331 Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is
3332 added/substracted from the previous offset.
3334 7.20 `.cfi_offset REGISTER, OFFSET'
3335 ===================================
3337 Previous value of REGISTER is saved at offset OFFSET from CFA.
3339 7.21 `.cfi_rel_offset REGISTER, OFFSET'
3340 =======================================
3342 Previous value of REGISTER is saved at offset OFFSET from the current
3343 CFA register. This is transformed to `.cfi_offset' using the known
3344 displacement of the CFA register from the CFA. This is often easier to
3345 use, because the number will match the code it's annotating.
3347 7.22 `.cfi_register REGISTER1, REGISTER2'
3348 =========================================
3350 Previous value of REGISTER1 is saved in register REGISTER2.
3352 7.23 `.cfi_restore REGISTER'
3353 ============================
3355 `.cfi_restore' says that the rule for REGISTER is now the same as it
3356 was at the beginning of the function, after all initial instruction
3357 added by `.cfi_startproc' were executed.
3359 7.24 `.cfi_undefined REGISTER'
3360 ==============================
3362 From now on the previous value of REGISTER can't be restored anymore.
3364 7.25 `.cfi_same_value REGISTER'
3365 ===============================
3367 Current value of REGISTER is the same like in the previous frame, i.e.
3368 no restoration needed.
3370 7.26 `.cfi_remember_state',
3371 ===========================
3373 First save all current rules for all registers by `.cfi_remember_state',
3374 then totally screw them up by subsequent `.cfi_*' directives and when
3375 everything is hopelessly bad, use `.cfi_restore_state' to restore the
3376 previous saved state.
3378 7.27 `.cfi_return_column REGISTER'
3379 ==================================
3381 Change return column REGISTER, i.e. the return address is either
3382 directly in REGISTER or can be accessed by rules for REGISTER.
3384 7.28 `.cfi_signal_frame'
3385 ========================
3387 Mark current function as signal trampoline.
3389 7.29 `.cfi_window_save'
3390 =======================
3392 SPARC register window has been saved.
3394 7.30 `.cfi_escape' EXPRESSION[, ...]
3395 ====================================
3397 Allows the user to add arbitrary bytes to the unwind info. One might
3398 use this to add OS-specific CFI opcodes, or generic CFI opcodes that
3399 GAS does not yet support.
3401 7.31 `.cfi_val_encoded_addr REGISTER, ENCODING, LABEL'
3402 ======================================================
3404 The current value of REGISTER is LABEL. The value of LABEL will be
3405 encoded in the output file according to ENCODING; see the description
3406 of `.cfi_personality' for details on this encoding.
3408 The usefulness of equating a register to a fixed label is probably
3409 limited to the return address register. Here, it can be useful to mark
3410 a code segment that has only one return address which is reached by a
3411 direct branch and no copy of the return address exists in memory or
3415 File: as.info, Node: Comm, Next: Data, Prev: CFI directives, Up: Pseudo Ops
3417 7.32 `.comm SYMBOL , LENGTH '
3418 =============================
3420 `.comm' declares a common symbol named SYMBOL. When linking, a common
3421 symbol in one object file may be merged with a defined or common symbol
3422 of the same name in another object file. If `ld' does not see a
3423 definition for the symbol-just one or more common symbols-then it will
3424 allocate LENGTH bytes of uninitialized memory. LENGTH must be an
3425 absolute expression. If `ld' sees multiple common symbols with the
3426 same name, and they do not all have the same size, it will allocate
3427 space using the largest size.
3429 When using ELF or (as a GNU extension) PE, the `.comm' directive
3430 takes an optional third argument. This is the desired alignment of the
3431 symbol, specified for ELF as a byte boundary (for example, an alignment
3432 of 16 means that the least significant 4 bits of the address should be
3433 zero), and for PE as a power of two (for example, an alignment of 5
3434 means aligned to a 32-byte boundary). The alignment must be an
3435 absolute expression, and it must be a power of two. If `ld' allocates
3436 uninitialized memory for the common symbol, it will use the alignment
3437 when placing the symbol. If no alignment is specified, `as' will set
3438 the alignment to the largest power of two less than or equal to the
3439 size of the symbol, up to a maximum of 16 on ELF, or the default
3440 section alignment of 4 on PE(1).
3442 The syntax for `.comm' differs slightly on the HPPA. The syntax is
3443 `SYMBOL .comm, LENGTH'; SYMBOL is optional.
3445 ---------- Footnotes ----------
3447 (1) This is not the same as the executable image file alignment
3448 controlled by `ld''s `--section-alignment' option; image file sections
3449 in PE are aligned to multiples of 4096, which is far too large an
3450 alignment for ordinary variables. It is rather the default alignment
3451 for (non-debug) sections within object (`*.o') files, which are less
3455 File: as.info, Node: Data, Next: Def, Prev: Comm, Up: Pseudo Ops
3457 7.33 `.data SUBSECTION'
3458 =======================
3460 `.data' tells `as' to assemble the following statements onto the end of
3461 the data subsection numbered SUBSECTION (which is an absolute
3462 expression). If SUBSECTION is omitted, it defaults to zero.
3465 File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops
3470 Begin defining debugging information for a symbol NAME; the definition
3471 extends until the `.endef' directive is encountered.
3474 File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops
3476 7.35 `.desc SYMBOL, ABS-EXPRESSION'
3477 ===================================
3479 This directive sets the descriptor of the symbol (*note Symbol
3480 Attributes::) to the low 16 bits of an absolute expression.
3482 The `.desc' directive is not available when `as' is configured for
3483 COFF output; it is only for `a.out' or `b.out' object format. For the
3484 sake of compatibility, `as' accepts it, but produces no output, when
3485 configured for COFF.
3488 File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops
3493 This directive is generated by compilers to include auxiliary debugging
3494 information in the symbol table. It is only permitted inside
3495 `.def'/`.endef' pairs.
3498 File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops
3500 7.37 `.double FLONUMS'
3501 ======================
3503 `.double' expects zero or more flonums, separated by commas. It
3504 assembles floating point numbers. The exact kind of floating point
3505 numbers emitted depends on how `as' is configured. *Note Machine
3509 File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops
3514 Force a page break at this point, when generating assembly listings.
3517 File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops
3522 `.else' is part of the `as' support for conditional assembly; see *Note
3523 `.if': If. It marks the beginning of a section of code to be assembled
3524 if the condition for the preceding `.if' was false.
3527 File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops
3532 `.elseif' is part of the `as' support for conditional assembly; see
3533 *Note `.if': If. It is shorthand for beginning a new `.if' block that
3534 would otherwise fill the entire `.else' section.
3537 File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops
3542 `.end' marks the end of the assembly file. `as' does not process
3543 anything in the file past the `.end' directive.
3546 File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops
3551 This directive flags the end of a symbol definition begun with `.def'.
3554 File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops
3559 `.endfunc' marks the end of a function specified with `.func'.
3562 File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops
3567 `.endif' is part of the `as' support for conditional assembly; it marks
3568 the end of a block of code that is only assembled conditionally. *Note
3572 File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops
3574 7.45 `.equ SYMBOL, EXPRESSION'
3575 ==============================
3577 This directive sets the value of SYMBOL to EXPRESSION. It is
3578 synonymous with `.set'; see *Note `.set': Set.
3580 The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'.
3582 The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'. On the
3583 Z80 it is an eror if SYMBOL is already defined, but the symbol is not
3584 protected from later redefinition. Compare *Note Equiv::.
3587 File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops
3589 7.46 `.equiv SYMBOL, EXPRESSION'
3590 ================================
3592 The `.equiv' directive is like `.equ' and `.set', except that the
3593 assembler will signal an error if SYMBOL is already defined. Note a
3594 symbol which has been referenced but not actually defined is considered
3597 Except for the contents of the error message, this is roughly
3603 plus it protects the symbol from later redefinition.
3606 File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops
3608 7.47 `.eqv SYMBOL, EXPRESSION'
3609 ==============================
3611 The `.eqv' directive is like `.equiv', but no attempt is made to
3612 evaluate the expression or any part of it immediately. Instead each
3613 time the resulting symbol is used in an expression, a snapshot of its
3614 current value is taken.
3617 File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops
3622 If `as' assembles a `.err' directive, it will print an error message
3623 and, unless the `-Z' option was used, it will not generate an object
3624 file. This can be used to signal an error in conditionally compiled
3628 File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops
3630 7.49 `.error "STRING"'
3631 ======================
3633 Similarly to `.err', this directive emits an error, but you can specify
3634 a string that will be emitted as the error message. If you don't
3635 specify the message, it defaults to `".error directive invoked in
3636 source file"'. *Note Error and Warning Messages: Errors.
3638 .error "This code has not been assembled and tested."
3641 File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops
3646 Exit early from the current macro definition. *Note Macro::.
3649 File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops
3654 `.extern' is accepted in the source program--for compatibility with
3655 other assemblers--but it is ignored. `as' treats all undefined symbols
3659 File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops
3661 7.52 `.fail EXPRESSION'
3662 =======================
3664 Generates an error or a warning. If the value of the EXPRESSION is 500
3665 or more, `as' will print a warning message. If the value is less than
3666 500, `as' will print an error message. The message will include the
3667 value of EXPRESSION. This can occasionally be useful inside complex
3668 nested macros or conditional assembly.
3671 File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops
3676 There are two different versions of the `.file' directive. Targets
3677 that support DWARF2 line number information use the DWARF2 version of
3678 `.file'. Other targets use the default version.
3683 This version of the `.file' directive tells `as' that we are about to
3684 start a new logical file. The syntax is:
3688 STRING is the new file name. In general, the filename is recognized
3689 whether or not it is surrounded by quotes `"'; but if you wish to
3690 specify an empty file name, you must give the quotes-`""'. This
3691 statement may go away in future: it is only recognized to be compatible
3692 with old `as' programs.
3697 When emitting DWARF2 line number information, `.file' assigns filenames
3698 to the `.debug_line' file name table. The syntax is:
3700 .file FILENO FILENAME
3702 The FILENO operand should be a unique positive integer to use as the
3703 index of the entry in the table. The FILENAME operand is a C string
3706 The detail of filename indices is exposed to the user because the
3707 filename table is shared with the `.debug_info' section of the DWARF2
3708 debugging information, and thus the user must know the exact indices
3709 that table entries will have.
3712 File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops
3714 7.54 `.fill REPEAT , SIZE , VALUE'
3715 ==================================
3717 REPEAT, SIZE and VALUE are absolute expressions. This emits REPEAT
3718 copies of SIZE bytes. REPEAT may be zero or more. SIZE may be zero or
3719 more, but if it is more than 8, then it is deemed to have the value 8,
3720 compatible with other people's assemblers. The contents of each REPEAT
3721 bytes is taken from an 8-byte number. The highest order 4 bytes are
3722 zero. The lowest order 4 bytes are VALUE rendered in the byte-order of
3723 an integer on the computer `as' is assembling for. Each SIZE bytes in
3724 a repetition is taken from the lowest order SIZE bytes of this number.
3725 Again, this bizarre behavior is compatible with other people's
3728 SIZE and VALUE are optional. If the second comma and VALUE are
3729 absent, VALUE is assumed zero. If the first comma and following tokens
3730 are absent, SIZE is assumed to be 1.
3733 File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops
3735 7.55 `.float FLONUMS'
3736 =====================
3738 This directive assembles zero or more flonums, separated by commas. It
3739 has the same effect as `.single'. The exact kind of floating point
3740 numbers emitted depends on how `as' is configured. *Note Machine
3744 File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops
3746 7.56 `.func NAME[,LABEL]'
3747 =========================
3749 `.func' emits debugging information to denote function NAME, and is
3750 ignored unless the file is assembled with debugging enabled. Only
3751 `--gstabs[+]' is currently supported. LABEL is the entry point of the
3752 function and if omitted NAME prepended with the `leading char' is used.
3753 `leading char' is usually `_' or nothing, depending on the target. All
3754 functions are currently defined to have `void' return type. The
3755 function must be terminated with `.endfunc'.
3758 File: as.info, Node: Global, Next: Gnu_attribute, Prev: Func, Up: Pseudo Ops
3760 7.57 `.global SYMBOL', `.globl SYMBOL'
3761 ======================================
3763 `.global' makes the symbol visible to `ld'. If you define SYMBOL in
3764 your partial program, its value is made available to other partial
3765 programs that are linked with it. Otherwise, SYMBOL takes its
3766 attributes from a symbol of the same name from another file linked into
3769 Both spellings (`.globl' and `.global') are accepted, for
3770 compatibility with other assemblers.
3772 On the HPPA, `.global' is not always enough to make it accessible to
3773 other partial programs. You may need the HPPA-only `.EXPORT' directive
3774 as well. *Note HPPA Assembler Directives: HPPA Directives.
3777 File: as.info, Node: Gnu_attribute, Next: Hidden, Prev: Global, Up: Pseudo Ops
3779 7.58 `.gnu_attribute TAG,VALUE'
3780 ===============================
3782 Record a GNU object attribute for this file. *Note Object Attributes::.
3785 File: as.info, Node: Hidden, Next: hword, Prev: Gnu_attribute, Up: Pseudo Ops
3787 7.59 `.hidden NAMES'
3788 ====================
3790 This is one of the ELF visibility directives. The other two are
3791 `.internal' (*note `.internal': Internal.) and `.protected' (*note
3792 `.protected': Protected.).
3794 This directive overrides the named symbols default visibility (which
3795 is set by their binding: local, global or weak). The directive sets
3796 the visibility to `hidden' which means that the symbols are not visible
3797 to other components. Such symbols are always considered to be
3798 `protected' as well.
3801 File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops
3803 7.60 `.hword EXPRESSIONS'
3804 =========================
3806 This expects zero or more EXPRESSIONS, and emits a 16 bit number for
3809 This directive is a synonym for `.short'; depending on the target
3810 architecture, it may also be a synonym for `.word'.
3813 File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops
3818 This directive is used by some assemblers to place tags in object
3819 files. The behavior of this directive varies depending on the target.
3820 When using the a.out object file format, `as' simply accepts the
3821 directive for source-file compatibility with existing assemblers, but
3822 does not emit anything for it. When using COFF, comments are emitted
3823 to the `.comment' or `.rdata' section, depending on the target. When
3824 using ELF, comments are emitted to the `.comment' section.
3827 File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops
3829 7.62 `.if ABSOLUTE EXPRESSION'
3830 ==============================
3832 `.if' marks the beginning of a section of code which is only considered
3833 part of the source program being assembled if the argument (which must
3834 be an ABSOLUTE EXPRESSION) is non-zero. The end of the conditional
3835 section of code must be marked by `.endif' (*note `.endif': Endif.);
3836 optionally, you may include code for the alternative condition, flagged
3837 by `.else' (*note `.else': Else.). If you have several conditions to
3838 check, `.elseif' may be used to avoid nesting blocks if/else within
3839 each subsequent `.else' block.
3841 The following variants of `.if' are also supported:
3843 Assembles the following section of code if the specified SYMBOL
3844 has been defined. Note a symbol which has been referenced but not
3845 yet defined is considered to be undefined.
3848 Assembles the following section of code if the operand is blank
3851 `.ifc STRING1,STRING2'
3852 Assembles the following section of code if the two strings are the
3853 same. The strings may be optionally quoted with single quotes.
3854 If they are not quoted, the first string stops at the first comma,
3855 and the second string stops at the end of the line. Strings which
3856 contain whitespace should be quoted. The string comparison is
3859 `.ifeq ABSOLUTE EXPRESSION'
3860 Assembles the following section of code if the argument is zero.
3862 `.ifeqs STRING1,STRING2'
3863 Another form of `.ifc'. The strings must be quoted using double
3866 `.ifge ABSOLUTE EXPRESSION'
3867 Assembles the following section of code if the argument is greater
3868 than or equal to zero.
3870 `.ifgt ABSOLUTE EXPRESSION'
3871 Assembles the following section of code if the argument is greater
3874 `.ifle ABSOLUTE EXPRESSION'
3875 Assembles the following section of code if the argument is less
3876 than or equal to zero.
3878 `.iflt ABSOLUTE EXPRESSION'
3879 Assembles the following section of code if the argument is less
3883 Like `.ifb', but the sense of the test is reversed: this assembles
3884 the following section of code if the operand is non-blank
3887 `.ifnc STRING1,STRING2.'
3888 Like `.ifc', but the sense of the test is reversed: this assembles
3889 the following section of code if the two strings are not the same.
3893 Assembles the following section of code if the specified SYMBOL
3894 has not been defined. Both spelling variants are equivalent.
3895 Note a symbol which has been referenced but not yet defined is
3896 considered to be undefined.
3898 `.ifne ABSOLUTE EXPRESSION'
3899 Assembles the following section of code if the argument is not
3900 equal to zero (in other words, this is equivalent to `.if').
3902 `.ifnes STRING1,STRING2'
3903 Like `.ifeqs', but the sense of the test is reversed: this
3904 assembles the following section of code if the two strings are not
3908 File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops
3910 7.63 `.incbin "FILE"[,SKIP[,COUNT]]'
3911 ====================================
3913 The `incbin' directive includes FILE verbatim at the current location.
3914 You can control the search paths used with the `-I' command-line option
3915 (*note Command-Line Options: Invoking.). Quotation marks are required
3918 The SKIP argument skips a number of bytes from the start of the
3919 FILE. The COUNT argument indicates the maximum number of bytes to
3920 read. Note that the data is not aligned in any way, so it is the user's
3921 responsibility to make sure that proper alignment is provided both
3922 before and after the `incbin' directive.
3925 File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops
3927 7.64 `.include "FILE"'
3928 ======================
3930 This directive provides a way to include supporting files at specified
3931 points in your source program. The code from FILE is assembled as if
3932 it followed the point of the `.include'; when the end of the included
3933 file is reached, assembly of the original file continues. You can
3934 control the search paths used with the `-I' command-line option (*note
3935 Command-Line Options: Invoking.). Quotation marks are required around
3939 File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops
3941 7.65 `.int EXPRESSIONS'
3942 =======================
3944 Expect zero or more EXPRESSIONS, of any section, separated by commas.
3945 For each expression, emit a number that, at run time, is the value of
3946 that expression. The byte order and bit size of the number depends on
3947 what kind of target the assembly is for.
3950 File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops
3952 7.66 `.internal NAMES'
3953 ======================
3955 This is one of the ELF visibility directives. The other two are
3956 `.hidden' (*note `.hidden': Hidden.) and `.protected' (*note
3957 `.protected': Protected.).
3959 This directive overrides the named symbols default visibility (which
3960 is set by their binding: local, global or weak). The directive sets
3961 the visibility to `internal' which means that the symbols are
3962 considered to be `hidden' (i.e., not visible to other components), and
3963 that some extra, processor specific processing must also be performed
3964 upon the symbols as well.
3967 File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops
3969 7.67 `.irp SYMBOL,VALUES'...
3970 ============================
3972 Evaluate a sequence of statements assigning different values to SYMBOL.
3973 The sequence of statements starts at the `.irp' directive, and is
3974 terminated by an `.endr' directive. For each VALUE, SYMBOL is set to
3975 VALUE, and the sequence of statements is assembled. If no VALUE is
3976 listed, the sequence of statements is assembled once, with SYMBOL set
3977 to the null string. To refer to SYMBOL within the sequence of
3978 statements, use \SYMBOL.
3980 For example, assembling
3986 is equivalent to assembling
3992 For some caveats with the spelling of SYMBOL, see also *Note Macro::.
3995 File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops
3997 7.68 `.irpc SYMBOL,VALUES'...
3998 =============================
4000 Evaluate a sequence of statements assigning different values to SYMBOL.
4001 The sequence of statements starts at the `.irpc' directive, and is
4002 terminated by an `.endr' directive. For each character in VALUE,
4003 SYMBOL is set to the character, and the sequence of statements is
4004 assembled. If no VALUE is listed, the sequence of statements is
4005 assembled once, with SYMBOL set to the null string. To refer to SYMBOL
4006 within the sequence of statements, use \SYMBOL.
4008 For example, assembling
4014 is equivalent to assembling
4020 For some caveats with the spelling of SYMBOL, see also the discussion
4024 File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops
4026 7.69 `.lcomm SYMBOL , LENGTH'
4027 =============================
4029 Reserve LENGTH (an absolute expression) bytes for a local common
4030 denoted by SYMBOL. The section and value of SYMBOL are those of the
4031 new local common. The addresses are allocated in the bss section, so
4032 that at run-time the bytes start off zeroed. SYMBOL is not declared
4033 global (*note `.global': Global.), so is normally not visible to `ld'.
4035 Some targets permit a third argument to be used with `.lcomm'. This
4036 argument specifies the desired alignment of the symbol in the bss
4039 The syntax for `.lcomm' differs slightly on the HPPA. The syntax is
4040 `SYMBOL .lcomm, LENGTH'; SYMBOL is optional.
4043 File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops
4048 `as' accepts this directive, for compatibility with other assemblers,
4052 File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops
4054 7.71 `.line LINE-NUMBER'
4055 ========================
4057 Change the logical line number. LINE-NUMBER must be an absolute
4058 expression. The next line has that logical line number. Therefore any
4059 other statements on the current line (after a statement separator
4060 character) are reported as on logical line number LINE-NUMBER - 1. One
4061 day `as' will no longer support this directive: it is recognized only
4062 for compatibility with existing assembler programs.
4064 Even though this is a directive associated with the `a.out' or `b.out'
4065 object-code formats, `as' still recognizes it when producing COFF
4066 output, and treats `.line' as though it were the COFF `.ln' _if_ it is
4067 found outside a `.def'/`.endef' pair.
4069 Inside a `.def', `.line' is, instead, one of the directives used by
4070 compilers to generate auxiliary symbol information for debugging.
4073 File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops
4075 7.72 `.linkonce [TYPE]'
4076 =======================
4078 Mark the current section so that the linker only includes a single copy
4079 of it. This may be used to include the same section in several
4080 different object files, but ensure that the linker will only include it
4081 once in the final output file. The `.linkonce' pseudo-op must be used
4082 for each instance of the section. Duplicate sections are detected
4083 based on the section name, so it should be unique.
4085 This directive is only supported by a few object file formats; as of
4086 this writing, the only object file format which supports it is the
4087 Portable Executable format used on Windows NT.
4089 The TYPE argument is optional. If specified, it must be one of the
4090 following strings. For example:
4092 Not all types may be supported on all object file formats.
4095 Silently discard duplicate sections. This is the default.
4098 Warn if there are duplicate sections, but still keep only one copy.
4101 Warn if any of the duplicates have different sizes.
4104 Warn if any of the duplicates do not have exactly the same
4108 File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops
4113 Control (in conjunction with the `.nolist' directive) whether or not
4114 assembly listings are generated. These two directives maintain an
4115 internal counter (which is zero initially). `.list' increments the
4116 counter, and `.nolist' decrements it. Assembly listings are generated
4117 whenever the counter is greater than zero.
4119 By default, listings are disabled. When you enable them (with the
4120 `-a' command line option; *note Command-Line Options: Invoking.), the
4121 initial value of the listing counter is one.
4124 File: as.info, Node: Ln, Next: Loc, Prev: List, Up: Pseudo Ops
4126 7.74 `.ln LINE-NUMBER'
4127 ======================
4129 `.ln' is a synonym for `.line'.
4132 File: as.info, Node: Loc, Next: Loc_mark_labels, Prev: Ln, Up: Pseudo Ops
4134 7.75 `.loc FILENO LINENO [COLUMN] [OPTIONS]'
4135 ============================================
4137 When emitting DWARF2 line number information, the `.loc' directive will
4138 add a row to the `.debug_line' line number matrix corresponding to the
4139 immediately following assembly instruction. The FILENO, LINENO, and
4140 optional COLUMN arguments will be applied to the `.debug_line' state
4141 machine before the row is added.
4143 The OPTIONS are a sequence of the following tokens in any order:
4146 This option will set the `basic_block' register in the
4147 `.debug_line' state machine to `true'.
4150 This option will set the `prologue_end' register in the
4151 `.debug_line' state machine to `true'.
4154 This option will set the `epilogue_begin' register in the
4155 `.debug_line' state machine to `true'.
4158 This option will set the `is_stmt' register in the `.debug_line'
4159 state machine to `value', which must be either 0 or 1.
4162 This directive will set the `isa' register in the `.debug_line'
4163 state machine to VALUE, which must be an unsigned integer.
4165 `discriminator VALUE'
4166 This directive will set the `discriminator' register in the
4167 `.debug_line' state machine to VALUE, which must be an unsigned
4172 File: as.info, Node: Loc_mark_labels, Next: Local, Prev: Loc, Up: Pseudo Ops
4174 7.76 `.loc_mark_labels ENABLE'
4175 ==============================
4177 When emitting DWARF2 line number information, the `.loc_mark_labels'
4178 directive makes the assembler emit an entry to the `.debug_line' line
4179 number matrix with the `basic_block' register in the state machine set
4180 whenever a code label is seen. The ENABLE argument should be either 1
4181 or 0, to enable or disable this function respectively.
4184 File: as.info, Node: Local, Next: Long, Prev: Loc_mark_labels, Up: Pseudo Ops
4189 This directive, which is available for ELF targets, marks each symbol in
4190 the comma-separated list of `names' as a local symbol so that it will
4191 not be externally visible. If the symbols do not already exist, they
4194 For targets where the `.lcomm' directive (*note Lcomm::) does not
4195 accept an alignment argument, which is the case for most ELF targets,
4196 the `.local' directive can be used in combination with `.comm' (*note
4197 Comm::) to define aligned local common data.
4200 File: as.info, Node: Long, Next: Macro, Prev: Local, Up: Pseudo Ops
4202 7.78 `.long EXPRESSIONS'
4203 ========================
4205 `.long' is the same as `.int'. *Note `.int': Int.
4208 File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops
4213 The commands `.macro' and `.endm' allow you to define macros that
4214 generate assembly output. For example, this definition specifies a
4215 macro `sum' that puts a sequence of numbers into memory:
4217 .macro sum from=0, to=5
4224 With that definition, `SUM 0,5' is equivalent to this assembly input:
4234 `.macro MACNAME MACARGS ...'
4235 Begin the definition of a macro called MACNAME. If your macro
4236 definition requires arguments, specify their names after the macro
4237 name, separated by commas or spaces. You can qualify the macro
4238 argument to indicate whether all invocations must specify a
4239 non-blank value (through `:`req''), or whether it takes all of the
4240 remaining arguments (through `:`vararg''). You can supply a
4241 default value for any macro argument by following the name with
4242 `=DEFLT'. You cannot define two macros with the same MACNAME
4243 unless it has been subject to the `.purgem' directive (*note
4244 Purgem::) between the two definitions. For example, these are all
4245 valid `.macro' statements:
4248 Begin the definition of a macro called `comm', which takes no
4251 `.macro plus1 p, p1'
4253 Either statement begins the definition of a macro called
4254 `plus1', which takes two arguments; within the macro
4255 definition, write `\p' or `\p1' to evaluate the arguments.
4257 `.macro reserve_str p1=0 p2'
4258 Begin the definition of a macro called `reserve_str', with two
4259 arguments. The first argument has a default value, but not
4260 the second. After the definition is complete, you can call
4261 the macro either as `reserve_str A,B' (with `\p1' evaluating
4262 to A and `\p2' evaluating to B), or as `reserve_str ,B' (with
4263 `\p1' evaluating as the default, in this case `0', and `\p2'
4266 `.macro m p1:req, p2=0, p3:vararg'
4267 Begin the definition of a macro called `m', with at least
4268 three arguments. The first argument must always have a value
4269 specified, but not the second, which instead has a default
4270 value. The third formal will get assigned all remaining
4271 arguments specified at invocation time.
4273 When you call a macro, you can specify the argument values
4274 either by position, or by keyword. For example, `sum 9,17'
4275 is equivalent to `sum to=17, from=9'.
4278 Note that since each of the MACARGS can be an identifier exactly
4279 as any other one permitted by the target architecture, there may be
4280 occasional problems if the target hand-crafts special meanings to
4281 certain characters when they occur in a special position. For
4282 example, if the colon (`:') is generally permitted to be part of a
4283 symbol name, but the architecture specific code special-cases it
4284 when occurring as the final character of a symbol (to denote a
4285 label), then the macro parameter replacement code will have no way
4286 of knowing that and consider the whole construct (including the
4287 colon) an identifier, and check only this identifier for being the
4288 subject to parameter substitution. So for example this macro
4295 might not work as expected. Invoking `label foo' might not create
4296 a label called `foo' but instead just insert the text `\l:' into
4297 the assembler source, probably generating an error about an
4298 unrecognised identifier.
4300 Similarly problems might occur with the period character (`.')
4301 which is often allowed inside opcode names (and hence identifier
4302 names). So for example constructing a macro to build an opcode
4303 from a base name and a length specifier like this:
4305 .macro opcode base length
4309 and invoking it as `opcode store l' will not create a `store.l'
4310 instruction but instead generate some kind of error as the
4311 assembler tries to interpret the text `\base.\length'.
4313 There are several possible ways around this problem:
4315 `Insert white space'
4316 If it is possible to use white space characters then this is
4317 the simplest solution. eg:
4324 The string `\()' can be used to separate the end of a macro
4325 argument from the following text. eg:
4327 .macro opcode base length
4331 `Use the alternate macro syntax mode'
4332 In the alternative macro syntax mode the ampersand character
4333 (`&') can be used as a separator. eg:
4340 Note: this problem of correctly identifying string parameters to
4341 pseudo ops also applies to the identifiers used in `.irp' (*note
4342 Irp::) and `.irpc' (*note Irpc::) as well.
4345 Mark the end of a macro definition.
4348 Exit early from the current macro definition.
4351 `as' maintains a counter of how many macros it has executed in
4352 this pseudo-variable; you can copy that number to your output with
4353 `\@', but _only within a macro definition_.
4355 `LOCAL NAME [ , ... ]'
4356 _Warning: `LOCAL' is only available if you select "alternate macro
4357 syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro':
4361 File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops
4366 If VAL is non-zero, this tells `as' to enter MRI mode. If VAL is zero,
4367 this tells `as' to exit MRI mode. This change affects code assembled
4368 until the next `.mri' directive, or until the end of the file. *Note
4372 File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops
4377 Disable alternate macro mode. *Note Altmacro::.
4380 File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops
4385 Control (in conjunction with the `.list' directive) whether or not
4386 assembly listings are generated. These two directives maintain an
4387 internal counter (which is zero initially). `.list' increments the
4388 counter, and `.nolist' decrements it. Assembly listings are generated
4389 whenever the counter is greater than zero.
4392 File: as.info, Node: Octa, Next: Offset, Prev: Nolist, Up: Pseudo Ops
4394 7.83 `.octa BIGNUMS'
4395 ====================
4397 This directive expects zero or more bignums, separated by commas. For
4398 each bignum, it emits a 16-byte integer.
4400 The term "octa" comes from contexts in which a "word" is two bytes;
4401 hence _octa_-word for 16 bytes.
4404 File: as.info, Node: Offset, Next: Org, Prev: Octa, Up: Pseudo Ops
4409 Set the location counter to LOC in the absolute section. LOC must be
4410 an absolute expression. This directive may be useful for defining
4411 symbols with absolute values. Do not confuse it with the `.org'
4415 File: as.info, Node: Org, Next: P2align, Prev: Offset, Up: Pseudo Ops
4417 7.85 `.org NEW-LC , FILL'
4418 =========================
4420 Advance the location counter of the current section to NEW-LC. NEW-LC
4421 is either an absolute expression or an expression with the same section
4422 as the current subsection. That is, you can't use `.org' to cross
4423 sections: if NEW-LC has the wrong section, the `.org' directive is
4424 ignored. To be compatible with former assemblers, if the section of
4425 NEW-LC is absolute, `as' issues a warning, then pretends the section of
4426 NEW-LC is the same as the current subsection.
4428 `.org' may only increase the location counter, or leave it
4429 unchanged; you cannot use `.org' to move the location counter backwards.
4431 Because `as' tries to assemble programs in one pass, NEW-LC may not
4432 be undefined. If you really detest this restriction we eagerly await a
4433 chance to share your improved assembler.
4435 Beware that the origin is relative to the start of the section, not
4436 to the start of the subsection. This is compatible with other people's
4439 When the location counter (of the current subsection) is advanced,
4440 the intervening bytes are filled with FILL which should be an absolute
4441 expression. If the comma and FILL are omitted, FILL defaults to zero.
4444 File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops
4446 7.86 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
4447 ================================================
4449 Pad the location counter (in the current subsection) to a particular
4450 storage boundary. The first expression (which must be absolute) is the
4451 number of low-order zero bits the location counter must have after
4452 advancement. For example `.p2align 3' advances the location counter
4453 until it a multiple of 8. If the location counter is already a
4454 multiple of 8, no change is needed.
4456 The second expression (also absolute) gives the fill value to be
4457 stored in the padding bytes. It (and the comma) may be omitted. If it
4458 is omitted, the padding bytes are normally zero. However, on some
4459 systems, if the section is marked as containing code and the fill value
4460 is omitted, the space is filled with no-op instructions.
4462 The third expression is also absolute, and is also optional. If it
4463 is present, it is the maximum number of bytes that should be skipped by
4464 this alignment directive. If doing the alignment would require
4465 skipping more bytes than the specified maximum, then the alignment is
4466 not done at all. You can omit the fill value (the second argument)
4467 entirely by simply using two commas after the required alignment; this
4468 can be useful if you want the alignment to be filled with no-op
4469 instructions when appropriate.
4471 The `.p2alignw' and `.p2alignl' directives are variants of the
4472 `.p2align' directive. The `.p2alignw' directive treats the fill
4473 pattern as a two byte word value. The `.p2alignl' directives treats the
4474 fill pattern as a four byte longword value. For example, `.p2alignw
4475 2,0x368d' will align to a multiple of 4. If it skips two bytes, they
4476 will be filled in with the value 0x368d (the exact placement of the
4477 bytes depends upon the endianness of the processor). If it skips 1 or
4478 3 bytes, the fill value is undefined.
4481 File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops
4486 This is one of the ELF section stack manipulation directives. The
4487 others are `.section' (*note Section::), `.subsection' (*note
4488 SubSection::), `.pushsection' (*note PushSection::), and `.previous'
4491 This directive replaces the current section (and subsection) with
4492 the top section (and subsection) on the section stack. This section is
4493 popped off the stack.
4496 File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops
4501 This is one of the ELF section stack manipulation directives. The
4502 others are `.section' (*note Section::), `.subsection' (*note
4503 SubSection::), `.pushsection' (*note PushSection::), and `.popsection'
4504 (*note PopSection::).
4506 This directive swaps the current section (and subsection) with most
4507 recently referenced section/subsection pair prior to this one. Multiple
4508 `.previous' directives in a row will flip between two sections (and
4509 their subsections). For example:
4519 Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into
4520 subsection 2 of section A. Whilst:
4524 # Now in section A subsection 1
4528 # Now in section B subsection 0
4531 # Now in section B subsection 1
4534 # Now in section B subsection 0
4537 Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection
4538 0 of section B and 0x9abc into subsection 1 of section B.
4540 In terms of the section stack, this directive swaps the current
4541 section with the top section on the section stack.
4544 File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops
4546 7.89 `.print STRING'
4547 ====================
4549 `as' will print STRING on the standard output during assembly. You
4550 must put STRING in double quotes.
4553 File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops
4555 7.90 `.protected NAMES'
4556 =======================
4558 This is one of the ELF visibility directives. The other two are
4559 `.hidden' (*note Hidden::) and `.internal' (*note Internal::).
4561 This directive overrides the named symbols default visibility (which
4562 is set by their binding: local, global or weak). The directive sets
4563 the visibility to `protected' which means that any references to the
4564 symbols from within the components that defines them must be resolved
4565 to the definition in that component, even if a definition in another
4566 component would normally preempt this.
4569 File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops
4571 7.91 `.psize LINES , COLUMNS'
4572 =============================
4574 Use this directive to declare the number of lines--and, optionally, the
4575 number of columns--to use for each page, when generating listings.
4577 If you do not use `.psize', listings use a default line-count of 60.
4578 You may omit the comma and COLUMNS specification; the default width is
4581 `as' generates formfeeds whenever the specified number of lines is
4582 exceeded (or whenever you explicitly request one, using `.eject').
4584 If you specify LINES as `0', no formfeeds are generated save those
4585 explicitly specified with `.eject'.
4588 File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops
4593 Undefine the macro NAME, so that later uses of the string will not be
4594 expanded. *Note Macro::.
4597 File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops
4599 7.93 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]'
4600 ========================================================================
4602 This is one of the ELF section stack manipulation directives. The
4603 others are `.section' (*note Section::), `.subsection' (*note
4604 SubSection::), `.popsection' (*note PopSection::), and `.previous'
4607 This directive pushes the current section (and subsection) onto the
4608 top of the section stack, and then replaces the current section and
4609 subsection with `name' and `subsection'. The optional `flags', `type'
4610 and `arguments' are treated the same as in the `.section' (*note
4611 Section::) directive.
4614 File: as.info, Node: Quad, Next: Reloc, Prev: PushSection, Up: Pseudo Ops
4616 7.94 `.quad BIGNUMS'
4617 ====================
4619 `.quad' expects zero or more bignums, separated by commas. For each
4620 bignum, it emits an 8-byte integer. If the bignum won't fit in 8
4621 bytes, it prints a warning message; and just takes the lowest order 8
4622 bytes of the bignum.
4624 The term "quad" comes from contexts in which a "word" is two bytes;
4625 hence _quad_-word for 8 bytes.
4628 File: as.info, Node: Reloc, Next: Rept, Prev: Quad, Up: Pseudo Ops
4630 7.95 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
4631 ==============================================
4633 Generate a relocation at OFFSET of type RELOC_NAME with value
4634 EXPRESSION. If OFFSET is a number, the relocation is generated in the
4635 current section. If OFFSET is an expression that resolves to a symbol
4636 plus offset, the relocation is generated in the given symbol's section.
4637 EXPRESSION, if present, must resolve to a symbol plus addend or to an
4638 absolute value, but note that not all targets support an addend. e.g.
4639 ELF REL targets such as i386 store an addend in the section contents
4640 rather than in the relocation. This low level interface does not
4641 support addends stored in the section.
4644 File: as.info, Node: Rept, Next: Sbttl, Prev: Reloc, Up: Pseudo Ops
4649 Repeat the sequence of lines between the `.rept' directive and the next
4650 `.endr' directive COUNT times.
4652 For example, assembling
4658 is equivalent to assembling
4665 File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops
4667 7.97 `.sbttl "SUBHEADING"'
4668 ==========================
4670 Use SUBHEADING as the title (third line, immediately after the title
4671 line) when generating assembly listings.
4673 This directive affects subsequent pages, as well as the current page
4674 if it appears within ten lines of the top of a page.
4677 File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops
4682 Set the storage-class value for a symbol. This directive may only be
4683 used inside a `.def'/`.endef' pair. Storage class may flag whether a
4684 symbol is static or external, or it may record further symbolic
4685 debugging information.
4688 File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops
4690 7.99 `.section NAME'
4691 ====================
4693 Use the `.section' directive to assemble the following code into a
4696 This directive is only supported for targets that actually support
4697 arbitrarily named sections; on `a.out' targets, for example, it is not
4698 accepted, even with a standard `a.out' section name.
4703 For COFF targets, the `.section' directive is used in one of the
4706 .section NAME[, "FLAGS"]
4707 .section NAME[, SUBSECTION]
4709 If the optional argument is quoted, it is taken as flags to use for
4710 the section. Each flag is a single character. The following flags are
4713 bss section (uninitialized data)
4716 section is not loaded
4731 shared section (meaningful for PE targets)
4734 ignored. (For compatibility with the ELF version)
4737 section is not readable (meaningful for PE targets)
4740 single-digit power-of-two section alignment (GNU extension)
4742 If no flags are specified, the default flags depend upon the section
4743 name. If the section name is not recognized, the default will be for
4744 the section to be loaded and writable. Note the `n' and `w' flags
4745 remove attributes from the section, rather than adding them, so if they
4746 are used on their own it will be as if no flags had been specified at
4749 If the optional argument to the `.section' directive is not quoted,
4750 it is taken as a subsection number (*note Sub-Sections::).
4755 This is one of the ELF section stack manipulation directives. The
4756 others are `.subsection' (*note SubSection::), `.pushsection' (*note
4757 PushSection::), `.popsection' (*note PopSection::), and `.previous'
4760 For ELF targets, the `.section' directive is used like this:
4762 .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]]
4764 The optional FLAGS argument is a quoted string which may contain any
4765 combination of the following characters:
4767 section is allocatable
4770 section is excluded from executable and shared library.
4776 section is executable
4779 section is mergeable
4782 section contains zero terminated strings
4785 section is a member of a section group
4788 section is used for thread-local-storage
4791 section is a member of the previously-current section's group, if
4794 The optional TYPE argument may contain one of the following
4797 section contains data
4800 section does not contain data (i.e., section only occupies space)
4803 section contains data which is used by things other than the
4807 section contains an array of pointers to init functions
4810 section contains an array of pointers to finish functions
4813 section contains an array of pointers to pre-init functions
4815 Many targets only support the first three section types.
4817 Note on targets where the `@' character is the start of a comment (eg
4818 ARM) then another character is used instead. For example the ARM port
4819 uses the `%' character.
4821 If FLAGS contains the `M' symbol then the TYPE argument must be
4822 specified as well as an extra argument--ENTSIZE--like this:
4824 .section NAME , "FLAGS"M, @TYPE, ENTSIZE
4826 Sections with the `M' flag but not `S' flag must contain fixed size
4827 constants, each ENTSIZE octets long. Sections with both `M' and `S'
4828 must contain zero terminated strings where each character is ENTSIZE
4829 bytes long. The linker may remove duplicates within sections with the
4830 same name, same entity size and same flags. ENTSIZE must be an
4831 absolute expression. For sections with both `M' and `S', a string
4832 which is a suffix of a larger string is considered a duplicate. Thus
4833 `"def"' will be merged with `"abcdef"'; A reference to the first
4834 `"def"' will be changed to a reference to `"abcdef"+3'.
4836 If FLAGS contains the `G' symbol then the TYPE argument must be
4837 present along with an additional field like this:
4839 .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE]
4841 The GROUPNAME field specifies the name of the section group to which
4842 this particular section belongs. The optional linkage field can
4845 indicates that only one copy of this section should be retained
4850 Note: if both the M and G flags are present then the fields for the
4851 Merge flag should come first, like this:
4853 .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE]
4855 If FLAGS contains the `?' symbol then it may not also contain the
4856 `G' symbol and the GROUPNAME or LINKAGE fields should not be present.
4857 Instead, `?' says to consider the section that's current before this
4858 directive. If that section used `G', then the new section will use `G'
4859 with those same GROUPNAME and LINKAGE fields implicitly. If not, then
4860 the `?' symbol has no effect.
4862 If no flags are specified, the default flags depend upon the section
4863 name. If the section name is not recognized, the default will be for
4864 the section to have none of the above flags: it will not be allocated
4865 in memory, nor writable, nor executable. The section will contain data.
4867 For ELF targets, the assembler supports another type of `.section'
4868 directive for compatibility with the Solaris assembler:
4870 .section "NAME"[, FLAGS...]
4872 Note that the section name is quoted. There may be a sequence of
4873 comma separated flags:
4875 section is allocatable
4881 section is executable
4884 section is excluded from executable and shared library.
4887 section is used for thread local storage
4889 This directive replaces the current section and subsection. See the
4890 contents of the gas testsuite directory `gas/testsuite/gas/elf' for
4891 some examples of how this directive and the other section stack
4895 File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops
4897 7.100 `.set SYMBOL, EXPRESSION'
4898 ===============================
4900 Set the value of SYMBOL to EXPRESSION. This changes SYMBOL's value and
4901 type to conform to EXPRESSION. If SYMBOL was flagged as external, it
4902 remains flagged (*note Symbol Attributes::).
4904 You may `.set' a symbol many times in the same assembly.
4906 If you `.set' a global symbol, the value stored in the object file
4907 is the last value stored into it.
4909 On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION'
4913 File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops
4915 7.101 `.short EXPRESSIONS'
4916 ==========================
4918 `.short' is normally the same as `.word'. *Note `.word': Word.
4920 In some configurations, however, `.short' and `.word' generate
4921 numbers of different lengths. *Note Machine Dependencies::.
4924 File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops
4926 7.102 `.single FLONUMS'
4927 =======================
4929 This directive assembles zero or more flonums, separated by commas. It
4930 has the same effect as `.float'. The exact kind of floating point
4931 numbers emitted depends on how `as' is configured. *Note Machine
4935 File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops
4940 This directive is used to set the size associated with a symbol.
4945 For COFF targets, the `.size' directive is only permitted inside
4946 `.def'/`.endef' pairs. It is used like this:
4953 For ELF targets, the `.size' directive is used like this:
4955 .size NAME , EXPRESSION
4957 This directive sets the size associated with a symbol NAME. The
4958 size in bytes is computed from EXPRESSION which can make use of label
4959 arithmetic. This directive is typically used to set the size of
4963 File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops
4965 7.104 `.skip SIZE , FILL'
4966 =========================
4968 This directive emits SIZE bytes, each of value FILL. Both SIZE and
4969 FILL are absolute expressions. If the comma and FILL are omitted, FILL
4970 is assumed to be zero. This is the same as `.space'.
4973 File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops
4975 7.105 `.sleb128 EXPRESSIONS'
4976 ============================
4978 SLEB128 stands for "signed little endian base 128." This is a compact,
4979 variable length representation of numbers used by the DWARF symbolic
4980 debugging format. *Note `.uleb128': Uleb128.
4983 File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops
4985 7.106 `.space SIZE , FILL'
4986 ==========================
4988 This directive emits SIZE bytes, each of value FILL. Both SIZE and
4989 FILL are absolute expressions. If the comma and FILL are omitted, FILL
4990 is assumed to be zero. This is the same as `.skip'.
4992 _Warning:_ `.space' has a completely different meaning for HPPA
4993 targets; use `.block' as a substitute. See `HP9000 Series 800
4994 Assembly Language Reference Manual' (HP 92432-90001) for the
4995 meaning of the `.space' directive. *Note HPPA Assembler
4996 Directives: HPPA Directives, for a summary.
4999 File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops
5001 7.107 `.stabd, .stabn, .stabs'
5002 ==============================
5004 There are three directives that begin `.stab'. All emit symbols (*note
5005 Symbols::), for use by symbolic debuggers. The symbols are not entered
5006 in the `as' hash table: they cannot be referenced elsewhere in the
5007 source file. Up to five fields are required:
5010 This is the symbol's name. It may contain any character except
5011 `\000', so is more general than ordinary symbol names. Some
5012 debuggers used to code arbitrarily complex structures into symbol
5013 names using this field.
5016 An absolute expression. The symbol's type is set to the low 8
5017 bits of this expression. Any bit pattern is permitted, but `ld'
5018 and debuggers choke on silly bit patterns.
5021 An absolute expression. The symbol's "other" attribute is set to
5022 the low 8 bits of this expression.
5025 An absolute expression. The symbol's descriptor is set to the low
5026 16 bits of this expression.
5029 An absolute expression which becomes the symbol's value.
5031 If a warning is detected while reading a `.stabd', `.stabn', or
5032 `.stabs' statement, the symbol has probably already been created; you
5033 get a half-formed symbol in your object file. This is compatible with
5036 `.stabd TYPE , OTHER , DESC'
5037 The "name" of the symbol generated is not even an empty string.
5038 It is a null pointer, for compatibility. Older assemblers used a
5039 null pointer so they didn't waste space in object files with empty
5042 The symbol's value is set to the location counter, relocatably.
5043 When your program is linked, the value of this symbol is the
5044 address of the location counter when the `.stabd' was assembled.
5046 `.stabn TYPE , OTHER , DESC , VALUE'
5047 The name of the symbol is set to the empty string `""'.
5049 `.stabs STRING , TYPE , OTHER , DESC , VALUE'
5050 All five fields are specified.
5053 File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops
5055 7.108 `.string' "STR", `.string8' "STR", `.string16'
5056 ====================================================
5058 "STR", `.string32' "STR", `.string64' "STR"
5060 Copy the characters in STR to the object file. You may specify more
5061 than one string to copy, separated by commas. Unless otherwise
5062 specified for a particular machine, the assembler marks the end of each
5063 string with a 0 byte. You can use any of the escape sequences
5064 described in *Note Strings: Strings.
5066 The variants `string16', `string32' and `string64' differ from the
5067 `string' pseudo opcode in that each 8-bit character from STR is copied
5068 and expanded to 16, 32 or 64 bits respectively. The expanded characters
5069 are stored in target endianness byte order.
5074 .string "B\0\0\0Y\0\0\0E\0\0\0" /* On little endian targets. */
5075 .string "\0\0\0B\0\0\0Y\0\0\0E" /* On big endian targets. */
5078 File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops
5080 7.109 `.struct EXPRESSION'
5081 ==========================
5083 Switch to the absolute section, and set the section offset to
5084 EXPRESSION, which must be an absolute expression. You might use this
5092 This would define the symbol `field1' to have the value 0, the symbol
5093 `field2' to have the value 4, and the symbol `field3' to have the value
5094 8. Assembly would be left in the absolute section, and you would need
5095 to use a `.section' directive of some sort to change to some other
5096 section before further assembly.
5099 File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops
5101 7.110 `.subsection NAME'
5102 ========================
5104 This is one of the ELF section stack manipulation directives. The
5105 others are `.section' (*note Section::), `.pushsection' (*note
5106 PushSection::), `.popsection' (*note PopSection::), and `.previous'
5109 This directive replaces the current subsection with `name'. The
5110 current section is not changed. The replaced subsection is put onto
5111 the section stack in place of the then current top of stack subsection.
5114 File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops
5119 Use the `.symver' directive to bind symbols to specific version nodes
5120 within a source file. This is only supported on ELF platforms, and is
5121 typically used when assembling files to be linked into a shared library.
5122 There are cases where it may make sense to use this in objects to be
5123 bound into an application itself so as to override a versioned symbol
5124 from a shared library.
5126 For ELF targets, the `.symver' directive can be used like this:
5127 .symver NAME, NAME2@NODENAME
5128 If the symbol NAME is defined within the file being assembled, the
5129 `.symver' directive effectively creates a symbol alias with the name
5130 NAME2@NODENAME, and in fact the main reason that we just don't try and
5131 create a regular alias is that the @ character isn't permitted in
5132 symbol names. The NAME2 part of the name is the actual name of the
5133 symbol by which it will be externally referenced. The name NAME itself
5134 is merely a name of convenience that is used so that it is possible to
5135 have definitions for multiple versions of a function within a single
5136 source file, and so that the compiler can unambiguously know which
5137 version of a function is being mentioned. The NODENAME portion of the
5138 alias should be the name of a node specified in the version script
5139 supplied to the linker when building a shared library. If you are
5140 attempting to override a versioned symbol from a shared library, then
5141 NODENAME should correspond to the nodename of the symbol you are trying
5144 If the symbol NAME is not defined within the file being assembled,
5145 all references to NAME will be changed to NAME2@NODENAME. If no
5146 reference to NAME is made, NAME2@NODENAME will be removed from the
5149 Another usage of the `.symver' directive is:
5150 .symver NAME, NAME2@@NODENAME
5151 In this case, the symbol NAME must exist and be defined within the
5152 file being assembled. It is similar to NAME2@NODENAME. The difference
5153 is NAME2@@NODENAME will also be used to resolve references to NAME2 by
5156 The third usage of the `.symver' directive is:
5157 .symver NAME, NAME2@@@NODENAME
5158 When NAME is not defined within the file being assembled, it is
5159 treated as NAME2@NODENAME. When NAME is defined within the file being
5160 assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME.
5163 File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops
5165 7.112 `.tag STRUCTNAME'
5166 =======================
5168 This directive is generated by compilers to include auxiliary debugging
5169 information in the symbol table. It is only permitted inside
5170 `.def'/`.endef' pairs. Tags are used to link structure definitions in
5171 the symbol table with instances of those structures.
5174 File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops
5176 7.113 `.text SUBSECTION'
5177 ========================
5179 Tells `as' to assemble the following statements onto the end of the
5180 text subsection numbered SUBSECTION, which is an absolute expression.
5181 If SUBSECTION is omitted, subsection number zero is used.
5184 File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops
5186 7.114 `.title "HEADING"'
5187 ========================
5189 Use HEADING as the title (second line, immediately after the source
5190 file name and pagenumber) when generating assembly listings.
5192 This directive affects subsequent pages, as well as the current page
5193 if it appears within ten lines of the top of a page.
5196 File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops
5201 This directive is used to set the type of a symbol.
5206 For COFF targets, this directive is permitted only within
5207 `.def'/`.endef' pairs. It is used like this:
5211 This records the integer INT as the type attribute of a symbol table
5217 For ELF targets, the `.type' directive is used like this:
5219 .type NAME , TYPE DESCRIPTION
5221 This sets the type of symbol NAME to be either a function symbol or
5222 an object symbol. There are five different syntaxes supported for the
5223 TYPE DESCRIPTION field, in order to provide compatibility with various
5226 Because some of the characters used in these syntaxes (such as `@'
5227 and `#') are comment characters for some architectures, some of the
5228 syntaxes below do not work on all architectures. The first variant
5229 will be accepted by the GNU assembler on all architectures so that
5230 variant should be used for maximum portability, if you do not need to
5231 assemble your code with other assemblers.
5233 The syntaxes supported are:
5235 .type <name> STT_<TYPE_IN_UPPER_CASE>
5236 .type <name>,#<type>
5237 .type <name>,@<type>
5238 .type <name>,%<type>
5239 .type <name>,"<type>"
5241 The types supported are:
5245 Mark the symbol as being a function name.
5248 `gnu_indirect_function'
5249 Mark the symbol as an indirect function when evaluated during reloc
5250 processing. (This is only supported on assemblers targeting GNU
5255 Mark the symbol as being a data object.
5259 Mark the symbol as being a thead-local data object.
5263 Mark the symbol as being a common data object.
5267 Does not mark the symbol in any way. It is supported just for
5271 Marks the symbol as being a globally unique data object. The
5272 dynamic linker will make sure that in the entire process there is
5273 just one symbol with this name and type in use. (This is only
5274 supported on assemblers targeting GNU systems).
5277 Note: Some targets support extra types in addition to those listed
5281 File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops
5283 7.116 `.uleb128 EXPRESSIONS'
5284 ============================
5286 ULEB128 stands for "unsigned little endian base 128." This is a
5287 compact, variable length representation of numbers used by the DWARF
5288 symbolic debugging format. *Note `.sleb128': Sleb128.
5291 File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops
5296 This directive, permitted only within `.def'/`.endef' pairs, records
5297 the address ADDR as the value attribute of a symbol table entry.
5300 File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops
5302 7.118 `.version "STRING"'
5303 =========================
5305 This directive creates a `.note' section and places into it an ELF
5306 formatted note of type NT_VERSION. The note's name is set to `string'.
5309 File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops
5311 7.119 `.vtable_entry TABLE, OFFSET'
5312 ===================================
5314 This directive finds or creates a symbol `table' and creates a
5315 `VTABLE_ENTRY' relocation for it with an addend of `offset'.
5318 File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops
5320 7.120 `.vtable_inherit CHILD, PARENT'
5321 =====================================
5323 This directive finds the symbol `child' and finds or creates the symbol
5324 `parent' and then creates a `VTABLE_INHERIT' relocation for the parent
5325 whose addend is the value of the child symbol. As a special case the
5326 parent name of `0' is treated as referring to the `*ABS*' section.
5329 File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops
5331 7.121 `.warning "STRING"'
5332 =========================
5334 Similar to the directive `.error' (*note `.error "STRING"': Error.),
5335 but just emits a warning.
5338 File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops
5343 This directive sets the weak attribute on the comma separated list of
5344 symbol `names'. If the symbols do not already exist, they will be
5347 On COFF targets other than PE, weak symbols are a GNU extension.
5348 This directive sets the weak attribute on the comma separated list of
5349 symbol `names'. If the symbols do not already exist, they will be
5352 On the PE target, weak symbols are supported natively as weak
5353 aliases. When a weak symbol is created that is not an alias, GAS
5354 creates an alternate symbol to hold the default value.
5357 File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops
5359 7.123 `.weakref ALIAS, TARGET'
5360 ==============================
5362 This directive creates an alias to the target symbol that enables the
5363 symbol to be referenced with weak-symbol semantics, but without
5364 actually making it weak. If direct references or definitions of the
5365 symbol are present, then the symbol will not be weak, but if all
5366 references to it are through weak references, the symbol will be marked
5367 as weak in the symbol table.
5369 The effect is equivalent to moving all references to the alias to a
5370 separate assembly source file, renaming the alias to the symbol in it,
5371 declaring the symbol as weak there, and running a reloadable link to
5372 merge the object files resulting from the assembly of the new source
5373 file and the old source file that had the references to the alias
5376 The alias itself never makes to the symbol table, and is entirely
5377 handled within the assembler.
5380 File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops
5382 7.124 `.word EXPRESSIONS'
5383 =========================
5385 This directive expects zero or more EXPRESSIONS, of any section,
5386 separated by commas.
5388 The size of the number emitted, and its byte order, depend on what
5389 target computer the assembly is for.
5391 _Warning: Special Treatment to support Compilers_
5393 Machines with a 32-bit address space, but that do less than 32-bit
5394 addressing, require the following special treatment. If the machine of
5395 interest to you does 32-bit addressing (or doesn't require it; *note
5396 Machine Dependencies::), you can ignore this issue.
5398 In order to assemble compiler output into something that works, `as'
5399 occasionally does strange things to `.word' directives. Directives of
5400 the form `.word sym1-sym2' are often emitted by compilers as part of
5401 jump tables. Therefore, when `as' assembles a directive of the form
5402 `.word sym1-sym2', and the difference between `sym1' and `sym2' does
5403 not fit in 16 bits, `as' creates a "secondary jump table", immediately
5404 before the next label. This secondary jump table is preceded by a
5405 short-jump to the first byte after the secondary table. This
5406 short-jump prevents the flow of control from accidentally falling into
5407 the new table. Inside the table is a long-jump to `sym2'. The
5408 original `.word' contains `sym1' minus the address of the long-jump to
5411 If there were several occurrences of `.word sym1-sym2' before the
5412 secondary jump table, all of them are adjusted. If there was a `.word
5413 sym3-sym4', that also did not fit in sixteen bits, a long-jump to
5414 `sym4' is included in the secondary jump table, and the `.word'
5415 directives are adjusted to contain `sym3' minus the address of the
5416 long-jump to `sym4'; and so on, for as many entries in the original
5417 jump table as necessary.
5420 File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops
5422 7.125 Deprecated Directives
5423 ===========================
5425 One day these directives won't work. They are included for
5426 compatibility with older assemblers.
5432 File: as.info, Node: Object Attributes, Next: Machine Dependencies, Prev: Pseudo Ops, Up: Top
5437 `as' assembles source files written for a specific architecture into
5438 object files for that architecture. But not all object files are alike.
5439 Many architectures support incompatible variations. For instance,
5440 floating point arguments might be passed in floating point registers if
5441 the object file requires hardware floating point support--or floating
5442 point arguments might be passed in integer registers if the object file
5443 supports processors with no hardware floating point unit. Or, if two
5444 objects are built for different generations of the same architecture,
5445 the combination may require the newer generation at run-time.
5447 This information is useful during and after linking. At link time,
5448 `ld' can warn about incompatible object files. After link time, tools
5449 like `gdb' can use it to process the linked file correctly.
5451 Compatibility information is recorded as a series of object
5452 attributes. Each attribute has a "vendor", "tag", and "value". The
5453 vendor is a string, and indicates who sets the meaning of the tag. The
5454 tag is an integer, and indicates what property the attribute describes.
5455 The value may be a string or an integer, and indicates how the
5456 property affects this object. Missing attributes are the same as
5457 attributes with a zero value or empty string value.
5459 Object attributes were developed as part of the ABI for the ARM
5460 Architecture. The file format is documented in `ELF for the ARM
5465 * GNU Object Attributes:: GNU Object Attributes
5466 * Defining New Object Attributes:: Defining New Object Attributes
5469 File: as.info, Node: GNU Object Attributes, Next: Defining New Object Attributes, Up: Object Attributes
5471 8.1 GNU Object Attributes
5472 =========================
5474 The `.gnu_attribute' directive records an object attribute with vendor
5477 Except for `Tag_compatibility', which has both an integer and a
5478 string for its value, GNU attributes have a string value if the tag
5479 number is odd and an integer value if the tag number is even. The
5480 second bit (`TAG & 2' is set for architecture-independent attributes
5481 and clear for architecture-dependent ones.
5483 8.1.1 Common GNU attributes
5484 ---------------------------
5486 These attributes are valid on all architectures.
5488 Tag_compatibility (32)
5489 The compatibility attribute takes an integer flag value and a
5490 vendor name. If the flag value is 0, the file is compatible with
5491 other toolchains. If it is 1, then the file is only compatible
5492 with the named toolchain. If it is greater than 1, the file can
5493 only be processed by other toolchains under some private
5494 arrangement indicated by the flag value and the vendor name.
5496 8.1.2 MIPS Attributes
5497 ---------------------
5499 Tag_GNU_MIPS_ABI_FP (4)
5500 The floating-point ABI used by this object file. The value will
5503 * 0 for files not affected by the floating-point ABI.
5505 * 1 for files using the hardware floating-point with a standard
5506 double-precision FPU.
5508 * 2 for files using the hardware floating-point ABI with a
5509 single-precision FPU.
5511 * 3 for files using the software floating-point ABI.
5513 * 4 for files using the hardware floating-point ABI with 64-bit
5514 wide double-precision floating-point registers and 32-bit
5515 wide general purpose registers.
5517 8.1.3 PowerPC Attributes
5518 ------------------------
5520 Tag_GNU_Power_ABI_FP (4)
5521 The floating-point ABI used by this object file. The value will
5524 * 0 for files not affected by the floating-point ABI.
5526 * 1 for files using double-precision hardware floating-point
5529 * 2 for files using the software floating-point ABI.
5531 * 3 for files using single-precision hardware floating-point
5534 Tag_GNU_Power_ABI_Vector (8)
5535 The vector ABI used by this object file. The value will be:
5537 * 0 for files not affected by the vector ABI.
5539 * 1 for files using general purpose registers to pass vectors.
5541 * 2 for files using AltiVec registers to pass vectors.
5543 * 3 for files using SPE registers to pass vectors.
5546 File: as.info, Node: Defining New Object Attributes, Prev: GNU Object Attributes, Up: Object Attributes
5548 8.2 Defining New Object Attributes
5549 ==================================
5551 If you want to define a new GNU object attribute, here are the places
5552 you will need to modify. New attributes should be discussed on the
5553 `binutils' mailing list.
5555 * This manual, which is the official register of attributes.
5557 * The header for your architecture `include/elf', to define the tag.
5559 * The `bfd' support file for your architecture, to merge the
5560 attribute and issue any appropriate link warnings.
5562 * Test cases in `ld/testsuite' for merging and link warnings.
5564 * `binutils/readelf.c' to display your attribute.
5566 * GCC, if you want the compiler to mark the attribute automatically.
5569 File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Object Attributes, Up: Top
5571 9 Machine Dependent Features
5572 ****************************
5574 The machine instruction sets are (almost by definition) different on
5575 each machine where `as' runs. Floating point representations vary as
5576 well, and `as' often supports a few additional directives or
5577 command-line options for compatibility with other assemblers on a
5578 particular platform. Finally, some versions of `as' support special
5579 pseudo-instructions for branch optimization.
5581 This chapter discusses most of these differences, though it does not
5582 include details on any machine's instruction set. For details on that
5583 subject, see the hardware manufacturer's manual.
5588 * AArch64-Dependent:: AArch64 Dependent Features
5590 * Alpha-Dependent:: Alpha Dependent Features
5592 * ARC-Dependent:: ARC Dependent Features
5594 * ARM-Dependent:: ARM Dependent Features
5596 * AVR-Dependent:: AVR Dependent Features
5598 * Blackfin-Dependent:: Blackfin Dependent Features
5600 * CR16-Dependent:: CR16 Dependent Features
5602 * CRIS-Dependent:: CRIS Dependent Features
5604 * D10V-Dependent:: D10V Dependent Features
5606 * D30V-Dependent:: D30V Dependent Features
5608 * Epiphany-Dependent:: EPIPHANY Dependent Features
5610 * H8/300-Dependent:: Renesas H8/300 Dependent Features
5612 * HPPA-Dependent:: HPPA Dependent Features
5614 * ESA/390-Dependent:: IBM ESA/390 Dependent Features
5616 * i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features
5618 * i860-Dependent:: Intel 80860 Dependent Features
5620 * i960-Dependent:: Intel 80960 Dependent Features
5622 * IA-64-Dependent:: Intel IA-64 Dependent Features
5624 * IP2K-Dependent:: IP2K Dependent Features
5626 * LM32-Dependent:: LM32 Dependent Features
5628 * M32C-Dependent:: M32C Dependent Features
5630 * M32R-Dependent:: M32R Dependent Features
5632 * M68K-Dependent:: M680x0 Dependent Features
5634 * M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features
5636 * MicroBlaze-Dependent:: MICROBLAZE Dependent Features
5638 * MIPS-Dependent:: MIPS Dependent Features
5640 * MMIX-Dependent:: MMIX Dependent Features
5642 * MSP430-Dependent:: MSP430 Dependent Features
5644 * NS32K-Dependent:: NS32K Dependent Features
5646 * SH-Dependent:: Renesas / SuperH SH Dependent Features
5647 * SH64-Dependent:: SuperH SH64 Dependent Features
5649 * PDP-11-Dependent:: PDP-11 Dependent Features
5651 * PJ-Dependent:: picoJava Dependent Features
5653 * PPC-Dependent:: PowerPC Dependent Features
5655 * RL78-Dependent:: RL78 Dependent Features
5657 * RX-Dependent:: RX Dependent Features
5659 * S/390-Dependent:: IBM S/390 Dependent Features
5661 * SCORE-Dependent:: SCORE Dependent Features
5663 * Sparc-Dependent:: SPARC Dependent Features
5665 * TIC54X-Dependent:: TI TMS320C54x Dependent Features
5667 * TIC6X-Dependent :: TI TMS320C6x Dependent Features
5669 * TILE-Gx-Dependent :: Tilera TILE-Gx Dependent Features
5671 * TILEPro-Dependent :: Tilera TILEPro Dependent Features
5673 * V850-Dependent:: V850 Dependent Features
5675 * XGATE-Dependent:: XGATE Features
5677 * XSTORMY16-Dependent:: XStormy16 Dependent Features
5679 * Xtensa-Dependent:: Xtensa Dependent Features
5681 * Z80-Dependent:: Z80 Dependent Features
5683 * Z8000-Dependent:: Z8000 Dependent Features
5685 * Vax-Dependent:: VAX Dependent Features
5688 File: as.info, Node: AArch64-Dependent, Next: Alpha-Dependent, Up: Machine Dependencies
5690 9.1 AArch64 Dependent Features
5691 ==============================
5695 * AArch64 Options:: Options
5696 * AArch64 Syntax:: Syntax
5697 * AArch64 Floating Point:: Floating Point
5698 * AArch64 Directives:: AArch64 Machine Directives
5699 * AArch64 Opcodes:: Opcodes
5700 * AArch64 Mapping Symbols:: Mapping Symbols
5703 File: as.info, Node: AArch64 Options, Next: AArch64 Syntax, Up: AArch64-Dependent
5709 This option specifies that the output generated by the assembler
5710 should be marked as being encoded for a big-endian processor.
5713 This option specifies that the output generated by the assembler
5714 should be marked as being encoded for a little-endian processor.
5718 File: as.info, Node: AArch64 Syntax, Next: AArch64 Floating Point, Prev: AArch64 Options, Up: AArch64-Dependent
5725 * AArch64-Chars:: Special Characters
5726 * AArch64-Regs:: Register Names
5727 * AArch64-Relocations:: Relocations
5730 File: as.info, Node: AArch64-Chars, Next: AArch64-Regs, Up: AArch64 Syntax
5732 9.1.2.1 Special Characters
5733 ..........................
5735 The presence of a `//' on a line indicates the start of a comment that
5736 extends to the end of the current line. If a `#' appears as the first
5737 character of a line, the whole line is treated as a comment.
5739 The `;' character can be used instead of a newline to separate
5742 The `#' can be optionally used to indicate immediate operands.
5745 File: as.info, Node: AArch64-Regs, Next: AArch64-Relocations, Prev: AArch64-Chars, Up: AArch64 Syntax
5747 9.1.2.2 Register Names
5748 ......................
5750 Please refer to the section `4.4 Register Names' of `ARMv8 Instruction
5751 Set Overview', which is available at `http://infocenter.arm.com'.
5754 File: as.info, Node: AArch64-Relocations, Prev: AArch64-Regs, Up: AArch64 Syntax
5759 Relocations for `MOVZ' and `MOVK' instructions can be generated by
5760 prefixing the label with `#:abs_g2:' etc. For example to load the
5761 48-bit absolute address of FOO into x0:
5763 movz x0, #:abs_g2:foo // bits 32-47, overflow check
5764 movk x0, #:abs_g1_nc:foo // bits 16-31, no overflow check
5765 movk x0, #:abs_g0_nc:foo // bits 0-15, no overflow check
5767 Relocations for `ADRP', and `ADD', `LDR' or `STR' instructions can
5768 be generated by prefixing the label with `#:pg_hi21:' and `#:lo12:'
5771 For example to use 33-bit (+/-4GB) pc-relative addressing to load
5772 the address of FOO into x0:
5774 adrp x0, #:pg_hi21:foo
5775 add x0, x0, #:lo12:foo
5777 Or to load the value of FOO into x0:
5779 adrp x0, #:pg_hi21:foo
5780 ldr x0, [x0, #:lo12:foo]
5782 Note that `#:pg_hi21:' is optional.
5788 adrp x0, #:pg_hi21:foo
5791 File: as.info, Node: AArch64 Floating Point, Next: AArch64 Directives, Prev: AArch64 Syntax, Up: AArch64-Dependent
5793 9.1.3 Floating Point
5794 --------------------
5796 The AArch64 architecture uses IEEE floating-point numbers.
5799 File: as.info, Node: AArch64 Directives, Next: AArch64 Opcodes, Prev: AArch64 Floating Point, Up: AArch64-Dependent
5801 9.1.4 AArch64 Machine Directives
5802 --------------------------------
5805 This directive switches to the `.bss' section.
5808 This directive causes the current contents of the literal pool to
5809 be dumped into the current section (which is assumed to be the
5810 .text section) at the current location (aligned to a word
5811 boundary). `GAS' maintains a separate literal pool for each
5812 section and each sub-section. The `.ltorg' directive will only
5813 affect the literal pool of the current section and sub-section.
5814 At the end of assembly all remaining, un-empty literal pools will
5815 automatically be dumped.
5817 Note - older versions of `GAS' would dump the current literal pool
5818 any time a section change occurred. This is no longer done, since
5819 it prevents accurate control of the placement of literal pools.
5822 This is a synonym for .ltorg.
5824 `NAME .req REGISTER NAME'
5825 This creates an alias for REGISTER NAME called NAME. For example:
5830 This undefines a register alias which was previously defined using
5831 the `req' directive. For example:
5836 An error occurs if the name is undefined. Note - this pseudo op
5837 can be used to delete builtin in register name aliases (eg 'w0').
5838 This should only be done if it is really necessary.
5842 File: as.info, Node: AArch64 Opcodes, Next: AArch64 Mapping Symbols, Prev: AArch64 Directives, Up: AArch64-Dependent
5847 `as' implements all the standard AArch64 opcodes. It also implements
5848 several pseudo opcodes, including several synthetic load instructions.
5851 ldr <register> , =<expression>
5853 The constant expression will be placed into the nearest literal
5854 pool (if it not already there) and a PC-relative LDR instruction
5858 For more information on the AArch64 instruction set and assembly
5859 language notation, see `ARMv8 Instruction Set Overview' available at
5860 `http://infocenter.arm.com'.
5863 File: as.info, Node: AArch64 Mapping Symbols, Prev: AArch64 Opcodes, Up: AArch64-Dependent
5865 9.1.6 Mapping Symbols
5866 ---------------------
5868 The AArch64 ELF specification requires that special symbols be inserted
5869 into object files to mark certain features:
5872 At the start of a region of code containing AArch64 instructions.
5875 At the start of a region of data.
5879 File: as.info, Node: Alpha-Dependent, Next: ARC-Dependent, Prev: AArch64-Dependent, Up: Machine Dependencies
5881 9.2 Alpha Dependent Features
5882 ============================
5886 * Alpha Notes:: Notes
5887 * Alpha Options:: Options
5888 * Alpha Syntax:: Syntax
5889 * Alpha Floating Point:: Floating Point
5890 * Alpha Directives:: Alpha Machine Directives
5891 * Alpha Opcodes:: Opcodes
5894 File: as.info, Node: Alpha Notes, Next: Alpha Options, Up: Alpha-Dependent
5899 The documentation here is primarily for the ELF object format. `as'
5900 also supports the ECOFF and EVAX formats, but features specific to
5901 these formats are not yet documented.
5904 File: as.info, Node: Alpha Options, Next: Alpha Syntax, Prev: Alpha Notes, Up: Alpha-Dependent
5910 This option specifies the target processor. If an attempt is made
5911 to assemble an instruction which will not execute on the target
5912 processor, the assembler may either expand the instruction as a
5913 macro or issue an error message. This option is equivalent to the
5916 The following processor names are recognized: `21064', `21064a',
5917 `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a',
5918 `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6',
5919 `ev67', `ev68'. The special name `all' may be used to allow the
5920 assembler to accept instructions valid for any Alpha processor.
5922 In order to support existing practice in OSF/1 with respect to
5923 `.arch', and existing practice within `MILO' (the Linux ARC
5924 bootloader), the numbered processor names (e.g. 21064) enable the
5925 processor-specific PALcode instructions, while the
5926 "electro-vlasic" names (e.g. `ev4') do not.
5930 Enables or disables the generation of `.mdebug' encapsulation for
5931 stabs directives and procedure descriptors. The default is to
5932 automatically enable `.mdebug' when the first stabs directive is
5936 This option forces all relocations to be put into the object file,
5937 instead of saving space and resolving some relocations at assembly
5938 time. Note that this option does not propagate all symbol
5939 arithmetic into the object file, because not all symbol arithmetic
5940 can be represented. However, the option can still be useful in
5941 specific applications.
5945 Enables or disables the optimization of procedure calls, both at
5946 assemblage and at link time. These options are only available for
5947 VMS targets and `-replace' is the default. See section 1.4.1 of
5948 the OpenVMS Linker Utility Manual.
5951 This option is used when the compiler generates debug information.
5952 When `gcc' is using `mips-tfile' to generate debug information
5953 for ECOFF, local labels must be passed through to the object file.
5954 Otherwise this option has no effect.
5957 A local common symbol larger than SIZE is placed in `.bss', while
5958 smaller symbols are placed in `.sbss'.
5962 These options are ignored for backward compatibility.
5965 File: as.info, Node: Alpha Syntax, Next: Alpha Floating Point, Prev: Alpha Options, Up: Alpha-Dependent
5970 The assembler syntax closely follow the Alpha Reference Manual;
5971 assembler directives and general syntax closely follow the OSF/1 and
5972 OpenVMS syntax, with a few differences for ELF.
5976 * Alpha-Chars:: Special Characters
5977 * Alpha-Regs:: Register Names
5978 * Alpha-Relocs:: Relocations
5981 File: as.info, Node: Alpha-Chars, Next: Alpha-Regs, Up: Alpha Syntax
5983 9.2.3.1 Special Characters
5984 ..........................
5986 `#' is the line comment character. Note that if `#' is the first
5987 character on a line then it can also be a logical line number directive
5988 (*note Comments::) or a preprocessor control command (*note
5991 `;' can be used instead of a newline to separate statements.
5994 File: as.info, Node: Alpha-Regs, Next: Alpha-Relocs, Prev: Alpha-Chars, Up: Alpha Syntax
5996 9.2.3.2 Register Names
5997 ......................
5999 The 32 integer registers are referred to as `$N' or `$rN'. In
6000 addition, registers 15, 28, 29, and 30 may be referred to by the
6001 symbols `$fp', `$at', `$gp', and `$sp' respectively.
6003 The 32 floating-point registers are referred to as `$fN'.
6006 File: as.info, Node: Alpha-Relocs, Prev: Alpha-Regs, Up: Alpha Syntax
6011 Some of these relocations are available for ECOFF, but mostly only for
6012 ELF. They are modeled after the relocation format introduced in
6013 Digital Unix 4.0, but there are additions.
6015 The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the
6016 relocation. In some cases NUMBER is used to relate specific
6019 The relocation is placed at the end of the instruction like so:
6021 ldah $0,a($29) !gprelhigh
6022 lda $0,a($0) !gprellow
6023 ldq $1,b($29) !literal!100
6024 ldl $2,0($1) !lituse_base!100
6028 Used with an `ldq' instruction to load the address of a symbol
6031 A sequence number N is optional, and if present is used to pair
6032 `lituse' relocations with this `literal' relocation. The `lituse'
6033 relocations are used by the linker to optimize the code based on
6034 the final location of the symbol.
6036 Note that these optimizations are dependent on the data flow of the
6037 program. Therefore, if _any_ `lituse' is paired with a `literal'
6038 relocation, then _all_ uses of the register set by the `literal'
6039 instruction must also be marked with `lituse' relocations. This
6040 is because the original `literal' instruction may be deleted or
6041 transformed into another instruction.
6043 Also note that there may be a one-to-many relationship between
6044 `literal' and `lituse', but not a many-to-one. That is, if there
6045 are two code paths that load up the same address and feed the
6046 value to a single use, then the use may not use a `lituse'
6050 Used with any memory format instruction (e.g. `ldl') to indicate
6051 that the literal is used for an address load. The offset field of
6052 the instruction must be zero. During relaxation, the code may be
6053 altered to use a gp-relative load.
6056 Used with a register branch format instruction (e.g. `jsr') to
6057 indicate that the literal is used for a call. During relaxation,
6058 the code may be altered to use a direct branch (e.g. `bsr').
6060 `!lituse_jsrdirect!N'
6061 Similar to `lituse_jsr', but also that this call cannot be vectored
6062 through a PLT entry. This is useful for functions with special
6063 calling conventions which do not allow the normal call-clobbered
6064 registers to be clobbered.
6067 Used with a byte mask instruction (e.g. `extbl') to indicate that
6068 only the low 3 bits of the address are relevant. During
6069 relaxation, the code may be altered to use an immediate instead of
6073 Used with any other instruction to indicate that the original
6074 address is in fact used, and the original `ldq' instruction may
6075 not be altered or deleted. This is useful in conjunction with
6076 `lituse_jsr' to test whether a weak symbol is defined.
6078 ldq $27,foo($29) !literal!1
6079 beq $27,is_undef !lituse_addr!1
6080 jsr $26,($27),foo !lituse_jsr!1
6083 Used with a register branch format instruction to indicate that the
6084 literal is the call to `__tls_get_addr' used to compute the
6085 address of the thread-local storage variable whose descriptor was
6086 loaded with `!tlsgd!N'.
6089 Used with a register branch format instruction to indicate that the
6090 literal is the call to `__tls_get_addr' used to compute the
6091 address of the base of the thread-local storage block for the
6092 current module. The descriptor for the module must have been
6093 loaded with `!tlsldm!N'.
6096 Used with `ldah' and `lda' to load the GP from the current
6097 address, a-la the `ldgp' macro. The source register for the
6098 `ldah' instruction must contain the address of the `ldah'
6099 instruction. There must be exactly one `lda' instruction paired
6100 with the `ldah' instruction, though it may appear anywhere in the
6101 instruction stream. The immediate operands must be zero.
6104 ldah $29,0($26) !gpdisp!1
6105 lda $29,0($29) !gpdisp!1
6108 Used with an `ldah' instruction to add the high 16 bits of a
6109 32-bit displacement from the GP.
6112 Used with any memory format instruction to add the low 16 bits of a
6113 32-bit displacement from the GP.
6116 Used with any memory format instruction to add a 16-bit
6117 displacement from the GP.
6120 Used with any branch format instruction to skip the GP load at the
6121 target address. The referenced symbol must have the same GP as the
6122 source object file, and it must be declared to either not use `$27'
6123 or perform a standard GP load in the first two instructions via the
6124 `.prologue' directive.
6128 Used with an `lda' instruction to load the address of a TLS
6129 descriptor for a symbol in the GOT.
6131 The sequence number N is optional, and if present it used to pair
6132 the descriptor load with both the `literal' loading the address of
6133 the `__tls_get_addr' function and the `lituse_tlsgd' marking the
6134 call to that function.
6136 For proper relaxation, both the `tlsgd', `literal' and `lituse'
6137 relocations must be in the same extended basic block. That is,
6138 the relocation with the lowest address must be executed first at
6143 Used with an `lda' instruction to load the address of a TLS
6144 descriptor for the current module in the GOT.
6146 Similar in other respects to `tlsgd'.
6149 Used with an `ldq' instruction to load the offset of the TLS
6150 symbol within its module's thread-local storage block. Also known
6151 as the dynamic thread pointer offset or dtp-relative offset.
6156 Like `gprel' relocations except they compute dtp-relative offsets.
6159 Used with an `ldq' instruction to load the offset of the TLS
6160 symbol from the thread pointer. Also known as the tp-relative
6166 Like `gprel' relocations except they compute tp-relative offsets.
6169 File: as.info, Node: Alpha Floating Point, Next: Alpha Directives, Prev: Alpha Syntax, Up: Alpha-Dependent
6171 9.2.4 Floating Point
6172 --------------------
6174 The Alpha family uses both IEEE and VAX floating-point numbers.
6177 File: as.info, Node: Alpha Directives, Next: Alpha Opcodes, Prev: Alpha Floating Point, Up: Alpha-Dependent
6179 9.2.5 Alpha Assembler Directives
6180 --------------------------------
6182 `as' for the Alpha supports many additional directives for
6183 compatibility with the native assembler. This section describes them
6186 These are the additional directives in `as' for the Alpha:
6189 Specifies the target processor. This is equivalent to the `-mCPU'
6190 command-line option. *Note Options: Alpha Options, for a list of
6193 `.ent FUNCTION[, N]'
6194 Mark the beginning of FUNCTION. An optional number may follow for
6195 compatibility with the OSF/1 assembler, but is ignored. When
6196 generating `.mdebug' information, this will create a procedure
6197 descriptor for the function. In ELF, it will mark the symbol as a
6198 function a-la the generic `.type' directive.
6201 Mark the end of FUNCTION. In ELF, it will set the size of the
6202 symbol a-la the generic `.size' directive.
6204 `.mask MASK, OFFSET'
6205 Indicate which of the integer registers are saved in the current
6206 function's stack frame. MASK is interpreted a bit mask in which
6207 bit N set indicates that register N is saved. The registers are
6208 saved in a block located OFFSET bytes from the "canonical frame
6209 address" (CFA) which is the value of the stack pointer on entry to
6210 the function. The registers are saved sequentially, except that
6211 the return address register (normally `$26') is saved first.
6213 This and the other directives that describe the stack frame are
6214 currently only used when generating `.mdebug' information. They
6215 may in the future be used to generate DWARF2 `.debug_frame' unwind
6216 information for hand written assembly.
6218 `.fmask MASK, OFFSET'
6219 Indicate which of the floating-point registers are saved in the
6220 current stack frame. The MASK and OFFSET parameters are
6221 interpreted as with `.mask'.
6223 `.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]'
6224 Describes the shape of the stack frame. The frame pointer in use
6225 is FRAMEREG; normally this is either `$fp' or `$sp'. The frame
6226 pointer is FRAMEOFFSET bytes below the CFA. The return address is
6227 initially located in RETREG until it is saved as indicated in
6228 `.mask'. For compatibility with OSF/1 an optional ARGOFFSET
6229 parameter is accepted and ignored. It is believed to indicate the
6230 offset from the CFA to the saved argument registers.
6233 Indicate that the stack frame is set up and all registers have been
6234 spilled. The argument N indicates whether and how the function
6235 uses the incoming "procedure vector" (the address of the called
6236 function) in `$27'. 0 indicates that `$27' is not used; 1
6237 indicates that the first two instructions of the function use `$27'
6238 to perform a load of the GP register; 2 indicates that `$27' is
6239 used in some non-standard way and so the linker cannot elide the
6240 load of the procedure vector during relaxation.
6242 `.usepv FUNCTION, WHICH'
6243 Used to indicate the use of the `$27' register, similar to
6244 `.prologue', but without the other semantics of needing to be
6245 inside an open `.ent'/`.end' block.
6247 The WHICH argument should be either `no', indicating that `$27' is
6248 not used, or `std', indicating that the first two instructions of
6249 the function perform a GP load.
6251 One might use this directive instead of `.prologue' if you are
6252 also using dwarf2 CFI directives.
6254 `.gprel32 EXPRESSION'
6255 Computes the difference between the address in EXPRESSION and the
6256 GP for the current object file, and stores it in 4 bytes. In
6257 addition to being smaller than a full 8 byte address, this also
6258 does not require a dynamic relocation when used in a shared
6261 `.t_floating EXPRESSION'
6262 Stores EXPRESSION as an IEEE double precision value.
6264 `.s_floating EXPRESSION'
6265 Stores EXPRESSION as an IEEE single precision value.
6267 `.f_floating EXPRESSION'
6268 Stores EXPRESSION as a VAX F format value.
6270 `.g_floating EXPRESSION'
6271 Stores EXPRESSION as a VAX G format value.
6273 `.d_floating EXPRESSION'
6274 Stores EXPRESSION as a VAX D format value.
6277 Enables or disables various assembler features. Using the positive
6278 name of the feature enables while using `noFEATURE' disables.
6281 Indicates that macro expansions may clobber the "assembler
6282 temporary" (`$at' or `$28') register. Some macros may not be
6283 expanded without this and will generate an error message if
6284 `noat' is in effect. When `at' is in effect, a warning will
6285 be generated if `$at' is used by the programmer.
6288 Enables the expansion of macro instructions. Note that
6289 variants of real instructions, such as `br label' vs `br
6290 $31,label' are considered alternate forms and not macros.
6295 These control whether and how the assembler may re-order
6296 instructions. Accepted for compatibility with the OSF/1
6297 assembler, but `as' does not do instruction scheduling, so
6298 these features are ignored.
6300 The following directives are recognized for compatibility with the
6301 OSF/1 assembler but are ignored.
6310 File: as.info, Node: Alpha Opcodes, Prev: Alpha Directives, Up: Alpha-Dependent
6315 For detailed information on the Alpha machine instruction set, see the
6316 Alpha Architecture Handbook
6317 (ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf).
6320 File: as.info, Node: ARC-Dependent, Next: ARM-Dependent, Prev: Alpha-Dependent, Up: Machine Dependencies
6322 9.3 ARC Dependent Features
6323 ==========================
6327 * ARC Options:: Options
6328 * ARC Syntax:: Syntax
6329 * ARC Floating Point:: Floating Point
6330 * ARC Directives:: ARC Machine Directives
6331 * ARC Opcodes:: Opcodes
6334 File: as.info, Node: ARC Options, Next: ARC Syntax, Up: ARC-Dependent
6340 This option selects the core processor variant. Using `-marc' is
6341 the same as `-marc6', which is also the default.
6344 Base instruction set.
6347 Jump-and-link (jl) instruction. No requirement of an
6348 instruction between setting flags and conditional jump. For
6355 Break (brk) and sleep (sleep) instructions.
6358 Software interrupt (swi) instruction.
6361 Note: the `.option' directive can to be used to select a core
6362 variant from within assembly code.
6365 This option specifies that the output generated by the assembler
6366 should be marked as being encoded for a big-endian processor.
6369 This option specifies that the output generated by the assembler
6370 should be marked as being encoded for a little-endian processor -
6371 this is the default.
6375 File: as.info, Node: ARC Syntax, Next: ARC Floating Point, Prev: ARC Options, Up: ARC-Dependent
6382 * ARC-Chars:: Special Characters
6383 * ARC-Regs:: Register Names
6386 File: as.info, Node: ARC-Chars, Next: ARC-Regs, Up: ARC Syntax
6388 9.3.2.1 Special Characters
6389 ..........................
6391 The presence of a `#' on a line indicates the start of a comment that
6392 extends to the end of the current line. Note that if a line starts
6393 with a `#' character then it can also be a logical line number
6394 directive (*note Comments::) or a preprocessor control command (*note
6397 The ARC assembler does not support a line separator character.
6400 File: as.info, Node: ARC-Regs, Prev: ARC-Chars, Up: ARC Syntax
6402 9.3.2.2 Register Names
6403 ......................
6408 File: as.info, Node: ARC Floating Point, Next: ARC Directives, Prev: ARC Syntax, Up: ARC-Dependent
6410 9.3.3 Floating Point
6411 --------------------
6413 The ARC core does not currently have hardware floating point support.
6414 Software floating point support is provided by `GCC' and uses IEEE
6415 floating-point numbers.
6418 File: as.info, Node: ARC Directives, Next: ARC Opcodes, Prev: ARC Floating Point, Up: ARC-Dependent
6420 9.3.4 ARC Machine Directives
6421 ----------------------------
6423 The ARC version of `as' supports the following additional machine
6426 `.2byte EXPRESSIONS'
6429 `.3byte EXPRESSIONS'
6432 `.4byte EXPRESSIONS'
6435 `.extAuxRegister NAME,ADDRESS,MODE'
6436 The ARCtangent A4 has extensible auxiliary register space. The
6437 auxiliary registers can be defined in the assembler source code by
6438 using this directive. The first parameter is the NAME of the new
6439 auxiallry register. The second parameter is the ADDRESS of the
6440 register in the auxiliary register memory map for the variant of
6441 the ARC. The third parameter specifies the MODE in which the
6442 register can be operated is and it can be one of:
6448 `r|w (read or write)'
6452 .extAuxRegister mulhi,0x12,w
6454 This specifies an extension auxiliary register called _mulhi_
6455 which is at address 0x12 in the memory space and which is only
6458 `.extCondCode SUFFIX,VALUE'
6459 The condition codes on the ARCtangent A4 are extensible and can be
6460 specified by means of this assembler directive. They are specified
6461 by the suffix and the value for the condition code. They can be
6462 used to specify extra condition codes with any values. For
6465 .extCondCode is_busy,0x14
6467 add.is_busy r1,r2,r3
6470 `.extCoreRegister NAME,REGNUM,MODE,SHORTCUT'
6471 Specifies an extension core register NAME for the application.
6472 This allows a register NAME with a valid REGNUM between 0 and 60,
6473 with the following as valid values for MODE
6479 `_r|w_ (read or write)'
6481 The other parameter gives a description of the register having a
6482 SHORTCUT in the pipeline. The valid values are:
6490 .extCoreRegister mlo,57,r,can_shortcut
6492 This defines an extension core register mlo with the value 57 which
6493 can shortcut the pipeline.
6495 `.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS'
6496 The ARCtangent A4 allows the user to specify extension
6497 instructions. The extension instructions are not macros. The
6498 assembler creates encodings for use of these instructions
6499 according to the specification by the user. The parameters are:
6502 Name of the extension instruction
6505 Opcode to be used. (Bits 27:31 in the encoding). Valid values
6509 Subopcode to be used. Valid values are from 0x09-0x3f.
6510 However the correct value also depends on SYNTAXCLASS
6513 Determines the kinds of suffixes to be allowed. Valid values
6514 are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which
6515 indicates the absence or presence of conditional suffixes and
6516 flag setting by the extension instruction. It is also
6517 possible to specify that an instruction sets the flags and is
6518 conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'.
6521 Determines the syntax class for the instruction. It can have
6522 the following values:
6525 2 Operand Instruction
6528 3 Operand Instruction
6530 In addition there could be modifiers for the syntax class as
6533 Syntax Class Modifiers are:
6535 - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP,
6536 specifying that the first operand of a three-operand
6537 instruction must be an immediate (i.e., the result is
6538 discarded). OP1_MUST_BE_IMM is used by bitwise ORing it
6539 with SYNTAX_3OP as given in the example below. This
6540 could usually be used to set the flags using specific
6541 instructions and not retain results.
6543 - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it
6544 specifies that there is an implied immediate destination
6545 operand which does not appear in the syntax. For
6546 example, if the source code contains an instruction like:
6550 it really means that the first argument is an implied
6551 immediate (that is, the result is discarded). This is
6552 the same as though the source code were: inst 0,r1,r2.
6553 You use OP1_IMM_IMPLIED by bitwise ORing it with
6557 For example, defining 64-bit multiplier with immediate operands:
6559 .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
6560 SYNTAX_3OP|OP1_MUST_BE_IMM
6562 The above specifies an extension instruction called mp64 which has
6563 3 operands, sets the flags, can be used with a condition code, for
6564 which the first operand is an immediate. (Equivalent to
6565 discarding the result of the operation).
6567 .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
6569 This describes a 2 operand instruction with an implicit first
6570 immediate operand. The result of this operation would be
6579 `.option ARC|ARC5|ARC6|ARC7|ARC8'
6580 The `.option' directive must be followed by the desired core
6581 version. Again `arc' is an alias for `arc6'.
6583 Note: the `.option' directive overrides the command line option
6584 `-marc'; a warning is emitted when the version is not consistent
6585 between the two - even for the implicit default core version
6588 `.short EXPRESSIONS'
6596 File: as.info, Node: ARC Opcodes, Prev: ARC Directives, Up: ARC-Dependent
6601 For information on the ARC instruction set, see `ARC Programmers
6602 Reference Manual', ARC International (www.arc.com)
6605 File: as.info, Node: ARM-Dependent, Next: AVR-Dependent, Prev: ARC-Dependent, Up: Machine Dependencies
6607 9.4 ARM Dependent Features
6608 ==========================
6612 * ARM Options:: Options
6613 * ARM Syntax:: Syntax
6614 * ARM Floating Point:: Floating Point
6615 * ARM Directives:: ARM Machine Directives
6616 * ARM Opcodes:: Opcodes
6617 * ARM Mapping Symbols:: Mapping Symbols
6618 * ARM Unwinding Tutorial:: Unwinding
6621 File: as.info, Node: ARM Options, Next: ARM Syntax, Up: ARM-Dependent
6626 `-mcpu=PROCESSOR[+EXTENSION...]'
6627 This option specifies the target processor. The assembler will
6628 issue an error message if an attempt is made to assemble an
6629 instruction which will not execute on the target processor. The
6630 following processor names are recognized: `arm1', `arm2', `arm250',
6631 `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
6632 `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
6633 `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
6634 `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
6635 `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1',
6636 `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920',
6637 `arm920t', `arm922t', `arm940t', `arm9tdmi', `fa526' (Faraday
6638 FA526 processor), `fa626' (Faraday FA626 processor), `arm9e',
6639 `arm926e', `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s',
6640 `arm966e-r0', `arm966e', `arm966e-s', `arm968e-s', `arm10t',
6641 `arm10tdmi', `arm10e', `arm1020', `arm1020t', `arm1020e',
6642 `arm1022e', `arm1026ej-s', `fa606te' (Faraday FA606TE processor),
6643 `fa616te' (Faraday FA616TE processor), `fa626te' (Faraday FA626TE
6644 processor), `fmp626' (Faraday FMP626 processor), `fa726te'
6645 (Faraday FA726TE processor), `arm1136j-s', `arm1136jf-s',
6646 `arm1156t2-s', `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s',
6647 `mpcore', `mpcorenovfp', `cortex-a5', `cortex-a7', `cortex-a8',
6648 `cortex-a9', `cortex-a15', `cortex-r4', `cortex-r4f', `cortex-r5',
6649 `cortex-r7', `cortex-m4', `cortex-m3', `cortex-m1', `cortex-m0',
6650 `cortex-m0plus', `ep9312' (ARM920 with Cirrus Maverick
6651 coprocessor), `i80200' (Intel XScale processor) `iwmmxt' (Intel(r)
6652 XScale processor with Wireless MMX(tm) technology coprocessor) and
6653 `xscale'. The special name `all' may be used to allow the
6654 assembler to accept instructions valid for any ARM processor.
6656 In addition to the basic instruction set, the assembler can be
6657 told to accept various extension mnemonics that extend the
6658 processor using the co-processor instruction space. For example,
6659 `-mcpu=arm920+maverick' is equivalent to specifying `-mcpu=ep9312'.
6661 Multiple extensions may be specified, separated by a `+'. The
6662 extensions should be specified in ascending alphabetical order.
6664 Some extensions may be restricted to particular architectures;
6665 this is documented in the list of extensions below.
6667 Extension mnemonics may also be removed from those the assembler
6668 accepts. This is done be prepending `no' to the option that adds
6669 the extension. Extensions that are removed should be listed after
6670 all extensions which have been added, again in ascending
6671 alphabetical order. For example, `-mcpu=ep9312+nomaverick' is
6672 equivalent to specifying `-mcpu=arm920'.
6674 The following extensions are currently supported: `crypto'
6675 (Cryptography Extensions for v8-A architecture, implies `fp+simd'),
6676 `fp' (Floating Point Extensions for v8-A architecture), `idiv'
6677 (Integer Divide Extensions for v7-A and v7-R architectures),
6678 `iwmmxt', `iwmmxt2', `maverick', `mp' (Multiprocessing Extensions
6679 for v7-A and v7-R architectures), `os' (Operating System for v6M
6680 architecture), `sec' (Security Extensions for v6K and v7-A
6681 architectures), `simd' (Advanced SIMD Extensions for v8-A
6682 architecture, implies `fp'), `virt' (Virtualization Extensions for
6683 v7-A architecture, implies `idiv'), and `xscale'.
6685 `-march=ARCHITECTURE[+EXTENSION...]'
6686 This option specifies the target architecture. The assembler will
6687 issue an error message if an attempt is made to assemble an
6688 instruction which will not execute on the target architecture.
6689 The following architecture names are recognized: `armv1', `armv2',
6690 `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
6691 `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
6692 `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk',
6693 `armv6-m', `armv6s-m', `armv7', `armv7-a', `armv7-r', `armv7-m',
6694 `armv7e-m', `armv8-a', `iwmmxt' and `xscale'. If both `-mcpu' and
6695 `-march' are specified, the assembler will use the setting for
6698 The architecture option can be extended with the same instruction
6699 set extension options as the `-mcpu' option.
6701 `-mfpu=FLOATING-POINT-FORMAT'
6702 This option specifies the floating point format to assemble for.
6703 The assembler will issue an error message if an attempt is made to
6704 assemble an instruction which will not execute on the target
6705 floating point unit. The following format options are recognized:
6706 `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
6707 `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
6708 `vfp9', `vfpxd', `vfpv2', `vfpv3', `vfpv3-fp16', `vfpv3-d16',
6709 `vfpv3-d16-fp16', `vfpv3xd', `vfpv3xd-d16', `vfpv4', `vfpv4-d16',
6710 `fpv4-sp-d16', `fp-armv8', `arm1020t', `arm1020e', `arm1136jf-s',
6711 `maverick', `neon', `neon-vfpv4', `neon-fp-armv8', and
6712 `crypto-neon-fp-armv8'.
6714 In addition to determining which instructions are assembled, this
6715 option also affects the way in which the `.double' assembler
6716 directive behaves when assembling little-endian code.
6718 The default is dependent on the processor selected. For
6719 Architecture 5 or later, the default is to assembler for VFP
6720 instructions; for earlier architectures the default is to assemble
6721 for FPA instructions.
6724 This option specifies that the assembler should start assembling
6725 Thumb instructions; that is, it should behave as though the file
6726 starts with a `.code 16' directive.
6729 This option specifies that the output generated by the assembler
6730 should be marked as supporting interworking.
6732 `-mimplicit-it=never'
6733 `-mimplicit-it=always'
6735 `-mimplicit-it=thumb'
6736 The `-mimplicit-it' option controls the behavior of the assembler
6737 when conditional instructions are not enclosed in IT blocks.
6738 There are four possible behaviors. If `never' is specified, such
6739 constructs cause a warning in ARM code and an error in Thumb-2
6740 code. If `always' is specified, such constructs are accepted in
6741 both ARM and Thumb-2 code, where the IT instruction is added
6742 implicitly. If `arm' is specified, such constructs are accepted
6743 in ARM code and cause an error in Thumb-2 code. If `thumb' is
6744 specified, such constructs cause a warning in ARM code and are
6745 accepted in Thumb-2 code. If you omit this option, the behavior
6746 is equivalent to `-mimplicit-it=arm'.
6750 These options specify that the output generated by the assembler
6751 should be marked as supporting the indicated version of the Arm
6752 Procedure. Calling Standard.
6755 This option specifies that the output generated by the assembler
6756 should be marked as supporting the Arm/Thumb Procedure Calling
6757 Standard. If enabled this option will cause the assembler to
6758 create an empty debugging section in the object file called
6759 .arm.atpcs. Debuggers can use this to determine the ABI being
6763 This indicates the floating point variant of the APCS should be
6764 used. In this variant floating point arguments are passed in FP
6765 registers rather than integer registers.
6768 This indicates that the reentrant variant of the APCS should be
6769 used. This variant supports position independent code.
6772 This option specifies that the output generated by the assembler
6773 should be marked as using specified floating point ABI. The
6774 following values are recognized: `soft', `softfp' and `hard'.
6777 This option specifies which EABI version the produced object files
6778 should conform to. The following values are recognized: `gnu', `4'
6782 This option specifies that the output generated by the assembler
6783 should be marked as being encoded for a big-endian processor.
6786 This option specifies that the output generated by the assembler
6787 should be marked as being encoded for a little-endian processor.
6790 This option specifies that the output of the assembler should be
6791 marked as position-independent code (PIC).
6794 Allow `BX' instructions in ARMv4 code. This is intended for use
6795 with the linker option of the same name.
6798 `-mno-warn-deprecated'
6799 Enable or disable warnings about using deprecated options or
6800 features. The default is to warn.
6804 File: as.info, Node: ARM Syntax, Next: ARM Floating Point, Prev: ARM Options, Up: ARM-Dependent
6811 * ARM-Instruction-Set:: Instruction Set
6812 * ARM-Chars:: Special Characters
6813 * ARM-Regs:: Register Names
6814 * ARM-Relocations:: Relocations
6815 * ARM-Neon-Alignment:: NEON Alignment Specifiers
6818 File: as.info, Node: ARM-Instruction-Set, Next: ARM-Chars, Up: ARM Syntax
6820 9.4.2.1 Instruction Set Syntax
6821 ..............................
6823 Two slightly different syntaxes are support for ARM and THUMB
6824 instructions. The default, `divided', uses the old style where ARM and
6825 THUMB instructions had their own, separate syntaxes. The new,
6826 `unified' syntax, which can be selected via the `.syntax' directive,
6827 and has the following main features:
6830 Immediate operands do not require a `#' prefix.
6833 The `IT' instruction may appear, and if it does it is validated
6834 against subsequent conditional affixes. In ARM mode it does not
6835 generate machine code, in THUMB mode it does.
6838 For ARM instructions the conditional affixes always appear at the
6839 end of the instruction. For THUMB instructions conditional
6840 affixes can be used, but only inside the scope of an `IT'
6844 All of the instructions new to the V6T2 architecture (and later)
6845 are available. (Only a few such instructions can be written in the
6849 The `.N' and `.W' suffixes are recognized and honored.
6852 All instructions set the flags if and only if they have an `s'
6856 File: as.info, Node: ARM-Chars, Next: ARM-Regs, Prev: ARM-Instruction-Set, Up: ARM Syntax
6858 9.4.2.2 Special Characters
6859 ..........................
6861 The presence of a `@' anywhere on a line indicates the start of a
6862 comment that extends to the end of that line.
6864 If a `#' appears as the first character of a line then the whole
6865 line is treated as a comment, but in this case the line could also be a
6866 logical line number directive (*note Comments::) or a preprocessor
6867 control command (*note Preprocessing::).
6869 The `;' character can be used instead of a newline to separate
6872 Either `#' or `$' can be used to indicate immediate operands.
6874 *TODO* Explain about /data modifier on symbols.
6877 File: as.info, Node: ARM-Regs, Next: ARM-Relocations, Prev: ARM-Chars, Up: ARM Syntax
6879 9.4.2.3 Register Names
6880 ......................
6882 *TODO* Explain about ARM register naming, and the predefined names.
6885 File: as.info, Node: ARM-Neon-Alignment, Prev: ARM-Relocations, Up: ARM Syntax
6887 9.4.2.4 NEON Alignment Specifiers
6888 .................................
6890 Some NEON load/store instructions allow an optional address alignment
6891 qualifier. The ARM documentation specifies that this is indicated by
6892 `@ ALIGN'. However GAS already interprets the `@' character as a "line
6893 comment" start, so `: ALIGN' is used instead. For example:
6895 vld1.8 {q0}, [r0, :128]
6898 File: as.info, Node: ARM Floating Point, Next: ARM Directives, Prev: ARM Syntax, Up: ARM-Dependent
6900 9.4.3 Floating Point
6901 --------------------
6903 The ARM family uses IEEE floating-point numbers.
6906 File: as.info, Node: ARM-Relocations, Next: ARM-Neon-Alignment, Prev: ARM-Regs, Up: ARM Syntax
6908 9.4.3.1 ARM relocation generation
6909 .................................
6911 Specific data relocations can be generated by putting the relocation
6912 name in parentheses after the symbol name. For example:
6916 This will generate an `R_ARM_TARGET1' relocation against the symbol
6917 FOO. The following relocations are supported: `GOT', `GOTOFF',
6918 `TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `TLSDESC',
6919 `TLSCALL', `GOTTPOFF', `GOT_PREL' and `TPOFF'.
6921 For compatibility with older toolchains the assembler also accepts
6922 `(PLT)' after branch targets. On legacy targets this will generate the
6923 deprecated `R_ARM_PLT32' relocation. On EABI targets it will encode
6924 either the `R_ARM_CALL' or `R_ARM_JUMP24' relocation, as appropriate.
6926 Relocations for `MOVW' and `MOVT' instructions can be generated by
6927 prefixing the value with `#:lower16:' and `#:upper16' respectively.
6928 For example to load the 32-bit address of foo into r0:
6930 MOVW r0, #:lower16:foo
6931 MOVT r0, #:upper16:foo
6934 File: as.info, Node: ARM Directives, Next: ARM Opcodes, Prev: ARM Floating Point, Up: ARM-Dependent
6936 9.4.4 ARM Machine Directives
6937 ----------------------------
6939 `.2byte EXPRESSION [, EXPRESSION]*'
6940 `.4byte EXPRESSION [, EXPRESSION]*'
6941 `.8byte EXPRESSION [, EXPRESSION]*'
6942 These directives write 2, 4 or 8 byte values to the output section.
6944 `.align EXPRESSION [, EXPRESSION]'
6945 This is the generic .ALIGN directive. For the ARM however if the
6946 first argument is zero (ie no alignment is needed) the assembler
6947 will behave as if the argument had been 2 (ie pad to the next four
6948 byte boundary). This is for compatibility with ARM's own
6952 Select the target architecture. Valid values for NAME are the
6953 same as for the `-march' commandline option.
6955 Specifying `.arch' clears any previously selected architecture
6958 `.arch_extension NAME'
6959 Add or remove an architecture extension to the target
6960 architecture. Valid values for NAME are the same as those
6961 accepted as architectural extensions by the `-mcpu' commandline
6964 `.arch_extension' may be used multiple times to add or remove
6965 extensions incrementally to the architecture being compiled for.
6968 This performs the same action as .CODE 32.
6971 Generate unwinder annotations for a stack adjustment of COUNT
6972 bytes. A positive value indicates the function prologue allocated
6973 stack space by decrementing the stack pointer.
6976 This directive switches to the `.bss' section.
6979 Prevents unwinding through the current function. No personality
6980 routine or exception table data is required or permitted.
6983 This directive selects the instruction set being generated. The
6984 value 16 selects Thumb, with the value 32 selecting ARM.
6987 Select the target processor. Valid values for NAME are the same as
6988 for the `-mcpu' commandline option.
6990 Specifying `.cpu' clears any previously selected architecture
6993 `NAME .dn REGISTER NAME [.TYPE] [[INDEX]]'
6994 `NAME .qn REGISTER NAME [.TYPE] [[INDEX]]'
6995 The `dn' and `qn' directives are used to create typed and/or
6996 indexed register aliases for use in Advanced SIMD Extension (Neon)
6997 instructions. The former should be used to create aliases of
6998 double-precision registers, and the latter to create aliases of
6999 quad-precision registers.
7001 If these directives are used to create typed aliases, those
7002 aliases can be used in Neon instructions instead of writing types
7003 after the mnemonic or after each operand. For example:
7010 This is equivalent to writing the following:
7012 vmul.f32 d2,d3,d4[1]
7014 Aliases created using `dn' or `qn' can be destroyed using `unreq'.
7016 `.eabi_attribute TAG, VALUE'
7017 Set the EABI object attribute TAG to VALUE.
7019 The TAG is either an attribute number, or one of the following:
7020 `Tag_CPU_raw_name', `Tag_CPU_name', `Tag_CPU_arch',
7021 `Tag_CPU_arch_profile', `Tag_ARM_ISA_use', `Tag_THUMB_ISA_use',
7022 `Tag_FP_arch', `Tag_WMMX_arch', `Tag_Advanced_SIMD_arch',
7023 `Tag_PCS_config', `Tag_ABI_PCS_R9_use', `Tag_ABI_PCS_RW_data',
7024 `Tag_ABI_PCS_RO_data', `Tag_ABI_PCS_GOT_use',
7025 `Tag_ABI_PCS_wchar_t', `Tag_ABI_FP_rounding',
7026 `Tag_ABI_FP_denormal', `Tag_ABI_FP_exceptions',
7027 `Tag_ABI_FP_user_exceptions', `Tag_ABI_FP_number_model',
7028 `Tag_ABI_align_needed', `Tag_ABI_align_preserved',
7029 `Tag_ABI_enum_size', `Tag_ABI_HardFP_use', `Tag_ABI_VFP_args',
7030 `Tag_ABI_WMMX_args', `Tag_ABI_optimization_goals',
7031 `Tag_ABI_FP_optimization_goals', `Tag_compatibility',
7032 `Tag_CPU_unaligned_access', `Tag_FP_HP_extension',
7033 `Tag_ABI_FP_16bit_format', `Tag_MPextension_use', `Tag_DIV_use',
7034 `Tag_nodefaults', `Tag_also_compatible_with', `Tag_conformance',
7035 `Tag_T2EE_use', `Tag_Virtualization_use'
7037 The VALUE is either a `number', `"string"', or `number, "string"'
7038 depending on the tag.
7040 Note - the following legacy values are also accepted by TAG:
7041 `Tag_VFP_arch', `Tag_ABI_align8_needed',
7042 `Tag_ABI_align8_preserved', `Tag_VFP_HP_extension',
7045 This directive aligns to an even-numbered address.
7047 `.extend EXPRESSION [, EXPRESSION]*'
7048 `.ldouble EXPRESSION [, EXPRESSION]*'
7049 These directives write 12byte long double floating-point values to
7050 the output section. These are not compatible with current ARM
7054 Marks the end of a function with an unwind table entry. The
7055 unwind index table entry is created when this directive is
7058 If no personality routine has been specified then standard
7059 personality routine 0 or 1 will be used, depending on the number
7060 of unwind opcodes required.
7063 Marks the start of a function with an unwind table entry.
7066 This directive forces the selection of Thumb instructions, even if
7067 the target processor does not support those instructions
7070 Select the floating-point unit to assemble for. Valid values for
7071 NAME are the same as for the `-mfpu' commandline option.
7074 Marks the end of the current function, and the start of the
7075 exception table entry for that function. Anything between this
7076 directive and the `.fnend' directive will be added to the
7077 exception table entry.
7079 Must be preceded by a `.personality' or `.personalityindex'
7082 `.inst OPCODE [ , ... ]'
7083 `.inst.n OPCODE [ , ... ]'
7084 `.inst.w OPCODE [ , ... ]'
7085 Generates the instruction corresponding to the numerical value
7086 OPCODE. `.inst.n' and `.inst.w' allow the Thumb instruction size
7087 to be specified explicitly, overriding the normal encoding rules.
7089 `.ldouble EXPRESSION [, EXPRESSION]*'
7093 This directive causes the current contents of the literal pool to
7094 be dumped into the current section (which is assumed to be the
7095 .text section) at the current location (aligned to a word
7096 boundary). `GAS' maintains a separate literal pool for each
7097 section and each sub-section. The `.ltorg' directive will only
7098 affect the literal pool of the current section and sub-section.
7099 At the end of assembly all remaining, un-empty literal pools will
7100 automatically be dumped.
7102 Note - older versions of `GAS' would dump the current literal pool
7103 any time a section change occurred. This is no longer done, since
7104 it prevents accurate control of the placement of literal pools.
7106 `.movsp REG [, #OFFSET]'
7107 Tell the unwinder that REG contains an offset from the current
7108 stack pointer. If OFFSET is not specified then it is assumed to be
7112 Override the architecture recorded in the EABI object attribute
7113 section. Valid values for NAME are the same as for the `.arch'
7114 directive. Typically this is useful when code uses runtime
7115 detection of CPU features.
7117 `.packed EXPRESSION [, EXPRESSION]*'
7118 This directive writes 12-byte packed floating-point values to the
7119 output section. These are not compatible with current ARM
7123 Generate unwinder annotations for a stack adjustment of COUNT
7124 bytes. A positive value indicates the function prologue allocated
7125 stack space by decrementing the stack pointer.
7128 Sets the personality routine for the current function to NAME.
7130 `.personalityindex INDEX'
7131 Sets the personality routine for the current function to the EABI
7132 standard routine number INDEX
7135 This is a synonym for .ltorg.
7137 `NAME .req REGISTER NAME'
7138 This creates an alias for REGISTER NAME called NAME. For example:
7143 Generate unwinder annotations to restore the registers in REGLIST.
7144 The format of REGLIST is the same as the corresponding
7145 store-multiple instruction.
7148 .save {r4, r5, r6, lr}
7149 stmfd sp!, {r4, r5, r6, lr}
7155 fstmdx sp!, {d8, d9, d10}
7158 wstrd wr11, [sp, #-8]!
7159 wstrd wr10, [sp, #-8]!
7162 wstrd wr11, [sp, #-8]!
7164 wstrd wr10, [sp, #-8]!
7166 `.setfp FPREG, SPREG [, #OFFSET]'
7167 Make all unwinder annotations relative to a frame pointer.
7168 Without this the unwinder will use offsets from the stack pointer.
7170 The syntax of this directive is the same as the `add' or `mov'
7171 instruction used to set the frame pointer. SPREG must be either
7172 `sp' or mentioned in a previous `.movsp' directive.
7180 `.secrel32 EXPRESSION [, EXPRESSION]*'
7181 This directive emits relocations that evaluate to the
7182 section-relative offset of each expression's symbol. This
7183 directive is only supported for PE targets.
7185 `.syntax [`unified' | `divided']'
7186 This directive sets the Instruction Set Syntax as described in the
7187 *Note ARM-Instruction-Set:: section.
7190 This performs the same action as .CODE 16.
7193 This directive specifies that the following symbol is the name of a
7194 Thumb encoded function. This information is necessary in order to
7195 allow the assembler and linker to generate correct code for
7196 interworking between Arm and Thumb instructions and should be used
7197 even if interworking is not going to be performed. The presence
7198 of this directive also implies `.thumb'
7200 This directive is not neccessary when generating EABI objects. On
7201 these targets the encoding is implicit when generating Thumb code.
7204 This performs the equivalent of a `.set' directive in that it
7205 creates a symbol which is an alias for another symbol (possibly
7206 not yet defined). This directive also has the added property in
7207 that it marks the aliased symbol as being a thumb function entry
7208 point, in the same way that the `.thumb_func' directive does.
7210 `.tlsdescseq TLS-VARIABLE'
7211 This directive is used to annotate parts of an inlined TLS
7212 descriptor trampoline. Normally the trampoline is provided by the
7213 linker, and this directive is not needed.
7216 This undefines a register alias which was previously defined using
7217 the `req', `dn' or `qn' directives. For example:
7222 An error occurs if the name is undefined. Note - this pseudo op
7223 can be used to delete builtin in register name aliases (eg 'r0').
7224 This should only be done if it is really necessary.
7226 `.unwind_raw OFFSET, BYTE1, ...'
7227 Insert one of more arbitary unwind opcode bytes, which are known
7228 to adjust the stack pointer by OFFSET bytes.
7230 For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save
7233 `.vsave VFP-REGLIST'
7234 Generate unwinder annotations to restore the VFP registers in
7235 VFP-REGLIST using FLDMD. Also works for VFPv3 registers that are
7236 to be restored using VLDM. The format of VFP-REGLIST is the same
7237 as the corresponding store-multiple instruction.
7240 .vsave {d8, d9, d10}
7241 fstmdd sp!, {d8, d9, d10}
7243 .vsave {d15, d16, d17}
7244 vstm sp!, {d15, d16, d17}
7246 Since FLDMX and FSTMX are now deprecated, this directive should be
7247 used in favour of `.save' for saving VFP registers for ARMv6 and
7252 File: as.info, Node: ARM Opcodes, Next: ARM Mapping Symbols, Prev: ARM Directives, Up: ARM-Dependent
7257 `as' implements all the standard ARM opcodes. It also implements
7258 several pseudo opcodes, including several synthetic load instructions.
7263 This pseudo op will always evaluate to a legal ARM instruction
7264 that does nothing. Currently it will evaluate to MOV r0, r0.
7267 ldr <register> , = <expression>
7269 If expression evaluates to a numeric constant then a MOV or MVN
7270 instruction will be used in place of the LDR instruction, if the
7271 constant can be generated by either of these instructions.
7272 Otherwise the constant will be placed into the nearest literal
7273 pool (if it not already there) and a PC relative LDR instruction
7277 adr <register> <label>
7279 This instruction will load the address of LABEL into the indicated
7280 register. The instruction will evaluate to a PC relative ADD or
7281 SUB instruction depending upon where the label is located. If the
7282 label is out of range, or if it is not defined in the same file
7283 (and section) as the ADR instruction, then an error will be
7284 generated. This instruction will not make use of the literal pool.
7287 adrl <register> <label>
7289 This instruction will load the address of LABEL into the indicated
7290 register. The instruction will evaluate to one or two PC relative
7291 ADD or SUB instructions depending upon where the label is located.
7292 If a second instruction is not needed a NOP instruction will be
7293 generated in its place, so that this instruction is always 8 bytes
7296 If the label is out of range, or if it is not defined in the same
7297 file (and section) as the ADRL instruction, then an error will be
7298 generated. This instruction will not make use of the literal pool.
7301 For information on the ARM or Thumb instruction sets, see `ARM
7302 Software Development Toolkit Reference Manual', Advanced RISC Machines
7306 File: as.info, Node: ARM Mapping Symbols, Next: ARM Unwinding Tutorial, Prev: ARM Opcodes, Up: ARM-Dependent
7308 9.4.6 Mapping Symbols
7309 ---------------------
7311 The ARM ELF specification requires that special symbols be inserted
7312 into object files to mark certain features:
7315 At the start of a region of code containing ARM instructions.
7318 At the start of a region of code containing THUMB instructions.
7321 At the start of a region of data.
7324 The assembler will automatically insert these symbols for you - there
7325 is no need to code them yourself. Support for tagging symbols ($b, $f,
7326 $p and $m) which is also mentioned in the current ARM ELF specification
7327 is not implemented. This is because they have been dropped from the
7328 new EABI and so tools cannot rely upon their presence.
7331 File: as.info, Node: ARM Unwinding Tutorial, Prev: ARM Mapping Symbols, Up: ARM-Dependent
7336 The ABI for the ARM Architecture specifies a standard format for
7337 exception unwind information. This information is used when an
7338 exception is thrown to determine where control should be transferred.
7339 In particular, the unwind information is used to determine which
7340 function called the function that threw the exception, and which
7341 function called that one, and so forth. This information is also used
7342 to restore the values of callee-saved registers in the function
7343 catching the exception.
7345 If you are writing functions in assembly code, and those functions
7346 call other functions that throw exceptions, you must use assembly
7347 pseudo ops to ensure that appropriate exception unwind information is
7348 generated. Otherwise, if one of the functions called by your assembly
7349 code throws an exception, the run-time library will be unable to unwind
7350 the stack through your assembly code and your program will not behave
7353 To illustrate the use of these pseudo ops, we will examine the code
7354 that G++ generates for the following C++ input:
7357 void callee (int *);
7367 This example does not show how to throw or catch an exception from
7368 assembly code. That is a much more complex operation and should always
7369 be done in a high-level language, such as C++, that directly supports
7372 The code generated by one particular version of G++ when compiling
7373 the example above is:
7379 @ Function supports interworking.
7380 @ args = 0, pretend = 0, frame = 8
7381 @ frame_needed = 1, uses_anonymous_args = 0
7402 Of course, the sequence of instructions varies based on the options
7403 you pass to GCC and on the version of GCC in use. The exact
7404 instructions are not important since we are focusing on the pseudo ops
7405 that are used to generate unwind information.
7407 An important assumption made by the unwinder is that the stack frame
7408 does not change during the body of the function. In particular, since
7409 we assume that the assembly code does not itself throw an exception,
7410 the only point where an exception can be thrown is from a call, such as
7411 the `bl' instruction above. At each call site, the same saved
7412 registers (including `lr', which indicates the return address) must be
7413 located in the same locations relative to the frame pointer.
7415 The `.fnstart' (*note .fnstart pseudo op: arm_fnstart.) pseudo op
7416 appears immediately before the first instruction of the function while
7417 the `.fnend' (*note .fnend pseudo op: arm_fnend.) pseudo op appears
7418 immediately after the last instruction of the function. These pseudo
7419 ops specify the range of the function.
7421 Only the order of the other pseudos ops (e.g., `.setfp' or `.pad')
7422 matters; their exact locations are irrelevant. In the example above,
7423 the compiler emits the pseudo ops with particular instructions. That
7424 makes it easier to understand the code, but it is not required for
7425 correctness. It would work just as well to emit all of the pseudo ops
7426 other than `.fnend' in the same order, but immediately after `.fnstart'.
7428 The `.save' (*note .save pseudo op: arm_save.) pseudo op indicates
7429 registers that have been saved to the stack so that they can be
7430 restored before the function returns. The argument to the `.save'
7431 pseudo op is a list of registers to save. If a register is
7432 "callee-saved" (as specified by the ABI) and is modified by the
7433 function you are writing, then your code must save the value before it
7434 is modified and restore the original value before the function returns.
7435 If an exception is thrown, the run-time library restores the values of
7436 these registers from their locations on the stack before returning
7437 control to the exception handler. (Of course, if an exception is not
7438 thrown, the function that contains the `.save' pseudo op restores these
7439 registers in the function epilogue, as is done with the `ldmfd'
7442 You do not have to save callee-saved registers at the very beginning
7443 of the function and you do not need to use the `.save' pseudo op
7444 immediately following the point at which the registers are saved.
7445 However, if you modify a callee-saved register, you must save it on the
7446 stack before modifying it and before calling any functions which might
7447 throw an exception. And, you must use the `.save' pseudo op to
7448 indicate that you have done so.
7450 The `.pad' (*note .pad: arm_pad.) pseudo op indicates a modification
7451 of the stack pointer that does not save any registers. The argument is
7452 the number of bytes (in decimal) that are subtracted from the stack
7453 pointer. (On ARM CPUs, the stack grows downwards, so subtracting from
7454 the stack pointer increases the size of the stack.)
7456 The `.setfp' (*note .setfp pseudo op: arm_setfp.) pseudo op
7457 indicates the register that contains the frame pointer. The first
7458 argument is the register that is set, which is typically `fp'. The
7459 second argument indicates the register from which the frame pointer
7460 takes its value. The third argument, if present, is the value (in
7461 decimal) added to the register specified by the second argument to
7462 compute the value of the frame pointer. You should not modify the
7463 frame pointer in the body of the function.
7465 If you do not use a frame pointer, then you should not use the
7466 `.setfp' pseudo op. If you do not use a frame pointer, then you should
7467 avoid modifying the stack pointer outside of the function prologue.
7468 Otherwise, the run-time library will be unable to find saved registers
7469 when it is unwinding the stack.
7471 The pseudo ops described above are sufficient for writing assembly
7472 code that calls functions which may throw exceptions. If you need to
7473 know more about the object-file format used to represent unwind
7474 information, you may consult the `Exception Handling ABI for the ARM
7475 Architecture' available from `http://infocenter.arm.com'.
7478 File: as.info, Node: AVR-Dependent, Next: Blackfin-Dependent, Prev: ARM-Dependent, Up: Machine Dependencies
7480 9.5 AVR Dependent Features
7481 ==========================
7485 * AVR Options:: Options
7486 * AVR Syntax:: Syntax
7487 * AVR Opcodes:: Opcodes
7490 File: as.info, Node: AVR Options, Next: AVR Syntax, Up: AVR-Dependent
7496 Specify ATMEL AVR instruction set or MCU type.
7498 Instruction set avr1 is for the minimal AVR core, not supported by
7499 the C compiler, only for assembler programs (MCU types: at90s1200,
7500 attiny11, attiny12, attiny15, attiny28).
7502 Instruction set avr2 (default) is for the classic AVR core with up
7503 to 8K program memory space (MCU types: at90s2313, at90s2323,
7504 at90s2333, at90s2343, attiny22, attiny26, at90s4414, at90s4433,
7505 at90s4434, at90s8515, at90c8534, at90s8535).
7507 Instruction set avr25 is for the classic AVR core with up to 8K
7508 program memory space plus the MOVW instruction (MCU types:
7509 attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a,
7510 attiny4313, attiny44, attiny44a, attiny84, attiny84a, attiny25,
7511 attiny45, attiny85, attiny261, attiny261a, attiny461, attiny461a,
7512 attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
7513 at86rf401, ata6289).
7515 Instruction set avr3 is for the classic AVR core with up to 128K
7516 program memory space (MCU types: at43usb355, at76c711).
7518 Instruction set avr31 is for the classic AVR core with exactly
7519 128K program memory space (MCU types: atmega103, at43usb320).
7521 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and
7522 JMP instructions (MCU types: attiny167, at90usb82, at90usb162,
7523 atmega8u2, atmega16u2, atmega32u2).
7525 Instruction set avr4 is for the enhanced AVR core with up to 8K
7526 program memory space (MCU types: atmega48, atmega48a, atmega48p,
7527 atmega8, atmega88, atmega88a, atmega88p, atmega88pa, atmega8515,
7528 atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b, at90pwm3,
7529 at90pwm3b, at90pwm81).
7531 Instruction set avr5 is for the enhanced AVR core with up to 128K
7532 program memory space (MCU types: atmega16, atmega16a, atmega161,
7533 atmega162, atmega163, atmega164a, atmega164p, atmega165,
7534 atmega165a, atmega165p, atmega168, atmega168a, atmega168p,
7535 atmega169, atmega169a, atmega169p, atmega169pa, atmega32,
7536 atmega323, atmega324a, atmega324p, atmega325, atmega325a,
7537 atmega325p, atmega325pa, atmega3250, atmega3250a, atmega3250p,
7538 atmega3250pa, atmega328, atmega328p, atmega329, atmega329a,
7539 atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
7540 atmega3290pa, atmega406, atmega64, atmega640, atmega644,
7541 atmega644a, atmega644p, atmega644pa, atmega645, atmega645a,
7542 atmega645p, atmega6450, atmega6450a, atmega6450p, atmega649,
7543 atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
7544 atmega16hva, atmega16hva2, atmega16hvb, atmega16hvbrevb,
7545 atmega32hvb, atmega32hvbrevb, atmega64hve, at90can32, at90can64,
7546 at90pwm161, at90pwm216, at90pwm316, atmega32c1, atmega64c1,
7547 atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4,
7548 atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
7550 Instruction set avr51 is for the enhanced AVR core with exactly
7551 128K program memory space (MCU types: atmega128, atmega1280,
7552 atmega1281, atmega1284p, atmega128rfa1, at90can128, at90usb1286,
7553 at90usb1287, m3000).
7555 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
7556 (MCU types: atmega2560, atmega2561).
7558 Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K
7559 program memory space and less than 64K data space (MCU types:
7560 atxmega16a4, atxmega16d4, atxmega16x1, atxmega32a4, atxmega32d4,
7563 Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K
7564 program memory space and greater than 64K data space (MCU types:
7567 Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K
7568 program memory space and less than 64K data space (MCU types:
7569 atxmega64a3, atxmega64d3).
7571 Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K
7572 program memory space and greater than 64K data space (MCU types:
7573 atxmega64a1, atxmega64a1u).
7575 Instruction set avrxmega6 is for the XMEGA AVR core with up to
7576 256K program memory space and less than 64K data space (MCU types:
7577 atxmega128a3, atxmega128d3, atxmega192a3, atxmega128b1,
7578 atxmega192d3, atxmega256a3, atxmega256a3b, atxmega256a3bu,
7581 Instruction set avrxmega7 is for the XMEGA AVR core with up to
7582 256K program memory space and greater than 64K data space (MCU
7583 types: atxmega128a1, atxmega128a1u).
7586 Accept all AVR opcodes, even if not supported by `-mmcu'.
7589 This option disable warnings for skipping two-word instructions.
7592 This option reject `rjmp/rcall' instructions with 8K wrap-around.
7596 File: as.info, Node: AVR Syntax, Next: AVR Opcodes, Prev: AVR Options, Up: AVR-Dependent
7603 * AVR-Chars:: Special Characters
7604 * AVR-Regs:: Register Names
7605 * AVR-Modifiers:: Relocatable Expression Modifiers
7608 File: as.info, Node: AVR-Chars, Next: AVR-Regs, Up: AVR Syntax
7610 9.5.2.1 Special Characters
7611 ..........................
7613 The presence of a `;' anywhere on a line indicates the start of a
7614 comment that extends to the end of that line.
7616 If a `#' appears as the first character of a line, the whole line is
7617 treated as a comment, but in this case the line can also be a logical
7618 line number directive (*note Comments::) or a preprocessor control
7619 command (*note Preprocessing::).
7621 The `$' character can be used instead of a newline to separate
7625 File: as.info, Node: AVR-Regs, Next: AVR-Modifiers, Prev: AVR-Chars, Up: AVR Syntax
7627 9.5.2.2 Register Names
7628 ......................
7630 The AVR has 32 x 8-bit general purpose working registers `r0', `r1',
7631 ... `r31'. Six of the 32 registers can be used as three 16-bit
7632 indirect address register pointers for Data Space addressing. One of
7633 the these address pointers can also be used as an address pointer for
7634 look up tables in Flash program memory. These added function registers
7635 are the 16-bit `X', `Y' and `Z' - registers.
7642 File: as.info, Node: AVR-Modifiers, Prev: AVR-Regs, Up: AVR Syntax
7644 9.5.2.3 Relocatable Expression Modifiers
7645 ........................................
7647 The assembler supports several modifiers when using relocatable
7648 addresses in AVR instruction operands. The general syntax is the
7651 modifier(relocatable-expression)
7654 This modifier allows you to use bits 0 through 7 of an address
7655 expression as 8 bit relocatable expression.
7658 This modifier allows you to use bits 7 through 15 of an address
7659 expression as 8 bit relocatable expression. This is useful with,
7660 for example, the AVR `ldi' instruction and `lo8' modifier.
7664 ldi r26, lo8(sym+10)
7665 ldi r27, hi8(sym+10)
7668 This modifier allows you to use bits 16 through 23 of an address
7669 expression as 8 bit relocatable expression. Also, can be useful
7670 for loading 32 bit constants.
7676 This modifier allows you to use bits 24 through 31 of an
7677 expression as 8 bit expression. This is useful with, for example,
7678 the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8',
7683 ldi r26, lo8(285774925)
7684 ldi r27, hi8(285774925)
7685 ldi r28, hlo8(285774925)
7686 ldi r29, hhi8(285774925)
7687 ; r29,r28,r27,r26 = 285774925
7690 This modifier allows you to use bits 0 through 7 of an address
7691 expression as 8 bit relocatable expression. This modifier useful
7692 for addressing data or code from Flash/Program memory. The using
7693 of `pm_lo8' similar to `lo8'.
7696 This modifier allows you to use bits 8 through 15 of an address
7697 expression as 8 bit relocatable expression. This modifier useful
7698 for addressing data or code from Flash/Program memory.
7701 This modifier allows you to use bits 15 through 23 of an address
7702 expression as 8 bit relocatable expression. This modifier useful
7703 for addressing data or code from Flash/Program memory.
7707 File: as.info, Node: AVR Opcodes, Prev: AVR Syntax, Up: AVR-Dependent
7712 For detailed information on the AVR machine instruction set, see
7713 `www.atmel.com/products/AVR'.
7715 `as' implements all the standard AVR opcodes. The following table
7716 summarizes the AVR opcodes, and their arguments.
7720 d `ldi' register (r16-r31)
7721 v `movw' even register (r0, r2, ..., r28, r30)
7722 a `fmul' register (r16-r23)
7723 w `adiw' register (r24,r26,r28,r30)
7724 e pointer registers (X,Y,Z)
7725 b base pointer register and displacement ([YZ]+disp)
7726 z Z pointer register (for [e]lpm Rd,Z[+])
7727 M immediate value from 0 to 255
7728 n immediate value from 0 to 255 ( n = ~M ). Relocation impossible
7729 s immediate value from 0 to 7
7730 P Port address value from 0 to 63. (in, out)
7731 p Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
7732 K immediate value from 0 to 63 (used in `adiw', `sbiw')
7734 l signed pc relative offset from -64 to 63
7735 L signed pc relative offset from -2048 to 2047
7736 h absolute code address (call, jmp)
7737 S immediate value from 0 to 7 (S = s << 4)
7738 ? use this opcode entry if no parameters, else use next opcode entry
7740 1001010010001000 clc
7741 1001010011011000 clh
7742 1001010011111000 cli
7743 1001010010101000 cln
7744 1001010011001000 cls
7745 1001010011101000 clt
7746 1001010010111000 clv
7747 1001010010011000 clz
7748 1001010000001000 sec
7749 1001010001011000 seh
7750 1001010001111000 sei
7751 1001010000101000 sen
7752 1001010001001000 ses
7753 1001010001101000 set
7754 1001010000111000 sev
7755 1001010000011000 sez
7756 100101001SSS1000 bclr S
7757 100101000SSS1000 bset S
7758 1001010100001001 icall
7759 1001010000001001 ijmp
7760 1001010111001000 lpm ?
7761 1001000ddddd010+ lpm r,z
7762 1001010111011000 elpm ?
7763 1001000ddddd011+ elpm r,z
7764 0000000000000000 nop
7765 1001010100001000 ret
7766 1001010100011000 reti
7767 1001010110001000 sleep
7768 1001010110011000 break
7769 1001010110101000 wdr
7770 1001010111101000 spm
7771 000111rdddddrrrr adc r,r
7772 000011rdddddrrrr add r,r
7773 001000rdddddrrrr and r,r
7774 000101rdddddrrrr cp r,r
7775 000001rdddddrrrr cpc r,r
7776 000100rdddddrrrr cpse r,r
7777 001001rdddddrrrr eor r,r
7778 001011rdddddrrrr mov r,r
7779 100111rdddddrrrr mul r,r
7780 001010rdddddrrrr or r,r
7781 000010rdddddrrrr sbc r,r
7782 000110rdddddrrrr sub r,r
7783 001001rdddddrrrr clr r
7784 000011rdddddrrrr lsl r
7785 000111rdddddrrrr rol r
7786 001000rdddddrrrr tst r
7787 0111KKKKddddKKKK andi d,M
7788 0111KKKKddddKKKK cbr d,n
7789 1110KKKKddddKKKK ldi d,M
7790 11101111dddd1111 ser d
7791 0110KKKKddddKKKK ori d,M
7792 0110KKKKddddKKKK sbr d,M
7793 0011KKKKddddKKKK cpi d,M
7794 0100KKKKddddKKKK sbci d,M
7795 0101KKKKddddKKKK subi d,M
7796 1111110rrrrr0sss sbrc r,s
7797 1111111rrrrr0sss sbrs r,s
7798 1111100ddddd0sss bld r,s
7799 1111101ddddd0sss bst r,s
7800 10110PPdddddPPPP in r,P
7801 10111PPrrrrrPPPP out P,r
7802 10010110KKddKKKK adiw w,K
7803 10010111KKddKKKK sbiw w,K
7804 10011000pppppsss cbi p,s
7805 10011010pppppsss sbi p,s
7806 10011001pppppsss sbic p,s
7807 10011011pppppsss sbis p,s
7808 111101lllllll000 brcc l
7809 111100lllllll000 brcs l
7810 111100lllllll001 breq l
7811 111101lllllll100 brge l
7812 111101lllllll101 brhc l
7813 111100lllllll101 brhs l
7814 111101lllllll111 brid l
7815 111100lllllll111 brie l
7816 111100lllllll000 brlo l
7817 111100lllllll100 brlt l
7818 111100lllllll010 brmi l
7819 111101lllllll001 brne l
7820 111101lllllll010 brpl l
7821 111101lllllll000 brsh l
7822 111101lllllll110 brtc l
7823 111100lllllll110 brts l
7824 111101lllllll011 brvc l
7825 111100lllllll011 brvs l
7826 111101lllllllsss brbc s,l
7827 111100lllllllsss brbs s,l
7828 1101LLLLLLLLLLLL rcall L
7829 1100LLLLLLLLLLLL rjmp L
7830 1001010hhhhh111h call h
7831 1001010hhhhh110h jmp h
7832 1001010rrrrr0101 asr r
7833 1001010rrrrr0000 com r
7834 1001010rrrrr1010 dec r
7835 1001010rrrrr0011 inc r
7836 1001010rrrrr0110 lsr r
7837 1001010rrrrr0001 neg r
7838 1001000rrrrr1111 pop r
7839 1001001rrrrr1111 push r
7840 1001010rrrrr0111 ror r
7841 1001010rrrrr0010 swap r
7842 00000001ddddrrrr movw v,v
7843 00000010ddddrrrr muls d,d
7844 000000110ddd0rrr mulsu a,a
7845 000000110ddd1rrr fmul a,a
7846 000000111ddd0rrr fmuls a,a
7847 000000111ddd1rrr fmulsu a,a
7848 1001001ddddd0000 sts i,r
7849 1001000ddddd0000 lds r,i
7850 10o0oo0dddddbooo ldd r,b
7851 100!000dddddee-+ ld r,e
7852 10o0oo1rrrrrbooo std b,r
7853 100!001rrrrree-+ st e,r
7854 1001010100011001 eicall
7855 1001010000011001 eijmp
7858 File: as.info, Node: Blackfin-Dependent, Next: CR16-Dependent, Prev: AVR-Dependent, Up: Machine Dependencies
7860 9.6 Blackfin Dependent Features
7861 ===============================
7865 * Blackfin Options:: Blackfin Options
7866 * Blackfin Syntax:: Blackfin Syntax
7867 * Blackfin Directives:: Blackfin Directives
7870 File: as.info, Node: Blackfin Options, Next: Blackfin Syntax, Up: Blackfin-Dependent
7875 `-mcpu=PROCESSOR[-SIREVISION]'
7876 This option specifies the target processor. The optional
7877 SIREVISION is not used in assembler. It's here such that GCC can
7878 easily pass down its `-mcpu=' option. The assembler will issue an
7879 error message if an attempt is made to assemble an instruction
7880 which will not execute on the target processor. The following
7881 processor names are recognized: `bf504', `bf506', `bf512', `bf514',
7882 `bf516', `bf518', `bf522', `bf523', `bf524', `bf525', `bf526',
7883 `bf527', `bf531', `bf532', `bf533', `bf534', `bf535' (not
7884 implemented yet), `bf536', `bf537', `bf538', `bf539', `bf542',
7885 `bf542m', `bf544', `bf544m', `bf547', `bf547m', `bf548', `bf548m',
7886 `bf549', `bf549m', `bf561', and `bf592'.
7889 Assemble for the FDPIC ABI.
7896 File: as.info, Node: Blackfin Syntax, Next: Blackfin Directives, Prev: Blackfin Options, Up: Blackfin-Dependent
7901 `Special Characters'
7902 Assembler input is free format and may appear anywhere on the line.
7903 One instruction may extend across multiple lines or more than one
7904 instruction may appear on the same line. White space (space, tab,
7905 comments or newline) may appear anywhere between tokens. A token
7906 must not have embedded spaces. Tokens include numbers, register
7907 names, keywords, user identifiers, and also some multicharacter
7908 special symbols like "+=", "/*" or "||".
7910 Comments are introduced by the `#' character and extend to the end
7911 of the current line. If the `#' appears as the first character of
7912 a line, the whole line is treated as a comment, but in this case
7913 the line can also be a logical line number directive (*note
7914 Comments::) or a preprocessor control command (*note
7917 `Instruction Delimiting'
7918 A semicolon must terminate every instruction. Sometimes a complete
7919 instruction will consist of more than one operation. There are two
7920 cases where this occurs. The first is when two general operations
7921 are combined. Normally a comma separates the different parts, as
7924 a0= r3.h * r2.l, a1 = r3.l * r2.h ;
7926 The second case occurs when a general instruction is combined with
7927 one or two memory references for joint issue. The latter portions
7928 are set off by a "||" token.
7930 a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++];
7932 Multiple instructions can occur on the same line. Each must be
7933 terminated by a semicolon character.
7936 The assembler treats register names and instruction keywords in a
7937 case insensitive manner. User identifiers are case sensitive.
7938 Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the
7941 Register names are reserved and may not be used as program
7944 Some operations (such as "Move Register") require a register pair.
7945 Register pairs are always data registers and are denoted using a
7946 colon, eg., R3:2. The larger number must be written firsts. Note
7947 that the hardware only supports odd-even pairs, eg., R7:6, R5:4,
7950 Some instructions (such as -SP (Push Multiple)) require a group of
7951 adjacent registers. Adjacent registers are denoted in the syntax
7952 by the range enclosed in parentheses and separated by a colon,
7953 eg., (R7:3). Again, the larger number appears first.
7955 Portions of a particular register may be individually specified.
7956 This is written with a dot (".") following the register name and
7957 then a letter denoting the desired portion. For 32-bit registers,
7958 ".H" denotes the most significant ("High") portion. ".L" denotes
7959 the least-significant portion. The subdivisions of the 40-bit
7960 registers are described later.
7963 The set of 40-bit registers A1 and A0 that normally contain data
7964 that is being manipulated. Each accumulator can be accessed in
7967 `one 40-bit register'
7968 The register will be referred to as A1 or A0.
7970 `one 32-bit register'
7971 The registers are designated as A1.W or A0.W.
7973 `two 16-bit registers'
7974 The registers are designated as A1.H, A1.L, A0.H or A0.L.
7976 `one 8-bit register'
7977 The registers are designated as A1.X or A0.X for the bits that
7978 extend beyond bit 31.
7981 The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7)
7982 that normally contain data for manipulation. These are
7983 abbreviated as D-register or Dreg. Data registers can be accessed
7984 as 32-bit registers or as two independent 16-bit registers. The
7985 least significant 16 bits of each register is called the "low"
7986 half and is designated with ".L" following the register name. The
7987 most significant 16 bits are called the "high" half and is
7988 designated with ".H" following the name.
7990 R7.L, r2.h, r4.L, R0.H
7993 The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP)
7994 that normally contain byte addresses of data structures. These are
7995 abbreviated as P-register or Preg.
8000 The stack pointer contains the 32-bit address of the last occupied
8001 byte location in the stack. The stack grows by decrementing the
8005 The frame pointer contains the 32-bit address of the previous frame
8006 pointer in the stack. It is located at the top of a frame.
8009 LT0 and LT1. These registers contain the 32-bit address of the
8010 top of a zero overhead loop.
8013 LC0 and LC1. These registers contain the 32-bit counter of the
8014 zero overhead loop executions.
8017 LB0 and LB1. These registers contain the 32-bit address of the
8018 bottom of a zero overhead loop.
8021 The set of 32-bit registers (I0, I1, I2, I3) that normally contain
8022 byte addresses of data structures. Abbreviated I-register or Ireg.
8025 The set of 32-bit registers (M0, M1, M2, M3) that normally contain
8026 offset values that are added and subtracted to one of the index
8027 registers. Abbreviated as Mreg.
8030 The set of 32-bit registers (L0, L1, L2, L3) that normally contain
8031 the length in bytes of the circular buffer. Abbreviated as Lreg.
8032 Clear the Lreg to disable circular addressing for the
8036 The set of 32-bit registers (B0, B1, B2, B3) that normally contain
8037 the base address in bytes of the circular buffer. Abbreviated as
8041 The Blackfin family has no hardware floating point but the .float
8042 directive generates ieee floating point numbers for use with
8043 software floating point libraries.
8046 For detailed information on the Blackfin machine instruction set,
8047 see the Blackfin(r) Processor Instruction Set Reference.
8051 File: as.info, Node: Blackfin Directives, Prev: Blackfin Syntax, Up: Blackfin-Dependent
8056 The following directives are provided for compatibility with the VDSP
8060 Initializes a two byte data object.
8062 This maps to the `.short' directive.
8065 Initializes a four byte data object.
8067 This maps to the `.int' directive.
8070 Initializes a single byte data object.
8072 This directive is a synonym for `.byte'.
8075 Initializes a two byte data object.
8077 This directive is a synonym for `.byte2'.
8080 Initializes a four byte data object.
8082 This directive is a synonym for `.byte4'.
8085 Define and initialize a 32 bit data object.
8088 File: as.info, Node: CR16-Dependent, Next: CRIS-Dependent, Prev: Blackfin-Dependent, Up: Machine Dependencies
8090 9.7 CR16 Dependent Features
8091 ===========================
8095 * CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers
8096 * CR16 Syntax:: Syntax for the CR16
8099 File: as.info, Node: CR16 Operand Qualifiers, Next: CR16 Syntax, Up: CR16-Dependent
8101 9.7.1 CR16 Operand Qualifiers
8102 -----------------------------
8104 The National Semiconductor CR16 target of `as' has a few machine
8105 dependent operand qualifiers.
8107 Operand expression type qualifier is an optional field in the
8108 instruction operand, to determines the type of the expression field of
8109 an operand. The `@' is required. CR16 architecture uses one of the
8110 following expression qualifiers:
8113 - `Specifies expression operand type as small'
8116 - `Specifies expression operand type as medium'
8119 - `Specifies expression operand type as large'
8122 - `Specifies the CR16 Assembler generates a relocation entry for
8123 the operand, where pc has implied bit, the expression is adjusted
8124 accordingly. The linker uses the relocation entry to update the
8125 operand address at link time.'
8128 - `Specifies the CR16 Assembler generates a relocation entry for
8129 the operand, offset from Global Offset Table. The linker uses this
8130 relocation entry to update the operand address at link time'
8133 - `Specifies the CompactRISC Assembler generates a relocation
8134 entry for the operand, where pc has implied bit, the expression is
8135 adjusted accordingly. The linker uses the relocation entry to
8136 update the operand address at link time.'
8138 CR16 target operand qualifiers and its size (in bits):
8144 - m --- 16 bits, for movb and movw instructions.
8147 - m --- 20 bits, movd instructions.
8153 - s --- Illegal specifier for this operand.
8156 - m --- 20 bits, movd instructions.
8158 `Displacement Operand'
8168 1 `movw $_myfun@c,r1'
8170 This loads the address of _myfun, shifted right by 1, into r1.
8172 2 `movd $_myfun@c,(r2,r1)'
8174 This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
8178 `loadd _myfun_ptr, (r1,r0)'
8181 This .long directive, the address of _myfunc, shifted right by 1 at link time.
8183 4 `loadd _data1@GOT(r12), (r1,r0)'
8185 This loads the address of _data1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r2-r1.
8187 5 `loadd _myfunc@cGOT(r12), (r1,r0)'
8189 This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0.
8192 File: as.info, Node: CR16 Syntax, Prev: CR16 Operand Qualifiers, Up: CR16-Dependent
8199 * CR16-Chars:: Special Characters
8202 File: as.info, Node: CR16-Chars, Up: CR16 Syntax
8204 9.7.2.1 Special Characters
8205 ..........................
8207 The presence of a `#' on a line indicates the start of a comment that
8208 extends to the end of the current line. If the `#' appears as the
8209 first character of a line, the whole line is treated as a comment, but
8210 in this case the line can also be a logical line number directive
8211 (*note Comments::) or a preprocessor control command (*note
8214 The `;' character can be used to separate statements on the same
8218 File: as.info, Node: CRIS-Dependent, Next: D10V-Dependent, Prev: CR16-Dependent, Up: Machine Dependencies
8220 9.8 CRIS Dependent Features
8221 ===========================
8225 * CRIS-Opts:: Command-line Options
8226 * CRIS-Expand:: Instruction expansion
8227 * CRIS-Symbols:: Symbols
8228 * CRIS-Syntax:: Syntax
8231 File: as.info, Node: CRIS-Opts, Next: CRIS-Expand, Up: CRIS-Dependent
8233 9.8.1 Command-line Options
8234 --------------------------
8236 The CRIS version of `as' has these machine-dependent command-line
8239 The format of the generated object files can be either ELF or a.out,
8240 specified by the command-line options `--emulation=crisaout' and
8241 `--emulation=criself'. The default is ELF (criself), unless `as' has
8242 been configured specifically for a.out by using the configuration name
8245 There are two different link-incompatible ELF object file variants
8246 for CRIS, for use in environments where symbols are expected to be
8247 prefixed by a leading `_' character and for environments without such a
8248 symbol prefix. The variant used for GNU/Linux port has no symbol
8249 prefix. Which variant to produce is specified by either of the options
8250 `--underscore' and `--no-underscore'. The default is `--underscore'.
8251 Since symbols in CRIS a.out objects are expected to have a `_' prefix,
8252 specifying `--no-underscore' when generating a.out objects is an error.
8253 Besides the object format difference, the effect of this option is to
8254 parse register names differently (*note crisnous::). The
8255 `--no-underscore' option makes a `$' register prefix mandatory.
8257 The option `--pic' must be passed to `as' in order to recognize the
8258 symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note
8259 crispic::). This will also affect expansion of instructions. The
8260 expansion with `--pic' will use PC-relative rather than (slightly
8261 faster) absolute addresses in those expansions. This option is only
8262 valid when generating ELF format object files.
8264 The option `--march=ARCHITECTURE' specifies the recognized
8265 instruction set and recognized register names. It also controls the
8266 architecture type of the object file. Valid values for ARCHITECTURE
8269 All instructions and register names for any architecture variant
8270 in the set v0...v10 are recognized. This is the default if the
8271 target is configured as cris-*.
8274 Only instructions and register names for CRIS v10 (as found in
8275 ETRAX 100 LX) are recognized. This is the default if the target
8276 is configured as crisv10-*.
8279 Only instructions and register names for CRIS v32 (code name
8280 Guinness) are recognized. This is the default if the target is
8281 configured as crisv32-*. This value implies `--no-mul-bug-abort'.
8282 (A subsequent `--mul-bug-abort' will turn it back on.)
8285 Only instructions with register names and addressing modes with
8286 opcodes common to the v10 and v32 are recognized.
8288 When `-N' is specified, `as' will emit a warning when a 16-bit
8289 branch instruction is expanded into a 32-bit multiple-instruction
8290 construct (*note CRIS-Expand::).
8292 Some versions of the CRIS v10, for example in the Etrax 100 LX,
8293 contain a bug that causes destabilizing memory accesses when a multiply
8294 instruction is executed with certain values in the first operand just
8295 before a cache-miss. When the `--mul-bug-abort' command line option is
8296 active (the default value), `as' will refuse to assemble a file
8297 containing a multiply instruction at a dangerous offset, one that could
8298 be the last on a cache-line, or is in a section with insufficient
8299 alignment. This placement checking does not catch any case where the
8300 multiply instruction is dangerously placed because it is located in a
8301 delay-slot. The `--mul-bug-abort' command line option turns off the
8305 File: as.info, Node: CRIS-Expand, Next: CRIS-Symbols, Prev: CRIS-Opts, Up: CRIS-Dependent
8307 9.8.2 Instruction expansion
8308 ---------------------------
8310 `as' will silently choose an instruction that fits the operand size for
8311 `[register+constant]' operands. For example, the offset `127' in
8312 `move.d [r3+127],r4' fits in an instruction using a signed-byte offset.
8313 Similarly, `move.d [r2+32767],r1' will generate an instruction using a
8314 16-bit offset. For symbolic expressions and constants that do not fit
8315 in 16 bits including the sign bit, a 32-bit offset is generated.
8317 For branches, `as' will expand from a 16-bit branch instruction into
8318 a sequence of instructions that can reach a full 32-bit address. Since
8319 this does not correspond to a single instruction, such expansions can
8320 optionally be warned about. *Note CRIS-Opts::.
8322 If the operand is found to fit the range, a `lapc' mnemonic will
8323 translate to a `lapcq' instruction. Use `lapc.d' to force the 32-bit
8326 Similarly, the `addo' mnemonic will translate to the shortest
8327 fitting instruction of `addoq', `addo.w' and `addo.d', when used with a
8328 operand that is a constant known at assembly time.
8331 File: as.info, Node: CRIS-Symbols, Next: CRIS-Syntax, Prev: CRIS-Expand, Up: CRIS-Dependent
8336 Some symbols are defined by the assembler. They're intended to be used
8337 in conditional assembly, for example:
8338 .if ..asm.arch.cris.v32
8340 .elseif ..asm.arch.cris.common_v10_v32
8341 CODE COMMON TO CRIS V32 AND CRIS V10
8342 .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
8345 .error "Code needs to be added here."
8348 These symbols are defined in the assembler, reflecting command-line
8349 options, either when specified or the default. They are always
8351 `..asm.arch.cris.any_v0_v10'
8352 This symbol is non-zero when `--march=v0_v10' is specified or the
8355 `..asm.arch.cris.common_v10_v32'
8356 Set according to the option `--march=common_v10_v32'.
8358 `..asm.arch.cris.v10'
8359 Reflects the option `--march=v10'.
8361 `..asm.arch.cris.v32'
8362 Corresponds to `--march=v10'.
8364 Speaking of symbols, when a symbol is used in code, it can have a
8365 suffix modifying its value for use in position-independent code. *Note
8369 File: as.info, Node: CRIS-Syntax, Prev: CRIS-Symbols, Up: CRIS-Dependent
8374 There are different aspects of the CRIS assembly syntax.
8378 * CRIS-Chars:: Special Characters
8379 * CRIS-Pic:: Position-Independent Code Symbols
8380 * CRIS-Regs:: Register Names
8381 * CRIS-Pseudos:: Assembler Directives
8384 File: as.info, Node: CRIS-Chars, Next: CRIS-Pic, Up: CRIS-Syntax
8386 9.8.4.1 Special Characters
8387 ..........................
8389 The character `#' is a line comment character. It starts a comment if
8390 and only if it is placed at the beginning of a line.
8392 A `;' character starts a comment anywhere on the line, causing all
8393 characters up to the end of the line to be ignored.
8395 A `@' character is handled as a line separator equivalent to a
8396 logical new-line character (except in a comment), so separate
8397 instructions can be specified on a single line.
8400 File: as.info, Node: CRIS-Pic, Next: CRIS-Regs, Prev: CRIS-Chars, Up: CRIS-Syntax
8402 9.8.4.2 Symbols in position-independent code
8403 ............................................
8405 When generating position-independent code (SVR4 PIC) for use in
8406 cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol
8407 suffixes are used to specify what kind of run-time symbol lookup will
8408 be used, expressed in the object as different _relocation types_.
8409 Usually, all absolute symbol values must be located in a table, the
8410 _global offset table_, leaving the code position-independent;
8411 independent of values of global symbols and independent of the address
8412 of the code. The suffix modifies the value of the symbol, into for
8413 example an index into the global offset table where the real symbol
8414 value is entered, or a PC-relative value, or a value relative to the
8415 start of the global offset table. All symbol suffixes start with the
8416 character `:' (omitted in the list below). Every symbol use in code or
8417 a read-only section must therefore have a PIC suffix to enable a useful
8418 shared library to be created. Usually, these constructs must not be
8419 used with an additive constant offset as is usually allowed, i.e. no 4
8420 as in `symbol + 4' is allowed. This restriction is checked at
8421 link-time, not at assembly-time.
8424 Attaching this suffix to a symbol in an instruction causes the
8425 symbol to be entered into the global offset table. The value is a
8426 32-bit index for that symbol into the global offset table. The
8427 name of the corresponding relocation is `R_CRIS_32_GOT'. Example:
8428 `move.d [$r0+extsym:GOT],$r9'
8431 Same as for `GOT', but the value is a 16-bit index into the global
8432 offset table. The corresponding relocation is `R_CRIS_16_GOT'.
8433 Example: `move.d [$r0+asymbol:GOT16],$r10'
8436 This suffix is used for function symbols. It causes a _procedure
8437 linkage table_, an array of code stubs, to be created at the time
8438 the shared object is created or linked against, together with a
8439 global offset table entry. The value is a pc-relative offset to
8440 the corresponding stub code in the procedure linkage table. This
8441 arrangement causes the run-time symbol resolver to be called to
8442 look up and set the value of the symbol the first time the
8443 function is called (at latest; depending environment variables).
8444 It is only safe to leave the symbol unresolved this way if all
8445 references are function calls. The name of the relocation is
8446 `R_CRIS_32_PLT_PCREL'. Example: `add.d fnname:PLT,$pc'
8449 Like PLT, but the value is relative to the beginning of the global
8450 offset table. The relocation is `R_CRIS_32_PLT_GOTREL'. Example:
8451 `move.d fnname:PLTG,$r3'
8454 Similar to `PLT', but the value of the symbol is a 32-bit index
8455 into the global offset table. This is somewhat of a mix between
8456 the effect of the `GOT' and the `PLT' suffix; the difference to
8457 `GOT' is that there will be a procedure linkage table entry
8458 created, and that the symbol is assumed to be a function entry and
8459 will be resolved by the run-time resolver as with `PLT'. The
8460 relocation is `R_CRIS_32_GOTPLT'. Example: `jsr
8461 [$r0+fnname:GOTPLT]'
8464 A variant of `GOTPLT' giving a 16-bit value. Its relocation name
8465 is `R_CRIS_16_GOTPLT'. Example: `jsr [$r0+fnname:GOTPLT16]'
8468 This suffix must only be attached to a local symbol, but may be
8469 used in an expression adding an offset. The value is the address
8470 of the symbol relative to the start of the global offset table.
8471 The relocation name is `R_CRIS_32_GOTREL'. Example: `move.d
8472 [$r0+localsym:GOTOFF],r3'
8475 File: as.info, Node: CRIS-Regs, Next: CRIS-Pseudos, Prev: CRIS-Pic, Up: CRIS-Syntax
8477 9.8.4.3 Register names
8478 ......................
8480 A `$' character may always prefix a general or special register name in
8481 an instruction operand but is mandatory when the option
8482 `--no-underscore' is specified or when the `.syntax register_prefix'
8483 directive is in effect (*note crisnous::). Register names are
8487 File: as.info, Node: CRIS-Pseudos, Prev: CRIS-Regs, Up: CRIS-Syntax
8489 9.8.4.4 Assembler Directives
8490 ............................
8492 There are a few CRIS-specific pseudo-directives in addition to the
8493 generic ones. *Note Pseudo Ops::. Constants emitted by
8494 pseudo-directives are in little-endian order for CRIS. There is no
8495 support for floating-point-specific directives for CRIS.
8497 `.dword EXPRESSIONS'
8498 The `.dword' directive is a synonym for `.int', expecting zero or
8499 more EXPRESSIONS, separated by commas. For each expression, a
8500 32-bit little-endian constant is emitted.
8503 The `.syntax' directive takes as ARGUMENT one of the following
8504 case-sensitive choices.
8506 `no_register_prefix'
8507 The `.syntax no_register_prefix' directive makes a `$'
8508 character prefix on all registers optional. It overrides a
8509 previous setting, including the corresponding effect of the
8510 option `--no-underscore'. If this directive is used when
8511 ordinary symbols do not have a `_' character prefix, care
8512 must be taken to avoid ambiguities whether an operand is a
8513 register or a symbol; using symbols with names the same as
8514 general or special registers then invoke undefined behavior.
8517 This directive makes a `$' character prefix on all registers
8518 mandatory. It overrides a previous setting, including the
8519 corresponding effect of the option `--underscore'.
8521 `leading_underscore'
8522 This is an assertion directive, emitting an error if the
8523 `--no-underscore' option is in effect.
8525 `no_leading_underscore'
8526 This is the opposite of the `.syntax leading_underscore'
8527 directive and emits an error if the option `--underscore' is
8531 This is an assertion directive, giving an error if the specified
8532 ARGUMENT is not the same as the specified or default value for the
8533 `--march=ARCHITECTURE' option (*note march-option::).
8537 File: as.info, Node: D10V-Dependent, Next: D30V-Dependent, Prev: CRIS-Dependent, Up: Machine Dependencies
8539 9.9 D10V Dependent Features
8540 ===========================
8544 * D10V-Opts:: D10V Options
8545 * D10V-Syntax:: Syntax
8546 * D10V-Float:: Floating Point
8547 * D10V-Opcodes:: Opcodes
8550 File: as.info, Node: D10V-Opts, Next: D10V-Syntax, Up: D10V-Dependent
8555 The Mitsubishi D10V version of `as' has a few machine dependent options.
8558 The D10V can often execute two sub-instructions in parallel. When
8559 this option is used, `as' will attempt to optimize its output by
8560 detecting when instructions can be executed in parallel.
8563 To optimize execution performance, `as' will sometimes swap the
8564 order of instructions. Normally this generates a warning. When
8565 this option is used, no warning will be generated when
8566 instructions are swapped.
8569 `--no-gstabs-packing'
8570 `as' packs adjacent short instructions into a single packed
8571 instruction. `--no-gstabs-packing' turns instruction packing off if
8572 `--gstabs' is specified as well; `--gstabs-packing' (the default)
8573 turns instruction packing on even when `--gstabs' is specified.
8576 File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent
8581 The D10V syntax is based on the syntax in Mitsubishi's D10V
8582 architecture manual. The differences are detailed below.
8586 * D10V-Size:: Size Modifiers
8587 * D10V-Subs:: Sub-Instructions
8588 * D10V-Chars:: Special Characters
8589 * D10V-Regs:: Register Names
8590 * D10V-Addressing:: Addressing Modes
8591 * D10V-Word:: @WORD Modifier
8594 File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax
8596 9.9.2.1 Size Modifiers
8597 ......................
8599 The D10V version of `as' uses the instruction names in the D10V
8600 Architecture Manual. However, the names in the manual are sometimes
8601 ambiguous. There are instruction names that can assemble to a short or
8602 long form opcode. How does the assembler pick the correct form? `as'
8603 will always pick the smallest form if it can. When dealing with a
8604 symbol that is not defined yet when a line is being assembled, it will
8605 always use the long form. If you need to force the assembler to use
8606 either the short or long form of the instruction, you can append either
8607 `.s' (short) or `.l' (long) to it. For example, if you are writing an
8608 assembly program and you want to do a branch to a symbol that is
8609 defined later in your program, you can write `bra.s foo'. Objdump
8610 and GDB will always append `.s' or `.l' to instructions which have both
8611 short and long forms.
8614 File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax
8616 9.9.2.2 Sub-Instructions
8617 ........................
8619 The D10V assembler takes as input a series of instructions, either
8620 one-per-line, or in the special two-per-line format described in the
8621 next section. Some of these instructions will be short-form or
8622 sub-instructions. These sub-instructions can be packed into a single
8623 instruction. The assembler will do this automatically. It will also
8624 detect when it should not pack instructions. For example, when a label
8625 is defined, the next instruction will never be packaged with the
8626 previous one. Whenever a branch and link instruction is called, it
8627 will not be packaged with the next instruction so the return address
8628 will be valid. Nops are automatically inserted when necessary.
8630 If you do not want the assembler automatically making these
8631 decisions, you can control the packaging and execution type (parallel
8632 or sequential) with the special execution symbols described in the next
8636 File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax
8638 9.9.2.3 Special Characters
8639 ..........................
8641 A semicolon (`;') can be used anywhere on a line to start a comment
8642 that extends to the end of the line.
8644 If a `#' appears as the first character of a line, the whole line is
8645 treated as a comment, but in this case the line could also be a logical
8646 line number directive (*note Comments::) or a preprocessor control
8647 command (*note Preprocessing::).
8649 Sub-instructions may be executed in order, in reverse-order, or in
8650 parallel. Instructions listed in the standard one-per-line format will
8651 be executed sequentially. To specify the executing order, use the
8654 Sequential with instruction on the left first.
8657 Sequential with instruction on the right first.
8661 The D10V syntax allows either one instruction per line, one
8662 instruction per line with the execution symbol, or two instructions per
8665 Execute these sequentially. The instruction on the right is in
8666 the right container and is executed second.
8669 Execute these reverse-sequentially. The instruction on the right
8670 is in the right container, and is executed first.
8672 `ld2w r2,@r8+ || mac a0,r0,r7'
8673 Execute these in parallel.
8677 Two-line format. Execute these in parallel.
8681 Two-line format. Execute these sequentially. Assembler will put
8682 them in the proper containers.
8686 Two-line format. Execute these sequentially. Same as above but
8687 second instruction will always go into right container.
8688 Since `$' has no special meaning, you may use it in symbol names.
8691 File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax
8693 9.9.2.4 Register Names
8694 ......................
8696 You can use the predefined symbols `r0' through `r15' to refer to the
8697 D10V registers. You can also use `sp' as an alias for `r15'. The
8698 accumulators are `a0' and `a1'. There are special register-pair names
8699 that may optionally be used in opcodes that require even-numbered
8700 registers. Register names are not case sensitive.
8719 The D10V also has predefined symbols for these control registers and
8722 Processor Status Word
8725 Backup Processor Status Word
8731 Backup Program Counter
8737 Repeat Start address
8743 Modulo Start address
8749 Instruction Break Address
8761 File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax
8763 9.9.2.5 Addressing Modes
8764 ........................
8766 `as' understands the following addressing modes for the D10V. `RN' in
8767 the following refers to any of the numbered registers, but _not_ the
8776 Register indirect with post-increment
8779 Register indirect with post-decrement
8782 Register indirect with pre-decrement
8785 Register indirect with displacement
8788 PC relative address (for branch or rep).
8791 Immediate data (the `#' is optional and ignored)
8794 File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax
8796 9.9.2.6 @WORD Modifier
8797 ......................
8799 Any symbol followed by `@word' will be replaced by the symbol's value
8800 shifted right by 2. This is used in situations such as loading a
8801 register with the address of a function (or any other code fragment).
8802 For example, if you want to load a register with the location of the
8803 function `main' then jump to that function, you could do it as follows:
8808 File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent
8810 9.9.3 Floating Point
8811 --------------------
8813 The D10V has no hardware floating point, but the `.float' and `.double'
8814 directives generates IEEE floating-point numbers for compatibility with
8815 other development tools.
8818 File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent
8823 For detailed information on the D10V machine instruction set, see `D10V
8824 Architecture: A VLIW Microprocessor for Multimedia Applications'
8825 (Mitsubishi Electric Corp.). `as' implements all the standard D10V
8826 opcodes. The only changes are those described in the section on size
8830 File: as.info, Node: D30V-Dependent, Next: Epiphany-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies
8832 9.10 D30V Dependent Features
8833 ============================
8837 * D30V-Opts:: D30V Options
8838 * D30V-Syntax:: Syntax
8839 * D30V-Float:: Floating Point
8840 * D30V-Opcodes:: Opcodes
8843 File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent
8848 The Mitsubishi D30V version of `as' has a few machine dependent options.
8851 The D30V can often execute two sub-instructions in parallel. When
8852 this option is used, `as' will attempt to optimize its output by
8853 detecting when instructions can be executed in parallel.
8856 When this option is used, `as' will issue a warning every time it
8857 adds a nop instruction.
8860 When this option is used, `as' will issue a warning if it needs to
8861 insert a nop after a 32-bit multiply before a load or 16-bit
8862 multiply instruction.
8865 File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent
8870 The D30V syntax is based on the syntax in Mitsubishi's D30V
8871 architecture manual. The differences are detailed below.
8875 * D30V-Size:: Size Modifiers
8876 * D30V-Subs:: Sub-Instructions
8877 * D30V-Chars:: Special Characters
8878 * D30V-Guarded:: Guarded Execution
8879 * D30V-Regs:: Register Names
8880 * D30V-Addressing:: Addressing Modes
8883 File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax
8885 9.10.2.1 Size Modifiers
8886 .......................
8888 The D30V version of `as' uses the instruction names in the D30V
8889 Architecture Manual. However, the names in the manual are sometimes
8890 ambiguous. There are instruction names that can assemble to a short or
8891 long form opcode. How does the assembler pick the correct form? `as'
8892 will always pick the smallest form if it can. When dealing with a
8893 symbol that is not defined yet when a line is being assembled, it will
8894 always use the long form. If you need to force the assembler to use
8895 either the short or long form of the instruction, you can append either
8896 `.s' (short) or `.l' (long) to it. For example, if you are writing an
8897 assembly program and you want to do a branch to a symbol that is
8898 defined later in your program, you can write `bra.s foo'. Objdump and
8899 GDB will always append `.s' or `.l' to instructions which have both
8900 short and long forms.
8903 File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax
8905 9.10.2.2 Sub-Instructions
8906 .........................
8908 The D30V assembler takes as input a series of instructions, either
8909 one-per-line, or in the special two-per-line format described in the
8910 next section. Some of these instructions will be short-form or
8911 sub-instructions. These sub-instructions can be packed into a single
8912 instruction. The assembler will do this automatically. It will also
8913 detect when it should not pack instructions. For example, when a label
8914 is defined, the next instruction will never be packaged with the
8915 previous one. Whenever a branch and link instruction is called, it
8916 will not be packaged with the next instruction so the return address
8917 will be valid. Nops are automatically inserted when necessary.
8919 If you do not want the assembler automatically making these
8920 decisions, you can control the packaging and execution type (parallel
8921 or sequential) with the special execution symbols described in the next
8925 File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax
8927 9.10.2.3 Special Characters
8928 ...........................
8930 A semicolon (`;') can be used anywhere on a line to start a comment
8931 that extends to the end of the line.
8933 If a `#' appears as the first character of a line, the whole line is
8934 treated as a comment, but in this case the line could also be a logical
8935 line number directive (*note Comments::) or a preprocessor control
8936 command (*note Preprocessing::).
8938 Sub-instructions may be executed in order, in reverse-order, or in
8939 parallel. Instructions listed in the standard one-per-line format will
8940 be executed sequentially unless you use the `-O' option.
8942 To specify the executing order, use the following symbols:
8944 Sequential with instruction on the left first.
8947 Sequential with instruction on the right first.
8952 The D30V syntax allows either one instruction per line, one
8953 instruction per line with the execution symbol, or two instructions per
8955 `abs r2,r3 -> abs r4,r5'
8956 Execute these sequentially. The instruction on the right is in
8957 the right container and is executed second.
8959 `abs r2,r3 <- abs r4,r5'
8960 Execute these reverse-sequentially. The instruction on the right
8961 is in the right container, and is executed first.
8963 `abs r2,r3 || abs r4,r5'
8964 Execute these in parallel.
8966 `ldw r2,@(r3,r4) ||'
8968 Two-line format. Execute these in parallel.
8972 Two-line format. Execute these sequentially unless `-O' option is
8973 used. If the `-O' option is used, the assembler will determine if
8974 the instructions could be done in parallel (the above two
8975 instructions can be done in parallel), and if so, emit them as
8976 parallel instructions. The assembler will put them in the proper
8977 containers. In the above example, the assembler will put the
8978 `stw' instruction in left container and the `mulx' instruction in
8979 the right container.
8981 `stw r2,@(r3,r4) ->'
8983 Two-line format. Execute the `stw' instruction followed by the
8984 `mulx' instruction sequentially. The first instruction goes in the
8985 left container and the second instruction goes into right
8986 container. The assembler will give an error if the machine
8987 ordering constraints are violated.
8989 `stw r2,@(r3,r4) <-'
8991 Same as previous example, except that the `mulx' instruction is
8992 executed before the `stw' instruction.
8994 Since `$' has no special meaning, you may use it in symbol names.
8997 File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax
8999 9.10.2.4 Guarded Execution
9000 ..........................
9002 `as' supports the full range of guarded execution directives for each
9003 instruction. Just append the directive after the instruction proper.
9007 Execute the instruction if flag f0 is true.
9010 Execute the instruction if flag f0 is false.
9013 Execute the instruction if flag f1 is true.
9016 Execute the instruction if flag f1 is false.
9019 Execute the instruction if both flags f0 and f1 are true.
9022 Execute the instruction if flag f0 is true and flag f1 is false.
9025 File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax
9027 9.10.2.5 Register Names
9028 .......................
9030 You can use the predefined symbols `r0' through `r63' to refer to the
9031 D30V registers. You can also use `sp' as an alias for `r63' and `link'
9032 as an alias for `r62'. The accumulators are `a0' and `a1'.
9034 The D30V also has predefined symbols for these control registers and
9037 Processor Status Word
9040 Backup Processor Status Word
9046 Backup Program Counter
9052 Repeat Start address
9058 Modulo Start address
9064 Instruction Break Address
9091 Same as flag 4 (saturation flag)
9094 Same as flag 5 (overflow flag)
9097 Same as flag 6 (sticky overflow flag)
9100 Same as flag 7 (carry/borrow flag)
9103 Same as flag 7 (carry/borrow flag)
9106 File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax
9108 9.10.2.6 Addressing Modes
9109 .........................
9111 `as' understands the following addressing modes for the D30V. `RN' in
9112 the following refers to any of the numbered registers, but _not_ the
9121 Register indirect with post-increment
9124 Register indirect with post-decrement
9127 Register indirect with pre-decrement
9130 Register indirect with displacement
9133 PC relative address (for branch or rep).
9136 Immediate data (the `#' is optional and ignored)
9139 File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent
9141 9.10.3 Floating Point
9142 ---------------------
9144 The D30V has no hardware floating point, but the `.float' and `.double'
9145 directives generates IEEE floating-point numbers for compatibility with
9146 other development tools.
9149 File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent
9154 For detailed information on the D30V machine instruction set, see `D30V
9155 Architecture: A VLIW Microprocessor for Multimedia Applications'
9156 (Mitsubishi Electric Corp.). `as' implements all the standard D30V
9157 opcodes. The only changes are those described in the section on size
9161 File: as.info, Node: Epiphany-Dependent, Next: H8/300-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies
9163 9.11 Epiphany Dependent Features
9164 ================================
9168 * Epiphany Options:: Options
9169 * Epiphany Syntax:: Epiphany Syntax
9172 File: as.info, Node: Epiphany Options, Next: Epiphany Syntax, Up: Epiphany-Dependent
9177 `as' has two additional command-line options for the Epiphany
9181 Specifies that the both 32 and 16 bit instructions are allowed.
9182 This is the default behavior.
9185 Restricts the permitted instructions to just the 16 bit set.
9188 File: as.info, Node: Epiphany Syntax, Prev: Epiphany Options, Up: Epiphany-Dependent
9190 9.11.2 Epiphany Syntax
9191 ----------------------
9195 * Epiphany-Chars:: Special Characters
9198 File: as.info, Node: Epiphany-Chars, Up: Epiphany Syntax
9200 9.11.2.1 Special Characters
9201 ...........................
9203 The presence of a `;' on a line indicates the start of a comment that
9204 extends to the end of the current line.
9206 If a `#' appears as the first character of a line then the whole
9207 line is treated as a comment, but in this case the line could also be a
9208 logical line number directive (*note Comments::) or a preprocessor
9209 control command (*note Preprocessing::).
9211 The ``' character can be used to separate statements on the same
9215 File: as.info, Node: H8/300-Dependent, Next: HPPA-Dependent, Prev: Epiphany-Dependent, Up: Machine Dependencies
9217 9.12 H8/300 Dependent Features
9218 ==============================
9222 * H8/300 Options:: Options
9223 * H8/300 Syntax:: Syntax
9224 * H8/300 Floating Point:: Floating Point
9225 * H8/300 Directives:: H8/300 Machine Directives
9226 * H8/300 Opcodes:: Opcodes
9229 File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent
9234 The Renesas H8/300 version of `as' has one machine-dependent option:
9237 Support H'00 style hex constants in addition to 0x00 style.
9241 File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent
9248 * H8/300-Chars:: Special Characters
9249 * H8/300-Regs:: Register Names
9250 * H8/300-Addressing:: Addressing Modes
9253 File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax
9255 9.12.2.1 Special Characters
9256 ...........................
9258 `;' is the line comment character.
9260 `$' can be used instead of a newline to separate statements.
9261 Therefore _you may not use `$' in symbol names_ on the H8/300.
9264 File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax
9266 9.12.2.2 Register Names
9267 .......................
9269 You can use predefined symbols of the form `rNh' and `rNl' to refer to
9270 the H8/300 registers as sixteen 8-bit general-purpose registers. N is
9271 a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid
9274 You can also use the eight predefined symbols `rN' to refer to the
9275 H8/300 registers as 16-bit registers (you must use this form for
9278 On the H8/300H, you can also use the eight predefined symbols `erN'
9279 (`er0' ... `er7') to refer to the 32-bit general purpose registers.
9281 The two control registers are called `pc' (program counter; a 16-bit
9282 register, except on the H8/300H where it is 24 bits) and `ccr'
9283 (condition code register; an 8-bit register). `r7' is used as the
9284 stack pointer, and can also be called `sp'.
9287 File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax
9289 9.12.2.3 Addressing Modes
9290 .........................
9292 as understands the following addressing modes for the H8/300:
9302 Register indirect: 16-bit or 24-bit displacement D from register
9303 N. (24-bit displacements are only meaningful on the H8/300H.)
9306 Register indirect with post-increment
9309 Register indirect with pre-decrement
9315 Absolute address `aa'. (The address size `:24' only makes sense
9322 Immediate data XX. You may specify the `:8', `:16', or `:32' for
9323 clarity, if you wish; but `as' neither requires this nor uses
9324 it--the data size required is taken from context.
9328 Memory indirect. You may specify the `:8' for clarity, if you
9329 wish; but `as' neither requires this nor uses it.
9332 File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent
9334 9.12.3 Floating Point
9335 ---------------------
9337 The H8/300 family has no hardware floating point, but the `.float'
9338 directive generates IEEE floating-point numbers for compatibility with
9339 other development tools.
9342 File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent
9344 9.12.4 H8/300 Machine Directives
9345 --------------------------------
9347 `as' has the following machine-dependent directives for the H8/300:
9350 Recognize and emit additional instructions for the H8/300H
9351 variant, and also make `.int' emit 32-bit numbers rather than the
9352 usual (16-bit) for the H8/300 family.
9355 Recognize and emit additional instructions for the H8S variant, and
9356 also make `.int' emit 32-bit numbers rather than the usual (16-bit)
9357 for the H8/300 family.
9360 Recognize and emit additional instructions for the H8/300H variant
9361 in normal mode, and also make `.int' emit 32-bit numbers rather
9362 than the usual (16-bit) for the H8/300 family.
9365 Recognize and emit additional instructions for the H8S variant in
9366 normal mode, and also make `.int' emit 32-bit numbers rather than
9367 the usual (16-bit) for the H8/300 family.
9369 On the H8/300 family (including the H8/300H) `.word' directives
9370 generate 16-bit numbers.
9373 File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent
9378 For detailed information on the H8/300 machine instruction set, see
9379 `H8/300 Series Programming Manual'. For information specific to the
9380 H8/300H, see `H8/300H Series Programming Manual' (Renesas).
9382 `as' implements all the standard H8/300 opcodes. No additional
9383 pseudo-instructions are needed on this family.
9385 The following table summarizes the H8/300 opcodes, and their
9386 arguments. Entries marked `*' are opcodes used only on the H8/300H.
9390 Rd destination register
9391 abs absolute address
9393 disp:N N-bit displacement from a register
9394 pcrel:N N-bit displacement relative to program counter
9396 add.b #imm,rd * andc #imm,ccr
9397 add.b rs,rd band #imm,rd
9398 add.w rs,rd band #imm,@rd
9399 * add.w #imm,rd band #imm,@abs:8
9400 * add.l rs,rd bra pcrel:8
9401 * add.l #imm,rd * bra pcrel:16
9402 adds #imm,rd bt pcrel:8
9403 addx #imm,rd * bt pcrel:16
9404 addx rs,rd brn pcrel:8
9405 and.b #imm,rd * brn pcrel:16
9406 and.b rs,rd bf pcrel:8
9407 * and.w rs,rd * bf pcrel:16
9408 * and.w #imm,rd bhi pcrel:8
9409 * and.l #imm,rd * bhi pcrel:16
9410 * and.l rs,rd bls pcrel:8
9412 * bls pcrel:16 bld #imm,rd
9413 bcc pcrel:8 bld #imm,@rd
9414 * bcc pcrel:16 bld #imm,@abs:8
9415 bhs pcrel:8 bnot #imm,rd
9416 * bhs pcrel:16 bnot #imm,@rd
9417 bcs pcrel:8 bnot #imm,@abs:8
9418 * bcs pcrel:16 bnot rs,rd
9419 blo pcrel:8 bnot rs,@rd
9420 * blo pcrel:16 bnot rs,@abs:8
9421 bne pcrel:8 bor #imm,rd
9422 * bne pcrel:16 bor #imm,@rd
9423 beq pcrel:8 bor #imm,@abs:8
9424 * beq pcrel:16 bset #imm,rd
9425 bvc pcrel:8 bset #imm,@rd
9426 * bvc pcrel:16 bset #imm,@abs:8
9427 bvs pcrel:8 bset rs,rd
9428 * bvs pcrel:16 bset rs,@rd
9429 bpl pcrel:8 bset rs,@abs:8
9430 * bpl pcrel:16 bsr pcrel:8
9431 bmi pcrel:8 bsr pcrel:16
9432 * bmi pcrel:16 bst #imm,rd
9433 bge pcrel:8 bst #imm,@rd
9434 * bge pcrel:16 bst #imm,@abs:8
9435 blt pcrel:8 btst #imm,rd
9436 * blt pcrel:16 btst #imm,@rd
9437 bgt pcrel:8 btst #imm,@abs:8
9438 * bgt pcrel:16 btst rs,rd
9439 ble pcrel:8 btst rs,@rd
9440 * ble pcrel:16 btst rs,@abs:8
9441 bclr #imm,rd bxor #imm,rd
9442 bclr #imm,@rd bxor #imm,@rd
9443 bclr #imm,@abs:8 bxor #imm,@abs:8
9444 bclr rs,rd cmp.b #imm,rd
9445 bclr rs,@rd cmp.b rs,rd
9446 bclr rs,@abs:8 cmp.w rs,rd
9447 biand #imm,rd cmp.w rs,rd
9448 biand #imm,@rd * cmp.w #imm,rd
9449 biand #imm,@abs:8 * cmp.l #imm,rd
9450 bild #imm,rd * cmp.l rs,rd
9451 bild #imm,@rd daa rs
9452 bild #imm,@abs:8 das rs
9453 bior #imm,rd dec.b rs
9454 bior #imm,@rd * dec.w #imm,rd
9455 bior #imm,@abs:8 * dec.l #imm,rd
9456 bist #imm,rd divxu.b rs,rd
9457 bist #imm,@rd * divxu.w rs,rd
9458 bist #imm,@abs:8 * divxs.b rs,rd
9459 bixor #imm,rd * divxs.w rs,rd
9460 bixor #imm,@rd eepmov
9461 bixor #imm,@abs:8 * eepmovw
9463 * exts.w rd mov.w rs,@abs:16
9464 * exts.l rd * mov.l #imm,rd
9465 * extu.w rd * mov.l rs,rd
9466 * extu.l rd * mov.l @rs,rd
9467 inc rs * mov.l @(disp:16,rs),rd
9468 * inc.w #imm,rd * mov.l @(disp:24,rs),rd
9469 * inc.l #imm,rd * mov.l @rs+,rd
9470 jmp @rs * mov.l @abs:16,rd
9471 jmp abs * mov.l @abs:24,rd
9472 jmp @@abs:8 * mov.l rs,@rd
9473 jsr @rs * mov.l rs,@(disp:16,rd)
9474 jsr abs * mov.l rs,@(disp:24,rd)
9475 jsr @@abs:8 * mov.l rs,@-rd
9476 ldc #imm,ccr * mov.l rs,@abs:16
9477 ldc rs,ccr * mov.l rs,@abs:24
9478 * ldc @abs:16,ccr movfpe @abs:16,rd
9479 * ldc @abs:24,ccr movtpe rs,@abs:16
9480 * ldc @(disp:16,rs),ccr mulxu.b rs,rd
9481 * ldc @(disp:24,rs),ccr * mulxu.w rs,rd
9482 * ldc @rs+,ccr * mulxs.b rs,rd
9483 * ldc @rs,ccr * mulxs.w rs,rd
9484 * mov.b @(disp:24,rs),rd neg.b rs
9485 * mov.b rs,@(disp:24,rd) * neg.w rs
9486 mov.b @abs:16,rd * neg.l rs
9488 mov.b @abs:8,rd not.b rs
9489 mov.b rs,@abs:8 * not.w rs
9490 mov.b rs,rd * not.l rs
9491 mov.b #imm,rd or.b #imm,rd
9492 mov.b @rs,rd or.b rs,rd
9493 mov.b @(disp:16,rs),rd * or.w #imm,rd
9494 mov.b @rs+,rd * or.w rs,rd
9495 mov.b @abs:8,rd * or.l #imm,rd
9496 mov.b rs,@rd * or.l rs,rd
9497 mov.b rs,@(disp:16,rd) orc #imm,ccr
9498 mov.b rs,@-rd pop.w rs
9499 mov.b rs,@abs:8 * pop.l rs
9500 mov.w rs,@rd push.w rs
9501 * mov.w @(disp:24,rs),rd * push.l rs
9502 * mov.w rs,@(disp:24,rd) rotl.b rs
9503 * mov.w @abs:24,rd * rotl.w rs
9504 * mov.w rs,@abs:24 * rotl.l rs
9505 mov.w rs,rd rotr.b rs
9506 mov.w #imm,rd * rotr.w rs
9507 mov.w @rs,rd * rotr.l rs
9508 mov.w @(disp:16,rs),rd rotxl.b rs
9509 mov.w @rs+,rd * rotxl.w rs
9510 mov.w @abs:16,rd * rotxl.l rs
9511 mov.w rs,@(disp:16,rd) rotxr.b rs
9512 mov.w rs,@-rd * rotxr.w rs
9514 * rotxr.l rs * stc ccr,@(disp:24,rd)
9516 rte * stc ccr,@abs:16
9517 rts * stc ccr,@abs:24
9518 shal.b rs sub.b rs,rd
9519 * shal.w rs sub.w rs,rd
9520 * shal.l rs * sub.w #imm,rd
9521 shar.b rs * sub.l rs,rd
9522 * shar.w rs * sub.l #imm,rd
9523 * shar.l rs subs #imm,rd
9524 shll.b rs subx #imm,rd
9525 * shll.w rs subx rs,rd
9526 * shll.l rs * trapa #imm
9527 shlr.b rs xor #imm,rd
9528 * shlr.w rs xor rs,rd
9529 * shlr.l rs * xor.w #imm,rd
9531 stc ccr,rd * xor.l #imm,rd
9532 * stc ccr,@rs * xor.l rs,rd
9533 * stc ccr,@(disp:16,rd) xorc #imm,ccr
9535 Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
9536 with variants using the suffixes `.b', `.w', and `.l' to specify the
9537 size of a memory operand. `as' supports these suffixes, but does not
9538 require them; since one of the operands is always a register, `as' can
9539 deduce the correct size.
9541 For example, since `r0' refers to a 16-bit register,
9546 If you use the size suffixes, `as' issues a warning when the suffix
9547 and the register size do not match.
9550 File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies
9552 9.13 HPPA Dependent Features
9553 ============================
9557 * HPPA Notes:: Notes
9558 * HPPA Options:: Options
9559 * HPPA Syntax:: Syntax
9560 * HPPA Floating Point:: Floating Point
9561 * HPPA Directives:: HPPA Machine Directives
9562 * HPPA Opcodes:: Opcodes
9565 File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent
9570 As a back end for GNU CC `as' has been throughly tested and should work
9571 extremely well. We have tested it only minimally on hand written
9572 assembly code and no one has tested it much on the assembly output from
9575 The format of the debugging sections has changed since the original
9576 `as' port (version 1.3X) was released; therefore, you must rebuild all
9577 HPPA objects and libraries with the new assembler so that you can debug
9578 the final executable.
9580 The HPPA `as' port generates a small subset of the relocations
9581 available in the SOM and ELF object file formats. Additional relocation
9582 support will be added as it becomes necessary.
9585 File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent
9590 `as' has no machine-dependent command-line options for the HPPA.
9593 File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent
9598 The assembler syntax closely follows the HPPA instruction set reference
9599 manual; assembler directives and general syntax closely follow the HPPA
9600 assembly language reference manual, with a few noteworthy differences.
9602 First, a colon may immediately follow a label definition. This is
9603 simply for compatibility with how most assembly language programmers
9606 Some obscure expression parsing problems may affect hand written
9607 code which uses the `spop' instructions, or code which makes significant
9608 use of the `!' line separator.
9610 `as' is much less forgiving about missing arguments and other
9611 similar oversights than the HP assembler. `as' notifies you of missing
9612 arguments as syntax errors; this is regarded as a feature, not a bug.
9614 Finally, `as' allows you to use an external symbol without
9615 explicitly importing the symbol. _Warning:_ in the future this will be
9616 an error for HPPA targets.
9618 Special characters for HPPA targets include:
9620 `;' is the line comment character.
9622 `!' can be used instead of a newline to separate statements.
9624 Since `$' has no special meaning, you may use it in symbol names.
9627 File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent
9629 9.13.4 Floating Point
9630 ---------------------
9632 The HPPA family uses IEEE floating-point numbers.
9635 File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent
9637 9.13.5 HPPA Assembler Directives
9638 --------------------------------
9640 `as' for the HPPA supports many additional directives for compatibility
9641 with the native assembler. This section describes them only briefly.
9642 For detailed information on HPPA-specific assembler directives, see
9643 `HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001).
9645 `as' does _not_ support the following assembler directives described
9653 Beyond those implemented for compatibility, `as' supports one
9654 additional assembler directive for the HPPA: `.param'. It conveys
9655 register argument locations for static functions. Its syntax closely
9656 follows the `.export' directive.
9658 These are the additional directives in `as' for the HPPA:
9662 Reserve N bytes of storage, and initialize them to zero.
9665 Mark the beginning of a procedure call. Only the special case
9666 with _no arguments_ is allowed.
9668 `.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]'
9669 Specify a number of parameters and flags that define the
9670 environment for a procedure.
9672 PARAM may be any of `frame' (frame size), `entry_gr' (end of
9673 general register range), `entry_fr' (end of float register range),
9674 `entry_sr' (end of space register range).
9676 The values for FLAG are `calls' or `caller' (proc has
9677 subroutines), `no_calls' (proc does not call subroutines),
9678 `save_rp' (preserve return pointer), `save_sp' (proc preserves
9679 stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
9680 (proc is interrupt routine).
9683 Assemble into the standard section called `$TEXT$', subsection
9686 `.copyright "STRING"'
9687 In the SOM object format, insert STRING into the object code,
9688 marked as a copyright string.
9690 `.copyright "STRING"'
9691 In the ELF object format, insert STRING into the object code,
9692 marked as a version string.
9695 Not yet supported; the assembler rejects programs containing this
9699 Mark the beginning of a procedure.
9702 Mark the end of a procedure.
9704 `.export NAME [ ,TYP ] [ ,PARAM=R ]'
9705 Make a procedure NAME available to callers. TYP, if present, must
9706 be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
9707 `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
9709 PARAM, if present, provides either relocation information for the
9710 procedure arguments and result, or a privilege level. PARAM may be
9711 `argwN' (where N ranges from `0' to `3', and indicates one of four
9712 one-word arguments); `rtnval' (the procedure's result); or
9713 `priv_lev' (privilege level). For arguments or the result, R
9714 specifies how to relocate, and must be one of `no' (not
9715 relocatable), `gr' (argument is in general register), `fr' (in
9716 floating point register), or `fu' (upper half of float register).
9717 For `priv_lev', R is an integer.
9720 Define a two-byte integer constant N; synonym for the portable
9721 `as' directive `.short'.
9723 `.import NAME [ ,TYP ]'
9724 Converse of `.export'; make a procedure available to call. The
9725 arguments use the same conventions as the first two arguments for
9729 Define NAME as a label for the current assembly location.
9732 Not yet supported; the assembler rejects programs containing this
9736 Advance location counter to LC. Synonym for the `as' portable
9739 `.param NAME [ ,TYP ] [ ,PARAM=R ]'
9740 Similar to `.export', but used for static procedures.
9743 Use preceding the first statement of a procedure.
9746 Use following the last statement of a procedure.
9749 Synonym for `.equ'; define LABEL with the absolute expression EXPR
9752 `.space SECNAME [ ,PARAMS ]'
9753 Switch to section SECNAME, creating a new section by that name if
9754 necessary. You may only use PARAMS when creating a new section,
9755 not when switching to an existing one. SECNAME may identify a
9756 section by number rather than by name.
9758 If specified, the list PARAMS declares attributes of the section,
9759 identified by keywords. The keywords recognized are `spnum=EXP'
9760 (identify this section by the number EXP, an absolute expression),
9761 `sort=EXP' (order sections according to this sort key when linking;
9762 EXP is an absolute expression), `unloadable' (section contains no
9763 loadable data), `notdefined' (this section defined elsewhere), and
9764 `private' (data in this section not available to other programs).
9767 Allocate four bytes of storage, and initialize them with the
9768 section number of the section named SECNAM. (You can define the
9769 section number with the HPPA `.space' directive.)
9772 Copy the characters in the string STR to the object file. *Note
9773 Strings: Strings, for information on escape sequences you can use
9776 _Warning!_ The HPPA version of `.string' differs from the usual
9777 `as' definition: it does _not_ write a zero byte after copying STR.
9780 Like `.string', but appends a zero byte after copying STR to object
9783 `.subspa NAME [ ,PARAMS ]'
9784 `.nsubspa NAME [ ,PARAMS ]'
9785 Similar to `.space', but selects a subsection NAME within the
9786 current section. You may only specify PARAMS when you create a
9787 subsection (in the first instance of `.subspa' for this NAME).
9789 If specified, the list PARAMS declares attributes of the
9790 subsection, identified by keywords. The keywords recognized are
9791 `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
9792 (alignment for beginning of this subsection; a power of two),
9793 `access=EXPR' (value for "access rights" field), `sort=EXPR'
9794 (sorting order for this subspace in link), `code_only' (subsection
9795 contains only code), `unloadable' (subsection cannot be loaded
9796 into memory), `comdat' (subsection is comdat), `common'
9797 (subsection is common block), `dup_comm' (subsection may have
9798 duplicate names), or `zero' (subsection is all zeros, do not write
9801 `.nsubspa' always creates a new subspace with the given name, even
9802 if one with the same name already exists.
9804 `comdat', `common' and `dup_comm' can be used to implement various
9805 flavors of one-only support when using the SOM linker. The SOM
9806 linker only supports specific combinations of these flags. The
9807 details are not documented. A brief description is provided here.
9809 `comdat' provides a form of linkonce support. It is useful for
9810 both code and data subspaces. A `comdat' subspace has a key symbol
9811 marked by the `is_comdat' flag or `ST_COMDAT'. Only the first
9812 subspace for any given key is selected. The key symbol becomes
9813 universal in shared links. This is similar to the behavior of
9814 `secondary_def' symbols.
9816 `common' provides Fortran named common support. It is only useful
9817 for data subspaces. Symbols with the flag `is_common' retain this
9818 flag in shared links. Referencing a `is_common' symbol in a shared
9819 library from outside the library doesn't work. Thus, `is_common'
9820 symbols must be output whenever they are needed.
9822 `common' and `dup_comm' together provide Cobol common support.
9823 The subspaces in this case must all be the same length.
9824 Otherwise, this support is similar to the Fortran common support.
9826 `dup_comm' by itself provides a type of one-only support for code.
9827 Only the first `dup_comm' subspace is selected. There is a rather
9828 complex algorithm to compare subspaces. Code symbols marked with
9829 the `dup_common' flag are hidden. This support was intended for
9830 "C++ duplicate inlines".
9832 A simplified technique is used to mark the flags of symbols based
9833 on the flags of their subspace. A symbol with the scope
9834 SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with
9835 the corresponding settings of `comdat', `common' and `dup_comm'
9836 from the subspace, respectively. This avoids having to introduce
9837 additional directives to mark these symbols. The HP assembler
9838 sets `is_common' from `common'. However, it doesn't set the
9839 `dup_common' from `dup_comm'. It doesn't have `comdat' support.
9842 Write STR as version identifier in object code.
9845 File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent
9850 For detailed information on the HPPA machine instruction set, see
9851 `PA-RISC Architecture and Instruction Set Reference Manual' (HP
9855 File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies
9857 9.14 ESA/390 Dependent Features
9858 ===============================
9862 * ESA/390 Notes:: Notes
9863 * ESA/390 Options:: Options
9864 * ESA/390 Syntax:: Syntax
9865 * ESA/390 Floating Point:: Floating Point
9866 * ESA/390 Directives:: ESA/390 Machine Directives
9867 * ESA/390 Opcodes:: Opcodes
9870 File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent
9875 The ESA/390 `as' port is currently intended to be a back-end for the
9876 GNU CC compiler. It is not HLASM compatible, although it does support
9877 a subset of some of the HLASM directives. The only supported binary
9878 file format is ELF; none of the usual MVS/VM/OE/USS object file
9879 formats, such as ESD or XSD, are supported.
9881 When used with the GNU CC compiler, the ESA/390 `as' will produce
9882 correct, fully relocated, functional binaries, and has been used to
9883 compile and execute large projects. However, many aspects should still
9884 be considered experimental; these include shared library support,
9885 dynamically loadable objects, and any relocation other than the 31-bit
9889 File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent
9894 `as' has no machine-dependent command-line options for the ESA/390.
9897 File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent
9902 The opcode/operand syntax follows the ESA/390 Principles of Operation
9903 manual; assembler directives and general syntax are loosely based on the
9904 prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives
9905 are _not_ supported for the most part, with the exception of those
9908 A leading dot in front of directives is optional, and the case of
9909 directives is ignored; thus for example, .using and USING have the same
9912 A colon may immediately follow a label definition. This is simply
9913 for compatibility with how most assembly language programmers write
9916 `#' is the line comment character.
9918 `;' can be used instead of a newline to separate statements.
9920 Since `$' has no special meaning, you may use it in symbol names.
9922 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
9923 fp6. By using thesse symbolic names, `as' can detect simple syntax
9924 errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
9925 r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
9926 for r3 and rpgt or r.pgt for r4.
9928 `*' is the current location counter. Unlike `.' it is always
9929 relative to the last USING directive. Note that this means that
9930 expressions cannot use multiplication, as any occurrence of `*' will be
9931 interpreted as a location counter.
9933 All labels are relative to the last USING. Thus, branches to a label
9934 always imply the use of base+displacement.
9936 Many of the usual forms of address constants / address literals are
9939 L r15,=A(some_routine)
9940 LM r6,r7,=V(some_longlong_extern)
9944 MD r6,=D'3.14159265358979'
9947 should all behave as expected: that is, an entry in the literal pool
9948 will be created (or reused if it already exists), and the instruction
9949 operands will be the displacement into the literal pool using the
9950 current base register (as last declared with the `.using' directive).
9953 File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent
9955 9.14.4 Floating Point
9956 ---------------------
9958 The assembler generates only IEEE floating-point numbers. The older
9959 floating point formats are not supported.
9962 File: as.info, Node: ESA/390 Directives, Next: ESA/390 Opcodes, Prev: ESA/390 Floating Point, Up: ESA/390-Dependent
9964 9.14.5 ESA/390 Assembler Directives
9965 -----------------------------------
9967 `as' for the ESA/390 supports all of the standard ELF/SVR4 assembler
9968 directives that are documented in the main part of this documentation.
9969 Several additional directives are supported in order to implement the
9970 ESA/390 addressing model. The most important of these are `.using' and
9973 These are the additional directives in `as' for the ESA/390:
9976 A small subset of the usual DC directive is supported.
9979 Stop using REGNO as the base register. The REGNO must have been
9980 previously declared with a `.using' directive in the same section
9981 as the current section.
9984 Emit the EBCDIC equivalent of the indicated string. The emitted
9985 string will be null terminated. Note that the directives
9986 `.string' etc. emit ascii strings by default.
9989 The standard HLASM-style EQU directive is not supported; however,
9990 the standard `as' directive .equ can be used to the same effect.
9993 Dump the literal pool accumulated so far; begin a new literal pool.
9994 The literal pool will be written in the current section; in order
9995 to generate correct assembly, a `.using' must have been previously
9996 specified in the same section.
9999 Use REGNO as the base register for all subsequent RX, RS, and SS
10000 form instructions. The EXPR will be evaluated to obtain the base
10001 address; usually, EXPR will merely be `*'.
10003 This assembler allows two `.using' directives to be simultaneously
10004 outstanding, one in the `.text' section, and one in another section
10005 (typically, the `.data' section). This feature allows dynamically
10006 loaded objects to be implemented in a relatively straightforward
10007 way. A `.using' directive must always be specified in the `.text'
10008 section; this will specify the base register that will be used for
10009 branches in the `.text' section. A second `.using' may be
10010 specified in another section; this will specify the base register
10011 that is used for non-label address literals. When a second
10012 `.using' is specified, then the subsequent `.ltorg' must be put in
10013 the same section; otherwise an error will result.
10015 Thus, for example, the following code uses `r3' to address branch
10016 targets and `r4' to address the literal pool, which has been
10017 written to the `.data' section. The is, the constants
10018 `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in
10019 the `.data' section.
10030 L r15,=A(some_routine)
10040 Note that this dual-`.using' directive semantics extends and is
10041 not compatible with HLASM semantics. Note that this assembler
10042 directive does not support the full range of HLASM semantics.
10046 File: as.info, Node: ESA/390 Opcodes, Prev: ESA/390 Directives, Up: ESA/390-Dependent
10051 For detailed information on the ESA/390 machine instruction set, see
10052 `ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004).
10055 File: as.info, Node: i386-Dependent, Next: i860-Dependent, Prev: ESA/390-Dependent, Up: Machine Dependencies
10057 9.15 80386 Dependent Features
10058 =============================
10060 The i386 version `as' supports both the original Intel 386
10061 architecture in both 16 and 32-bit mode as well as AMD x86-64
10062 architecture extending the Intel architecture to 64-bits.
10066 * i386-Options:: Options
10067 * i386-Directives:: X86 specific directives
10068 * i386-Syntax:: Syntactical considerations
10069 * i386-Mnemonics:: Instruction Naming
10070 * i386-Regs:: Register Naming
10071 * i386-Prefixes:: Instruction Prefixes
10072 * i386-Memory:: Memory References
10073 * i386-Jumps:: Handling of Jump Instructions
10074 * i386-Float:: Floating Point
10075 * i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations
10076 * i386-LWP:: AMD's Lightweight Profiling Instructions
10077 * i386-BMI:: Bit Manipulation Instruction
10078 * i386-TBM:: AMD's Trailing Bit Manipulation Instructions
10079 * i386-16bit:: Writing 16-bit Code
10080 * i386-Arch:: Specifying an x86 CPU architecture
10081 * i386-Bugs:: AT&T Syntax bugs
10082 * i386-Notes:: Notes
10085 File: as.info, Node: i386-Options, Next: i386-Directives, Up: i386-Dependent
10090 The i386 version of `as' has a few machine dependent options:
10092 `--32 | --x32 | --64'
10093 Select the word size, either 32 bits or 64 bits. `--32' implies
10094 Intel i386 architecture, while `--x32' and `--64' imply AMD x86-64
10095 architecture with 32-bit or 64-bit word-size respectively.
10097 These options are only available with the ELF object file format,
10098 and require that the necessary BFD support has been included (on a
10099 32-bit platform you have to add -enable-64-bit-bfd to configure
10100 enable 64-bit usage and use x86-64 as target platform).
10103 By default, x86 GAS replaces multiple nop instructions used for
10104 alignment within code sections with multi-byte nop instructions
10105 such as leal 0(%esi,1),%esi. This switch disables the
10109 On SVR4-derived platforms, the character `/' is treated as a
10110 comment character, which means that it cannot be used in
10111 expressions. The `--divide' option turns `/' into a normal
10112 character. This does not disable `/' at the beginning of a line
10113 starting a comment, or affect using `#' for starting a comment.
10115 `-march=CPU[+EXTENSION...]'
10116 This option specifies the target processor. The assembler will
10117 issue an error message if an attempt is made to assemble an
10118 instruction which will not execute on the target processor. The
10119 following processor names are recognized: `i8086', `i186', `i286',
10120 `i386', `i486', `i586', `i686', `pentium', `pentiumpro',
10121 `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona',
10122 `core', `core2', `corei7', `l1om', `k1om', `k6', `k6_2', `athlon',
10123 `opteron', `k8', `amdfam10', `bdver1', `bdver2', `bdver3',
10124 `btver1', `btver2', `generic32' and `generic64'.
10126 In addition to the basic instruction set, the assembler can be
10127 told to accept various extension mnemonics. For example,
10128 `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX. The
10129 following extensions are currently supported: `8087', `287', `387',
10130 `no87', `mmx', `nommx', `sse', `sse2', `sse3', `ssse3', `sse4.1',
10131 `sse4.2', `sse4', `nosse', `avx', `avx2', `adx', `rdseed',
10132 `prfchw', `noavx', `vmx', `vmfunc', `smx', `xsave', `xsaveopt',
10133 `aes', `pclmul', `fsgsbase', `rdrnd', `f16c', `bmi2', `fma',
10134 `movbe', `ept', `lzcnt', `hle', `rtm', `invpcid', `clflush', `lwp',
10135 `fma4', `xop', `syscall', `rdtscp', `3dnow', `3dnowa', `sse4a',
10136 `sse5', `svme', `abm' and `padlock'. Note that rather than
10137 extending a basic instruction set, the extension mnemonics
10138 starting with `no' revoke the respective functionality.
10140 When the `.arch' directive is used with `-march', the `.arch'
10141 directive will take precedent.
10144 This option specifies a processor to optimize for. When used in
10145 conjunction with the `-march' option, only instructions of the
10146 processor specified by the `-march' option will be generated.
10148 Valid CPU values are identical to the processor list of
10152 This option specifies that the assembler should encode SSE
10153 instructions with VEX prefix.
10156 `-msse-check=WARNING'
10157 `-msse-check=ERROR'
10158 These options control if the assembler should check SSE
10159 intructions. `-msse-check=NONE' will make the assembler not to
10160 check SSE instructions, which is the default.
10161 `-msse-check=WARNING' will make the assembler issue a warning for
10162 any SSE intruction. `-msse-check=ERROR' will make the assembler
10163 issue an error for any SSE intruction.
10167 These options control how the assembler should encode scalar AVX
10168 instructions. `-mavxscalar=128' will encode scalar AVX
10169 instructions with 128bit vector length, which is the default.
10170 `-mavxscalar=256' will encode scalar AVX instructions with 256bit
10175 This option specifies instruction mnemonic for matching
10176 instructions. The `.att_mnemonic' and `.intel_mnemonic'
10177 directives will take precedent.
10181 This option specifies instruction syntax when processing
10182 instructions. The `.att_syntax' and `.intel_syntax' directives
10183 will take precedent.
10186 This opetion specifies that registers don't require a `%' prefix.
10187 The `.att_syntax' and `.intel_syntax' directives will take
10192 File: as.info, Node: i386-Directives, Next: i386-Syntax, Prev: i386-Options, Up: i386-Dependent
10194 9.15.2 x86 specific Directives
10195 ------------------------------
10197 `.lcomm SYMBOL , LENGTH[, ALIGNMENT]'
10198 Reserve LENGTH (an absolute expression) bytes for a local common
10199 denoted by SYMBOL. The section and value of SYMBOL are those of
10200 the new local common. The addresses are allocated in the bss
10201 section, so that at run-time the bytes start off zeroed. Since
10202 SYMBOL is not declared global, it is normally not visible to `ld'.
10203 The optional third parameter, ALIGNMENT, specifies the desired
10204 alignment of the symbol in the bss section.
10206 This directive is only available for COFF based x86 targets.
10210 File: as.info, Node: i386-Syntax, Next: i386-Mnemonics, Prev: i386-Directives, Up: i386-Dependent
10212 9.15.3 i386 Syntactical Considerations
10213 --------------------------------------
10217 * i386-Variations:: AT&T Syntax versus Intel Syntax
10218 * i386-Chars:: Special Characters
10221 File: as.info, Node: i386-Variations, Next: i386-Chars, Up: i386-Syntax
10223 9.15.3.1 AT&T Syntax versus Intel Syntax
10224 ........................................
10226 `as' now supports assembly using Intel assembler syntax.
10227 `.intel_syntax' selects Intel mode, and `.att_syntax' switches back to
10228 the usual AT&T mode for compatibility with the output of `gcc'. Either
10229 of these directives may have an optional argument, `prefix', or
10230 `noprefix' specifying whether registers require a `%' prefix. AT&T
10231 System V/386 assembler syntax is quite different from Intel syntax. We
10232 mention these differences because almost all 80386 documents use Intel
10233 syntax. Notable differences between the two syntaxes are:
10235 * AT&T immediate operands are preceded by `$'; Intel immediate
10236 operands are undelimited (Intel `push 4' is AT&T `pushl $4').
10237 AT&T register operands are preceded by `%'; Intel register operands
10238 are undelimited. AT&T absolute (as opposed to PC relative)
10239 jump/call operands are prefixed by `*'; they are undelimited in
10242 * AT&T and Intel syntax use the opposite order for source and
10243 destination operands. Intel `add eax, 4' is `addl $4, %eax'. The
10244 `source, dest' convention is maintained for compatibility with
10245 previous Unix assemblers. Note that `bound', `invlpga', and
10246 instructions with 2 immediate operands, such as the `enter'
10247 instruction, do _not_ have reversed order. *Note i386-Bugs::.
10249 * In AT&T syntax the size of memory operands is determined from the
10250 last character of the instruction mnemonic. Mnemonic suffixes of
10251 `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long
10252 (32-bit) and quadruple word (64-bit) memory references. Intel
10253 syntax accomplishes this by prefixing memory operands (_not_ the
10254 instruction mnemonics) with `byte ptr', `word ptr', `dword ptr'
10255 and `qword ptr'. Thus, Intel `mov al, byte ptr FOO' is `movb FOO,
10256 %al' in AT&T syntax.
10258 In 64-bit code, `movabs' can be used to encode the `mov'
10259 instruction with the 64-bit displacement or immediate operand.
10261 * Immediate form long jumps and calls are `lcall/ljmp $SECTION,
10262 $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
10263 SECTION:OFFSET'. Also, the far return instruction is `lret
10264 $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
10267 * The AT&T assembler does not provide support for multiple section
10268 programs. Unix style systems expect all programs to be single
10272 File: as.info, Node: i386-Chars, Prev: i386-Variations, Up: i386-Syntax
10274 9.15.3.2 Special Characters
10275 ...........................
10277 The presence of a `#' appearing anywhere on a line indicates the start
10278 of a comment that extends to the end of that line.
10280 If a `#' appears as the first character of a line then the whole
10281 line is treated as a comment, but in this case the line can also be a
10282 logical line number directive (*note Comments::) or a preprocessor
10283 control command (*note Preprocessing::).
10285 If the `--divide' command line option has not been specified then
10286 the `/' character appearing anywhere on a line also introduces a line
10289 The `;' character can be used to separate statements on the same
10293 File: as.info, Node: i386-Mnemonics, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent
10295 9.15.4 Instruction Naming
10296 -------------------------
10298 Instruction mnemonics are suffixed with one character modifiers which
10299 specify the size of operands. The letters `b', `w', `l' and `q'
10300 specify byte, word, long and quadruple word operands. If no suffix is
10301 specified by an instruction then `as' tries to fill in the missing
10302 suffix based on the destination register operand (the last one by
10303 convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
10304 also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is
10305 incompatible with the AT&T Unix assembler which assumes that a missing
10306 mnemonic suffix implies long operand size. (This incompatibility does
10307 not affect compiler output since compilers always explicitly specify
10308 the mnemonic suffix.)
10310 Almost all instructions have the same names in AT&T and Intel format.
10311 There are a few exceptions. The sign extend and zero extend
10312 instructions need two sizes to specify them. They need a size to
10313 sign/zero extend _from_ and a size to zero extend _to_. This is
10314 accomplished by using two instruction mnemonic suffixes in AT&T syntax.
10315 Base names for sign extend and zero extend are `movs...' and `movz...'
10316 in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction
10317 mnemonic suffixes are tacked on to this base name, the _from_ suffix
10318 before the _to_ suffix. Thus, `movsbl %al, %edx' is AT&T syntax for
10319 "move sign extend _from_ %al _to_ %edx." Possible suffixes, thus, are
10320 `bl' (from byte to long), `bw' (from byte to word), `wl' (from word to
10321 long), `bq' (from byte to quadruple word), `wq' (from word to quadruple
10322 word), and `lq' (from long to quadruple word).
10324 Different encoding options can be specified via optional mnemonic
10325 suffix. `.s' suffix swaps 2 register operands in encoding when moving
10326 from one register to another. `.d8' or `.d32' suffix prefers 8bit or
10327 32bit displacement in encoding.
10329 The Intel-syntax conversion instructions
10331 * `cbw' -- sign-extend byte in `%al' to word in `%ax',
10333 * `cwde' -- sign-extend word in `%ax' to long in `%eax',
10335 * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',
10337 * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',
10339 * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64
10342 * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax'
10345 are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T
10346 naming. `as' accepts either naming for these instructions.
10348 Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
10349 but are `call far' and `jump far' in Intel convention.
10351 9.15.5 AT&T Mnemonic versus Intel Mnemonic
10352 ------------------------------------------
10354 `as' supports assembly using Intel mnemonic. `.intel_mnemonic' selects
10355 Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to
10356 the usual AT&T mnemonic with AT&T syntax for compatibility with the
10357 output of `gcc'. Several x87 instructions, `fadd', `fdiv', `fdivp',
10358 `fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp', are
10359 implemented in AT&T System V/386 assembler with different mnemonics
10360 from those in Intel IA32 specification. `gcc' generates those
10361 instructions with AT&T mnemonic.
10364 File: as.info, Node: i386-Regs, Next: i386-Prefixes, Prev: i386-Mnemonics, Up: i386-Dependent
10366 9.15.6 Register Naming
10367 ----------------------
10369 Register operands are always prefixed with `%'. The 80386 registers
10372 * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
10373 `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
10374 (the stack pointer).
10376 * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
10377 `%si', `%bp', and `%sp'.
10379 * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
10380 `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
10381 `%bx', `%cx', and `%dx')
10383 * the 6 section registers `%cs' (code section), `%ds' (data
10384 section), `%ss' (stack section), `%es', `%fs', and `%gs'.
10386 * the 3 processor control registers `%cr0', `%cr2', and `%cr3'.
10388 * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
10391 * the 2 test registers `%tr6' and `%tr7'.
10393 * the 8 floating point register stack `%st' or equivalently
10394 `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
10395 `%st(6)', and `%st(7)'. These registers are overloaded by 8 MMX
10396 registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6'
10399 * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3',
10400 `%xmm4', `%xmm5', `%xmm6' and `%xmm7'.
10402 The AMD x86-64 architecture extends the register set by:
10404 * enhancing the 8 32-bit registers to 64-bit: `%rax' (the
10405 accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the
10406 frame pointer), `%rsp' (the stack pointer)
10408 * the 8 extended registers `%r8'-`%r15'.
10410 * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d'
10412 * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w'
10414 * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b'
10416 * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'.
10418 * the 8 debug registers: `%db8'-`%db15'.
10420 * the 8 SSE registers: `%xmm8'-`%xmm15'.
10423 File: as.info, Node: i386-Prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent
10425 9.15.7 Instruction Prefixes
10426 ---------------------------
10428 Instruction prefixes are used to modify the following instruction. They
10429 are used to repeat string instructions, to provide section overrides, to
10430 perform bus lock operations, and to change operand and address sizes.
10431 (Most instructions that normally operate on 32-bit operands will use
10432 16-bit operands if the instruction has an "operand size" prefix.)
10433 Instruction prefixes are best written on the same line as the
10434 instruction they act upon. For example, the `scas' (scan string)
10435 instruction is repeated with:
10437 repne scas %es:(%edi),%al
10439 You may also place prefixes on the lines immediately preceding the
10440 instruction, but this circumvents checks that `as' does with prefixes,
10441 and will not work with all prefixes.
10443 Here is a list of instruction prefixes:
10445 * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
10446 These are automatically added by specifying using the
10447 SECTION:MEMORY-OPERAND form for memory references.
10449 * Operand/Address size prefixes `data16' and `addr16' change 32-bit
10450 operands/addresses into 16-bit operands/addresses, while `data32'
10451 and `addr32' change 16-bit ones (in a `.code16' section) into
10452 32-bit operands/addresses. These prefixes _must_ appear on the
10453 same line of code as the instruction they modify. For example, in
10454 a 16-bit `.code16' section, you might write:
10456 addr32 jmpl *(%ebx)
10458 * The bus lock prefix `lock' inhibits interrupts during execution of
10459 the instruction it precedes. (This is only valid with certain
10460 instructions; see a 80386 manual for details).
10462 * The wait for coprocessor prefix `wait' waits for the coprocessor to
10463 complete the current instruction. This should never be needed for
10464 the 80386/80387 combination.
10466 * The `rep', `repe', and `repne' prefixes are added to string
10467 instructions to make them repeat `%ecx' times (`%cx' times if the
10468 current address size is 16-bits).
10470 * The `rex' family of prefixes is used by x86-64 to encode
10471 extensions to i386 instruction set. The `rex' prefix has four
10472 bits -- an operand size overwrite (`64') used to change operand
10473 size from 32-bit to 64-bit and X, Y and Z extensions bits used to
10474 extend the register set.
10476 You may write the `rex' prefixes directly. The `rex64xyz'
10477 instruction emits `rex' prefix with all the bits set. By omitting
10478 the `64', `x', `y' or `z' you may write other prefixes as well.
10479 Normally, there is no need to write the prefixes explicitly, since
10480 gas will automatically generate them based on the instruction
10484 File: as.info, Node: i386-Memory, Next: i386-Jumps, Prev: i386-Prefixes, Up: i386-Dependent
10486 9.15.8 Memory References
10487 ------------------------
10489 An Intel syntax indirect memory reference of the form
10491 SECTION:[BASE + INDEX*SCALE + DISP]
10493 is translated into the AT&T syntax
10495 SECTION:DISP(BASE, INDEX, SCALE)
10497 where BASE and INDEX are the optional 32-bit base and index registers,
10498 DISP is the optional displacement, and SCALE, taking the values 1, 2,
10499 4, and 8, multiplies INDEX to calculate the address of the operand. If
10500 no SCALE is specified, SCALE is taken to be 1. SECTION specifies the
10501 optional section register for the memory operand, and may override the
10502 default section register (see a 80386 manual for section register
10503 defaults). Note that section overrides in AT&T syntax _must_ be
10504 preceded by a `%'. If you specify a section override which coincides
10505 with the default section register, `as' does _not_ output any section
10506 register override prefixes to assemble the given instruction. Thus,
10507 section overrides can be specified to emphasize which section register
10508 is used for a given memory operand.
10510 Here are some examples of Intel and AT&T style memory references:
10512 AT&T: `-4(%ebp)', Intel: `[ebp - 4]'
10513 BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
10514 section is used (`%ss' for addressing with `%ebp' as the base
10515 register). INDEX, SCALE are both missing.
10517 AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
10518 INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other
10519 fields are missing. The section register here defaults to `%ds'.
10521 AT&T: `foo(,1)'; Intel `[foo]'
10522 This uses the value pointed to by `foo' as a memory operand. Note
10523 that BASE and INDEX are both missing, but there is only _one_ `,'.
10524 This is a syntactic exception.
10526 AT&T: `%gs:foo'; Intel `gs:foo'
10527 This selects the contents of the variable `foo' with section
10528 register SECTION being `%gs'.
10530 Absolute (as opposed to PC relative) call and jump operands must be
10531 prefixed with `*'. If no `*' is specified, `as' always chooses PC
10532 relative addressing for jump/call labels.
10534 Any instruction that has a memory operand, but no register operand,
10535 _must_ specify its size (byte, word, long, or quadruple) with an
10536 instruction mnemonic suffix (`b', `w', `l' or `q', respectively).
10538 The x86-64 architecture adds an RIP (instruction pointer relative)
10539 addressing. This addressing mode is specified by using `rip' as a base
10540 register. Only constant offsets are valid. For example:
10542 AT&T: `1234(%rip)', Intel: `[rip + 1234]'
10543 Points to the address 1234 bytes past the end of the current
10546 AT&T: `symbol(%rip)', Intel: `[rip + symbol]'
10547 Points to the `symbol' in RIP relative way, this is shorter than
10548 the default absolute addressing.
10550 Other addressing modes remain unchanged in x86-64 architecture,
10551 except registers used are 64-bit instead of 32-bit.
10554 File: as.info, Node: i386-Jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent
10556 9.15.9 Handling of Jump Instructions
10557 ------------------------------------
10559 Jump instructions are always optimized to use the smallest possible
10560 displacements. This is accomplished by using byte (8-bit) displacement
10561 jumps whenever the target is sufficiently close. If a byte displacement
10562 is insufficient a long displacement is used. We do not support word
10563 (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
10564 instruction with the `data16' instruction prefix), since the 80386
10565 insists upon masking `%eip' to 16 bits after the word displacement is
10566 added. (See also *note i386-Arch::)
10568 Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
10569 and `loopne' instructions only come in byte displacements, so that if
10570 you use these instructions (`gcc' does not use them) you may get an
10571 error message (and incorrect code). The AT&T 80386 assembler tries to
10572 get around this problem by expanding `jcxz foo' to
10580 File: as.info, Node: i386-Float, Next: i386-SIMD, Prev: i386-Jumps, Up: i386-Dependent
10582 9.15.10 Floating Point
10583 ----------------------
10585 All 80387 floating point types except packed BCD are supported. (BCD
10586 support may be added without much difficulty). These data types are
10587 16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit),
10588 and extended (80-bit) precision floating point. Each supported type
10589 has an instruction mnemonic suffix and a constructor associated with
10590 it. Instruction mnemonic suffixes specify the operand's data type.
10591 Constructors build these data types into memory.
10593 * Floating point constructors are `.float' or `.single', `.double',
10594 and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond
10595 to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for
10596 80-bit (ten byte) real. The 80387 only supports this format via
10597 the `fldt' (load 80-bit real to stack top) and `fstpt' (store
10598 80-bit real and pop stack) instructions.
10600 * Integer constructors are `.word', `.long' or `.int', and `.quad'
10601 for the 16-, 32-, and 64-bit integer formats. The corresponding
10602 instruction mnemonic suffixes are `s' (single), `l' (long), and
10603 `q' (quad). As with the 80-bit real format, the 64-bit `q' format
10604 is only present in the `fildq' (load quad integer to stack top)
10605 and `fistpq' (store quad integer and pop stack) instructions.
10607 Register to register operations should not use instruction mnemonic
10608 suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as
10609 if you wrote `fst %st, %st(1)', since all register to register
10610 operations use 80-bit floating point operands. (Contrast this with
10611 `fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating
10612 point format, then stores the result in the 4 byte location `mem')
10615 File: as.info, Node: i386-SIMD, Next: i386-LWP, Prev: i386-Float, Up: i386-Dependent
10617 9.15.11 Intel's MMX and AMD's 3DNow! SIMD Operations
10618 ----------------------------------------------------
10620 `as' supports Intel's MMX instruction set (SIMD instructions for
10621 integer data), available on Intel's Pentium MMX processors and Pentium
10622 II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and
10623 probably others. It also supports AMD's 3DNow! instruction set (SIMD
10624 instructions for 32-bit floating point data) available on AMD's K6-2
10625 processor and possibly others in the future.
10627 Currently, `as' does not support Intel's floating point SIMD, Katmai
10630 The eight 64-bit MMX operands, also used by 3DNow!, are called
10631 `%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four
10632 16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
10633 floating point values. The MMX registers cannot be used at the same
10634 time as the floating point stack.
10636 See Intel and AMD documentation, keeping in mind that the operand
10637 order in instructions is reversed from the Intel syntax.
10640 File: as.info, Node: i386-LWP, Next: i386-BMI, Prev: i386-SIMD, Up: i386-Dependent
10642 9.15.12 AMD's Lightweight Profiling Instructions
10643 ------------------------------------------------
10645 `as' supports AMD's Lightweight Profiling (LWP) instruction set,
10646 available on AMD's Family 15h (Orochi) processors.
10648 LWP enables applications to collect and manage performance data, and
10649 react to performance events. The collection of performance data
10650 requires no context switches. LWP runs in the context of a thread and
10651 so several counters can be used independently across multiple threads.
10652 LWP can be used in both 64-bit and legacy 32-bit modes.
10654 For detailed information on the LWP instruction set, see the `AMD
10655 Lightweight Profiling Specification' available at Lightweight Profiling
10656 Specification (http://developer.amd.com/cpu/LWP).
10659 File: as.info, Node: i386-BMI, Next: i386-TBM, Prev: i386-LWP, Up: i386-Dependent
10661 9.15.13 Bit Manipulation Instructions
10662 -------------------------------------
10664 `as' supports the Bit Manipulation (BMI) instruction set.
10666 BMI instructions provide several instructions implementing individual
10667 bit manipulation operations such as isolation, masking, setting, or
10671 File: as.info, Node: i386-TBM, Next: i386-16bit, Prev: i386-BMI, Up: i386-Dependent
10673 9.15.14 AMD's Trailing Bit Manipulation Instructions
10674 ----------------------------------------------------
10676 `as' supports AMD's Trailing Bit Manipulation (TBM) instruction set,
10677 available on AMD's BDVER2 processors (Trinity and Viperfish).
10679 TBM instructions provide instructions implementing individual bit
10680 manipulation operations such as isolating, masking, setting, resetting,
10681 complementing, and operations on trailing zeros and ones.
10684 File: as.info, Node: i386-16bit, Next: i386-Arch, Prev: i386-TBM, Up: i386-Dependent
10686 9.15.15 Writing 16-bit Code
10687 ---------------------------
10689 While `as' normally writes only "pure" 32-bit i386 code or 64-bit
10690 x86-64 code depending on the default configuration, it also supports
10691 writing code to run in real mode or in 16-bit protected mode code
10692 segments. To do this, put a `.code16' or `.code16gcc' directive before
10693 the assembly language instructions to be run in 16-bit mode. You can
10694 switch `as' to writing 32-bit code with the `.code32' directive or
10695 64-bit code with the `.code64' directive.
10697 `.code16gcc' provides experimental support for generating 16-bit
10698 code from gcc, and differs from `.code16' in that `call', `ret',
10699 `enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf'
10700 instructions default to 32-bit size. This is so that the stack pointer
10701 is manipulated in the same way over function calls, allowing access to
10702 function parameters at the same stack offsets as in 32-bit mode.
10703 `.code16gcc' also automatically adds address size prefixes where
10704 necessary to use the 32-bit addressing modes that gcc generates.
10706 The code which `as' generates in 16-bit mode will not necessarily
10707 run on a 16-bit pre-80386 processor. To write code that runs on such a
10708 processor, you must refrain from using _any_ 32-bit constructs which
10709 require `as' to output address or operand size prefixes.
10711 Note that writing 16-bit code instructions by explicitly specifying a
10712 prefix or an instruction mnemonic suffix within a 32-bit code section
10713 generates different machine instructions than those generated for a
10714 16-bit code segment. In a 32-bit code section, the following code
10715 generates the machine opcode bytes `66 6a 04', which pushes the value
10716 `4' onto the stack, decrementing `%esp' by 2.
10720 The same code in a 16-bit code section would generate the machine
10721 opcode bytes `6a 04' (i.e., without the operand size prefix), which is
10722 correct since the processor default operand size is assumed to be 16
10723 bits in a 16-bit code section.
10726 File: as.info, Node: i386-Bugs, Next: i386-Notes, Prev: i386-Arch, Up: i386-Dependent
10728 9.15.16 AT&T Syntax bugs
10729 ------------------------
10731 The UnixWare assembler, and probably other AT&T derived ix86 Unix
10732 assemblers, generate floating point instructions with reversed source
10733 and destination registers in certain cases. Unfortunately, gcc and
10734 possibly many other programs use this reversed syntax, so we're stuck
10740 results in `%st(3)' being updated to `%st - %st(3)' rather than the
10741 expected `%st(3) - %st'. This happens with all the non-commutative
10742 arithmetic floating point operations with two register operands where
10743 the source register is `%st' and the destination register is `%st(i)'.
10746 File: as.info, Node: i386-Arch, Next: i386-Bugs, Prev: i386-16bit, Up: i386-Dependent
10748 9.15.17 Specifying CPU Architecture
10749 -----------------------------------
10751 `as' may be told to assemble for a particular CPU (sub-)architecture
10752 with the `.arch CPU_TYPE' directive. This directive enables a warning
10753 when gas detects an instruction that is not supported on the CPU
10754 specified. The choices for CPU_TYPE are:
10756 `i8086' `i186' `i286' `i386'
10757 `i486' `i586' `i686' `pentium'
10758 `pentiumpro' `pentiumii' `pentiumiii' `pentium4'
10759 `prescott' `nocona' `core' `core2'
10760 `corei7' `l1om' `k1om'
10761 `k6' `k6_2' `athlon' `k8'
10762 `amdfam10' `bdver1' `bdver2' `bdver3'
10764 `generic32' `generic64'
10765 `.mmx' `.sse' `.sse2' `.sse3'
10766 `.ssse3' `.sse4.1' `.sse4.2' `.sse4'
10767 `.avx' `.vmx' `.smx' `.ept'
10768 `.clflush' `.movbe' `.xsave' `.xsaveopt'
10769 `.aes' `.pclmul' `.fma' `.fsgsbase'
10770 `.rdrnd' `.f16c' `.avx2' `.bmi2'
10771 `.lzcnt' `.invpcid' `.vmfunc' `.hle'
10772 `.rtm' `.adx' `.rdseed' `.prfchw'
10773 `.3dnow' `.3dnowa' `.sse4a' `.sse5'
10774 `.syscall' `.rdtscp' `.svme' `.abm'
10775 `.lwp' `.fma4' `.xop'
10778 Apart from the warning, there are only two other effects on `as'
10779 operation; Firstly, if you specify a CPU other than `i486', then shift
10780 by one instructions such as `sarl $1, %eax' will automatically use a
10781 two byte opcode sequence. The larger three byte opcode sequence is
10782 used on the 486 (and when no architecture is specified) because it
10783 executes faster on the 486. Note that you can explicitly request the
10784 two byte opcode by writing `sarl %eax'. Secondly, if you specify
10785 `i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte
10786 offset conditional jumps will be promoted when necessary to a two
10787 instruction sequence consisting of a conditional jump of the opposite
10788 sense around an unconditional jump to the target.
10790 Following the CPU architecture (but not a sub-architecture, which
10791 are those starting with a dot), you may specify `jumps' or `nojumps' to
10792 control automatic promotion of conditional jumps. `jumps' is the
10793 default, and enables jump promotion; All external jumps will be of the
10794 long variety, and file-local jumps will be promoted as necessary.
10795 (*note i386-Jumps::) `nojumps' leaves external conditional jumps as
10796 byte offset jumps, and warns about file-local conditional jumps that
10797 `as' promotes. Unconditional jumps are treated as for `jumps'.
10801 .arch i8086,nojumps
10804 File: as.info, Node: i386-Notes, Prev: i386-Bugs, Up: i386-Dependent
10809 There is some trickery concerning the `mul' and `imul' instructions
10810 that deserves mention. The 16-, 32-, 64- and 128-bit expanding
10811 multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul')
10812 can be output only in the one operand form. Thus, `imul %ebx, %eax'
10813 does _not_ select the expanding multiply; the expanding multiply would
10814 clobber the `%edx' register, and this would confuse `gcc' output. Use
10815 `imul %ebx' to get the 64-bit product in `%edx:%eax'.
10817 We have added a two operand form of `imul' when the first operand is
10818 an immediate mode expression and the second operand is a register.
10819 This is just a shorthand, so that, multiplying `%eax' by 69, for
10820 example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
10824 File: as.info, Node: i860-Dependent, Next: i960-Dependent, Prev: i386-Dependent, Up: Machine Dependencies
10826 9.16 Intel i860 Dependent Features
10827 ==================================
10831 * Notes-i860:: i860 Notes
10832 * Options-i860:: i860 Command-line Options
10833 * Directives-i860:: i860 Machine Directives
10834 * Opcodes for i860:: i860 Opcodes
10835 * Syntax of i860:: i860 Syntax
10838 File: as.info, Node: Notes-i860, Next: Options-i860, Up: i860-Dependent
10843 This is a fairly complete i860 assembler which is compatible with the
10844 UNIX System V/860 Release 4 assembler. However, it does not currently
10845 support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT').
10847 Like the SVR4/860 assembler, the output object format is ELF32.
10848 Currently, this is the only supported object format. If there is
10849 sufficient interest, other formats such as COFF may be implemented.
10851 Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
10852 being the default. One difference is that AT&T syntax requires the '%'
10853 prefix on register names while Intel syntax does not. Another
10854 difference is in the specification of relocatable expressions. The
10855 Intel syntax is `ha%expression' whereas the SVR4 syntax is
10856 `[expression]@ha' (and similarly for the "l" and "h" selectors).
10859 File: as.info, Node: Options-i860, Next: Directives-i860, Prev: Notes-i860, Up: i860-Dependent
10861 9.16.2 i860 Command-line Options
10862 --------------------------------
10864 9.16.2.1 SVR4 compatibility options
10865 ...................................
10868 Print assembler version.
10876 9.16.2.2 Other options
10877 ......................
10880 Select little endian output (this is the default).
10883 Select big endian output. Note that the i860 always reads
10884 instructions as little endian data, so this option only effects
10885 data and not instructions.
10888 Emit a warning message if any pseudo-instruction expansions
10889 occurred. For example, a `or' instruction with an immediate
10890 larger than 16-bits will be expanded into two instructions. This
10891 is a very undesirable feature to rely on, so this flag can help
10892 detect any code where it happens. One use of it, for instance, has
10893 been to find and eliminate any place where `gcc' may emit these
10894 pseudo-instructions.
10897 Enable support for the i860XP instructions and control registers.
10898 By default, this option is disabled so that only the base
10899 instruction set (i.e., i860XR) is supported.
10902 The i860 assembler defaults to AT&T/SVR4 syntax. This option
10903 enables the Intel syntax.
10906 File: as.info, Node: Directives-i860, Next: Opcodes for i860, Prev: Options-i860, Up: i860-Dependent
10908 9.16.3 i860 Machine Directives
10909 ------------------------------
10912 Enter dual instruction mode. While this directive is supported, the
10913 preferred way to use dual instruction mode is to explicitly code
10914 the dual bit with the `d.' prefix.
10917 Exit dual instruction mode. While this directive is supported, the
10918 preferred way to use dual instruction mode is to explicitly code
10919 the dual bit with the `d.' prefix.
10922 Change the temporary register used when expanding pseudo
10923 operations. The default register is `r31'.
10925 The `.dual', `.enddual', and `.atmp' directives are available only
10926 in the Intel syntax mode.
10928 Both syntaxes allow for the standard `.align' directive. However,
10929 the Intel syntax additionally allows keywords for the alignment
10930 parameter: "`.align type'", where `type' is one of `.short', `.long',
10931 `.quad', `.single', `.double' representing alignments of 2, 4, 16, 4,
10932 and 8, respectively.
10935 File: as.info, Node: Opcodes for i860, Next: Syntax of i860, Prev: Directives-i860, Up: i860-Dependent
10937 9.16.4 i860 Opcodes
10938 -------------------
10940 All of the Intel i860XR and i860XP machine instructions are supported.
10941 Please see either _i860 Microprocessor Programmer's Reference Manual_
10942 or _i860 Microprocessor Architecture_ for more information.
10944 9.16.4.1 Other instruction support (pseudo-instructions)
10945 ........................................................
10947 For compatibility with some other i860 assemblers, a number of
10948 pseudo-instructions are supported. While these are supported, they are
10949 a very undesirable feature that should be avoided - in particular, when
10950 they result in an expansion to multiple actual i860 instructions. Below
10951 are the pseudo-instructions that result in expansions.
10952 * Load large immediate into general register:
10954 The pseudo-instruction `mov imm,%rn' (where the immediate does not
10955 fit within a signed 16-bit field) will be expanded into:
10956 orh large_imm@h,%r0,%rn
10957 or large_imm@l,%rn,%rn
10959 * Load/store with relocatable address expression:
10961 For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will
10963 orh addr_exp@ha,%rx,%r31
10964 ld.l addr_exp@l(%r31),%rn
10966 The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x,
10967 fst.x', and `pst.x' as well.
10969 * Signed large immediate with add/subtract:
10971 If any of the arithmetic operations `adds, addu, subs, subu' are
10972 used with an immediate larger than 16-bits (signed), then they
10973 will be expanded. For instance, the pseudo-instruction `adds
10974 large_imm,%rx,%rn' expands to:
10975 orh large_imm@h,%r0,%r31
10976 or large_imm@l,%r31,%r31
10979 * Unsigned large immediate with logical operations:
10981 Logical operations (`or, andnot, or, xor') also result in
10982 expansions. The pseudo-instruction `or large_imm,%rx,%rn' results
10984 orh large_imm@h,%rx,%r31
10985 or large_imm@l,%r31,%rn
10987 Similarly for the others, except for `and' which expands to:
10988 andnot (-1 - large_imm)@h,%rx,%r31
10989 andnot (-1 - large_imm)@l,%r31,%rn
10992 File: as.info, Node: Syntax of i860, Prev: Opcodes for i860, Up: i860-Dependent
10999 * i860-Chars:: Special Characters
11002 File: as.info, Node: i860-Chars, Up: Syntax of i860
11004 9.16.5.1 Special Characters
11005 ...........................
11007 The presence of a `#' appearing anywhere on a line indicates the start
11008 of a comment that extends to the end of that line.
11010 If a `#' appears as the first character of a line then the whole
11011 line is treated as a comment, but in this case the line can also be a
11012 logical line number directive (*note Comments::) or a preprocessor
11013 control command (*note Preprocessing::).
11015 The `;' character can be used to separate statements on the same
11019 File: as.info, Node: i960-Dependent, Next: IA-64-Dependent, Prev: i860-Dependent, Up: Machine Dependencies
11021 9.17 Intel 80960 Dependent Features
11022 ===================================
11026 * Options-i960:: i960 Command-line Options
11027 * Floating Point-i960:: Floating Point
11028 * Directives-i960:: i960 Machine Directives
11029 * Opcodes for i960:: i960 Opcodes
11030 * Syntax of i960:: i960 Syntax
11033 File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent
11035 9.17.1 i960 Command-line Options
11036 --------------------------------
11038 `-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
11039 Select the 80960 architecture. Instructions or features not
11040 supported by the selected architecture cause fatal errors.
11042 `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
11043 Synonyms are provided for compatibility with other tools.
11045 If you do not specify any of these options, `as' generates code
11046 for any instruction or feature that is supported by _some_ version
11047 of the 960 (even if this means mixing architectures!). In
11048 principle, `as' attempts to deduce the minimal sufficient
11049 processor type if none is specified; depending on the object code
11050 format, the processor type may be recorded in the object file. If
11051 it is critical that the `as' output match a specific architecture,
11052 specify that architecture explicitly.
11055 Add code to collect information about conditional branches taken,
11056 for later optimization using branch prediction bits. (The
11057 conditional branch instructions have branch prediction bits in the
11058 CA, CB, and CC architectures.) If BR represents a conditional
11059 branch instruction, the following represents the code generated by
11060 the assembler when `-b' is specified:
11062 call INCREMENT ROUTINE
11063 .word 0 # pre-counter
11065 call INCREMENT ROUTINE
11066 .word 0 # post-counter
11068 The counter following a branch records the number of times that
11069 branch was _not_ taken; the difference between the two counters is
11070 the number of times the branch _was_ taken.
11072 A table of every such `Label' is also generated, so that the
11073 external postprocessor `gbr960' (supplied by Intel) can locate all
11074 the counters. This table is always labeled `__BRANCH_TABLE__';
11075 this is a local symbol to permit collecting statistics for many
11076 separate object files. The table is word aligned, and begins with
11077 a two-word header. The first word, initialized to 0, is used in
11078 maintaining linked lists of branch tables. The second word is a
11079 count of the number of entries in the table, which follow
11080 immediately: each is a word, pointing to one of the labels
11083 +------------+------------+------------+ ... +------------+
11085 | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N |
11087 +------------+------------+------------+ ... +------------+
11089 __BRANCH_TABLE__ layout
11091 The first word of the header is used to locate multiple branch
11092 tables, since each object file may contain one. Normally the links
11093 are maintained with a call to an initialization routine, placed at
11094 the beginning of each function in the file. The GNU C compiler
11095 generates these calls automatically when you give it a `-b' option.
11096 For further details, see the documentation of `gbr960'.
11099 Normally, Compare-and-Branch instructions with targets that require
11100 displacements greater than 13 bits (or that have external targets)
11101 are replaced with the corresponding compare (or `chkbit') and
11102 branch instructions. You can use the `-no-relax' option to
11103 specify that `as' should generate errors instead, if the target
11104 displacement is larger than 13 bits.
11106 This option does not affect the Compare-and-Jump instructions; the
11107 code emitted for them is _always_ adjusted when necessary
11108 (depending on displacement size), regardless of whether you use
11112 File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent
11114 9.17.2 Floating Point
11115 ---------------------
11117 `as' generates IEEE floating-point numbers for the directives `.float',
11118 `.double', `.extended', and `.single'.
11121 File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent
11123 9.17.3 i960 Machine Directives
11124 ------------------------------
11126 `.bss SYMBOL, LENGTH, ALIGN'
11127 Reserve LENGTH bytes in the bss section for a local SYMBOL,
11128 aligned to the power of two specified by ALIGN. LENGTH and ALIGN
11129 must be positive absolute expressions. This directive differs
11130 from `.lcomm' only in that it permits you to specify an alignment.
11131 *Note `.lcomm': Lcomm.
11133 `.extended FLONUMS'
11134 `.extended' expects zero or more flonums, separated by commas; for
11135 each flonum, `.extended' emits an IEEE extended-format (80-bit)
11136 floating-point number.
11138 `.leafproc CALL-LAB, BAL-LAB'
11139 You can use the `.leafproc' directive in conjunction with the
11140 optimized `callj' instruction to enable faster calls of leaf
11141 procedures. If a procedure is known to call no other procedures,
11142 you may define an entry point that skips procedure prolog code
11143 (and that does not depend on system-supplied saved context), and
11144 declare it as the BAL-LAB using `.leafproc'. If the procedure
11145 also has an entry point that goes through the normal prolog, you
11146 can specify that entry point as CALL-LAB.
11148 A `.leafproc' declaration is meant for use in conjunction with the
11149 optimized call instruction `callj'; the directive records the data
11150 needed later to choose between converting the `callj' into a `bal'
11153 CALL-LAB is optional; if only one argument is present, or if the
11154 two arguments are identical, the single argument is assumed to be
11155 the `bal' entry point.
11157 `.sysproc NAME, INDEX'
11158 The `.sysproc' directive defines a name for a system procedure.
11159 After you define it using `.sysproc', you can use NAME to refer to
11160 the system procedure identified by INDEX when calling procedures
11161 with the optimized call instruction `callj'.
11163 Both arguments are required; INDEX must be between 0 and 31
11167 File: as.info, Node: Opcodes for i960, Next: Syntax of i960, Prev: Directives-i960, Up: i960-Dependent
11169 9.17.4 i960 Opcodes
11170 -------------------
11172 All Intel 960 machine instructions are supported; *note i960
11173 Command-line Options: Options-i960. for a discussion of selecting the
11174 instruction subset for a particular 960 architecture.
11176 Some opcodes are processed beyond simply emitting a single
11177 corresponding instruction: `callj', and Compare-and-Branch or
11178 Compare-and-Jump instructions with target displacements larger than 13
11183 * callj-i960:: `callj'
11184 * Compare-and-branch-i960:: Compare-and-Branch
11187 File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960
11192 You can write `callj' to have the assembler or the linker determine the
11193 most appropriate form of subroutine call: `call', `bal', or `calls'.
11194 If the assembly source contains enough information--a `.leafproc' or
11195 `.sysproc' directive defining the operand--then `as' translates the
11196 `callj'; if not, it simply emits the `callj', leaving it for the linker
11200 File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960
11202 9.17.4.2 Compare-and-Branch
11203 ...........................
11205 The 960 architectures provide combined Compare-and-Branch instructions
11206 that permit you to store the branch target in the lower 13 bits of the
11207 instruction word itself. However, if you specify a branch target far
11208 enough away that its address won't fit in 13 bits, the assembler can
11209 either issue an error, or convert your Compare-and-Branch instruction
11210 into separate instructions to do the compare and the branch.
11212 Whether `as' gives an error or expands the instruction depends on
11213 two choices you can make: whether you use the `-no-relax' option, and
11214 whether you use a "Compare and Branch" instruction or a "Compare and
11215 Jump" instruction. The "Jump" instructions are _always_ expanded if
11216 necessary; the "Branch" instructions are expanded when necessary
11217 _unless_ you specify `-no-relax'--in which case `as' gives an error
11220 These are the Compare-and-Branch instructions, their "Jump" variants,
11221 and the instruction pairs they may expand into:
11224 Branch Jump Expanded to
11225 ------ ------ ------------
11228 cmpibe cmpije cmpi; be
11229 cmpibg cmpijg cmpi; bg
11230 cmpibge cmpijge cmpi; bge
11231 cmpibl cmpijl cmpi; bl
11232 cmpible cmpijle cmpi; ble
11233 cmpibno cmpijno cmpi; bno
11234 cmpibne cmpijne cmpi; bne
11235 cmpibo cmpijo cmpi; bo
11236 cmpobe cmpoje cmpo; be
11237 cmpobg cmpojg cmpo; bg
11238 cmpobge cmpojge cmpo; bge
11239 cmpobl cmpojl cmpo; bl
11240 cmpoble cmpojle cmpo; ble
11241 cmpobne cmpojne cmpo; bne
11244 File: as.info, Node: Syntax of i960, Prev: Opcodes for i960, Up: i960-Dependent
11246 9.17.5 Syntax for the i960
11247 --------------------------
11251 * i960-Chars:: Special Characters
11254 File: as.info, Node: i960-Chars, Up: Syntax of i960
11256 9.17.5.1 Special Characters
11257 ...........................
11259 The presence of a `#' on a line indicates the start of a comment that
11260 extends to the end of the current line.
11262 If a `#' appears as the first character of a line, the whole line is
11263 treated as a comment, but in this case the line can also be a logical
11264 line number directive (*note Comments::) or a preprocessor control
11265 command (*note Preprocessing::).
11267 The `;' character can be used to separate statements on the same
11271 File: as.info, Node: IA-64-Dependent, Next: IP2K-Dependent, Prev: i960-Dependent, Up: Machine Dependencies
11273 9.18 IA-64 Dependent Features
11274 =============================
11278 * IA-64 Options:: Options
11279 * IA-64 Syntax:: Syntax
11280 * IA-64 Opcodes:: Opcodes
11283 File: as.info, Node: IA-64 Options, Next: IA-64 Syntax, Up: IA-64-Dependent
11289 This option instructs the assembler to mark the resulting object
11290 file as using the "constant GP" model. With this model, it is
11291 assumed that the entire program uses a single global pointer (GP)
11292 value. Note that this option does not in any fashion affect the
11293 machine code emitted by the assembler. All it does is turn on the
11294 EF_IA_64_CONS_GP flag in the ELF file header.
11297 This option instructs the assembler to mark the resulting object
11298 file as using the "constant GP without function descriptor" data
11299 model. This model is like the "constant GP" model, except that it
11300 additionally does away with function descriptors. What this means
11301 is that the address of a function refers directly to the
11302 function's code entry-point. Normally, such an address would
11303 refer to a function descriptor, which contains both the code
11304 entry-point and the GP-value needed by the function. Note that
11305 this option does not in any fashion affect the machine code
11306 emitted by the assembler. All it does is turn on the
11307 EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
11313 These options select the data model. The assembler defaults to
11314 `-mlp64' (LP64 data model).
11318 These options select the byte order. The `-mle' option selects
11319 little-endian byte order (default) and `-mbe' selects big-endian
11320 byte order. Note that IA-64 machine code always uses
11321 little-endian byte order.
11325 Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default
11328 `-munwind-check=warning'
11329 `-munwind-check=error'
11330 These options control what the assembler will do when performing
11331 consistency checks on unwind directives. `-munwind-check=warning'
11332 will make the assembler issue a warning when an unwind directive
11333 check fails. This is the default. `-munwind-check=error' will
11334 make the assembler issue an error when an unwind directive check
11340 These options control what the assembler will do when the `hint.b'
11341 instruction is used. `-mhint.b=ok' will make the assembler accept
11342 `hint.b'. `-mint.b=warning' will make the assembler issue a
11343 warning when `hint.b' is used. `-mhint.b=error' will make the
11344 assembler treat `hint.b' as an error, which is the default.
11348 These options turn on dependency violation checking.
11351 This option instructs the assembler to automatically insert stop
11352 bits where necessary to remove dependency violations. This is the
11356 This option turns off dependency violation checking.
11359 This turns on debug output intended to help tracking down bugs in
11360 the dependency violation checker.
11363 This is a shortcut for -xnone -xdebug.
11366 This is a shortcut for -xexplicit -xdebug.
11370 File: as.info, Node: IA-64 Syntax, Next: IA-64 Opcodes, Prev: IA-64 Options, Up: IA-64-Dependent
11375 The assembler syntax closely follows the IA-64 Assembly Language
11380 * IA-64-Chars:: Special Characters
11381 * IA-64-Regs:: Register Names
11382 * IA-64-Bits:: Bit Names
11383 * IA-64-Relocs:: Relocations
11386 File: as.info, Node: IA-64-Chars, Next: IA-64-Regs, Up: IA-64 Syntax
11388 9.18.2.1 Special Characters
11389 ...........................
11391 `//' is the line comment token.
11393 `;' can be used instead of a newline to separate statements.
11396 File: as.info, Node: IA-64-Regs, Next: IA-64-Bits, Prev: IA-64-Chars, Up: IA-64 Syntax
11398 9.18.2.2 Register Names
11399 .......................
11401 The 128 integer registers are referred to as `rN'. The 128
11402 floating-point registers are referred to as `fN'. The 128 application
11403 registers are referred to as `arN'. The 128 control registers are
11404 referred to as `crN'. The 64 one-bit predicate registers are referred
11405 to as `pN'. The 8 branch registers are referred to as `bN'. In
11406 addition, the assembler defines a number of aliases: `gp' (`r1'), `sp'
11407 (`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'),
11408 `ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N').
11410 For convenience, the assembler also defines aliases for all named
11411 application and control registers. For example, `ar.bsp' refers to the
11412 register backing store pointer (`ar17'). Similarly, `cr.eoi' refers to
11413 the end-of-interrupt register (`cr67').
11416 File: as.info, Node: IA-64-Bits, Next: IA-64-Relocs, Prev: IA-64-Regs, Up: IA-64 Syntax
11418 9.18.2.3 IA-64 Processor-Status-Register (PSR) Bit Names
11419 ........................................................
11421 The assembler defines bit masks for each of the bits in the IA-64
11422 processor status register. For example, `psr.ic' corresponds to a
11423 value of 0x2000. These masks are primarily intended for use with the
11424 `ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere
11425 else where an integer constant is expected.
11428 File: as.info, Node: IA-64-Relocs, Prev: IA-64-Bits, Up: IA-64 Syntax
11430 9.18.2.4 Relocations
11431 ....................
11433 In addition to the standard IA-64 relocations, the following
11434 relocations are implemented by `as':
11437 Convert the address offset V into a slot count. This pseudo
11438 function is available only on VMS. The expression V must be known
11439 at assembly time: it can't reference undefined symbols or symbols
11440 in different sections.
11443 File: as.info, Node: IA-64 Opcodes, Prev: IA-64 Syntax, Up: IA-64-Dependent
11448 For detailed information on the IA-64 machine instruction set, see the
11449 IA-64 Architecture Handbook
11450 (http://developer.intel.com/design/itanium/arch_spec.htm).
11453 File: as.info, Node: IP2K-Dependent, Next: LM32-Dependent, Prev: IA-64-Dependent, Up: Machine Dependencies
11455 9.19 IP2K Dependent Features
11456 ============================
11460 * IP2K-Opts:: IP2K Options
11461 * IP2K-Syntax:: IP2K Syntax
11464 File: as.info, Node: IP2K-Opts, Next: IP2K-Syntax, Up: IP2K-Dependent
11466 9.19.1 IP2K Options
11467 -------------------
11469 The Ubicom IP2K version of `as' has a few machine dependent options:
11472 `as' can assemble the extended IP2022 instructions, but it will
11473 only do so if this is specifically allowed via this command line
11477 This option restores the assembler's default behaviour of not
11478 permitting the extended IP2022 instructions to be assembled.
11482 File: as.info, Node: IP2K-Syntax, Prev: IP2K-Opts, Up: IP2K-Dependent
11489 * IP2K-Chars:: Special Characters
11492 File: as.info, Node: IP2K-Chars, Up: IP2K-Syntax
11494 9.19.2.1 Special Characters
11495 ...........................
11497 The presence of a `;' on a line indicates the start of a comment that
11498 extends to the end of the current line.
11500 If a `#' appears as the first character of a line, the whole line is
11501 treated as a comment, but in this case the line can also be a logical
11502 line number directive (*note Comments::) or a preprocessor control
11503 command (*note Preprocessing::).
11505 The IP2K assembler does not currently support a line separator
11509 File: as.info, Node: LM32-Dependent, Next: M32C-Dependent, Prev: IP2K-Dependent, Up: Machine Dependencies
11511 9.20 LM32 Dependent Features
11512 ============================
11516 * LM32 Options:: Options
11517 * LM32 Syntax:: Syntax
11518 * LM32 Opcodes:: Opcodes
11521 File: as.info, Node: LM32 Options, Next: LM32 Syntax, Up: LM32-Dependent
11526 `-mmultiply-enabled'
11527 Enable multiply instructions.
11530 Enable divide instructions.
11532 `-mbarrel-shift-enabled'
11533 Enable barrel-shift instructions.
11535 `-msign-extend-enabled'
11536 Enable sign extend instructions.
11539 Enable user defined instructions.
11542 Enable instruction cache related CSRs.
11545 Enable data cache related CSRs.
11548 Enable break instructions.
11551 Enable all instructions and CSRs.
11555 File: as.info, Node: LM32 Syntax, Next: LM32 Opcodes, Prev: LM32 Options, Up: LM32-Dependent
11562 * LM32-Regs:: Register Names
11563 * LM32-Modifiers:: Relocatable Expression Modifiers
11564 * LM32-Chars:: Special Characters
11567 File: as.info, Node: LM32-Regs, Next: LM32-Modifiers, Up: LM32 Syntax
11569 9.20.2.1 Register Names
11570 .......................
11572 LM32 has 32 x 32-bit general purpose registers `r0', `r1', ... `r31'.
11574 The following aliases are defined: `gp' - `r26', `fp' - `r27', `sp'
11575 - `r28', `ra' - `r29', `ea' - `r30', `ba' - `r31'.
11577 LM32 has the following Control and Status Registers (CSRs).
11589 Instruction cache control.
11592 Data cache control.
11601 Exception base address.
11607 Debug exception base address.
11640 File: as.info, Node: LM32-Modifiers, Next: LM32-Chars, Prev: LM32-Regs, Up: LM32 Syntax
11642 9.20.2.2 Relocatable Expression Modifiers
11643 .........................................
11645 The assembler supports several modifiers when using relocatable
11646 addresses in LM32 instruction operands. The general syntax is the
11649 modifier(relocatable-expression)
11652 This modifier allows you to use bits 0 through 15 of an address
11653 expression as 16 bit relocatable expression.
11656 This modifier allows you to use bits 16 through 23 of an address
11657 expression as 16 bit relocatable expression.
11661 ori r4, r4, lo(sym+10)
11662 orhi r4, r4, hi(sym+10)
11665 This modified creates a 16-bit relocatable expression that is the
11666 offset of the symbol from the global pointer.
11671 This modifier places a symbol in the GOT and creates a 16-bit
11672 relocatable expression that is the offset into the GOT of this
11675 lw r4, (gp+got(sym))
11678 This modifier allows you to use the bits 0 through 15 of an
11679 address which is an offset from the GOT.
11682 This modifier allows you to use the bits 16 through 31 of an
11683 address which is an offset from the GOT.
11685 orhi r4, r4, gotoffhi16(lsym)
11686 addi r4, r4, gotofflo16(lsym)
11690 File: as.info, Node: LM32-Chars, Prev: LM32-Modifiers, Up: LM32 Syntax
11692 9.20.2.3 Special Characters
11693 ...........................
11695 The presence of a `#' on a line indicates the start of a comment that
11696 extends to the end of the current line. Note that if a line starts
11697 with a `#' character then it can also be a logical line number
11698 directive (*note Comments::) or a preprocessor control command (*note
11701 A semicolon (`;') can be used to separate multiple statements on the
11705 File: as.info, Node: LM32 Opcodes, Prev: LM32 Syntax, Up: LM32-Dependent
11710 For detailed information on the LM32 machine instruction set, see
11711 `http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/'.
11713 `as' implements all the standard LM32 opcodes.
11716 File: as.info, Node: M32C-Dependent, Next: M32R-Dependent, Prev: LM32-Dependent, Up: Machine Dependencies
11718 9.21 M32C Dependent Features
11719 ============================
11721 `as' can assemble code for several different members of the Renesas
11722 M32C family. Normally the default is to assemble code for the M16C
11723 microprocessor. The `-m32c' option may be used to change the default
11724 to the M32C microprocessor.
11728 * M32C-Opts:: M32C Options
11729 * M32C-Syntax:: M32C Syntax
11732 File: as.info, Node: M32C-Opts, Next: M32C-Syntax, Up: M32C-Dependent
11734 9.21.1 M32C Options
11735 -------------------
11737 The Renesas M32C version of `as' has these machine-dependent options:
11740 Assemble M32C instructions.
11743 Assemble M16C instructions (default).
11746 Enable support for link-time relaxations.
11749 Support H'00 style hex constants in addition to 0x00 style.
11753 File: as.info, Node: M32C-Syntax, Prev: M32C-Opts, Up: M32C-Dependent
11760 * M32C-Modifiers:: Symbolic Operand Modifiers
11761 * M32C-Chars:: Special Characters
11764 File: as.info, Node: M32C-Modifiers, Next: M32C-Chars, Up: M32C-Syntax
11766 9.21.2.1 Symbolic Operand Modifiers
11767 ...................................
11769 The assembler supports several modifiers when using symbol addresses in
11770 M32C instruction operands. The general syntax is the following:
11776 These modifiers override the assembler's assumptions about how big
11777 a symbol's address is. Normally, when it sees an operand like
11778 `sym[a0]' it assumes `sym' may require the widest displacement
11779 field (16 bits for `-m16c', 24 bits for `-m32c'). These modifiers
11780 tell it to assume the address will fit in an 8 or 16 bit
11781 (respectively) unsigned displacement. Note that, of course, if it
11782 doesn't actually fit you will get linker errors. Example:
11784 mov.w %dsp8(sym)[a0],r1
11785 mov.b #0,%dsp8(sym)[a0]
11788 This modifier allows you to load bits 16 through 23 of a 24 bit
11789 address into an 8 bit register. This is useful with, for example,
11790 the M16C `smovf' instruction, which expects a 20 bit address in
11791 `r1h' and `a0'. Example:
11793 mov.b #%hi8(sym),r1h
11794 mov.w #%lo16(sym),a0
11798 Likewise, this modifier allows you to load bits 0 through 15 of a
11799 24 bit address into a 16 bit register.
11802 This modifier allows you to load bits 16 through 31 of a 32 bit
11803 address into a 16 bit register. While the M32C family only has 24
11804 bits of address space, it does support addresses in pairs of 16 bit
11805 registers (like `a1a0' for the `lde' instruction). This modifier
11806 is for loading the upper half in such cases. Example:
11808 mov.w #%hi16(sym),a1
11809 mov.w #%lo16(sym),a0
11815 File: as.info, Node: M32C-Chars, Prev: M32C-Modifiers, Up: M32C-Syntax
11817 9.21.2.2 Special Characters
11818 ...........................
11820 The presence of a `;' character on a line indicates the start of a
11821 comment that extends to the end of that line.
11823 If a `#' appears as the first character of a line, the whole line is
11824 treated as a comment, but in this case the line can also be a logical
11825 line number directive (*note Comments::) or a preprocessor control
11826 command (*note Preprocessing::).
11828 The `|' character can be used to separate statements on the same
11832 File: as.info, Node: M32R-Dependent, Next: M68K-Dependent, Prev: M32C-Dependent, Up: Machine Dependencies
11834 9.22 M32R Dependent Features
11835 ============================
11839 * M32R-Opts:: M32R Options
11840 * M32R-Directives:: M32R Directives
11841 * M32R-Warnings:: M32R Warnings
11844 File: as.info, Node: M32R-Opts, Next: M32R-Directives, Up: M32R-Dependent
11846 9.22.1 M32R Options
11847 -------------------
11849 The Renease M32R version of `as' has a few machine dependent options:
11852 `as' can assemble code for several different members of the
11853 Renesas M32R family. Normally the default is to assemble code for
11854 the M32R microprocessor. This option may be used to change the
11855 default to the M32RX microprocessor, which adds some more
11856 instructions to the basic M32R instruction set, and some
11857 additional parameters to some of the original instructions.
11860 This option changes the target processor to the the M32R2
11864 This option can be used to restore the assembler's default
11865 behaviour of assembling for the M32R microprocessor. This can be
11866 useful if the default has been changed by a previous command line
11870 This option tells the assembler to produce little-endian code and
11871 data. The default is dependent upon how the toolchain was
11875 This is a synonym for _-little_.
11878 This option tells the assembler to produce big-endian code and
11882 This is a synonum for _-big_.
11885 This option specifies that the output of the assembler should be
11886 marked as position-independent code (PIC).
11889 This option tells the assembler to attempts to combine two
11890 sequential instructions into a single, parallel instruction, where
11891 it is legal to do so.
11894 This option disables a previously enabled _-parallel_ option.
11897 This option disables the support for the extended bit-field
11898 instructions provided by the M32R2. If this support needs to be
11899 re-enabled the _-bitinst_ switch can be used to restore it.
11902 This option tells the assembler to attempt to optimize the
11903 instructions that it produces. This includes filling delay slots
11904 and converting sequential instructions into parallel ones. This
11905 option implies _-parallel_.
11907 `-warn-explicit-parallel-conflicts'
11908 Instructs `as' to produce warning messages when questionable
11909 parallel instructions are encountered. This option is enabled by
11910 default, but `gcc' disables it when it invokes `as' directly.
11911 Questionable instructions are those whose behaviour would be
11912 different if they were executed sequentially. For example the
11913 code fragment `mv r1, r2 || mv r3, r1' produces a different result
11914 from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3
11915 and then r2 into r1, whereas the later moves r2 into r1 and r3.
11918 This is a shorter synonym for the
11919 _-warn-explicit-parallel-conflicts_ option.
11921 `-no-warn-explicit-parallel-conflicts'
11922 Instructs `as' not to produce warning messages when questionable
11923 parallel instructions are encountered.
11926 This is a shorter synonym for the
11927 _-no-warn-explicit-parallel-conflicts_ option.
11929 `-ignore-parallel-conflicts'
11930 This option tells the assembler's to stop checking parallel
11931 instructions for constraint violations. This ability is provided
11932 for hardware vendors testing chip designs and should not be used
11933 under normal circumstances.
11935 `-no-ignore-parallel-conflicts'
11936 This option restores the assembler's default behaviour of checking
11937 parallel instructions to detect constraint violations.
11940 This is a shorter synonym for the _-ignore-parallel-conflicts_
11944 This is a shorter synonym for the _-no-ignore-parallel-conflicts_
11947 `-warn-unmatched-high'
11948 This option tells the assembler to produce a warning message if a
11949 `.high' pseudo op is encountered without a matching `.low' pseudo
11950 op. The presence of such an unmatched pseudo op usually indicates
11951 a programming error.
11953 `-no-warn-unmatched-high'
11954 Disables a previously enabled _-warn-unmatched-high_ option.
11957 This is a shorter synonym for the _-warn-unmatched-high_ option.
11960 This is a shorter synonym for the _-no-warn-unmatched-high_ option.
11964 File: as.info, Node: M32R-Directives, Next: M32R-Warnings, Prev: M32R-Opts, Up: M32R-Dependent
11966 9.22.2 M32R Directives
11967 ----------------------
11969 The Renease M32R version of `as' has a few architecture specific
11973 The `low' directive computes the value of its expression and
11974 places the lower 16-bits of the result into the immediate-field of
11975 the instruction. For example:
11977 or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
11978 add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred
11981 The `high' directive computes the value of its expression and
11982 places the upper 16-bits of the result into the immediate-field of
11983 the instruction. For example:
11985 seth r0, #high(0x12345678) ; compute r0 = 0x12340000
11986 seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred
11989 The `shigh' directive is very similar to the `high' directive. It
11990 also computes the value of its expression and places the upper
11991 16-bits of the result into the immediate-field of the instruction.
11992 The difference is that `shigh' also checks to see if the lower
11993 16-bits could be interpreted as a signed number, and if so it
11994 assumes that a borrow will occur from the upper-16 bits. To
11995 compensate for this the `shigh' directive pre-biases the upper 16
11996 bit value by adding one to it. For example:
12000 seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000
12001 seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000
12003 In the second example the lower 16-bits are 0x8000. If these are
12004 treated as a signed value and sign extended to 32-bits then the
12005 value becomes 0xffff8000. If this value is then added to
12006 0x00010000 then the result is 0x00008000.
12008 This behaviour is to allow for the different semantics of the
12009 `or3' and `add3' instructions. The `or3' instruction treats its
12010 16-bit immediate argument as unsigned whereas the `add3' treats
12011 its 16-bit immediate as a signed value. So for example:
12013 seth r0, #shigh(0x00008000)
12014 add3 r0, r0, #low(0x00008000)
12016 Produces the correct result in r0, whereas:
12018 seth r0, #shigh(0x00008000)
12019 or3 r0, r0, #low(0x00008000)
12021 Stores 0xffff8000 into r0.
12023 Note - the `shigh' directive does not know where in the assembly
12024 source code the lower 16-bits of the value are going set, so it
12025 cannot check to make sure that an `or3' instruction is being used
12026 rather than an `add3' instruction. It is up to the programmer to
12027 make sure that correct directives are used.
12030 The directive performs a similar thing as the _-m32r_ command line
12031 option. It tells the assembler to only accept M32R instructions
12032 from now on. An instructions from later M32R architectures are
12036 The directive performs a similar thing as the _-m32rx_ command
12037 line option. It tells the assembler to start accepting the extra
12038 instructions in the M32RX ISA as well as the ordinary M32R ISA.
12041 The directive performs a similar thing as the _-m32r2_ command
12042 line option. It tells the assembler to start accepting the extra
12043 instructions in the M32R2 ISA as well as the ordinary M32R ISA.
12046 The directive performs a similar thing as the _-little_ command
12047 line option. It tells the assembler to start producing
12048 little-endian code and data. This option should be used with care
12049 as producing mixed-endian binary files is fraught with danger.
12052 The directive performs a similar thing as the _-big_ command line
12053 option. It tells the assembler to start producing big-endian code
12054 and data. This option should be used with care as producing
12055 mixed-endian binary files is fraught with danger.
12059 File: as.info, Node: M32R-Warnings, Prev: M32R-Directives, Up: M32R-Dependent
12061 9.22.3 M32R Warnings
12062 --------------------
12064 There are several warning and error messages that can be produced by
12065 `as' which are specific to the M32R:
12067 `output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
12068 This message is only produced if warnings for explicit parallel
12069 conflicts have been enabled. It indicates that the assembler has
12070 encountered a parallel instruction in which the destination
12071 register of the left hand instruction is used as an input register
12072 in the right hand instruction. For example in this code fragment
12073 `mv r1, r2 || neg r3, r1' register r1 is the destination of the
12074 move instruction and the input to the neg instruction.
12076 `output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
12077 This message is only produced if warnings for explicit parallel
12078 conflicts have been enabled. It indicates that the assembler has
12079 encountered a parallel instruction in which the destination
12080 register of the right hand instruction is used as an input
12081 register in the left hand instruction. For example in this code
12082 fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
12083 of the neg instruction and the input to the move instruction.
12085 `instruction `...' is for the M32RX only'
12086 This message is produced when the assembler encounters an
12087 instruction which is only supported by the M32Rx processor, and
12088 the `-m32rx' command line flag has not been specified to allow
12089 assembly of such instructions.
12091 `unknown instruction `...''
12092 This message is produced when the assembler encounters an
12093 instruction which it does not recognize.
12095 `only the NOP instruction can be issued in parallel on the m32r'
12096 This message is produced when the assembler encounters a parallel
12097 instruction which does not involve a NOP instruction and the
12098 `-m32rx' command line flag has not been specified. Only the M32Rx
12099 processor is able to execute two instructions in parallel.
12101 `instruction `...' cannot be executed in parallel.'
12102 This message is produced when the assembler encounters a parallel
12103 instruction which is made up of one or two instructions which
12104 cannot be executed in parallel.
12106 `Instructions share the same execution pipeline'
12107 This message is produced when the assembler encounters a parallel
12108 instruction whoes components both use the same execution pipeline.
12110 `Instructions write to the same destination register.'
12111 This message is produced when the assembler encounters a parallel
12112 instruction where both components attempt to modify the same
12113 register. For example these code fragments will produce this
12114 message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
12115 @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
12116 r3, r4' (Both write to the condition bit)
12120 File: as.info, Node: M68K-Dependent, Next: M68HC11-Dependent, Prev: M32R-Dependent, Up: Machine Dependencies
12122 9.23 M680x0 Dependent Features
12123 ==============================
12127 * M68K-Opts:: M680x0 Options
12128 * M68K-Syntax:: Syntax
12129 * M68K-Moto-Syntax:: Motorola Syntax
12130 * M68K-Float:: Floating Point
12131 * M68K-Directives:: 680x0 Machine Directives
12132 * M68K-opcodes:: Opcodes
12135 File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent
12137 9.23.1 M680x0 Options
12138 ---------------------
12140 The Motorola 680x0 version of `as' has a few machine dependent options:
12142 `-march=ARCHITECTURE'
12143 This option specifies a target architecture. The following
12144 architectures are recognized: `68000', `68010', `68020', `68030',
12145 `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and
12149 This option specifies a target cpu. When used in conjunction with
12150 the `-march' option, the cpu must be within the specified
12151 architecture. Also, the generic features of the architecture are
12152 used for instruction generation, rather than those of the specific
12162 Enable or disable various architecture specific features. If a
12163 chip or architecture by default supports an option (for instance
12164 `-march=isaaplus' includes the `-mdiv' option), explicitly
12165 disabling the option will override the default.
12168 You can use the `-l' option to shorten the size of references to
12169 undefined symbols. If you do not use the `-l' option, references
12170 to undefined symbols are wide enough for a full `long' (32 bits).
12171 (Since `as' cannot know where these symbols end up, `as' can only
12172 allocate space for the linker to fill in later. Since `as' does
12173 not know how far away these symbols are, it allocates as much
12174 space as it can.) If you use this option, the references are only
12175 one word wide (16 bits). This may be useful if you want the
12176 object file to be as small as possible, and you know that the
12177 relevant symbols are always less than 17 bits away.
12179 `--register-prefix-optional'
12180 For some configurations, especially those where the compiler
12181 normally does not prepend an underscore to the names of user
12182 variables, the assembler requires a `%' before any use of a
12183 register name. This is intended to let the assembler distinguish
12184 between C variables and functions named `a0' through `a7', and so
12185 on. The `%' is always accepted, but is not required for certain
12186 configurations, notably `sun3'. The `--register-prefix-optional'
12187 option may be used to permit omitting the `%' even for
12188 configurations for which it is normally required. If this is
12189 done, it will generally be impossible to refer to C variables and
12190 functions with the same names as register names.
12193 Normally the character `|' is treated as a comment character, which
12194 means that it can not be used in expressions. The `--bitwise-or'
12195 option turns `|' into a normal character. In this mode, you must
12196 either use C style comments, or start comments with a `#' character
12197 at the beginning of a line.
12199 `--base-size-default-16 --base-size-default-32'
12200 If you use an addressing mode with a base register without
12201 specifying the size, `as' will normally use the full 32 bit value.
12202 For example, the addressing mode `%a0@(%d0)' is equivalent to
12203 `%a0@(%d0:l)'. You may use the `--base-size-default-16' option to
12204 tell `as' to default to using the 16 bit value. In this case,
12205 `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'. You may use the
12206 `--base-size-default-32' option to restore the default behaviour.
12208 `--disp-size-default-16 --disp-size-default-32'
12209 If you use an addressing mode with a displacement, and the value
12210 of the displacement is not known, `as' will normally assume that
12211 the value is 32 bits. For example, if the symbol `disp' has not
12212 been defined, `as' will assemble the addressing mode
12213 `%a0@(disp,%d0)' as though `disp' is a 32 bit value. You may use
12214 the `--disp-size-default-16' option to tell `as' to instead assume
12215 that the displacement is 16 bits. In this case, `as' will
12216 assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value. You
12217 may use the `--disp-size-default-32' option to restore the default
12221 Always keep branches PC-relative. In the M680x0 architecture all
12222 branches are defined as PC-relative. However, on some processors
12223 they are limited to word displacements maximum. When `as' needs a
12224 long branch that is not available, it normally emits an absolute
12225 jump instead. This option disables this substitution. When this
12226 option is given and no long branches are available, only word
12227 branches will be emitted. An error message will be generated if a
12228 word branch cannot reach its target. This option has no effect on
12229 68020 and other processors that have long branches. *note Branch
12230 Improvement: M68K-Branch.
12233 `as' can assemble code for several different members of the
12234 Motorola 680x0 family. The default depends upon how `as' was
12235 configured when it was built; normally, the default is to assemble
12236 code for the 68020 microprocessor. The following options may be
12237 used to change the default. These options control which
12238 instructions and addressing modes are permitted. The members of
12239 the 680x0 family are very similar. For detailed information about
12240 the differences, see the Motorola manuals.
12252 Assemble for the 68000. `-m68008', `-m68302', and so on are
12253 synonyms for `-m68000', since the chips are the same from the
12254 point of view of the assembler.
12257 Assemble for the 68010.
12261 Assemble for the 68020. This is normally the default.
12265 Assemble for the 68030.
12269 Assemble for the 68040.
12273 Assemble for the 68060.
12286 Assemble for the CPU32 family of chips.
12302 Assemble for the ColdFire family of chips.
12306 Assemble 68881 floating point instructions. This is the
12307 default for the 68020, 68030, and the CPU32. The 68040 and
12308 68060 always support floating point instructions.
12311 Do not assemble 68881 floating point instructions. This is
12312 the default for 68000 and the 68010. The 68040 and 68060
12313 always support floating point instructions, even if this
12317 Assemble 68851 MMU instructions. This is the default for the
12318 68020, 68030, and 68060. The 68040 accepts a somewhat
12319 different set of MMU instructions; `-m68851' and `-m68040'
12320 should not be used together.
12323 Do not assemble 68851 MMU instructions. This is the default
12324 for the 68000, 68010, and the CPU32. The 68040 accepts a
12325 somewhat different set of MMU instructions.
12328 File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent
12333 This syntax for the Motorola 680x0 was developed at MIT.
12335 The 680x0 version of `as' uses instructions names and syntax
12336 compatible with the Sun assembler. Intervening periods are ignored;
12337 for example, `movl' is equivalent to `mov.l'.
12339 In the following table APC stands for any of the address registers
12340 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address
12341 relative to the program counter (`%zpc'), a suppressed address register
12342 (`%za0' through `%za7'), or it may be omitted entirely. The use of
12343 SIZE means one of `w' or `l', and it may be omitted, along with the
12344 leading colon, unless a scale is also specified. The use of SCALE
12345 means one of `1', `2', `4', or `8', and it may always be omitted along
12346 with the leading colon.
12348 The following addressing modes are understood:
12353 `%d0' through `%d7'
12356 `%a0' through `%a7'
12357 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is
12358 also known as `%fp', the Frame Pointer.
12360 "Address Register Indirect"
12361 `%a0@' through `%a7@'
12363 "Address Register Postincrement"
12364 `%a0@+' through `%a7@+'
12366 "Address Register Predecrement"
12367 `%a0@-' through `%a7@-'
12369 "Indirect Plus Offset"
12373 `APC@(NUMBER,REGISTER:SIZE:SCALE)'
12375 The NUMBER may be omitted.
12378 `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)'
12380 The ONUMBER or the REGISTER, but not both, may be omitted.
12383 `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)'
12385 The NUMBER may be omitted. Omitting the REGISTER produces the
12386 Postindex addressing mode.
12389 `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'.
12392 File: as.info, Node: M68K-Moto-Syntax, Next: M68K-Float, Prev: M68K-Syntax, Up: M68K-Dependent
12394 9.23.3 Motorola Syntax
12395 ----------------------
12397 The standard Motorola syntax for this chip differs from the syntax
12398 already discussed (*note Syntax: M68K-Syntax.). `as' can accept
12399 Motorola syntax for operands, even if MIT syntax is used for other
12400 operands in the same instruction. The two kinds of syntax are fully
12403 In the following table APC stands for any of the address registers
12404 (`%a0' through `%a7'), the program counter (`%pc'), the zero-address
12405 relative to the program counter (`%zpc'), or a suppressed address
12406 register (`%za0' through `%za7'). The use of SIZE means one of `w' or
12407 `l', and it may always be omitted along with the leading dot. The use
12408 of SCALE means one of `1', `2', `4', or `8', and it may always be
12409 omitted along with the leading asterisk.
12411 The following additional addressing modes are understood:
12413 "Address Register Indirect"
12414 `(%a0)' through `(%a7)'
12415 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is
12416 also known as `%fp', the Frame Pointer.
12418 "Address Register Postincrement"
12419 `(%a0)+' through `(%a7)+'
12421 "Address Register Predecrement"
12422 `-(%a0)' through `-(%a7)'
12424 "Indirect Plus Offset"
12425 `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'.
12427 The NUMBER may also appear within the parentheses, as in
12428 `(NUMBER,%A0)'. When used with the PC, the NUMBER may be omitted
12429 (with an address register, omitting the NUMBER produces Address
12430 Register Indirect mode).
12433 `NUMBER(APC,REGISTER.SIZE*SCALE)'
12435 The NUMBER may be omitted, or it may appear within the
12436 parentheses. The APC may be omitted. The REGISTER and the APC
12437 may appear in either order. If both APC and REGISTER are address
12438 registers, and the SIZE and SCALE are omitted, then the first
12439 register is taken as the base register, and the second as the
12443 `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)'
12445 The ONUMBER, or the REGISTER, or both, may be omitted. Either the
12446 NUMBER or the APC may be omitted, but not both.
12449 `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)'
12451 The NUMBER, or the APC, or the REGISTER, or any two of them, may
12452 be omitted. The ONUMBER may be omitted. The REGISTER and the APC
12453 may appear in either order. If both APC and REGISTER are address
12454 registers, and the SIZE and SCALE are omitted, then the first
12455 register is taken as the base register, and the second as the
12459 File: as.info, Node: M68K-Float, Next: M68K-Directives, Prev: M68K-Moto-Syntax, Up: M68K-Dependent
12461 9.23.4 Floating Point
12462 ---------------------
12464 Packed decimal (P) format floating literals are not supported. Feel
12465 free to add the code!
12467 The floating point formats generated by directives are these.
12470 `Single' precision floating point constants.
12473 `Double' precision floating point constants.
12477 `Extended' precision (`long double') floating point constants.
12480 File: as.info, Node: M68K-Directives, Next: M68K-opcodes, Prev: M68K-Float, Up: M68K-Dependent
12482 9.23.5 680x0 Machine Directives
12483 -------------------------------
12485 In order to be compatible with the Sun assembler the 680x0 assembler
12486 understands the following directives.
12489 This directive is identical to a `.data 1' directive.
12492 This directive is identical to a `.data 2' directive.
12495 This directive is a special case of the `.align' directive; it
12496 aligns the output to an even byte boundary.
12499 This directive is identical to a `.space' directive.
12502 Select the target architecture and extension features. Valid
12503 values for NAME are the same as for the `-march' command line
12504 option. This directive cannot be specified after any instructions
12505 have been assembled. If it is given multiple times, or in
12506 conjunction with the `-march' option, all uses must be for the
12507 same architecture and extension set.
12510 Select the target cpu. Valid valuse for NAME are the same as for
12511 the `-mcpu' command line option. This directive cannot be
12512 specified after any instructions have been assembled. If it is
12513 given multiple times, or in conjunction with the `-mopt' option,
12514 all uses must be for the same cpu.
12518 File: as.info, Node: M68K-opcodes, Prev: M68K-Directives, Up: M68K-Dependent
12525 * M68K-Branch:: Branch Improvement
12526 * M68K-Chars:: Special Characters
12529 File: as.info, Node: M68K-Branch, Next: M68K-Chars, Up: M68K-opcodes
12531 9.23.6.1 Branch Improvement
12532 ...........................
12534 Certain pseudo opcodes are permitted for branch instructions. They
12535 expand to the shortest branch instruction that reach the target.
12536 Generally these mnemonics are made by substituting `j' for `b' at the
12537 start of a Motorola mnemonic.
12539 The following table summarizes the pseudo-operations. A `*' flags
12540 cases that are more fully described after the table:
12543 +------------------------------------------------------------
12544 | 68020 68000/10, not PC-relative OK
12545 Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP **
12546 +------------------------------------------------------------
12547 jbsr |bsrs bsrw bsrl jsr
12548 jra |bras braw bral jmp
12549 * jXX |bXXs bXXw bXXl bNXs;jmp
12550 * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp
12551 fjXX | N/A fbXXw fbXXl N/A
12554 NX: negative of condition XX
12555 `*'--see full description below
12556 `**'--this expansion mode is disallowed by `--pcrel'
12560 These are the simplest jump pseudo-operations; they always map to
12561 one particular machine instruction, depending on the displacement
12562 to the branch target. This instruction will be a byte or word
12563 branch is that is sufficient. Otherwise, a long branch will be
12564 emitted if available. If no long branches are available and the
12565 `--pcrel' option is not given, an absolute long jump will be
12566 emitted instead. If no long branches are available, the `--pcrel'
12567 option is given, and a word branch cannot reach the target, an
12568 error message is generated.
12570 In addition to standard branch operands, `as' allows these
12571 pseudo-operations to have all operands that are allowed for jsr
12572 and jmp, substituting these instructions if the operand given is
12573 not valid for a branch instruction.
12576 Here, `jXX' stands for an entire family of pseudo-operations,
12577 where XX is a conditional branch or condition-code test. The full
12578 list of pseudo-ops in this family is:
12579 jhi jls jcc jcs jne jeq jvc
12580 jvs jpl jmi jge jlt jgt jle
12582 Usually, each of these pseudo-operations expands to a single branch
12583 instruction. However, if a word branch is not sufficient, no long
12584 branches are available, and the `--pcrel' option is not given, `as'
12585 issues a longer code fragment in terms of NX, the opposite
12586 condition to XX. For example, under these conditions:
12594 The full family of pseudo-operations covered here is
12595 dbhi dbls dbcc dbcs dbne dbeq dbvc
12596 dbvs dbpl dbmi dbge dblt dbgt dble
12599 Motorola `dbXX' instructions allow word displacements only. When
12600 a word displacement is sufficient, each of these pseudo-operations
12601 expands to the corresponding Motorola instruction. When a word
12602 displacement is not sufficient and long branches are available,
12603 when the source reads `dbXX foo', `as' emits
12609 If, however, long branches are not available and the `--pcrel'
12610 option is not given, `as' emits
12617 This family includes
12618 fjne fjeq fjge fjlt fjgt fjle fjf
12619 fjt fjgl fjgle fjnge fjngl fjngle fjngt
12620 fjnle fjnlt fjoge fjogl fjogt fjole fjolt
12621 fjor fjseq fjsf fjsne fjst fjueq fjuge
12622 fjugt fjule fjult fjun
12624 Each of these pseudo-operations always expands to a single Motorola
12625 coprocessor branch instruction, word or long. All Motorola
12626 coprocessor branch instructions allow both word and long
12631 File: as.info, Node: M68K-Chars, Prev: M68K-Branch, Up: M68K-opcodes
12633 9.23.6.2 Special Characters
12634 ...........................
12636 Line comments are introduced by the `|' character appearing anywhere on
12637 a line, unless the `--bitwise-or' command line option has been
12640 An asterisk (`*') as the first character on a line marks the start
12641 of a line comment as well.
12643 A hash character (`#') as the first character on a line also marks
12644 the start of a line comment, but in this case it could also be a
12645 logical line number directive (*note Comments::) or a preprocessor
12646 control command (*note Preprocessing::). If the hash character appears
12647 elsewhere on a line it is used to introduce an immediate value. (This
12648 is for compatibility with Sun's assembler).
12650 Multiple statements on the same line can appear if they are separated
12651 by the `;' character.
12654 File: as.info, Node: M68HC11-Dependent, Next: MicroBlaze-Dependent, Prev: M68K-Dependent, Up: Machine Dependencies
12656 9.24 M68HC11 and M68HC12 Dependent Features
12657 ===========================================
12661 * M68HC11-Opts:: M68HC11 and M68HC12 Options
12662 * M68HC11-Syntax:: Syntax
12663 * M68HC11-Modifiers:: Symbolic Operand Modifiers
12664 * M68HC11-Directives:: Assembler Directives
12665 * M68HC11-Float:: Floating Point
12666 * M68HC11-opcodes:: Opcodes
12669 File: as.info, Node: M68HC11-Opts, Next: M68HC11-Syntax, Up: M68HC11-Dependent
12671 9.24.1 M68HC11 and M68HC12 Options
12672 ----------------------------------
12674 The Motorola 68HC11 and 68HC12 version of `as' have a few machine
12678 This option switches the assembler into the M68HC11 mode. In this
12679 mode, the assembler only accepts 68HC11 operands and mnemonics. It
12680 produces code for the 68HC11.
12683 This option switches the assembler into the M68HC12 mode. In this
12684 mode, the assembler also accepts 68HC12 operands and mnemonics. It
12685 produces code for the 68HC12. A few 68HC11 instructions are
12686 replaced by some 68HC12 instructions as recommended by Motorola
12690 This option switches the assembler into the M68HCS12 mode. This
12691 mode is similar to `-m68hc12' but specifies to assemble for the
12692 68HCS12 series. The only difference is on the assembling of the
12693 `movb' and `movw' instruction when a PC-relative operand is used.
12696 This option switches the assembler into the M9S12X mode. This
12697 mode is similar to `-m68hc12' but specifies to assemble for the
12698 S12X series which is a superset of the HCS12.
12701 This option switches the assembler into the XGATE mode for the RISC
12702 co-processor featured on some S12X-family chips.
12704 `--xgate-ramoffset'
12705 This option instructs the linker to offset RAM addresses from S12X
12706 address space into XGATE address space.
12709 This option controls the ABI and indicates to use a 16-bit integer
12710 ABI. It has no effect on the assembled instructions. This is the
12714 This option controls the ABI and indicates to use a 32-bit integer
12718 This option controls the ABI and indicates to use a 32-bit float
12719 ABI. This is the default.
12722 This option controls the ABI and indicates to use a 64-bit float
12725 `--strict-direct-mode'
12726 You can use the `--strict-direct-mode' option to disable the
12727 automatic translation of direct page mode addressing into extended
12728 mode when the instruction does not support direct mode. For
12729 example, the `clr' instruction does not support direct page mode
12730 addressing. When it is used with the direct page mode, `as' will
12731 ignore it and generate an absolute addressing. This option
12732 prevents `as' from doing this, and the wrong usage of the direct
12733 page mode will raise an error.
12736 The `--short-branches' option turns off the translation of
12737 relative branches into absolute branches when the branch offset is
12738 out of range. By default `as' transforms the relative branch
12739 (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc',
12740 `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch
12741 when the offset is out of the -128 .. 127 range. In that case,
12742 the `bsr' instruction is translated into a `jsr', the `bra'
12743 instruction is translated into a `jmp' and the conditional
12744 branches instructions are inverted and followed by a `jmp'. This
12745 option disables these translations and `as' will generate an error
12746 if a relative branch is out of range. This option does not affect
12747 the optimization associated to the `jbra', `jbsr' and `jbXX'
12750 `--force-long-branches'
12751 The `--force-long-branches' option forces the translation of
12752 relative branches into absolute branches. This option does not
12753 affect the optimization associated to the `jbra', `jbsr' and
12754 `jbXX' pseudo opcodes.
12756 `--print-insn-syntax'
12757 You can use the `--print-insn-syntax' option to obtain the syntax
12758 description of the instruction when an error is detected.
12761 The `--print-opcodes' option prints the list of all the
12762 instructions with their syntax. The first item of each line
12763 represents the instruction name and the rest of the line indicates
12764 the possible operands for that instruction. The list is printed in
12765 alphabetical order. Once the list is printed `as' exits.
12767 `--generate-example'
12768 The `--generate-example' option is similar to `--print-opcodes'
12769 but it generates an example for each instruction instead.
12772 File: as.info, Node: M68HC11-Syntax, Next: M68HC11-Modifiers, Prev: M68HC11-Opts, Up: M68HC11-Dependent
12777 In the M68HC11 syntax, the instruction name comes first and it may be
12778 followed by one or several operands (up to three). Operands are
12779 separated by comma (`,'). In the normal mode, `as' will complain if too
12780 many operands are specified for a given instruction. In the MRI mode
12781 (turned on with `-M' option), it will treat them as comments. Example:
12788 The presence of a `;' character or a `!' character anywhere on a
12789 line indicates the start of a comment that extends to the end of that
12792 A `*' or a `#' character at the start of a line also introduces a
12793 line comment, but these characters do not work elsewhere on the line.
12794 If the first character of the line is a `#' then as well as starting a
12795 comment, the line could also be logical line number directive (*note
12796 Comments::) or a preprocessor control command (*note Preprocessing::).
12798 The M68HC11 assembler does not currently support a line separator
12801 The following addressing modes are understood for 68HC11 and 68HC12:
12806 `NUMBER,X', `NUMBER,Y'
12808 The NUMBER may be omitted in which case 0 is assumed.
12810 "Direct Addressing mode"
12811 `*SYMBOL', or `*DIGITS'
12814 `SYMBOL', or `DIGITS'
12816 The M68HC12 has other more complex addressing modes. All of them are
12817 supported and they are represented below:
12819 "Constant Offset Indexed Addressing Mode"
12822 The NUMBER may be omitted in which case 0 is assumed. The
12823 register can be either `X', `Y', `SP' or `PC'. The assembler will
12824 use the smaller post-byte definition according to the constant
12825 value (5-bit constant offset, 9-bit constant offset or 16-bit
12826 constant offset). If the constant is not known by the assembler
12827 it will use the 16-bit constant offset post-byte and the value
12828 will be resolved at link time.
12830 "Offset Indexed Indirect"
12833 The register can be either `X', `Y', `SP' or `PC'.
12835 "Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement"
12836 `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+'
12838 The number must be in the range `-8'..`+8' and must not be 0. The
12839 register can be either `X', `Y', `SP' or `PC'.
12841 "Accumulator Offset"
12844 The accumulator register can be either `A', `B' or `D'. The
12845 register can be either `X', `Y', `SP' or `PC'.
12847 "Accumulator D offset indexed-indirect"
12850 The register can be either `X', `Y', `SP' or `PC'.
12863 File: as.info, Node: M68HC11-Modifiers, Next: M68HC11-Directives, Prev: M68HC11-Syntax, Up: M68HC11-Dependent
12865 9.24.3 Symbolic Operand Modifiers
12866 ---------------------------------
12868 The assembler supports several modifiers when using symbol addresses in
12869 68HC11 and 68HC12 instruction operands. The general syntax is the
12875 This modifier indicates to the assembler and linker to use the
12876 16-bit physical address corresponding to the symbol. This is
12877 intended to be used on memory window systems to map a symbol in
12878 the memory bank window. If the symbol is in a memory expansion
12879 part, the physical address corresponds to the symbol address
12880 within the memory bank window. If the symbol is not in a memory
12881 expansion part, this is the symbol address (using or not using the
12882 %addr modifier has no effect in that case).
12885 This modifier indicates to use the memory page number corresponding
12886 to the symbol. If the symbol is in a memory expansion part, its
12887 page number is computed by the linker as a number used to map the
12888 page containing the symbol in the memory bank window. If the
12889 symbol is not in a memory expansion part, the page number is 0.
12892 This modifier indicates to use the 8-bit high part of the physical
12893 address of the symbol.
12896 This modifier indicates to use the 8-bit low part of the physical
12897 address of the symbol.
12900 For example a 68HC12 call to a function `foo_example' stored in
12901 memory expansion part could be written as follows:
12903 call %addr(foo_example),%page(foo_example)
12905 and this is equivalent to
12909 And for 68HC11 it could be written as follows:
12911 ldab #%page(foo_example)
12913 jsr %addr(foo_example)
12916 File: as.info, Node: M68HC11-Directives, Next: M68HC11-Float, Prev: M68HC11-Modifiers, Up: M68HC11-Dependent
12918 9.24.4 Assembler Directives
12919 ---------------------------
12921 The 68HC11 and 68HC12 version of `as' have the following specific
12922 assembler directives:
12925 The relax directive is used by the `GNU Compiler' to emit a
12926 specific relocation to mark a group of instructions for linker
12927 relaxation. The sequence of instructions within the group must be
12928 known to the linker so that relaxation can be performed.
12930 `.mode [mshort|mlong|mshort-double|mlong-double]'
12931 This directive specifies the ABI. It overrides the `-mshort',
12932 `-mlong', `-mshort-double' and `-mlong-double' options.
12935 This directive marks the symbol as a `far' symbol meaning that it
12936 uses a `call/rtc' calling convention as opposed to `jsr/rts'.
12937 During a final link, the linker will identify references to the
12938 `far' symbol and will verify the proper calling convention.
12940 `.interrupt SYMBOL'
12941 This directive marks the symbol as an interrupt entry point. This
12942 information is then used by the debugger to correctly unwind the
12943 frame across interrupts.
12946 This directive is defined for compatibility with the
12947 `Specification for Motorola 8 and 16-Bit Assembly Language Input
12948 Standard' and is ignored.
12952 File: as.info, Node: M68HC11-Float, Next: M68HC11-opcodes, Prev: M68HC11-Directives, Up: M68HC11-Dependent
12954 9.24.5 Floating Point
12955 ---------------------
12957 Packed decimal (P) format floating literals are not supported. Feel
12958 free to add the code!
12960 The floating point formats generated by directives are these.
12963 `Single' precision floating point constants.
12966 `Double' precision floating point constants.
12970 `Extended' precision (`long double') floating point constants.
12973 File: as.info, Node: M68HC11-opcodes, Prev: M68HC11-Float, Up: M68HC11-Dependent
12980 * M68HC11-Branch:: Branch Improvement
12983 File: as.info, Node: M68HC11-Branch, Up: M68HC11-opcodes
12985 9.24.6.1 Branch Improvement
12986 ...........................
12988 Certain pseudo opcodes are permitted for branch instructions. They
12989 expand to the shortest branch instruction that reach the target.
12990 Generally these mnemonics are made by prepending `j' to the start of
12991 Motorola mnemonic. These pseudo opcodes are not affected by the
12992 `--short-branches' or `--force-long-branches' options.
12994 The following table summarizes the pseudo-operations.
12997 +-------------------------------------------------------------+
12999 | --short-branches --force-long-branches |
13000 +--------------------------+----------------------------------+
13001 Op |BYTE WORD | BYTE WORD |
13002 +--------------------------+----------------------------------+
13003 bsr | bsr <pc-rel> <error> | jsr <abs> |
13004 bra | bra <pc-rel> <error> | jmp <abs> |
13005 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
13006 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
13007 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
13008 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
13010 +--------------------------+----------------------------------+
13012 NX: negative of condition XX
13016 These are the simplest jump pseudo-operations; they always map to
13017 one particular machine instruction, depending on the displacement
13018 to the branch target.
13021 Here, `jbXX' stands for an entire family of pseudo-operations,
13022 where XX is a conditional branch or condition-code test. The full
13023 list of pseudo-ops in this family is:
13024 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
13025 jbcs jbne jblt jble jbls jbvc jbmi
13027 For the cases of non-PC relative displacements and long
13028 displacements, `as' issues a longer code fragment in terms of NX,
13029 the opposite condition to XX. For example, for the non-PC
13039 File: as.info, Node: MicroBlaze-Dependent, Next: MIPS-Dependent, Prev: M68HC11-Dependent, Up: Machine Dependencies
13041 9.25 MicroBlaze Dependent Features
13042 ==================================
13044 The Xilinx MicroBlaze processor family includes several variants,
13045 all using the same core instruction set. This chapter covers features
13046 of the GNU assembler that are specific to the MicroBlaze architecture.
13047 For details about the MicroBlaze instruction set, please see the
13048 `MicroBlaze Processor Reference Guide (UG081)' available at
13053 * MicroBlaze Directives:: Directives for MicroBlaze Processors.
13054 * MicroBlaze Syntax:: Syntax for the MicroBlaze
13057 File: as.info, Node: MicroBlaze Directives, Next: MicroBlaze Syntax, Up: MicroBlaze-Dependent
13062 A number of assembler directives are available for MicroBlaze.
13064 `.data8 EXPRESSION,...'
13065 This directive is an alias for `.byte'. Each expression is
13066 assembled into an eight-bit value.
13068 `.data16 EXPRESSION,...'
13069 This directive is an alias for `.hword'. Each expression is
13070 assembled into an 16-bit value.
13072 `.data32 EXPRESSION,...'
13073 This directive is an alias for `.word'. Each expression is
13074 assembled into an 32-bit value.
13076 `.ent NAME[,LABEL]'
13077 This directive is an alias for `.func' denoting the start of
13078 function NAME at (optional) LABEL.
13080 `.end NAME[,LABEL]'
13081 This directive is an alias for `.endfunc' denoting the end of
13084 `.gpword LABEL,...'
13085 This directive is an alias for `.rva'. The resolved address of
13086 LABEL is stored in the data section.
13089 Declare that LABEL is a weak external symbol.
13092 Switch to .rodata section. Equivalent to `.section .rodata'
13095 Switch to .sdata2 section. Equivalent to `.section .sdata2'
13098 Switch to .sdata section. Equivalent to `.section .sdata'
13101 Switch to .bss section. Equivalent to `.section .bss'
13104 Switch to .sbss section. Equivalent to `.section .sbss'
13107 File: as.info, Node: MicroBlaze Syntax, Prev: MicroBlaze Directives, Up: MicroBlaze-Dependent
13109 9.25.2 Syntax for the MicroBlaze
13110 --------------------------------
13114 * MicroBlaze-Chars:: Special Characters
13117 File: as.info, Node: MicroBlaze-Chars, Up: MicroBlaze Syntax
13119 9.25.2.1 Special Characters
13120 ...........................
13122 The presence of a `#' on a line indicates the start of a comment that
13123 extends to the end of the current line.
13125 If a `#' appears as the first character of a line, the whole line is
13126 treated as a comment, but in this case the line can also be a logical
13127 line number directive (*note Comments::) or a preprocessor control
13128 command (*note Preprocessing::).
13130 The `;' character can be used to separate statements on the same
13134 File: as.info, Node: MIPS-Dependent, Next: MMIX-Dependent, Prev: MicroBlaze-Dependent, Up: Machine Dependencies
13136 9.26 MIPS Dependent Features
13137 ============================
13139 GNU `as' for MIPS architectures supports several different MIPS
13140 processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For
13141 information about the MIPS instruction set, see `MIPS RISC
13142 Architecture', by Kane and Heindrich (Prentice-Hall). For an overview
13143 of MIPS assembly conventions, see "Appendix D: Assembly Language
13144 Programming" in the same work.
13148 * MIPS Opts:: Assembler options
13149 * MIPS Object:: ECOFF object code
13150 * MIPS Stabs:: Directives for debugging information
13151 * MIPS ISA:: Directives to override the ISA level
13152 * MIPS symbol sizes:: Directives to override the size of symbols
13153 * MIPS autoextend:: Directives for extending MIPS 16 bit instructions
13154 * MIPS insn:: Directive to mark data as an instruction
13155 * MIPS option stack:: Directives to save and restore options
13156 * MIPS ASE instruction generation overrides:: Directives to control
13157 generation of MIPS ASE instructions
13158 * MIPS floating-point:: Directives to override floating-point options
13159 * MIPS Syntax:: MIPS specific syntactical considerations
13162 File: as.info, Node: MIPS Opts, Next: MIPS Object, Up: MIPS-Dependent
13164 9.26.1 Assembler options
13165 ------------------------
13167 The MIPS configurations of GNU `as' support these special options:
13170 This option sets the largest size of an object that can be
13171 referenced implicitly with the `gp' register. It is only accepted
13172 for targets that use ECOFF format. The default value is 8.
13176 Any MIPS configuration of `as' can select big-endian or
13177 little-endian output at run time (unlike the other GNU development
13178 tools, which must be configured for one or the other). Use `-EB'
13179 to select big-endian output, and `-EL' for little-endian.
13182 Generate SVR4-style PIC. This option tells the assembler to
13183 generate SVR4-style position-independent macro expansions. It
13184 also tells the assembler to mark the output file as PIC.
13187 Generate VxWorks PIC. This option tells the assembler to generate
13188 VxWorks-style position-independent macro expansions.
13199 Generate code for a particular MIPS Instruction Set Architecture
13200 level. `-mips1' corresponds to the R2000 and R3000 processors,
13201 `-mips2' to the R6000 processor, `-mips3' to the R4000 processor,
13202 and `-mips4' to the R8000 and R10000 processors. `-mips5',
13203 `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to
13204 generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64
13205 RELEASE 2 ISA processors, respectively. You can also switch
13206 instruction sets during the assembly; see *Note Directives to
13207 override the ISA level: MIPS ISA.
13211 Some macros have different expansions for 32-bit and 64-bit
13212 registers. The register sizes are normally inferred from the ISA
13213 and ABI, but these flags force a certain group of registers to be
13214 treated as 32 bits wide at all times. `-mgp32' controls the size
13215 of general-purpose registers and `-mfp32' controls the size of
13216 floating-point registers.
13218 The `.set gp=32' and `.set fp=32' directives allow the size of
13219 registers to be changed for parts of an object. The default value
13220 is restored by `.set gp=default' and `.set fp=default'.
13222 On some MIPS variants there is a 32-bit mode flag; when this flag
13223 is set, 64-bit instructions generate a trap. Also, some 32-bit
13224 OSes only save the 32-bit registers on a context switch, so it is
13225 essential never to use the 64-bit registers.
13229 Assume that 64-bit registers are available. This is provided in
13230 the interests of symmetry with `-mgp32' and `-mfp32'.
13232 The `.set gp=64' and `.set fp=64' directives allow the size of
13233 registers to be changed for parts of an object. The default value
13234 is restored by `.set gp=default' and `.set fp=default'.
13238 Generate code for the MIPS 16 processor. This is equivalent to
13239 putting `.set mips16' at the start of the assembly file.
13240 `-no-mips16' turns off this option.
13244 Generate code for the microMIPS processor. This is equivalent to
13245 putting `.set micromips' at the start of the assembly file.
13246 `-mno-micromips' turns off this option. This is equivalent to
13247 putting `.set nomicromips' at the start of the assembly file.
13251 Enables the SmartMIPS extensions to the MIPS32 instruction set,
13252 which provides a number of new instructions which target smartcard
13253 and cryptographic applications. This is equivalent to putting
13254 `.set smartmips' at the start of the assembly file.
13255 `-mno-smartmips' turns off this option.
13259 Generate code for the MIPS-3D Application Specific Extension.
13260 This tells the assembler to accept MIPS-3D instructions.
13261 `-no-mips3d' turns off this option.
13265 Generate code for the MDMX Application Specific Extension. This
13266 tells the assembler to accept MDMX instructions. `-no-mdmx' turns
13271 Generate code for the DSP Release 1 Application Specific Extension.
13272 This tells the assembler to accept DSP Release 1 instructions.
13273 `-mno-dsp' turns off this option.
13277 Generate code for the DSP Release 2 Application Specific Extension.
13278 This option implies -mdsp. This tells the assembler to accept DSP
13279 Release 2 instructions. `-mno-dspr2' turns off this option.
13283 Generate code for the MT Application Specific Extension. This
13284 tells the assembler to accept MT instructions. `-mno-mt' turns
13289 Generate code for the MCU Application Specific Extension. This
13290 tells the assembler to accept MCU instructions. `-mno-mcu' turns
13295 Cause nops to be inserted if the read of the destination register
13296 of an mfhi or mflo instruction occurs in the following two
13299 `-mfix-loongson2f-jump'
13300 `-mno-fix-loongson2f-jump'
13301 Eliminate instruction fetch from outside 256M region to work
13302 around the Loongson2F `jump' instructions. Without it, under
13303 extreme cases, the kernel may crash. The issue has been solved in
13304 latest processor batches, but this fix has no side effect to them.
13306 `-mfix-loongson2f-nop'
13307 `-mno-fix-loongson2f-nop'
13308 Replace nops by `or at,at,zero' to work around the Loongson2F
13309 `nop' errata. Without it, under extreme cases, cpu might
13310 deadlock. The issue has been solved in latest loongson2f batches,
13311 but this fix has no side effect to them.
13315 Insert nops to work around certain VR4120 errata. This option is
13316 intended to be used on GCC-generated code: it is not designed to
13317 catch all problems in hand-written assembler code.
13321 Insert nops to work around the VR4130 `mflo'/`mfhi' errata.
13325 Insert nops to work around the 24K `eret'/`deret' errata.
13328 `-mno-fix-cn63xxp1'
13329 Replace `pref' hints 0 - 4 and 6 - 24 with hint 28 to work around
13330 certain CN63XXP1 errata.
13334 Generate code for the LSI R4010 chip. This tells the assembler to
13335 accept the R4010 specific instructions (`addciu', `ffc', etc.),
13336 and to not schedule `nop' instructions around accesses to the `HI'
13337 and `LO' registers. `-no-m4010' turns off this option.
13341 Generate code for the MIPS R4650 chip. This tells the assembler
13342 to accept the `mad' and `madu' instruction, and to not schedule
13343 `nop' instructions around accesses to the `HI' and `LO' registers.
13344 `-no-m4650' turns off this option.
13350 For each option `-mNNNN', generate code for the MIPS RNNNN chip.
13351 This tells the assembler to accept instructions specific to that
13352 chip, and to schedule for that chip's hazards.
13355 Generate code for a particular MIPS cpu. It is exactly equivalent
13356 to `-mCPU', except that there are more value of CPU understood.
13357 Valid CPU value are:
13359 2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130,
13360 vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231,
13361 rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000,
13362 10000, 12000, 14000, 16000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem,
13363 4kep, 4ksd, m4k, m4kp, m14k, m14kc, m14ke, m14kec, 24kc,
13364 24kf2_1, 24kf, 24kf1_1, 24kec, 24kef2_1, 24kef, 24kef1_1,
13365 34kc, 34kf2_1, 34kf, 34kf1_1, 74kc, 74kf2_1, 74kf, 74kf1_1,
13366 74kf3_2, 1004kc, 1004kf2_1, 1004kf, 1004kf1_1, 5kc, 5kf, 20kc,
13367 25kf, sb1, sb1a, loongson2e, loongson2f, loongson3a, octeon,
13368 octeon+, octeon2, xlr, xlp
13370 For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms
13371 for `Nf1_1'. These values are deprecated.
13374 Schedule and tune for a particular MIPS cpu. Valid CPU values are
13375 identical to `-march=CPU'.
13378 Record which ABI the source code uses. The recognized arguments
13379 are: `32', `n32', `o64', `64' and `eabi'.
13383 Equivalent to adding `.set sym32' or `.set nosym32' to the
13384 beginning of the assembler input. *Note MIPS symbol sizes::.
13387 This option is ignored. It is accepted for command-line
13388 compatibility with other assemblers, which use it to turn off C
13389 style preprocessing. With GNU `as', there is no need for
13390 `-nocpp', because the GNU assembler itself never runs the C
13395 Disable or enable floating-point instructions. Note that by
13396 default floating-point instructions are always allowed even with
13397 CPU targets that don't have support for these instructions.
13401 Disable or enable double-precision floating-point operations. Note
13402 that by default double-precision floating-point operations are
13403 always allowed even with CPU targets that don't have support for
13406 `--construct-floats'
13407 `--no-construct-floats'
13408 The `--no-construct-floats' option disables the construction of
13409 double width floating point constants by loading the two halves of
13410 the value into the two single width floating point registers that
13411 make up the double width register. This feature is useful if the
13412 processor support the FR bit in its status register, and this bit
13413 is known (by the programmer) to be set. This bit prevents the
13414 aliasing of the double width register by the single width
13417 By default `--construct-floats' is selected, allowing construction
13418 of these floating point constants.
13422 `as' automatically macro expands certain division and
13423 multiplication instructions to check for overflow and division by
13424 zero. This option causes `as' to generate code to take a trap
13425 exception rather than a break exception when an error is detected.
13426 The trap instructions are only supported at Instruction Set
13427 Architecture level 2 and higher.
13431 Generate code to take a break exception rather than a trap
13432 exception when an error is detected. This is the default.
13436 Control generation of `.pdr' sections. Off by default on IRIX, on
13441 When generating code using the Unix calling conventions (selected
13442 by `-KPIC' or `-mcall_shared'), gas will normally generate code
13443 which can go into a shared library. The `-mno-shared' option
13444 tells gas to generate code which uses the calling convention, but
13445 can not go into a shared library. The resulting code is slightly
13446 more efficient. This option only affects the handling of the
13447 `.cpload' and `.cpsetup' pseudo-ops.
13450 File: as.info, Node: MIPS Object, Next: MIPS Stabs, Prev: MIPS Opts, Up: MIPS-Dependent
13452 9.26.2 MIPS ECOFF object code
13453 -----------------------------
13455 Assembling for a MIPS ECOFF target supports some additional sections
13456 besides the usual `.text', `.data' and `.bss'. The additional sections
13457 are `.rdata', used for read-only data, `.sdata', used for small data,
13458 and `.sbss', used for small common objects.
13460 When assembling for ECOFF, the assembler uses the `$gp' (`$28')
13461 register to form the address of a "small object". Any object in the
13462 `.sdata' or `.sbss' sections is considered "small" in this sense. For
13463 external objects, or for objects in the `.bss' section, you can use the
13464 `gcc' `-G' option to control the size of objects addressed via `$gp';
13465 the default value is 8, meaning that a reference to any object eight
13466 bytes or smaller uses `$gp'. Passing `-G 0' to `as' prevents it from
13467 using the `$gp' register on the basis of object size (but the assembler
13468 uses `$gp' for objects in `.sdata' or `sbss' in any case). The size of
13469 an object in the `.bss' section is set by the `.comm' or `.lcomm'
13470 directive that defines it. The size of an external object may be set
13471 with the `.extern' directive. For example, `.extern sym,4' declares
13472 that the object at `sym' is 4 bytes in length, whie leaving `sym'
13473 otherwise undefined.
13475 Using small ECOFF objects requires linker support, and assumes that
13476 the `$gp' register is correctly initialized (normally done
13477 automatically by the startup code). MIPS ECOFF assembly code must not
13478 modify the `$gp' register.
13481 File: as.info, Node: MIPS Stabs, Next: MIPS ISA, Prev: MIPS Object, Up: MIPS-Dependent
13483 9.26.3 Directives for debugging information
13484 -------------------------------------------
13486 MIPS ECOFF `as' supports several directives used for generating
13487 debugging information which are not support by traditional MIPS
13488 assemblers. These are `.def', `.endef', `.dim', `.file', `.scl',
13489 `.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'.
13490 The debugging information generated by the three `.stab' directives can
13491 only be read by GDB, not by traditional MIPS debuggers (this
13492 enhancement is required to fully support C++ debugging). These
13493 directives are primarily used by compilers, not assembly language
13497 File: as.info, Node: MIPS symbol sizes, Next: MIPS autoextend, Prev: MIPS ISA, Up: MIPS-Dependent
13499 9.26.4 Directives to override the size of symbols
13500 -------------------------------------------------
13502 The n64 ABI allows symbols to have any 64-bit value. Although this
13503 provides a great deal of flexibility, it means that some macros have
13504 much longer expansions than their 32-bit counterparts. For example,
13505 the non-PIC expansion of `dla $4,sym' is usually:
13507 lui $4,%highest(sym)
13509 daddiu $4,$4,%higher(sym)
13510 daddiu $1,$1,%lo(sym)
13514 whereas the 32-bit expansion is simply:
13517 daddiu $4,$4,%lo(sym)
13519 n64 code is sometimes constructed in such a way that all symbolic
13520 constants are known to have 32-bit values, and in such cases, it's
13521 preferable to use the 32-bit expansion instead of the 64-bit expansion.
13523 You can use the `.set sym32' directive to tell the assembler that,
13524 from this point on, all expressions of the form `SYMBOL' or `SYMBOL +
13525 OFFSET' have 32-bit values. For example:
13530 sw $4,sym+0x8000($4)
13532 will cause the assembler to treat `sym', `sym+16' and `sym+0x8000'
13533 as 32-bit values. The handling of non-symbolic addresses is not
13536 The directive `.set nosym32' ends a `.set sym32' block and reverts
13537 to the normal behavior. It is also possible to change the symbol size
13538 using the command-line options `-msym32' and `-mno-sym32'.
13540 These options and directives are always accepted, but at present,
13541 they have no effect for anything other than n64.
13544 File: as.info, Node: MIPS ISA, Next: MIPS symbol sizes, Prev: MIPS Stabs, Up: MIPS-Dependent
13546 9.26.5 Directives to override the ISA level
13547 -------------------------------------------
13549 GNU `as' supports an additional directive to change the MIPS
13550 Instruction Set Architecture level on the fly: `.set mipsN'. N should
13551 be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other
13552 than 0 make the assembler accept instructions for the corresponding ISA
13553 level, from that point on in the assembly. `.set mipsN' affects not
13554 only which instructions are permitted, but also how certain macros are
13555 expanded. `.set mips0' restores the ISA level to its original level:
13556 either the level you selected with command line options, or the default
13557 for your configuration. You can use this feature to permit specific
13558 MIPS3 instructions while assembling in 32 bit mode. Use this directive
13561 The `.set arch=CPU' directive provides even finer control. It
13562 changes the effective CPU target and allows the assembler to use
13563 instructions specific to a particular CPU. All CPUs supported by the
13564 `-march' command line option are also selectable by this directive.
13565 The original value is restored by `.set arch=default'.
13567 The directive `.set mips16' puts the assembler into MIPS 16 mode, in
13568 which it will assemble instructions for the MIPS 16 processor. Use
13569 `.set nomips16' to return to normal 32 bit mode.
13571 Traditional MIPS assemblers do not support this directive.
13573 The directive `.set micromips' puts the assembler into microMIPS
13574 mode, in which it will assemble instructions for the microMIPS
13575 processor. Use `.set nomicromips' to return to normal 32 bit mode.
13577 Traditional MIPS assemblers do not support this directive.
13580 File: as.info, Node: MIPS autoextend, Next: MIPS insn, Prev: MIPS symbol sizes, Up: MIPS-Dependent
13582 9.26.6 Directives for extending MIPS 16 bit instructions
13583 --------------------------------------------------------
13585 By default, MIPS 16 instructions are automatically extended to 32 bits
13586 when necessary. The directive `.set noautoextend' will turn this off.
13587 When `.set noautoextend' is in effect, any 32 bit instruction must be
13588 explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The
13589 directive `.set autoextend' may be used to once again automatically
13590 extend instructions when necessary.
13592 This directive is only meaningful when in MIPS 16 mode. Traditional
13593 MIPS assemblers do not support this directive.
13596 File: as.info, Node: MIPS insn, Next: MIPS option stack, Prev: MIPS autoextend, Up: MIPS-Dependent
13598 9.26.7 Directive to mark data as an instruction
13599 -----------------------------------------------
13601 The `.insn' directive tells `as' that the following data is actually
13602 instructions. This makes a difference in MIPS 16 and microMIPS modes:
13603 when loading the address of a label which precedes instructions, `as'
13604 automatically adds 1 to the value, so that jumping to the loaded
13605 address will do the right thing.
13607 The `.global' and `.globl' directives supported by `as' will by
13608 default mark the symbol as pointing to a region of data not code. This
13609 means that, for example, any instructions following such a symbol will
13610 not be disassembled by `objdump' as it will regard them as data. To
13611 change this behaviour an optional section name can be placed after the
13612 symbol name in the `.global' directive. If this section exists and is
13613 known to be a code section, then the symbol will be marked as poiting at
13614 code not data. Ie the syntax for the directive is:
13616 `.global SYMBOL[ SECTION][, SYMBOL[ SECTION]] ...',
13618 Here is a short example:
13620 .global foo .text, bar, baz .data
13629 File: as.info, Node: MIPS option stack, Next: MIPS ASE instruction generation overrides, Prev: MIPS insn, Up: MIPS-Dependent
13631 9.26.8 Directives to save and restore options
13632 ---------------------------------------------
13634 The directives `.set push' and `.set pop' may be used to save and
13635 restore the current settings for all the options which are controlled
13636 by `.set'. The `.set push' directive saves the current settings on a
13637 stack. The `.set pop' directive pops the stack and restores the
13640 These directives can be useful inside an macro which must change an
13641 option such as the ISA level or instruction reordering but does not want
13642 to change the state of the code which invoked the macro.
13644 Traditional MIPS assemblers do not support these directives.
13647 File: as.info, Node: MIPS ASE instruction generation overrides, Next: MIPS floating-point, Prev: MIPS option stack, Up: MIPS-Dependent
13649 9.26.9 Directives to control generation of MIPS ASE instructions
13650 ----------------------------------------------------------------
13652 The directive `.set mips3d' makes the assembler accept instructions
13653 from the MIPS-3D Application Specific Extension from that point on in
13654 the assembly. The `.set nomips3d' directive prevents MIPS-3D
13655 instructions from being accepted.
13657 The directive `.set smartmips' makes the assembler accept
13658 instructions from the SmartMIPS Application Specific Extension to the
13659 MIPS32 ISA from that point on in the assembly. The `.set nosmartmips'
13660 directive prevents SmartMIPS instructions from being accepted.
13662 The directive `.set mdmx' makes the assembler accept instructions
13663 from the MDMX Application Specific Extension from that point on in the
13664 assembly. The `.set nomdmx' directive prevents MDMX instructions from
13667 The directive `.set dsp' makes the assembler accept instructions
13668 from the DSP Release 1 Application Specific Extension from that point
13669 on in the assembly. The `.set nodsp' directive prevents DSP Release 1
13670 instructions from being accepted.
13672 The directive `.set dspr2' makes the assembler accept instructions
13673 from the DSP Release 2 Application Specific Extension from that point
13674 on in the assembly. This dirctive implies `.set dsp'. The `.set
13675 nodspr2' directive prevents DSP Release 2 instructions from being
13678 The directive `.set mt' makes the assembler accept instructions from
13679 the MT Application Specific Extension from that point on in the
13680 assembly. The `.set nomt' directive prevents MT instructions from
13683 The directive `.set mcu' makes the assembler accept instructions
13684 from the MCU Application Specific Extension from that point on in the
13685 assembly. The `.set nomcu' directive prevents MCU instructions from
13688 Traditional MIPS assemblers do not support these directives.
13691 File: as.info, Node: MIPS floating-point, Next: MIPS Syntax, Prev: MIPS ASE instruction generation overrides, Up: MIPS-Dependent
13693 9.26.10 Directives to override floating-point options
13694 -----------------------------------------------------
13696 The directives `.set softfloat' and `.set hardfloat' provide finer
13697 control of disabling and enabling float-point instructions. These
13698 directives always override the default (that hard-float instructions
13699 are accepted) or the command-line options (`-msoft-float' and
13702 The directives `.set singlefloat' and `.set doublefloat' provide
13703 finer control of disabling and enabling double-precision float-point
13704 operations. These directives always override the default (that
13705 double-precision operations are accepted) or the command-line options
13706 (`-msingle-float' and `-mdouble-float').
13708 Traditional MIPS assemblers do not support these directives.
13711 File: as.info, Node: MIPS Syntax, Prev: MIPS floating-point, Up: MIPS-Dependent
13713 9.26.11 Syntactical considerations for the MIPS assembler
13714 ---------------------------------------------------------
13718 * MIPS-Chars:: Special Characters
13721 File: as.info, Node: MIPS-Chars, Up: MIPS Syntax
13723 9.26.11.1 Special Characters
13724 ............................
13726 The presence of a `#' on a line indicates the start of a comment that
13727 extends to the end of the current line.
13729 If a `#' appears as the first character of a line, the whole line is
13730 treated as a comment, but in this case the line can also be a logical
13731 line number directive (*note Comments::) or a preprocessor control
13732 command (*note Preprocessing::).
13734 The `;' character can be used to separate statements on the same
13738 File: as.info, Node: MMIX-Dependent, Next: MSP430-Dependent, Prev: MIPS-Dependent, Up: Machine Dependencies
13740 9.27 MMIX Dependent Features
13741 ============================
13745 * MMIX-Opts:: Command-line Options
13746 * MMIX-Expand:: Instruction expansion
13747 * MMIX-Syntax:: Syntax
13748 * MMIX-mmixal:: Differences to `mmixal' syntax and semantics
13751 File: as.info, Node: MMIX-Opts, Next: MMIX-Expand, Up: MMIX-Dependent
13753 9.27.1 Command-line Options
13754 ---------------------------
13756 The MMIX version of `as' has some machine-dependent options.
13758 When `--fixed-special-register-names' is specified, only the register
13759 names specified in *Note MMIX-Regs:: are recognized in the instructions
13762 You can use the `--globalize-symbols' to make all symbols global.
13763 This option is useful when splitting up a `mmixal' program into several
13766 The `--gnu-syntax' turns off most syntax compatibility with
13767 `mmixal'. Its usability is currently doubtful.
13769 The `--relax' option is not fully supported, but will eventually make
13770 the object file prepared for linker relaxation.
13772 If you want to avoid inadvertently calling a predefined symbol and
13773 would rather get an error, for example when using `as' with a compiler
13774 or other machine-generated code, specify `--no-predefined-syms'. This
13775 turns off built-in predefined definitions of all such symbols,
13776 including rounding-mode symbols, segment symbols, `BIT' symbols, and
13777 `TRAP' symbols used in `mmix' "system calls". It also turns off
13778 predefined special-register names, except when used in `PUT' and `GET'
13781 By default, some instructions are expanded to fit the size of the
13782 operand or an external symbol (*note MMIX-Expand::). By passing
13783 `--no-expand', no such expansion will be done, instead causing errors
13784 at link time if the operand does not fit.
13786 The `mmixal' documentation (*note mmixsite::) specifies that global
13787 registers allocated with the `GREG' directive (*note MMIX-greg::) and
13788 initialized to the same non-zero value, will refer to the same global
13789 register. This isn't strictly enforceable in `as' since the final
13790 addresses aren't known until link-time, but it will do an effort unless
13791 the `--no-merge-gregs' option is specified. (Register merging isn't
13792 yet implemented in `ld'.)
13794 `as' will warn every time it expands an instruction to fit an
13795 operand unless the option `-x' is specified. It is believed that this
13796 behaviour is more useful than just mimicking `mmixal''s behaviour, in
13797 which instructions are only expanded if the `-x' option is specified,
13798 and assembly fails otherwise, when an instruction needs to be expanded.
13799 It needs to be kept in mind that `mmixal' is both an assembler and
13800 linker, while `as' will expand instructions that at link stage can be
13801 contracted. (Though linker relaxation isn't yet implemented in `ld'.)
13802 The option `-x' also imples `--linker-allocated-gregs'.
13804 If instruction expansion is enabled, `as' can expand a `PUSHJ'
13805 instruction into a series of instructions. The shortest expansion is
13806 to not expand it, but just mark the call as redirectable to a stub,
13807 which `ld' creates at link-time, but only if the original `PUSHJ'
13808 instruction is found not to reach the target. The stub consists of the
13809 necessary instructions to form a jump to the target. This happens if
13810 `as' can assert that the `PUSHJ' instruction can reach such a stub.
13811 The option `--no-pushj-stubs' disables this shorter expansion, and the
13812 longer series of instructions is then created at assembly-time. The
13813 option `--no-stubs' is a synonym, intended for compatibility with
13814 future releases, where generation of stubs for other instructions may
13817 Usually a two-operand-expression (*note GREG-base::) without a
13818 matching `GREG' directive is treated as an error by `as'. When the
13819 option `--linker-allocated-gregs' is in effect, they are instead passed
13820 through to the linker, which will allocate as many global registers as
13824 File: as.info, Node: MMIX-Expand, Next: MMIX-Syntax, Prev: MMIX-Opts, Up: MMIX-Dependent
13826 9.27.2 Instruction expansion
13827 ----------------------------
13829 When `as' encounters an instruction with an operand that is either not
13830 known or does not fit the operand size of the instruction, `as' (and
13831 `ld') will expand the instruction into a sequence of instructions
13832 semantically equivalent to the operand fitting the instruction.
13833 Expansion will take place for the following instructions:
13836 Expands to a sequence of four instructions: `SETL', `INCML',
13837 `INCMH' and `INCH'. The operand must be a multiple of four.
13839 Conditional branches
13840 A branch instruction is turned into a branch with the complemented
13841 condition and prediction bit over five instructions; four
13842 instructions setting `$255' to the operand value, which like with
13843 `GETA' must be a multiple of four, and a final `GO $255,$255,0'.
13846 Similar to expansion for conditional branches; four instructions
13847 set `$255' to the operand value, followed by a `PUSHGO
13851 Similar to conditional branches and `PUSHJ'. The final instruction
13852 is `GO $255,$255,0'.
13854 The linker `ld' is expected to shrink these expansions for code
13855 assembled with `--relax' (though not currently implemented).
13858 File: as.info, Node: MMIX-Syntax, Next: MMIX-mmixal, Prev: MMIX-Expand, Up: MMIX-Dependent
13863 The assembly syntax is supposed to be upward compatible with that
13864 described in Sections 1.3 and 1.4 of `The Art of Computer Programming,
13865 Volume 1'. Draft versions of those chapters as well as other MMIX
13866 information is located at
13867 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'. Most code
13868 examples from the mmixal package located there should work unmodified
13869 when assembled and linked as single files, with a few noteworthy
13870 exceptions (*note MMIX-mmixal::).
13872 Before an instruction is emitted, the current location is aligned to
13873 the next four-byte boundary. If a label is defined at the beginning of
13874 the line, its value will be the aligned value.
13876 In addition to the traditional hex-prefix `0x', a hexadecimal number
13877 can also be specified by the prefix character `#'.
13879 After all operands to an MMIX instruction or directive have been
13880 specified, the rest of the line is ignored, treated as a comment.
13884 * MMIX-Chars:: Special Characters
13885 * MMIX-Symbols:: Symbols
13886 * MMIX-Regs:: Register Names
13887 * MMIX-Pseudos:: Assembler Directives
13890 File: as.info, Node: MMIX-Chars, Next: MMIX-Symbols, Up: MMIX-Syntax
13892 9.27.3.1 Special Characters
13893 ...........................
13895 The characters `*' and `#' are line comment characters; each start a
13896 comment at the beginning of a line, but only at the beginning of a
13897 line. A `#' prefixes a hexadecimal number if found elsewhere on a
13898 line. If a `#' appears at the start of a line the whole line is
13899 treated as a comment, but the line can also act as a logical line
13900 number directive (*note Comments::) or a preprocessor control command
13901 (*note Preprocessing::).
13903 Two other characters, `%' and `!', each start a comment anywhere on
13904 the line. Thus you can't use the `modulus' and `not' operators in
13905 expressions normally associated with these two characters.
13907 A `;' is a line separator, treated as a new-line, so separate
13908 instructions can be specified on a single line.
13911 File: as.info, Node: MMIX-Symbols, Next: MMIX-Regs, Prev: MMIX-Chars, Up: MMIX-Syntax
13916 The character `:' is permitted in identifiers. There are two
13917 exceptions to it being treated as any other symbol character: if a
13918 symbol begins with `:', it means that the symbol is in the global
13919 namespace and that the current prefix should not be prepended to that
13920 symbol (*note MMIX-prefix::). The `:' is then not considered part of
13921 the symbol. For a symbol in the label position (first on a line), a `:'
13922 at the end of a symbol is silently stripped off. A label is permitted,
13923 but not required, to be followed by a `:', as with many other assembly
13926 The character `@' in an expression, is a synonym for `.', the
13929 In addition to the common forward and backward local symbol formats
13930 (*note Symbol Names::), they can be specified with upper-case `B' and
13931 `F', as in `8B' and `9F'. A local label defined for the current
13932 position is written with a `H' appended to the number:
13934 This and traditional local-label formats cannot be mixed: a label
13935 must be defined and referred to using the same format.
13937 There's a minor caveat: just as for the ordinary local symbols, the
13938 local symbols are translated into ordinary symbols using control
13939 characters are to hide the ordinal number of the symbol.
13940 Unfortunately, these symbols are not translated back in error messages.
13941 Thus you may see confusing error messages when local symbols are used.
13942 Control characters `\003' (control-C) and `\004' (control-D) are used
13943 for the MMIX-specific local-symbol syntax.
13945 The symbol `Main' is handled specially; it is always global.
13947 By defining the symbols `__.MMIX.start..text' and
13948 `__.MMIX.start..data', the address of respectively the `.text' and
13949 `.data' segments of the final program can be defined, though when
13950 linking more than one object file, the code or data in the object file
13951 containing the symbol is not guaranteed to be start at that position;
13952 just the final executable. *Note MMIX-loc::.
13955 File: as.info, Node: MMIX-Regs, Next: MMIX-Pseudos, Prev: MMIX-Symbols, Up: MMIX-Syntax
13957 9.27.3.3 Register names
13958 .......................
13960 Local and global registers are specified as `$0' to `$255'. The
13961 recognized special register names are `rJ', `rA', `rB', `rC', `rD',
13962 `rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ',
13963 `rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT',
13964 `rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special
13967 Local and global symbols can be equated to register names and used in
13968 place of ordinary registers.
13970 Similarly for special registers, local and global symbols can be
13971 used. Also, symbols equated from numbers and constant expressions are
13972 allowed in place of a special register, except when either of the
13973 options `--no-predefined-syms' and `--fixed-special-register-names' are
13974 specified. Then only the special register names above are allowed for
13975 the instructions having a special register operand; `GET' and `PUT'.
13978 File: as.info, Node: MMIX-Pseudos, Prev: MMIX-Regs, Up: MMIX-Syntax
13980 9.27.3.4 Assembler Directives
13981 .............................
13984 The `LOC' directive sets the current location to the value of the
13985 operand field, which may include changing sections. If the
13986 operand is a constant, the section is set to either `.data' if the
13987 value is `0x2000000000000000' or larger, else it is set to `.text'.
13988 Within a section, the current location may only be changed to
13989 monotonically higher addresses. A LOC expression must be a
13990 previously defined symbol or a "pure" constant.
13992 An example, which sets the label PREV to the current location, and
13993 updates the current location to eight bytes forward:
13996 When a LOC has a constant as its operand, a symbol
13997 `__.MMIX.start..text' or `__.MMIX.start..data' is defined
13998 depending on the address as mentioned above. Each such symbol is
13999 interpreted as special by the linker, locating the section at that
14000 address. Note that if multiple files are linked, the first object
14001 file with that section will be mapped to that address (not
14002 necessarily the file with the LOC definition).
14006 LOCAL external_symbol
14010 This directive-operation generates a link-time assertion that the
14011 operand does not correspond to a global register. The operand is
14012 an expression that at link-time resolves to a register symbol or a
14013 number. A number is treated as the register having that number.
14014 There is one restriction on the use of this directive: the
14015 pseudo-directive must be placed in a section with contents, code
14019 The `IS' directive:
14020 asymbol IS an_expression
14021 sets the symbol `asymbol' to `an_expression'. A symbol may not be
14022 set more than once using this directive. Local labels may be set
14023 using this directive, for example:
14027 This directive reserves a global register, gives it an initial
14028 value and optionally gives it a symbolic name. Some examples:
14031 breg GREG data_value
14033 .greg creg, another_data_value
14035 The symbolic register name can be used in place of a (non-special)
14036 register. If a value isn't provided, it defaults to zero. Unless
14037 the option `--no-merge-gregs' is specified, non-zero registers
14038 allocated with this directive may be eliminated by `as'; another
14039 register with the same value used in its place. Any of the
14040 instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU',
14041 `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW',
14042 `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT',
14043 `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can
14044 have a value nearby an initial value in place of its second and
14045 third operands. Here, "nearby" is defined as within the range
14046 0...255 from the initial value of such an allocated register.
14048 buffer1 BYTE 0,0,0,0,0
14049 buffer2 BYTE 0,0,0,0,0
14053 In the example above, the `Y' field of the `LDOUI' instruction
14054 (LDOU with a constant Z) will be replaced with the global register
14055 allocated for `buffer1', and the `Z' field will have the value 5,
14056 the offset from `buffer1' to `buffer2'. The result is equivalent
14058 buffer1 BYTE 0,0,0,0,0
14059 buffer2 BYTE 0,0,0,0,0
14061 tmpreg GREG buffer1
14062 LDOU $42,tmpreg,(buffer2-buffer1)
14064 Global registers allocated with this directive are allocated in
14065 order higher-to-lower within a file. Other than that, the exact
14066 order of register allocation and elimination is undefined. For
14067 example, the order is undefined when more than one file with such
14068 directives are linked together. With the options `-x' and
14069 `--linker-allocated-gregs', `GREG' directives for two-operand
14070 cases like the one mentioned above can be omitted. Sufficient
14071 global registers will then be allocated by the linker.
14074 The `BYTE' directive takes a series of operands separated by a
14075 comma. If an operand is a string (*note Strings::), each
14076 character of that string is emitted as a byte. Other operands
14077 must be constant expressions without forward references, in the
14078 range 0...255. If you need operands having expressions with
14079 forward references, use `.byte' (*note Byte::). An operand can be
14080 omitted, defaulting to a zero value.
14085 The directives `WYDE', `TETRA' and `OCTA' emit constants of two,
14086 four and eight bytes size respectively. Before anything else
14087 happens for the directive, the current location is aligned to the
14088 respective constant-size boundary. If a label is defined at the
14089 beginning of the line, its value will be that after the alignment.
14090 A single operand can be omitted, defaulting to a zero value
14091 emitted for the directive. Operands can be expressed as strings
14092 (*note Strings::), in which case each character in the string is
14093 emitted as a separate constant of the size indicated by the
14097 The `PREFIX' directive sets a symbol name prefix to be prepended to
14098 all symbols (except local symbols, *note MMIX-Symbols::), that are
14099 not prefixed with `:', until the next `PREFIX' directive. Such
14100 prefixes accumulate. For example,
14104 defines a symbol `abc' with the value 0.
14108 A pair of `BSPEC' and `ESPEC' directives delimit a section of
14109 special contents (without specified semantics). Example:
14113 The single operand to `BSPEC' must be number in the range 0...255.
14114 The `BSPEC' number 80 is used by the GNU binutils implementation.
14117 File: as.info, Node: MMIX-mmixal, Prev: MMIX-Syntax, Up: MMIX-Dependent
14119 9.27.4 Differences to `mmixal'
14120 ------------------------------
14122 The binutils `as' and `ld' combination has a few differences in
14123 function compared to `mmixal' (*note mmixsite::).
14125 The replacement of a symbol with a GREG-allocated register (*note
14126 GREG-base::) is not handled the exactly same way in `as' as in
14127 `mmixal'. This is apparent in the `mmixal' example file `inout.mms',
14128 where different registers with different offsets, eventually yielding
14129 the same address, are used in the first instruction. This type of
14130 difference should however not affect the function of any program unless
14131 it has specific assumptions about the allocated register number.
14133 Line numbers (in the `mmo' object format) are currently not
14136 Expression operator precedence is not that of mmixal: operator
14137 precedence is that of the C programming language. It's recommended to
14138 use parentheses to explicitly specify wanted operator precedence
14139 whenever more than one type of operators are used.
14141 The serialize unary operator `&', the fractional division operator
14142 `//', the logical not operator `!' and the modulus operator `%' are not
14145 Symbols are not global by default, unless the option
14146 `--globalize-symbols' is passed. Use the `.global' directive to
14147 globalize symbols (*note Global::).
14149 Operand syntax is a bit stricter with `as' than `mmixal'. For
14150 example, you can't say `addu 1,2,3', instead you must write `addu
14153 You can't LOC to a lower address than those already visited (i.e.,
14156 A LOC directive must come before any emitted code.
14158 Predefined symbols are visible as file-local symbols after use. (In
14159 the ELF file, that is--the linked mmo file has no notion of a file-local
14162 Some mapping of constant expressions to sections in LOC expressions
14163 is attempted, but that functionality is easily confused and should be
14164 avoided unless compatibility with `mmixal' is required. A LOC
14165 expression to `0x2000000000000000' or higher, maps to the `.data'
14166 section and lower addresses map to the `.text' section (*note
14169 The code and data areas are each contiguous. Sparse programs with
14170 far-away LOC directives will take up the same amount of space as a
14171 contiguous program with zeros filled in the gaps between the LOC
14172 directives. If you need sparse programs, you might try and get the
14173 wanted effect with a linker script and splitting up the code parts into
14174 sections (*note Section::). Assembly code for this, to be compatible
14175 with `mmixal', would look something like:
14177 LOC away_expression
14181 `as' will not execute the LOC directive and `mmixal' ignores the
14182 lines with `.'. This construct can be used generally to help
14185 Symbols can't be defined twice-not even to the same value.
14187 Instruction mnemonics are recognized case-insensitive, though the
14188 `IS' and `GREG' pseudo-operations must be specified in upper-case
14191 There's no unicode support.
14193 The following is a list of programs in `mmix.tar.gz', available at
14194 `http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last
14195 checked with the version dated 2001-08-25 (md5sum
14196 c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do
14197 not assemble with `as':
14200 LOC to a previous address.
14203 Redefines symbol `Done'.
14206 Uses the serial operator `&'.
14209 File: as.info, Node: MSP430-Dependent, Next: NS32K-Dependent, Prev: MMIX-Dependent, Up: Machine Dependencies
14211 9.28 MSP 430 Dependent Features
14212 ===============================
14216 * MSP430 Options:: Options
14217 * MSP430 Syntax:: Syntax
14218 * MSP430 Floating Point:: Floating Point
14219 * MSP430 Directives:: MSP 430 Machine Directives
14220 * MSP430 Opcodes:: Opcodes
14221 * MSP430 Profiling Capability:: Profiling Capability
14224 File: as.info, Node: MSP430 Options, Next: MSP430 Syntax, Up: MSP430-Dependent
14230 select the mpu arch. Currently has no effect.
14233 enables polymorph instructions handler.
14236 enables relaxation at assembly time. DANGEROUS!
14240 File: as.info, Node: MSP430 Syntax, Next: MSP430 Floating Point, Prev: MSP430 Options, Up: MSP430-Dependent
14247 * MSP430-Macros:: Macros
14248 * MSP430-Chars:: Special Characters
14249 * MSP430-Regs:: Register Names
14250 * MSP430-Ext:: Assembler Extensions
14253 File: as.info, Node: MSP430-Macros, Next: MSP430-Chars, Up: MSP430 Syntax
14258 The macro syntax used on the MSP 430 is like that described in the MSP
14259 430 Family Assembler Specification. Normal `as' macros should still
14262 Additional built-in macros are:
14265 Extracts least significant word from 32-bit expression 'exp'.
14268 Extracts most significant word from 32-bit expression 'exp'.
14271 Extracts 3rd word from 64-bit expression 'exp'.
14274 Extracts 4rd word from 64-bit expression 'exp'.
14277 They normally being used as an immediate source operand.
14278 mov #llo(1), r10 ; == mov #1, r10
14279 mov #lhi(1), r10 ; == mov #0, r10
14282 File: as.info, Node: MSP430-Chars, Next: MSP430-Regs, Prev: MSP430-Macros, Up: MSP430 Syntax
14284 9.28.2.2 Special Characters
14285 ...........................
14287 A semicolon (`;') appearing anywhere on a line starts a comment that
14288 extends to the end of that line.
14290 If a `#' appears as the first character of a line then the whole
14291 line is treated as a comment, but it can also be a logical line number
14292 directive (*note Comments::) or a preprocessor control command (*note
14295 Multiple statements can appear on the same line provided that they
14296 are separated by the `{' character.
14298 The character `$' in jump instructions indicates current location and
14299 implemented only for TI syntax compatibility.
14302 File: as.info, Node: MSP430-Regs, Next: MSP430-Ext, Prev: MSP430-Chars, Up: MSP430 Syntax
14304 9.28.2.3 Register Names
14305 .......................
14307 General-purpose registers are represented by predefined symbols of the
14308 form `rN' (for global registers), where N represents a number between
14309 `0' and `15'. The leading letters may be in either upper or lower
14310 case; for example, `r13' and `R7' are both valid register names.
14312 Register names `PC', `SP' and `SR' cannot be used as register names
14313 and will be treated as variables. Use `r0', `r1', and `r2' instead.
14316 File: as.info, Node: MSP430-Ext, Prev: MSP430-Regs, Up: MSP430 Syntax
14318 9.28.2.4 Assembler Extensions
14319 .............................
14322 As destination operand being treated as `0(rn)'
14325 As source operand being treated as `@rn'
14328 Skips next N bytes followed by jump instruction and equivalent to
14332 Also, there are some instructions, which cannot be found in other
14333 assemblers. These are branch instructions, which has different opcodes
14334 upon jump distance. They all got PC relative addressing mode.
14337 A polymorph instruction which is `jeq label' in case if jump
14338 distance within allowed range for cpu's jump instruction. If not,
14339 this unrolls into a sequence of
14344 A polymorph instruction which is `jne label' or `jeq +4; br label'
14347 A polymorph instruction which is `jl label' or `jge +4; br label'
14350 A polymorph instruction which is `jn label' or `jn +2; jmp +4; br
14354 A polymorph instruction which is `jlo label' or `jhs +2; br label'
14357 A polymorph instruction which is `jge label' or `jl +4; br label'
14360 A polymorph instruction which is `jhs label' or `jlo +4; br label'
14363 A polymorph instruction which is `jeq +2; jge label' or `jeq +6;
14367 A polymorph instruction which is `jeq +2; jhs label' or `jeq +6;
14371 A polymorph instruction which is `jeq label; jlo label' or `jeq
14372 +2; jhs +4; br label'
14375 A polymorph instruction which is `jeq label; jl label' or `jeq
14376 +2; jge +4; br label'
14379 A polymorph instruction which is `jmp label' or `br label'
14382 File: as.info, Node: MSP430 Floating Point, Next: MSP430 Directives, Prev: MSP430 Syntax, Up: MSP430-Dependent
14384 9.28.3 Floating Point
14385 ---------------------
14387 The MSP 430 family uses IEEE 32-bit floating-point numbers.
14390 File: as.info, Node: MSP430 Directives, Next: MSP430 Opcodes, Prev: MSP430 Floating Point, Up: MSP430-Dependent
14392 9.28.4 MSP 430 Machine Directives
14393 ---------------------------------
14396 This directive is ignored; it is accepted for compatibility with
14397 other MSP 430 assemblers.
14399 _Warning:_ in other versions of the GNU assembler, `.file' is
14400 used for the directive called `.app-file' in the MSP 430
14404 This directive is ignored; it is accepted for compatibility with
14405 other MSP 430 assemblers.
14408 Currently this directive is ignored; it is accepted for
14409 compatibility with other MSP 430 assemblers.
14412 This directive instructs assembler to add new profile entry to the
14417 File: as.info, Node: MSP430 Opcodes, Next: MSP430 Profiling Capability, Prev: MSP430 Directives, Up: MSP430-Dependent
14422 `as' implements all the standard MSP 430 opcodes. No additional
14423 pseudo-instructions are needed on this family.
14425 For information on the 430 machine instruction set, see `MSP430
14426 User's Manual, document slau049d', Texas Instrument, Inc.
14429 File: as.info, Node: MSP430 Profiling Capability, Prev: MSP430 Opcodes, Up: MSP430-Dependent
14431 9.28.6 Profiling Capability
14432 ---------------------------
14434 It is a performance hit to use gcc's profiling approach for this tiny
14435 target. Even more - jtag hardware facility does not perform any
14436 profiling functions. However we've got gdb's built-in simulator where
14437 we can do anything.
14439 We define new section `.profiler' which holds all profiling
14440 information. We define new pseudo operation `.profiler' which will
14441 instruct assembler to add new profile entry to the object file. Profile
14442 should take place at the present address.
14444 Pseudo operation format:
14446 `.profiler flags,function_to_profile [, cycle_corrector, extra]'
14450 `flags' is a combination of the following characters:
14459 function is in init section
14462 function is in fini section
14474 interrupt service routine
14489 long jump / sjlj unwind
14492 an arbitrary code fragment
14495 extra parameter saved (a constant value like frame size)
14497 `function_to_profile'
14501 a value which should be added to the cycle counter, zero if
14505 any extra parameter, zero if omitted.
14510 .type fxx,@function
14512 .LFrameOffset_fxx=0x08
14513 .profiler "scdP", fxx ; function entry.
14514 ; we also demand stack value to be saved
14519 .profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point
14520 ; (this is a prologue end)
14521 ; note, that spare var filled with
14525 .profiler cdE,fxx ; check stack
14530 .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter
14531 ret ; cause 'ret' insn takes 3 cycles
14534 File: as.info, Node: NS32K-Dependent, Next: SH-Dependent, Prev: MSP430-Dependent, Up: Machine Dependencies
14536 9.29 NS32K Dependent Features
14537 =============================
14541 * NS32K Syntax:: Syntax
14544 File: as.info, Node: NS32K Syntax, Up: NS32K-Dependent
14551 * NS32K-Chars:: Special Characters
14554 File: as.info, Node: NS32K-Chars, Up: NS32K Syntax
14556 9.29.1.1 Special Characters
14557 ...........................
14559 The presence of a `#' appearing anywhere on a line indicates the start
14560 of a comment that extends to the end of that line.
14562 If a `#' appears as the first character of a line then the whole
14563 line is treated as a comment, but in this case the line can also be a
14564 logical line number directive (*note Comments::) or a preprocessor
14565 control command (*note Preprocessing::).
14567 If Sequent compatibility has been configured into the assembler then
14568 the `|' character appearing as the first character on a line will also
14569 indicate the start of a line comment.
14571 The `;' character can be used to separate statements on the same
14575 File: as.info, Node: PDP-11-Dependent, Next: PJ-Dependent, Prev: SH64-Dependent, Up: Machine Dependencies
14577 9.30 PDP-11 Dependent Features
14578 ==============================
14582 * PDP-11-Options:: Options
14583 * PDP-11-Pseudos:: Assembler Directives
14584 * PDP-11-Syntax:: DEC Syntax versus BSD Syntax
14585 * PDP-11-Mnemonics:: Instruction Naming
14586 * PDP-11-Synthetic:: Synthetic Instructions
14589 File: as.info, Node: PDP-11-Options, Next: PDP-11-Pseudos, Up: PDP-11-Dependent
14594 The PDP-11 version of `as' has a rich set of machine dependent options.
14596 9.30.1.1 Code Generation Options
14597 ................................
14600 Generate position-independent (or position-dependent) code.
14602 The default is to generate position-independent code.
14604 9.30.1.2 Instruction Set Extension Options
14605 ..........................................
14607 These options enables or disables the use of extensions over the base
14608 line instruction set as introduced by the first PDP-11 CPU: the KA11.
14609 Most options come in two variants: a `-m'EXTENSION that enables
14610 EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION.
14612 The default is to enable all extensions.
14614 `-mall | -mall-extensions'
14615 Enable all instruction set extensions.
14618 Disable all instruction set extensions.
14621 Enable (or disable) the use of the commercial instruction set,
14622 which consists of these instructions: `ADDNI', `ADDN', `ADDPI',
14623 `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC',
14624 `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI',
14625 `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL',
14626 `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI',
14627 `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC',
14628 `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI',
14629 `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'.
14632 Enable (or disable) the use of the `CSM' instruction.
14635 Enable (or disable) the use of the extended instruction set, which
14636 consists of these instructions: `ASHC', `ASH', `DIV', `MARK',
14637 `MUL', `RTT', `SOB' `SXT', and `XOR'.
14640 `-mno-fis | -mno-kev11'
14641 Enable (or disable) the use of the KEV11 floating-point
14642 instructions: `FADD', `FDIV', `FMUL', and `FSUB'.
14644 `-mfpp | -mfpu | -mfp-11'
14645 `-mno-fpp | -mno-fpu | -mno-fp-11'
14646 Enable (or disable) the use of FP-11 floating-point instructions:
14647 `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF',
14648 `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF',
14649 `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST',
14650 `SUBF', and `TSTF'.
14652 `-mlimited-eis | -mno-limited-eis'
14653 Enable (or disable) the use of the limited extended instruction
14654 set: `MARK', `RTT', `SOB', `SXT', and `XOR'.
14656 The -mno-limited-eis options also implies -mno-eis.
14658 `-mmfpt | -mno-mfpt'
14659 Enable (or disable) the use of the `MFPT' instruction.
14661 `-mmultiproc | -mno-multiproc'
14662 Enable (or disable) the use of multiprocessor instructions:
14663 `TSTSET' and `WRTLCK'.
14665 `-mmxps | -mno-mxps'
14666 Enable (or disable) the use of the `MFPS' and `MTPS' instructions.
14669 Enable (or disable) the use of the `SPL' instruction.
14671 Enable (or disable) the use of the microcode instructions: `LDUB',
14674 9.30.1.3 CPU Model Options
14675 ..........................
14677 These options enable the instruction set extensions supported by a
14678 particular CPU, and disables all other extensions.
14681 KA11 CPU. Base line instruction set only.
14684 KB11 CPU. Enable extended instruction set and `SPL'.
14687 KD11-A CPU. Enable limited extended instruction set.
14690 KD11-B CPU. Base line instruction set only.
14693 KD11-D CPU. Base line instruction set only.
14696 KD11-E CPU. Enable extended instruction set, `MFPS', and `MTPS'.
14698 `-mkd11f | -mkd11h | -mkd11q'
14699 KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended
14700 instruction set, `MFPS', and `MTPS'.
14703 KD11-K CPU. Enable extended instruction set, `LDUB', `MED',
14704 `MFPS', `MFPT', `MTPS', and `XFC'.
14707 KD11-Z CPU. Enable extended instruction set, `CSM', `MFPS',
14708 `MFPT', `MTPS', and `SPL'.
14711 F11 CPU. Enable extended instruction set, `MFPS', `MFPT', and
14715 J11 CPU. Enable extended instruction set, `CSM', `MFPS', `MFPT',
14716 `MTPS', `SPL', `TSTSET', and `WRTLCK'.
14719 T11 CPU. Enable limited extended instruction set, `MFPS', and
14722 9.30.1.4 Machine Model Options
14723 ..............................
14725 These options enable the instruction set extensions supported by a
14726 particular machine model, and disables all other extensions.
14734 `-m11/05 | -m11/10'
14737 `-m11/15 | -m11/20'
14743 `-m11/23 | -m11/24'
14750 Ame as `-mkd11e' `-mfpp'.
14752 `-m11/35 | -m11/40'
14758 `-m11/45 | -m11/50 | -m11/55 | -m11/70'
14761 `-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94'
14768 File: as.info, Node: PDP-11-Pseudos, Next: PDP-11-Syntax, Prev: PDP-11-Options, Up: PDP-11-Dependent
14770 9.30.2 Assembler Directives
14771 ---------------------------
14773 The PDP-11 version of `as' has a few machine dependent assembler
14777 Switch to the `bss' section.
14780 Align the location counter to an even number.
14783 File: as.info, Node: PDP-11-Syntax, Next: PDP-11-Mnemonics, Prev: PDP-11-Pseudos, Up: PDP-11-Dependent
14785 9.30.3 PDP-11 Assembly Language Syntax
14786 --------------------------------------
14788 `as' supports both DEC syntax and BSD syntax. The only difference is
14789 that in DEC syntax, a `#' character is used to denote an immediate
14790 constants, while in BSD syntax the character for this purpose is `$'.
14792 general-purpose registers are named `r0' through `r7'. Mnemonic
14793 alternatives for `r6' and `r7' are `sp' and `pc', respectively.
14795 Floating-point registers are named `ac0' through `ac3', or
14796 alternatively `fr0' through `fr3'.
14798 Comments are started with a `#' or a `/' character, and extend to
14799 the end of the line. (FIXME: clash with immediates?)
14801 Multiple statements on the same line can be separated by the `;'
14805 File: as.info, Node: PDP-11-Mnemonics, Next: PDP-11-Synthetic, Prev: PDP-11-Syntax, Up: PDP-11-Dependent
14807 9.30.4 Instruction Naming
14808 -------------------------
14810 Some instructions have alternative names.
14828 File: as.info, Node: PDP-11-Synthetic, Prev: PDP-11-Mnemonics, Up: PDP-11-Dependent
14830 9.30.5 Synthetic Instructions
14831 -----------------------------
14833 The `JBR' and `J'CC synthetic instructions are not supported yet.
14836 File: as.info, Node: PJ-Dependent, Next: PPC-Dependent, Prev: PDP-11-Dependent, Up: Machine Dependencies
14838 9.31 picoJava Dependent Features
14839 ================================
14843 * PJ Options:: Options
14844 * PJ Syntax:: PJ Syntax
14847 File: as.info, Node: PJ Options, Next: PJ Syntax, Up: PJ-Dependent
14852 `as' has two additional command-line options for the picoJava
14855 This option selects little endian data output.
14858 This option selects big endian data output.
14861 File: as.info, Node: PJ Syntax, Prev: PJ Options, Up: PJ-Dependent
14868 * PJ-Chars:: Special Characters
14871 File: as.info, Node: PJ-Chars, Up: PJ Syntax
14873 9.31.2.1 Special Characters
14874 ...........................
14876 The presence of a `!' or `/' on a line indicates the start of a comment
14877 that extends to the end of the current line.
14879 If a `#' appears as the first character of a line then the whole
14880 line is treated as a comment, but in this case the line could also be a
14881 logical line number directive (*note Comments::) or a preprocessor
14882 control command (*note Preprocessing::).
14884 The `;' character can be used to separate statements on the same
14888 File: as.info, Node: PPC-Dependent, Next: RL78-Dependent, Prev: PJ-Dependent, Up: Machine Dependencies
14890 9.32 PowerPC Dependent Features
14891 ===============================
14895 * PowerPC-Opts:: Options
14896 * PowerPC-Pseudo:: PowerPC Assembler Directives
14897 * PowerPC-Syntax:: PowerPC Syntax
14900 File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent
14905 The PowerPC chip family includes several successive levels, using the
14906 same core instruction set, but including a few additional instructions
14907 at each level. There are exceptions to this however. For details on
14908 what instructions each variant supports, please see the chip's
14909 architecture reference manual.
14911 The following table lists all available PowerPC options.
14914 Generate ELF32 or XCOFF32.
14917 Generate ELF64 or XCOFF64.
14920 Set EF_PPC_RELOCATABLE_LIB in ELF flags.
14923 Generate code for POWER/2 (RIOS2).
14926 Generate code for POWER (RIOS1)
14929 Generate code for PowerPC 601.
14931 `-mppc, -mppc32, -m603, -m604'
14932 Generate code for PowerPC 603/604.
14935 Generate code for PowerPC 403/405.
14938 Generate code for PowerPC 440. BookE and some 405 instructions.
14941 Generate code for PowerPC 464.
14944 Generate code for PowerPC 476.
14946 `-m7400, -m7410, -m7450, -m7455'
14947 Generate code for PowerPC 7400/7410/7450/7455.
14950 Generate code for PowerPC 750CL.
14953 Generate code for PowerPC 620/625/630.
14956 Generate code for Motorola e500 core complex.
14959 Generate code for Freescale e500mc core complex.
14962 Generate code for Freescale e500mc64 core complex.
14965 Generate code for Freescale e5500 core complex.
14968 Generate code for Freescale e6500 core complex.
14971 Generate code for Motorola SPE instructions.
14974 Generate code for AppliedMicro Titan core complex.
14977 Generate code for PowerPC 64, including bridge insns.
14980 Generate code for 32-bit BookE.
14983 Generate code for A2 architecture.
14986 Generate code for PowerPC e300 family.
14989 Generate code for processors with AltiVec instructions.
14992 Generate code for processors with Vector-Scalar (VSX) instructions.
14995 Generate code for Power4 architecture.
14997 `-mpower5, -mpwr5, -mpwr5x'
14998 Generate code for Power5 architecture.
15001 Generate code for Power6 architecture.
15004 Generate code for Power7 architecture.
15007 Generate code for Cell Broadband Engine architecture.
15010 Generate code Power/PowerPC common instructions.
15013 Generate code for any architecture (PWR/PWRX/PPC).
15016 Allow symbolic names for registers.
15019 Do not allow symbolic names for registers.
15022 Support for GCC's -mrelocatable option.
15024 `-mrelocatable-lib'
15025 Support for GCC's -mrelocatable-lib option.
15028 Set PPC_EMB bit in ELF flags.
15030 `-mlittle, -mlittle-endian, -le'
15031 Generate code for a little endian machine.
15033 `-mbig, -mbig-endian, -be'
15034 Generate code for a big endian machine.
15037 Generate code for Solaris.
15040 Do not generate code for Solaris.
15043 If an alignment directive inserts more than COUNT nops, put a
15044 branch at the beginning to skip execution of the nops.
15047 File: as.info, Node: PowerPC-Pseudo, Next: PowerPC-Syntax, Prev: PowerPC-Opts, Up: PPC-Dependent
15049 9.32.2 PowerPC Assembler Directives
15050 -----------------------------------
15052 A number of assembler directives are available for PowerPC. The
15053 following table is far from complete.
15055 `.machine "string"'
15056 This directive allows you to change the machine for which code is
15057 generated. `"string"' may be any of the -m cpu selection options
15058 (without the -m) enclosed in double quotes, `"push"', or `"pop"'.
15059 `.machine "push"' saves the currently selected cpu, which may be
15060 restored with `.machine "pop"'.
15063 File: as.info, Node: PowerPC-Syntax, Prev: PowerPC-Pseudo, Up: PPC-Dependent
15065 9.32.3 PowerPC Syntax
15066 ---------------------
15070 * PowerPC-Chars:: Special Characters
15073 File: as.info, Node: PowerPC-Chars, Up: PowerPC-Syntax
15075 9.32.3.1 Special Characters
15076 ...........................
15078 The presence of a `#' on a line indicates the start of a comment that
15079 extends to the end of the current line.
15081 If a `#' appears as the first character of a line then the whole
15082 line is treated as a comment, but in this case the line could also be a
15083 logical line number directive (*note Comments::) or a preprocessor
15084 control command (*note Preprocessing::).
15086 If the assembler has been configured for the ppc-*-solaris* target
15087 then the `!' character also acts as a line comment character. This can
15088 be disabled via the `-mno-solaris' command line option.
15090 The `;' character can be used to separate statements on the same
15094 File: as.info, Node: RL78-Dependent, Next: RX-Dependent, Prev: PPC-Dependent, Up: Machine Dependencies
15096 9.33 RL78 Dependent Features
15097 ============================
15101 * RL78-Opts:: RL78 Assembler Command Line Options
15102 * RL78-Modifiers:: Symbolic Operand Modifiers
15103 * RL78-Directives:: Assembler Directives
15104 * RL78-Syntax:: Syntax
15107 File: as.info, Node: RL78-Opts, Next: RL78-Modifiers, Up: RL78-Dependent
15109 9.33.1 RL78 Options
15110 -------------------
15112 The Renesas RL78 port of `as' has no target-specific options.
15115 File: as.info, Node: RL78-Modifiers, Next: RL78-Directives, Prev: RL78-Opts, Up: RL78-Dependent
15117 9.33.2 Symbolic Operand Modifiers
15118 ---------------------------------
15120 The RL78 has three modifiers that adjust the relocations used by the
15124 When loading a 20-bit (or wider) address into registers, this
15125 modifier selects the 16 least significant bits.
15127 movw ax,#%lo16(_sym)
15130 When loading a 20-bit (or wider) address into registers, this
15131 modifier selects the 16 most significant bits.
15133 movw ax,#%hi16(_sym)
15136 When loading a 20-bit (or wider) address into registers, this
15137 modifier selects the 8 bits that would go into CS or ES (i.e. bits
15140 mov es, #%hi8(_sym)
15144 File: as.info, Node: RL78-Directives, Next: RL78-Syntax, Prev: RL78-Modifiers, Up: RL78-Dependent
15146 9.33.3 Assembler Directives
15147 ---------------------------
15149 In addition to the common directives, the RL78 adds these:
15152 Output a constant in "double" format, which is a 32-bit floating
15153 point value on RL78.
15156 Select the BSS section.
15159 Output a constant value in a three byte format.
15163 Output a constant value in a four byte format.
15167 File: as.info, Node: RL78-Syntax, Prev: RL78-Directives, Up: RL78-Dependent
15169 9.33.4 Syntax for the RL78
15170 --------------------------
15174 * RL78-Chars:: Special Characters
15177 File: as.info, Node: RL78-Chars, Up: RL78-Syntax
15179 9.33.4.1 Special Characters
15180 ...........................
15182 The presence of a `;' appearing anywhere on a line indicates the start
15183 of a comment that extends to the end of that line.
15185 If a `#' appears as the first character of a line then the whole
15186 line is treated as a comment, but in this case the line can also be a
15187 logical line number directive (*note Comments::) or a preprocessor
15188 control command (*note Preprocessing::).
15190 The `|' character can be used to separate statements on the same
15194 File: as.info, Node: RX-Dependent, Next: S/390-Dependent, Prev: RL78-Dependent, Up: Machine Dependencies
15196 9.34 RX Dependent Features
15197 ==========================
15201 * RX-Opts:: RX Assembler Command Line Options
15202 * RX-Modifiers:: Symbolic Operand Modifiers
15203 * RX-Directives:: Assembler Directives
15204 * RX-Float:: Floating Point
15205 * RX-Syntax:: Syntax
15208 File: as.info, Node: RX-Opts, Next: RX-Modifiers, Up: RX-Dependent
15213 The Renesas RX port of `as' has a few target specfic command line
15217 This option controls the ABI and indicates to use a 32-bit float
15218 ABI. It has no effect on the assembled instructions, but it does
15219 influence the behaviour of the `.double' pseudo-op. This is the
15223 This option controls the ABI and indicates to use a 64-bit float
15224 ABI. It has no effect on the assembled instructions, but it does
15225 influence the behaviour of the `.double' pseudo-op.
15228 This option controls the ABI and indicates to use a big-endian data
15229 ABI. It has no effect on the assembled instructions, but it does
15230 influence the behaviour of the `.short', `.hword', `.int',
15231 `.word', `.long', `.quad' and `.octa' pseudo-ops.
15234 This option controls the ABI and indicates to use a little-endian
15235 data ABI. It has no effect on the assembled instructions, but it
15236 does influence the behaviour of the `.short', `.hword', `.int',
15237 `.word', `.long', `.quad' and `.octa' pseudo-ops. This is the
15240 `-muse-conventional-section-names'
15241 This option controls the default names given to the code (.text),
15242 initialised data (.data) and uninitialised data sections (.bss).
15244 `-muse-renesas-section-names'
15245 This option controls the default names given to the code (.P),
15246 initialised data (.D_1) and uninitialised data sections (.B_1).
15247 This is the default.
15249 `-msmall-data-limit'
15250 This option tells the assembler that the small data limit feature
15251 of the RX port of GCC is being used. This results in the assembler
15252 generating an undefined reference to a symbol called `__gp' for
15253 use by the relocations that are needed to support the small data
15254 limit feature. This option is not enabled by default as it would
15255 otherwise pollute the symbol table.
15258 This option tells the assembler that the position independent data
15259 of the RX port of GCC is being used. This results in the assembler
15260 generating an undefined reference to a symbol called `__pid_base',
15261 and also setting the RX_PID flag bit in the e_flags field of the
15262 ELF header of the object file.
15264 `-mint-register=NUM'
15265 This option tells the assembler how many registers have been
15266 reserved for use by interrupt handlers. This is needed in order
15267 to compute the correct values for the `%gpreg' and `%pidreg' meta
15272 File: as.info, Node: RX-Modifiers, Next: RX-Directives, Prev: RX-Opts, Up: RX-Dependent
15274 9.34.2 Symbolic Operand Modifiers
15275 ---------------------------------
15277 The assembler supports one modifier when using symbol addresses in RX
15278 instruction operands. The general syntax is the following:
15282 The modifier returns the offset from the __GP symbol to the
15283 specified symbol as a 16-bit value. The intent is that this offset
15284 should be used in a register+offset move instruction when generating
15285 references to small data. Ie, like this:
15287 mov.W %gp(_foo)[%gpreg], r1
15289 The assembler also supports two meta register names which can be used
15290 to refer to registers whose values may not be known to the programmer.
15291 These meta register names are:
15294 The small data address register.
15297 The PID base address register.
15300 Both registers normally have the value r13, but this can change if
15301 some registers have been reserved for use by interrupt handlers or if
15302 both the small data limit and position independent data features are
15303 being used at the same time.
15306 File: as.info, Node: RX-Directives, Next: RX-Float, Prev: RX-Modifiers, Up: RX-Dependent
15308 9.34.3 Assembler Directives
15309 ---------------------------
15311 The RX version of `as' has the following specific assembler directives:
15314 Inserts a 3-byte value into the output file at the current
15318 If the next opcode following this directive spans a fetch line
15319 boundary (8 byte boundary), the opcode is aligned to that boundary.
15320 If the next opcode does not span a fetch line, this directive has
15321 no effect. Note that one or more labels may be between this
15322 directive and the opcode; those labels are aligned as well. Any
15323 inserted bytes due to alignment will form a NOP opcode.
15327 File: as.info, Node: RX-Float, Next: RX-Syntax, Prev: RX-Directives, Up: RX-Dependent
15329 9.34.4 Floating Point
15330 ---------------------
15332 The floating point formats generated by directives are these.
15335 `Single' precision (32-bit) floating point constants.
15338 If the `-m64bit-doubles' command line option has been specified
15339 then then `double' directive generates `double' precision (64-bit)
15340 floating point constants, otherwise it generates `single'
15341 precision (32-bit) floating point constants. To force the
15342 generation of 64-bit floating point constants used the `dc.d'
15347 File: as.info, Node: RX-Syntax, Prev: RX-Float, Up: RX-Dependent
15349 9.34.5 Syntax for the RX
15350 ------------------------
15354 * RX-Chars:: Special Characters
15357 File: as.info, Node: RX-Chars, Up: RX-Syntax
15359 9.34.5.1 Special Characters
15360 ...........................
15362 The presence of a `;' appearing anywhere on a line indicates the start
15363 of a comment that extends to the end of that line.
15365 If a `#' appears as the first character of a line then the whole
15366 line is treated as a comment, but in this case the line can also be a
15367 logical line number directive (*note Comments::) or a preprocessor
15368 control command (*note Preprocessing::).
15370 The `!' character can be used to separate statements on the same
15374 File: as.info, Node: S/390-Dependent, Next: SCORE-Dependent, Prev: RX-Dependent, Up: Machine Dependencies
15376 9.35 IBM S/390 Dependent Features
15377 =================================
15379 The s390 version of `as' supports two architectures modes and seven
15380 chip levels. The architecture modes are the Enterprise System
15381 Architecture (ESA) and the newer z/Architecture mode. The chip levels
15382 are g5, g6, z900, z990, z9-109, z9-ec, z10 and z196.
15386 * s390 Options:: Command-line Options.
15387 * s390 Characters:: Special Characters.
15388 * s390 Syntax:: Assembler Instruction syntax.
15389 * s390 Directives:: Assembler Directives.
15390 * s390 Floating Point:: Floating Point.
15393 File: as.info, Node: s390 Options, Next: s390 Characters, Up: S/390-Dependent
15398 The following table lists all available s390 specific options:
15401 Select 31- or 64-bit ABI implying a word size of 32- or 64-bit.
15403 These options are only available with the ELF object file format,
15404 and require that the necessary BFD support has been included (on a
15405 31-bit platform you must add -enable-64-bit-bfd on the call to the
15406 configure script to enable 64-bit usage and use s390x as target
15410 Select the architecture mode, either the Enterprise System
15411 Architecture (esa) mode or the z/Architecture mode (zarch).
15413 The 64-bit instructions are only available with the z/Architecture
15414 mode. The combination of `-m64' and `-mesa' results in a warning
15418 This option specifies the target processor. The following
15419 processor names are recognized: `g5', `g6', `z900', `z990',
15420 `z9-109', `z9-ec', `z10' and `z196'. Assembling an instruction
15421 that is not supported on the target processor results in an error
15422 message. Do not specify `g5' or `g6' with `-mzarch'.
15425 Allow symbolic names for registers.
15428 Do not allow symbolic names for registers.
15431 Warn whenever the operand for a base or index register has been
15432 specified but evaluates to zero. This can indicate the misuse of
15433 general purpose register 0 as an address register.
15437 File: as.info, Node: s390 Characters, Next: s390 Syntax, Prev: s390 Options, Up: S/390-Dependent
15439 9.35.2 Special Characters
15440 -------------------------
15442 `#' is the line comment character.
15444 If a `#' appears as the first character of a line then the whole
15445 line is treated as a comment, but in this case the line could also be a
15446 logical line number directive (*note Comments::) or a preprocessor
15447 control command (*note Preprocessing::).
15449 The `;' character can be used instead of a newline to separate
15453 File: as.info, Node: s390 Syntax, Next: s390 Directives, Prev: s390 Characters, Up: S/390-Dependent
15455 9.35.3 Instruction syntax
15456 -------------------------
15458 The assembler syntax closely follows the syntax outlined in Enterprise
15459 Systems Architecture/390 Principles of Operation (SA22-7201) and the
15460 z/Architecture Principles of Operation (SA22-7832).
15462 Each instruction has two major parts, the instruction mnemonic and
15463 the instruction operands. The instruction format varies.
15467 * s390 Register:: Register Naming
15468 * s390 Mnemonics:: Instruction Mnemonics
15469 * s390 Operands:: Instruction Operands
15470 * s390 Formats:: Instruction Formats
15471 * s390 Aliases:: Instruction Aliases
15472 * s390 Operand Modifier:: Instruction Operand Modifier
15473 * s390 Instruction Marker:: Instruction Marker
15474 * s390 Literal Pool Entries:: Literal Pool Entries
15477 File: as.info, Node: s390 Register, Next: s390 Mnemonics, Up: s390 Syntax
15479 9.35.3.1 Register naming
15480 ........................
15482 The `as' recognizes a number of predefined symbols for the various
15483 processor registers. A register specification in one of the instruction
15484 formats is an unsigned integer between 0 and 15. The specific
15485 instruction and the position of the register in the instruction format
15486 denotes the type of the register. The register symbols are prefixed with
15489 %rN the 16 general purpose registers, 0 <= N <= 15
15490 %fN the 16 floating point registers, 0 <= N <= 15
15491 %aN the 16 access registers, 0 <= N <= 15
15492 %cN the 16 control registers, 0 <= N <= 15
15493 %lit an alias for the general purpose register %r13
15494 %sp an alias for the general purpose register %r15
15497 File: as.info, Node: s390 Mnemonics, Next: s390 Operands, Prev: s390 Register, Up: s390 Syntax
15499 9.35.3.2 Instruction Mnemonics
15500 ..............................
15502 All instructions documented in the Principles of Operation are supported
15503 with the mnemonic and order of operands as described. The instruction
15504 mnemonic identifies the instruction format (*Note s390 Formats::) and
15505 the specific operation code for the instruction. For example, the `lr'
15506 mnemonic denotes the instruction format `RR' with the operation code
15509 The definition of the various mnemonics follows a scheme, where the
15510 first character usually hint at the type of the instruction:
15512 a add instruction, for example `al' for add logical 32-bit
15513 b branch instruction, for example `bc' for branch on condition
15514 c compare or convert instruction, for example `cr' for compare
15516 d divide instruction, for example `dlr' devide logical register
15518 i insert instruction, for example `ic' insert character
15519 l load instruction, for example `ltr' load and test register
15520 mv move instruction, for example `mvc' move character
15521 m multiply instruction, for example `mh' multiply halfword
15522 n and instruction, for example `ni' and immediate
15523 o or instruction, for example `oc' or character
15524 sla, sll shift left single instruction
15525 sra, srl shift right single instruction
15526 st store instruction, for example `stm' store multiple
15527 s subtract instruction, for example `slr' subtract
15529 t test or translate instruction, of example `tm' test under mask
15530 x exclusive or instruction, for example `xc' exclusive or
15533 Certain characters at the end of the mnemonic may describe a property
15534 of the instruction:
15536 c the instruction uses a 8-bit character operand
15537 f the instruction extends a 32-bit operand to 64 bit
15538 g the operands are treated as 64-bit values
15539 h the operand uses a 16-bit halfword operand
15540 i the instruction uses an immediate operand
15541 l the instruction uses unsigned, logical operands
15542 m the instruction uses a mask or operates on multiple values
15543 r if r is the last character, the instruction operates on registers
15544 y the instruction uses 20-bit displacements
15546 There are many exceptions to the scheme outlined in the above lists,
15547 in particular for the priviledged instructions. For non-priviledged
15548 instruction it works quite well, for example the instruction `clgfr' c:
15549 compare instruction, l: unsigned operands, g: 64-bit operands, f: 32-
15550 to 64-bit extension, r: register operands. The instruction compares an
15551 64-bit value in a register with the zero extended 32-bit value from a
15552 second register. For a complete list of all mnemonics see appendix B
15553 in the Principles of Operation.
15556 File: as.info, Node: s390 Operands, Next: s390 Formats, Prev: s390 Mnemonics, Up: s390 Syntax
15558 9.35.3.3 Instruction Operands
15559 .............................
15561 Instruction operands can be grouped into three classes, operands located
15562 in registers, immediate operands, and operands in storage.
15564 A register operand can be located in general, floating-point, access,
15565 or control register. The register is identified by a four-bit field.
15566 The field containing the register operand is called the R field.
15568 Immediate operands are contained within the instruction and can have
15569 8, 16 or 32 bits. The field containing the immediate operand is called
15570 the I field. Dependent on the instruction the I field is either signed
15573 A storage operand consists of an address and a length. The address
15574 of a storage operands can be specified in any of these ways:
15576 * The content of a single general R
15578 * The sum of the content of a general register called the base
15579 register B plus the content of a displacement field D
15581 * The sum of the contents of two general registers called the index
15582 register X and the base register B plus the content of a
15585 * The sum of the current instruction address and a 32-bit signed
15586 immediate field multiplied by two.
15588 The length of a storage operand can be:
15590 * Implied by the instruction
15592 * Specified by a bitmask
15594 * Specified by a four-bit or eight-bit length field L
15596 * Specified by the content of a general register
15598 The notation for storage operand addresses formed from multiple
15599 fields is as follows:
15602 the address for operand number n is formed from the content of
15603 general register Bn called the base register and the displacement
15607 the address for operand number n is formed from the content of
15608 general register Xn called the index register, general register Bn
15609 called the base register and the displacement field Dn.
15612 the address for operand number n is formed from the content of
15613 general regiser Bn called the base register and the displacement
15614 field Dn. The length of the operand n is specified by the field
15617 The base registers Bn and the index registers Xn of a storage
15618 operand can be skipped. If Bn and Xn are skipped, a zero will be stored
15619 to the operand field. The notation changes as follows:
15621 full notation short notation
15622 ------------------------------------------
15629 File: as.info, Node: s390 Formats, Next: s390 Aliases, Prev: s390 Operands, Up: s390 Syntax
15631 9.35.3.4 Instruction Formats
15632 ............................
15634 The Principles of Operation manuals lists 26 instruction formats where
15635 some of the formats have multiple variants. For the `.insn' pseudo
15636 directive the assembler recognizes some of the formats. Typically, the
15637 most general variant of the instruction format is used by the `.insn'
15640 The following table lists the abbreviations used in the table of
15641 instruction formats:
15643 OpCode / OpCd Part of the op code.
15644 Bx Base register number for operand x.
15645 Dx Displacement for operand x.
15646 DLx Displacement lower 12 bits for operand x.
15647 DHx Displacement higher 8-bits for operand x.
15648 Rx Register number for operand x.
15649 Xx Index register number for operand x.
15650 Ix Signed immediate for operand x.
15651 Ux Unsigned immediate for operand x.
15653 An instruction is two, four, or six bytes in length and must be
15654 aligned on a 2 byte boundary. The first two bits of the instruction
15655 specify the length of the instruction, 00 indicates a two byte
15656 instruction, 01 and 10 indicates a four byte instruction, and 11
15657 indicates a six byte instruction.
15659 The following table lists the s390 instruction formats that are
15660 available with the `.insn' pseudo directive:
15669 `RI format: <insn> R1,I2'
15671 +--------+----+----+------------------+
15672 | OpCode | R1 |OpCd| I2 |
15673 +--------+----+----+------------------+
15676 `RIE format: <insn> R1,R3,I2'
15678 +--------+----+----+------------------+--------+--------+
15679 | OpCode | R1 | R3 | I2 |////////| OpCode |
15680 +--------+----+----+------------------+--------+--------+
15683 `RIL format: <insn> R1,I2'
15685 +--------+----+----+------------------------------------+
15686 | OpCode | R1 |OpCd| I2 |
15687 +--------+----+----+------------------------------------+
15690 `RILU format: <insn> R1,U2'
15692 +--------+----+----+------------------------------------+
15693 | OpCode | R1 |OpCd| U2 |
15694 +--------+----+----+------------------------------------+
15697 `RIS format: <insn> R1,I2,M3,D4(B4)'
15699 +--------+----+----+----+-------------+--------+--------+
15700 | OpCode | R1 | M3 | B4 | D4 | I2 | Opcode |
15701 +--------+----+----+----+-------------+--------+--------+
15702 0 8 12 16 20 32 36 47
15704 `RR format: <insn> R1,R2'
15706 +--------+----+----+
15707 | OpCode | R1 | R2 |
15708 +--------+----+----+
15711 `RRE format: <insn> R1,R2'
15713 +------------------+--------+----+----+
15714 | OpCode |////////| R1 | R2 |
15715 +------------------+--------+----+----+
15718 `RRF format: <insn> R1,R2,R3,M4'
15720 +------------------+----+----+----+----+
15721 | OpCode | R3 | M4 | R1 | R2 |
15722 +------------------+----+----+----+----+
15725 `RRS format: <insn> R1,R2,M3,D4(B4)'
15727 +--------+----+----+----+-------------+----+----+--------+
15728 | OpCode | R1 | R3 | B4 | D4 | M3 |////| OpCode |
15729 +--------+----+----+----+-------------+----+----+--------+
15730 0 8 12 16 20 32 36 40 47
15732 `RS format: <insn> R1,R3,D2(B2)'
15734 +--------+----+----+----+-------------+
15735 | OpCode | R1 | R3 | B2 | D2 |
15736 +--------+----+----+----+-------------+
15739 `RSE format: <insn> R1,R3,D2(B2)'
15741 +--------+----+----+----+-------------+--------+--------+
15742 | OpCode | R1 | R3 | B2 | D2 |////////| OpCode |
15743 +--------+----+----+----+-------------+--------+--------+
15744 0 8 12 16 20 32 40 47
15746 `RSI format: <insn> R1,R3,I2'
15748 +--------+----+----+------------------------------------+
15749 | OpCode | R1 | R3 | I2 |
15750 +--------+----+----+------------------------------------+
15753 `RSY format: <insn> R1,R3,D2(B2)'
15755 +--------+----+----+----+-------------+--------+--------+
15756 | OpCode | R1 | R3 | B2 | DL2 | DH2 | OpCode |
15757 +--------+----+----+----+-------------+--------+--------+
15758 0 8 12 16 20 32 40 47
15760 `RX format: <insn> R1,D2(X2,B2)'
15762 +--------+----+----+----+-------------+
15763 | OpCode | R1 | X2 | B2 | D2 |
15764 +--------+----+----+----+-------------+
15767 `RXE format: <insn> R1,D2(X2,B2)'
15769 +--------+----+----+----+-------------+--------+--------+
15770 | OpCode | R1 | X2 | B2 | D2 |////////| OpCode |
15771 +--------+----+----+----+-------------+--------+--------+
15772 0 8 12 16 20 32 40 47
15774 `RXF format: <insn> R1,R3,D2(X2,B2)'
15776 +--------+----+----+----+-------------+----+---+--------+
15777 | OpCode | R3 | X2 | B2 | D2 | R1 |///| OpCode |
15778 +--------+----+----+----+-------------+----+---+--------+
15779 0 8 12 16 20 32 36 40 47
15781 `RXY format: <insn> R1,D2(X2,B2)'
15783 +--------+----+----+----+-------------+--------+--------+
15784 | OpCode | R1 | X2 | B2 | DL2 | DH2 | OpCode |
15785 +--------+----+----+----+-------------+--------+--------+
15786 0 8 12 16 20 32 36 40 47
15788 `S format: <insn> D2(B2)'
15790 +------------------+----+-------------+
15791 | OpCode | B2 | D2 |
15792 +------------------+----+-------------+
15795 `SI format: <insn> D1(B1),I2'
15797 +--------+---------+----+-------------+
15798 | OpCode | I2 | B1 | D1 |
15799 +--------+---------+----+-------------+
15802 `SIY format: <insn> D1(B1),U2'
15804 +--------+---------+----+-------------+--------+--------+
15805 | OpCode | I2 | B1 | DL1 | DH1 | OpCode |
15806 +--------+---------+----+-------------+--------+--------+
15807 0 8 16 20 32 36 40 47
15809 `SIL format: <insn> D1(B1),I2'
15811 +------------------+----+-------------+-----------------+
15812 | OpCode | B1 | D1 | I2 |
15813 +------------------+----+-------------+-----------------+
15816 `SS format: <insn> D1(R1,B1),D2(B3),R3'
15818 +--------+----+----+----+-------------+----+------------+
15819 | OpCode | R1 | R3 | B1 | D1 | B2 | D2 |
15820 +--------+----+----+----+-------------+----+------------+
15821 0 8 12 16 20 32 36 47
15823 `SSE format: <insn> D1(B1),D2(B2)'
15825 +------------------+----+-------------+----+------------+
15826 | OpCode | B1 | D1 | B2 | D2 |
15827 +------------------+----+-------------+----+------------+
15828 0 8 12 16 20 32 36 47
15830 `SSF format: <insn> D1(B1),D2(B2),R3'
15832 +--------+----+----+----+-------------+----+------------+
15833 | OpCode | R3 |OpCd| B1 | D1 | B2 | D2 |
15834 +--------+----+----+----+-------------+----+------------+
15835 0 8 12 16 20 32 36 47
15838 For the complete list of all instruction format variants see the
15839 Principles of Operation manuals.
15842 File: as.info, Node: s390 Aliases, Next: s390 Operand Modifier, Prev: s390 Formats, Up: s390 Syntax
15844 9.35.3.5 Instruction Aliases
15845 ............................
15847 A specific bit pattern can have multiple mnemonics, for example the bit
15848 pattern `0xa7000000' has the mnemonics `tmh' and `tmlh'. In addition,
15849 there are a number of mnemonics recognized by `as' that are not present
15850 in the Principles of Operation. These are the short forms of the
15851 branch instructions, where the condition code mask operand is encoded
15852 in the mnemonic. This is relevant for the branch instructions, the
15853 compare and branch instructions, and the compare and trap instructions.
15855 For the branch instructions there are 20 condition code strings that
15856 can be used as part of the mnemonic in place of a mask operand in the
15857 instruction format:
15859 instruction short form
15860 ------------------------------------------
15862 bc M1,D2(X2,B2) b<m> D2(X2,B2)
15864 brcl M1,I2 jg<m> I2
15866 In the mnemonic for a branch instruction the condition code string
15867 <m> can be any of the following:
15869 o jump on overflow / if ones
15872 nle jump on not low or equal
15875 nhe jump on not high or equal
15876 lh jump on low or high
15877 ne jump on A not equal B
15878 nz jump on not zero / if not zeros
15879 e jump on A equal B
15880 z jump on zero / if zeroes
15881 nlh jump on not low or high
15882 he jump on high or equal
15883 nl jump on A not low
15884 nm jump on not minus / if not mixed
15885 le jump on low or equal
15886 nh jump on A not high
15887 np jump on not plus
15888 no jump on not overflow / if not ones
15890 For the compare and branch, and compare and trap instructions there
15891 are 12 condition code strings that can be used as part of the mnemonic
15892 in place of a mask operand in the instruction format:
15894 instruction short form
15895 --------------------------------------------------------
15896 crb R1,R2,M3,D4(B4) crb<m> R1,R2,D4(B4)
15897 cgrb R1,R2,M3,D4(B4) cgrb<m> R1,R2,D4(B4)
15898 crj R1,R2,M3,I4 crj<m> R1,R2,I4
15899 cgrj R1,R2,M3,I4 cgrj<m> R1,R2,I4
15900 cib R1,I2,M3,D4(B4) cib<m> R1,I2,D4(B4)
15901 cgib R1,I2,M3,D4(B4) cgib<m> R1,I2,D4(B4)
15902 cij R1,I2,M3,I4 cij<m> R1,I2,I4
15903 cgij R1,I2,M3,I4 cgij<m> R1,I2,I4
15904 crt R1,R2,M3 crt<m> R1,R2
15905 cgrt R1,R2,M3 cgrt<m> R1,R2
15906 cit R1,I2,M3 cit<m> R1,I2
15907 cgit R1,I2,M3 cgit<m> R1,I2
15908 clrb R1,R2,M3,D4(B4) clrb<m> R1,R2,D4(B4)
15909 clgrb R1,R2,M3,D4(B4) clgrb<m> R1,R2,D4(B4)
15910 clrj R1,R2,M3,I4 clrj<m> R1,R2,I4
15911 clgrj R1,R2,M3,I4 clgrj<m> R1,R2,I4
15912 clib R1,I2,M3,D4(B4) clib<m> R1,I2,D4(B4)
15913 clgib R1,I2,M3,D4(B4) clgib<m> R1,I2,D4(B4)
15914 clij R1,I2,M3,I4 clij<m> R1,I2,I4
15915 clgij R1,I2,M3,I4 clgij<m> R1,I2,I4
15916 clrt R1,R2,M3 clrt<m> R1,R2
15917 clgrt R1,R2,M3 clgrt<m> R1,R2
15918 clfit R1,I2,M3 clfit<m> R1,I2
15919 clgit R1,I2,M3 clgit<m> R1,I2
15921 In the mnemonic for a compare and branch and compare and trap
15922 instruction the condition code string <m> can be any of the following:
15925 nle jump on not low or equal
15927 nhe jump on not high or equal
15928 ne jump on A not equal B
15929 lh jump on low or high
15930 e jump on A equal B
15931 nlh jump on not low or high
15932 nl jump on A not low
15933 he jump on high or equal
15934 nh jump on A not high
15935 le jump on low or equal
15938 File: as.info, Node: s390 Operand Modifier, Next: s390 Instruction Marker, Prev: s390 Aliases, Up: s390 Syntax
15940 9.35.3.6 Instruction Operand Modifier
15941 .....................................
15943 If a symbol modifier is attached to a symbol in an expression for an
15944 instruction operand field, the symbol term is replaced with a reference
15945 to an object in the global offset table (GOT) or the procedure linkage
15946 table (PLT). The following expressions are allowed: `symbol@modifier +
15947 constant', `symbol@modifier + label + constant', and `symbol@modifier -
15948 label + constant'. The term `symbol' is the symbol that will be
15949 entered into the GOT or PLT, `label' is a local label, and `constant'
15950 is an arbitrary expression that the assembler can evaluate to a
15953 The term `(symbol + constant1)@modifier +/- label + constant2' is
15954 also accepted but a warning message is printed and the term is
15955 converted to `symbol@modifier +/- label + constant1 + constant2'.
15959 The @got modifier can be used for displacement fields, 16-bit
15960 immediate fields and 32-bit pc-relative immediate fields. The
15961 @got12 modifier is synonym to @got. The symbol is added to the
15962 GOT. For displacement fields and 16-bit immediate fields the
15963 symbol term is replaced with the offset from the start of the GOT
15964 to the GOT slot for the symbol. For a 32-bit pc-relative field
15965 the pc-relative offset to the GOT slot from the current
15966 instruction address is used.
15969 The @gotent modifier can be used for 32-bit pc-relative immediate
15970 fields. The symbol is added to the GOT and the symbol term is
15971 replaced with the pc-relative offset from the current instruction
15972 to the GOT slot for the symbol.
15975 The @gotoff modifier can be used for 16-bit immediate fields. The
15976 symbol term is replaced with the offset from the start of the GOT
15977 to the address of the symbol.
15980 The @gotplt modifier can be used for displacement fields, 16-bit
15981 immediate fields, and 32-bit pc-relative immediate fields. A
15982 procedure linkage table entry is generated for the symbol and a
15983 jump slot for the symbol is added to the GOT. For displacement
15984 fields and 16-bit immediate fields the symbol term is replaced
15985 with the offset from the start of the GOT to the jump slot for the
15986 symbol. For a 32-bit pc-relative field the pc-relative offset to
15987 the jump slot from the current instruction address is used.
15990 The @plt modifier can be used for 16-bit and 32-bit pc-relative
15991 immediate fields. A procedure linkage table entry is generated for
15992 the symbol. The symbol term is replaced with the relative offset
15993 from the current instruction to the PLT entry for the symbol.
15996 The @pltoff modifier can be used for 16-bit immediate fields. The
15997 symbol term is replaced with the offset from the start of the PLT
15998 to the address of the symbol.
16001 The @gotntpoff modifier can be used for displacement fields. The
16002 symbol is added to the static TLS block and the negated offset to
16003 the symbol in the static TLS block is added to the GOT. The symbol
16004 term is replaced with the offset to the GOT slot from the start of
16008 The @indntpoff modifier can be used for 32-bit pc-relative
16009 immediate fields. The symbol is added to the static TLS block and
16010 the negated offset to the symbol in the static TLS block is added
16011 to the GOT. The symbol term is replaced with the pc-relative
16012 offset to the GOT slot from the current instruction address.
16014 For more information about the thread local storage modifiers
16015 `gotntpoff' and `indntpoff' see the ELF extension documentation `ELF
16016 Handling For Thread-Local Storage'.
16019 File: as.info, Node: s390 Instruction Marker, Next: s390 Literal Pool Entries, Prev: s390 Operand Modifier, Up: s390 Syntax
16021 9.35.3.7 Instruction Marker
16022 ...........................
16024 The thread local storage instruction markers are used by the linker to
16025 perform code optimization.
16028 The :tls_load marker is used to flag the load instruction in the
16029 initial exec TLS model that retrieves the offset from the thread
16030 pointer to a thread local storage variable from the GOT.
16033 The :tls_gdcall marker is used to flag the branch-and-save
16034 instruction to the __tls_get_offset function in the global dynamic
16038 The :tls_ldcall marker is used to flag the branch-and-save
16039 instruction to the __tls_get_offset function in the local dynamic
16042 For more information about the thread local storage instruction
16043 marker and the linker optimizations see the ELF extension documentation
16044 `ELF Handling For Thread-Local Storage'.
16047 File: as.info, Node: s390 Literal Pool Entries, Prev: s390 Instruction Marker, Up: s390 Syntax
16049 9.35.3.8 Literal Pool Entries
16050 .............................
16052 A literal pool is a collection of values. To access the values a pointer
16053 to the literal pool is loaded to a register, the literal pool register.
16054 Usually, register %r13 is used as the literal pool register (*Note s390
16055 Register::). Literal pool entries are created by adding the suffix
16056 :lit1, :lit2, :lit4, or :lit8 to the end of an expression for an
16057 instruction operand. The expression is added to the literal pool and the
16058 operand is replaced with the offset to the literal in the literal pool.
16061 The literal pool entry is created as an 8-bit value. An operand
16062 modifier must not be used for the original expression.
16065 The literal pool entry is created as a 16 bit value. The operand
16066 modifier @got may be used in the original expression. The term
16067 `x@got:lit2' will put the got offset for the global symbol x to
16068 the literal pool as 16 bit value.
16071 The literal pool entry is created as a 32-bit value. The operand
16072 modifier @got and @plt may be used in the original expression. The
16073 term `x@got:lit4' will put the got offset for the global symbol x
16074 to the literal pool as a 32-bit value. The term `x@plt:lit4' will
16075 put the plt offset for the global symbol x to the literal pool as
16079 The literal pool entry is created as a 64-bit value. The operand
16080 modifier @got and @plt may be used in the original expression. The
16081 term `x@got:lit8' will put the got offset for the global symbol x
16082 to the literal pool as a 64-bit value. The term `x@plt:lit8' will
16083 put the plt offset for the global symbol x to the literal pool as
16086 The assembler directive `.ltorg' is used to emit all literal pool
16087 entries to the current position.
16090 File: as.info, Node: s390 Directives, Next: s390 Floating Point, Prev: s390 Syntax, Up: S/390-Dependent
16092 9.35.4 Assembler Directives
16093 ---------------------------
16095 `as' for s390 supports all of the standard ELF assembler directives as
16096 outlined in the main part of this document. Some directives have been
16097 extended and there are some additional directives, which are only
16098 available for the s390 `as'.
16101 This directive permits the numeric representation of an
16102 instructions and makes the assembler insert the operands according
16103 to one of the instructions formats for `.insn' (*Note s390
16104 Formats::). For example, the instruction `l %r1,24(%r15)' could
16105 be written as `.insn rx,0x58000000,%r1,24(%r15)'.
16110 This directive places one or more 16-bit (.short), 32-bit (.long),
16111 or 64-bit (.quad) values into the current section. If an ELF or
16112 TLS modifier is used only the following expressions are allowed:
16113 `symbol@modifier + constant', `symbol@modifier + label +
16114 constant', and `symbol@modifier - label + constant'. The
16115 following modifiers are available:
16118 The @got modifier can be used for .short, .long and .quad.
16119 The @got12 modifier is synonym to @got. The symbol is added
16120 to the GOT. The symbol term is replaced with offset from the
16121 start of the GOT to the GOT slot for the symbol.
16124 The @gotoff modifier can be used for .short, .long and .quad.
16125 The symbol term is replaced with the offset from the start of
16126 the GOT to the address of the symbol.
16129 The @gotplt modifier can be used for .long and .quad. A
16130 procedure linkage table entry is generated for the symbol and
16131 a jump slot for the symbol is added to the GOT. The symbol
16132 term is replaced with the offset from the start of the GOT to
16133 the jump slot for the symbol.
16136 The @plt modifier can be used for .long and .quad. A
16137 procedure linkage table entry us generated for the symbol.
16138 The symbol term is replaced with the address of the PLT entry
16142 The @pltoff modifier can be used for .short, .long and .quad.
16143 The symbol term is replaced with the offset from the start of
16144 the PLT to the address of the symbol.
16148 The @tlsgd and @tlsldm modifier can be used for .long and
16149 .quad. A tls_index structure for the symbol is added to the
16150 GOT. The symbol term is replaced with the offset from the
16151 start of the GOT to the tls_index structure.
16155 The @gotntpoff and @indntpoff modifier can be used for .long
16156 and .quad. The symbol is added to the static TLS block and
16157 the negated offset to the symbol in the static TLS block is
16158 added to the GOT. For @gotntpoff the symbol term is replaced
16159 with the offset from the start of the GOT to the GOT slot,
16160 for @indntpoff the symbol term is replaced with the address
16164 The @dtpoff modifier can be used for .long and .quad. The
16165 symbol term is replaced with the offset of the symbol
16166 relative to the start of the TLS block it is contained in.
16169 The @ntpoff modifier can be used for .long and .quad. The
16170 symbol term is replaced with the offset of the symbol
16171 relative to the TCB pointer.
16173 For more information about the thread local storage modifiers see
16174 the ELF extension documentation `ELF Handling For Thread-Local
16178 This directive causes the current contents of the literal pool to
16179 be dumped to the current location (*Note s390 Literal Pool
16183 This directive allows you to change the machine for which code is
16184 generated. `string' may be any of the `-march=' selection options
16185 (without the -march=), `push', or `pop'. `.machine push' saves
16186 the currently selected cpu, which may be restored with `.machine
16187 pop'. Be aware that the cpu string has to be put into double
16188 quotes in case it contains characters not appropriate for
16189 identifiers. So you have to write `"z9-109"' instead of just
16193 File: as.info, Node: s390 Floating Point, Prev: s390 Directives, Up: S/390-Dependent
16195 9.35.5 Floating Point
16196 ---------------------
16198 The assembler recognizes both the IEEE floating-point instruction and
16199 the hexadecimal floating-point instructions. The floating-point
16200 constructors `.float', `.single', and `.double' always emit the IEEE
16201 format. To assemble hexadecimal floating-point constants the `.long'
16202 and `.quad' directives must be used.
16205 File: as.info, Node: SCORE-Dependent, Next: Sparc-Dependent, Prev: S/390-Dependent, Up: Machine Dependencies
16207 9.36 SCORE Dependent Features
16208 =============================
16212 * SCORE-Opts:: Assembler options
16213 * SCORE-Pseudo:: SCORE Assembler Directives
16214 * SCORE-Syntax:: Syntax
16217 File: as.info, Node: SCORE-Opts, Next: SCORE-Pseudo, Up: SCORE-Dependent
16222 The following table lists all available SCORE options.
16225 This option sets the largest size of an object that can be
16226 referenced implicitly with the `gp' register. The default value is
16230 Assemble code for a big-endian cpu
16233 Assemble code for a little-endian cpu
16236 Assemble code for fix data dependency
16239 Assemble code for no warning message for fix data dependency
16242 Assemble code for target is SCORE5
16245 Assemble code for target is SCORE5U
16248 Assemble code for target is SCORE7, this is default setting
16251 Assemble code for target is SCORE3
16254 Assemble code for target is SCORE7, this is default setting
16257 Assemble code for target is SCORE3
16260 Assemble code for no warning message when using temp register r1
16263 Generate code for PIC. This option tells the assembler to generate
16264 score position-independent macro expansions. It also tells the
16265 assembler to mark the output file as PIC.
16268 Assembler will not perform any optimizations
16271 Sunplus release version
16275 File: as.info, Node: SCORE-Pseudo, Next: SCORE-Syntax, Prev: SCORE-Opts, Up: SCORE-Dependent
16277 9.36.2 SCORE Assembler Directives
16278 ---------------------------------
16280 A number of assembler directives are available for SCORE. The
16281 following table is far from complete.
16284 Let the assembler not to generate warnings if the source machine
16285 language instructions happen data dependency.
16288 Let the assembler to insert bubbles (32 bit nop instruction / 16
16289 bit nop! Instruction) if the source machine language instructions
16290 happen data dependency.
16293 Let the assembler to generate warnings if the source machine
16294 language instructions happen data dependency. (Default)
16297 Let the assembler not to generate warnings if the source program
16298 uses r1. allow user to use r1
16301 Let the assembler to generate warnings if the source program uses
16305 Tell the assembler to add subsequent data into the sdata section
16308 Tell the assembler to add subsequent data into the rdata section
16310 `.frame "frame-register", "offset", "return-pc-register"'
16311 Describe a stack frame. "frame-register" is the frame register,
16312 "offset" is the distance from the frame register to the virtual
16313 frame pointer, "return-pc-register" is the return program register.
16314 You must use ".ent" before ".frame" and only one ".frame" can be
16317 `.mask "bitmask", "frameoffset"'
16318 Indicate which of the integer registers are saved in the current
16319 function's stack frame, this is for the debugger to explain the
16323 Set the beginning of the procedure "proc_name". Use this directive
16324 when you want to generate information for the debugger.
16327 Set the end of a procedure. Use this directive to generate
16328 information for the debugger.
16331 Switch the destination of following statements into the bss
16332 section, which is used for data that is uninitialized anywhere.
16336 File: as.info, Node: SCORE-Syntax, Prev: SCORE-Pseudo, Up: SCORE-Dependent
16338 9.36.3 SCORE Syntax
16339 -------------------
16343 * SCORE-Chars:: Special Characters
16346 File: as.info, Node: SCORE-Chars, Up: SCORE-Syntax
16348 9.36.3.1 Special Characters
16349 ...........................
16351 The presence of a `#' appearing anywhere on a line indicates the start
16352 of a comment that extends to the end of that line.
16354 If a `#' appears as the first character of a line then the whole
16355 line is treated as a comment, but in this case the line can also be a
16356 logical line number directive (*note Comments::) or a preprocessor
16357 control command (*note Preprocessing::).
16359 The `;' character can be used to separate statements on the same
16363 File: as.info, Node: SH-Dependent, Next: SH64-Dependent, Prev: NS32K-Dependent, Up: Machine Dependencies
16365 9.37 Renesas / SuperH SH Dependent Features
16366 ===========================================
16370 * SH Options:: Options
16371 * SH Syntax:: Syntax
16372 * SH Floating Point:: Floating Point
16373 * SH Directives:: SH Machine Directives
16374 * SH Opcodes:: Opcodes
16377 File: as.info, Node: SH Options, Next: SH Syntax, Up: SH-Dependent
16382 `as' has following command-line options for the Renesas (formerly
16383 Hitachi) / SuperH SH family.
16386 Generate little endian code.
16389 Generate big endian code.
16392 Alter jump instructions for long displacements.
16395 Align sections to 4 byte boundaries, not 16.
16398 Enable sh-dsp insns, and disable sh3e / sh4 insns.
16401 Disable optimization with section symbol for compatibility with
16404 `--allow-reg-prefix'
16405 Allow '$' as a register name prefix.
16408 Generate an FDPIC object file.
16411 Specify the sh4 or sh4a instruction set.
16414 Enable sh-dsp insns, and disable sh3e / sh4 insns.
16417 Enable sh2e, sh3e, sh4, and sh4a insn sets.
16420 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
16423 Support H'00 style hex constants in addition to 0x00 style.
16427 File: as.info, Node: SH Syntax, Next: SH Floating Point, Prev: SH Options, Up: SH-Dependent
16434 * SH-Chars:: Special Characters
16435 * SH-Regs:: Register Names
16436 * SH-Addressing:: Addressing Modes
16439 File: as.info, Node: SH-Chars, Next: SH-Regs, Up: SH Syntax
16441 9.37.2.1 Special Characters
16442 ...........................
16444 `!' is the line comment character.
16446 You can use `;' instead of a newline to separate statements.
16448 If a `#' appears as the first character of a line then the whole
16449 line is treated as a comment, but in this case the line could also be a
16450 logical line number directive (*note Comments::) or a preprocessor
16451 control command (*note Preprocessing::).
16453 Since `$' has no special meaning, you may use it in symbol names.
16456 File: as.info, Node: SH-Regs, Next: SH-Addressing, Prev: SH-Chars, Up: SH Syntax
16458 9.37.2.2 Register Names
16459 .......................
16461 You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5',
16462 `r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to
16463 refer to the SH registers.
16465 The SH also has these control registers:
16468 procedure register (holds return address)
16475 high and low multiply accumulator registers
16481 global base register
16484 vector base register (for interrupt vectors)
16487 File: as.info, Node: SH-Addressing, Prev: SH-Regs, Up: SH Syntax
16489 9.37.2.3 Addressing Modes
16490 .........................
16492 `as' understands the following addressing modes for the SH. `RN' in
16493 the following refers to any of the numbered registers, but _not_ the
16503 Register indirect with pre-decrement
16506 Register indirect with post-increment
16509 Register indirect with displacement
16522 PC relative address (for branch or for addressing memory). The
16523 `as' implementation allows you to use the simpler form ADDR
16524 anywhere a PC relative address is called for; the alternate form
16525 is supported for compatibility with other assemblers.
16531 File: as.info, Node: SH Floating Point, Next: SH Directives, Prev: SH Syntax, Up: SH-Dependent
16533 9.37.3 Floating Point
16534 ---------------------
16536 SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
16537 SH groups can use `.float' directive to generate IEEE floating-point
16540 SH2E and SH3E support single-precision floating point calculations as
16541 well as entirely PCAPI compatible emulation of double-precision
16542 floating point calculations. SH2E and SH3E instructions are a subset of
16543 the floating point calculations conforming to the IEEE754 standard.
16545 In addition to single-precision and double-precision floating-point
16546 operation capability, the on-chip FPU of SH4 has a 128-bit graphic
16547 engine that enables 32-bit floating-point data to be processed 128 bits
16548 at a time. It also supports 4 * 4 array operations and inner product
16549 operations. Also, a superscalar architecture is employed that enables
16550 simultaneous execution of two instructions (including FPU
16551 instructions), providing performance of up to twice that of
16552 conventional architectures at the same frequency.
16555 File: as.info, Node: SH Directives, Next: SH Opcodes, Prev: SH Floating Point, Up: SH-Dependent
16557 9.37.4 SH Machine Directives
16558 ----------------------------
16563 `as' will issue a warning when a misaligned `.word', `.long', or
16564 `.quad' directive is used. You may use `.uaword', `.ualong', or
16565 `.uaquad' to indicate that the value is intentionally misaligned.
16568 File: as.info, Node: SH Opcodes, Prev: SH Directives, Up: SH-Dependent
16573 For detailed information on the SH machine instruction set, see
16574 `SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core
16575 Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH).
16577 `as' implements all the standard SH opcodes. No additional
16578 pseudo-instructions are needed on this family. Note, however, that
16579 because `as' supports a simpler form of PC-relative addressing, you may
16580 simply write (for example)
16584 where other assemblers might require an explicit displacement to `bar'
16585 from the program counter:
16589 Here is a summary of SH opcodes:
16592 Rn a numbered register
16593 Rm another numbered register
16594 #imm immediate data
16596 disp8 8-bit displacement
16597 disp12 12-bit displacement
16599 add #imm,Rn lds.l @Rn+,PR
16600 add Rm,Rn mac.w @Rm+,@Rn+
16601 addc Rm,Rn mov #imm,Rn
16602 addv Rm,Rn mov Rm,Rn
16603 and #imm,R0 mov.b Rm,@(R0,Rn)
16604 and Rm,Rn mov.b Rm,@-Rn
16605 and.b #imm,@(R0,GBR) mov.b Rm,@Rn
16606 bf disp8 mov.b @(disp,Rm),R0
16607 bra disp12 mov.b @(disp,GBR),R0
16608 bsr disp12 mov.b @(R0,Rm),Rn
16609 bt disp8 mov.b @Rm+,Rn
16610 clrmac mov.b @Rm,Rn
16611 clrt mov.b R0,@(disp,Rm)
16612 cmp/eq #imm,R0 mov.b R0,@(disp,GBR)
16613 cmp/eq Rm,Rn mov.l Rm,@(disp,Rn)
16614 cmp/ge Rm,Rn mov.l Rm,@(R0,Rn)
16615 cmp/gt Rm,Rn mov.l Rm,@-Rn
16616 cmp/hi Rm,Rn mov.l Rm,@Rn
16617 cmp/hs Rm,Rn mov.l @(disp,Rn),Rm
16618 cmp/pl Rn mov.l @(disp,GBR),R0
16619 cmp/pz Rn mov.l @(disp,PC),Rn
16620 cmp/str Rm,Rn mov.l @(R0,Rm),Rn
16621 div0s Rm,Rn mov.l @Rm+,Rn
16623 div1 Rm,Rn mov.l R0,@(disp,GBR)
16624 exts.b Rm,Rn mov.w Rm,@(R0,Rn)
16625 exts.w Rm,Rn mov.w Rm,@-Rn
16626 extu.b Rm,Rn mov.w Rm,@Rn
16627 extu.w Rm,Rn mov.w @(disp,Rm),R0
16628 jmp @Rn mov.w @(disp,GBR),R0
16629 jsr @Rn mov.w @(disp,PC),Rn
16630 ldc Rn,GBR mov.w @(R0,Rm),Rn
16631 ldc Rn,SR mov.w @Rm+,Rn
16632 ldc Rn,VBR mov.w @Rm,Rn
16633 ldc.l @Rn+,GBR mov.w R0,@(disp,Rm)
16634 ldc.l @Rn+,SR mov.w R0,@(disp,GBR)
16635 ldc.l @Rn+,VBR mova @(disp,PC),R0
16636 lds Rn,MACH movt Rn
16637 lds Rn,MACL muls Rm,Rn
16638 lds Rn,PR mulu Rm,Rn
16639 lds.l @Rn+,MACH neg Rm,Rn
16640 lds.l @Rn+,MACL negc Rm,Rn
16643 not Rm,Rn stc.l GBR,@-Rn
16644 or #imm,R0 stc.l SR,@-Rn
16645 or Rm,Rn stc.l VBR,@-Rn
16646 or.b #imm,@(R0,GBR) sts MACH,Rn
16647 rotcl Rn sts MACL,Rn
16649 rotl Rn sts.l MACH,@-Rn
16650 rotr Rn sts.l MACL,@-Rn
16655 shar Rn swap.b Rm,Rn
16656 shll Rn swap.w Rm,Rn
16657 shll16 Rn tas.b @Rn
16658 shll2 Rn trapa #imm
16659 shll8 Rn tst #imm,R0
16661 shlr16 Rn tst.b #imm,@(R0,GBR)
16662 shlr2 Rn xor #imm,R0
16664 sleep xor.b #imm,@(R0,GBR)
16665 stc GBR,Rn xtrct Rm,Rn
16669 File: as.info, Node: SH64-Dependent, Next: PDP-11-Dependent, Prev: SH-Dependent, Up: Machine Dependencies
16671 9.38 SuperH SH64 Dependent Features
16672 ===================================
16676 * SH64 Options:: Options
16677 * SH64 Syntax:: Syntax
16678 * SH64 Directives:: SH64 Machine Directives
16679 * SH64 Opcodes:: Opcodes
16682 File: as.info, Node: SH64 Options, Next: SH64 Syntax, Up: SH64-Dependent
16688 Specify the sh4 or sh4a instruction set.
16691 Enable sh-dsp insns, and disable sh3e / sh4 insns.
16694 Enable sh2e, sh3e, sh4, and sh4a insn sets.
16697 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
16699 `-isa=shmedia | -isa=shcompact'
16700 Specify the default instruction set. `SHmedia' specifies the
16701 32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes
16702 compatible with previous SH families. The default depends on the
16703 ABI selected; the default for the 64-bit ABI is SHmedia, and the
16704 default for the 32-bit ABI is SHcompact. If neither the ABI nor
16705 the ISA is specified, the default is 32-bit SHcompact.
16707 Note that the `.mode' pseudo-op is not permitted if the ISA is not
16708 specified on the command line.
16710 `-abi=32 | -abi=64'
16711 Specify the default ABI. If the ISA is specified and the ABI is
16712 not, the default ABI depends on the ISA, with SHmedia defaulting
16713 to 64-bit and SHcompact defaulting to 32-bit.
16715 Note that the `.abi' pseudo-op is not permitted if the ABI is not
16716 specified on the command line. When the ABI is specified on the
16717 command line, any `.abi' pseudo-ops in the source must match it.
16719 `-shcompact-const-crange'
16720 Emit code-range descriptors for constants in SHcompact code
16724 Disallow SHmedia code in the same section as constants and
16728 Do not expand MOVI, PT, PTA or PTB instructions.
16731 With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
16734 Support H'00 style hex constants in addition to 0x00 style.
16738 File: as.info, Node: SH64 Syntax, Next: SH64 Directives, Prev: SH64 Options, Up: SH64-Dependent
16745 * SH64-Chars:: Special Characters
16746 * SH64-Regs:: Register Names
16747 * SH64-Addressing:: Addressing Modes
16750 File: as.info, Node: SH64-Chars, Next: SH64-Regs, Up: SH64 Syntax
16752 9.38.2.1 Special Characters
16753 ...........................
16755 `!' is the line comment character.
16757 If a `#' appears as the first character of a line then the whole
16758 line is treated as a comment, but in this case the line could also be a
16759 logical line number directive (*note Comments::) or a preprocessor
16760 control command (*note Preprocessing::).
16762 You can use `;' instead of a newline to separate statements.
16764 Since `$' has no special meaning, you may use it in symbol names.
16767 File: as.info, Node: SH64-Regs, Next: SH64-Addressing, Prev: SH64-Chars, Up: SH64 Syntax
16769 9.38.2.2 Register Names
16770 .......................
16772 You can use the predefined symbols `r0' through `r63' to refer to the
16773 SH64 general registers, `cr0' through `cr63' for control registers,
16774 `tr0' through `tr7' for target address registers, `fr0' through `fr63'
16775 for single-precision floating point registers, `dr0' through `dr62'
16776 (even numbered registers only) for double-precision floating point
16777 registers, `fv0' through `fv60' (multiples of four only) for
16778 single-precision floating point vectors, `fp0' through `fp62' (even
16779 numbered registers only) for single-precision floating point pairs,
16780 `mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of
16781 single-precision floating point registers, `pc' for the program
16782 counter, and `fpscr' for the floating point status and control register.
16784 You can also refer to the control registers by the mnemonics `sr',
16785 `ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc',
16786 `resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'.
16789 File: as.info, Node: SH64-Addressing, Prev: SH64-Regs, Up: SH64 Syntax
16791 9.38.2.3 Addressing Modes
16792 .........................
16794 SH64 operands consist of either a register or immediate value. The
16795 immediate value can be a constant or label reference (or portion of a
16796 label reference), as in this example:
16800 movi (function >> 16) & 65535,r0
16801 shori function & 65535, r0
16804 Instruction label references can reference labels in either SHmedia
16805 or SHcompact. To differentiate between the two, labels in SHmedia
16806 sections will always have the least significant bit set (i.e. they will
16807 be odd), which SHcompact labels will have the least significant bit
16808 reset (i.e. they will be even). If you need to reference the actual
16809 address of a label, you can use the `datalabel' modifier, as in this
16813 .long datalabel function
16815 In that example, the first longword may or may not have the least
16816 significant bit set depending on whether the label is an SHmedia label
16817 or an SHcompact label. The second longword will be the actual address
16818 of the label, regardless of what type of label it is.
16821 File: as.info, Node: SH64 Directives, Next: SH64 Opcodes, Prev: SH64 Syntax, Up: SH64-Dependent
16823 9.38.3 SH64 Machine Directives
16824 ------------------------------
16826 In addition to the SH directives, the SH64 provides the following
16829 `.mode [shmedia|shcompact]'
16830 `.isa [shmedia|shcompact]'
16831 Specify the ISA for the following instructions (the two directives
16832 are equivalent). Note that programs such as `objdump' rely on
16833 symbolic labels to determine when such mode switches occur (by
16834 checking the least significant bit of the label's address), so
16835 such mode/isa changes should always be followed by a label (in
16836 practice, this is true anyway). Note that you cannot use these
16837 directives if you didn't specify an ISA on the command line.
16840 Specify the ABI for the following instructions. Note that you
16841 cannot use this directive unless you specified an ABI on the
16842 command line, and the ABIs specified must match.
16846 File: as.info, Node: SH64 Opcodes, Prev: SH64 Directives, Up: SH64-Dependent
16851 For detailed information on the SH64 machine instruction set, see
16852 `SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.).
16854 `as' implements all the standard SH64 opcodes. In addition, the
16855 following pseudo-opcodes may be expanded into one or more alternate
16859 If the value doesn't fit into a standard `movi' opcode, `as' will
16860 replace the `movi' with a sequence of `movi' and `shori' opcodes.
16863 This expands to a sequence of `movi' and `shori' opcode, followed
16864 by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on
16865 the label referenced.
16869 File: as.info, Node: Sparc-Dependent, Next: TIC54X-Dependent, Prev: SCORE-Dependent, Up: Machine Dependencies
16871 9.39 SPARC Dependent Features
16872 =============================
16876 * Sparc-Opts:: Options
16877 * Sparc-Aligned-Data:: Option to enforce aligned data
16878 * Sparc-Syntax:: Syntax
16879 * Sparc-Float:: Floating Point
16880 * Sparc-Directives:: Sparc Machine Directives
16883 File: as.info, Node: Sparc-Opts, Next: Sparc-Aligned-Data, Up: Sparc-Dependent
16888 The SPARC chip family includes several successive versions, using the
16889 same core instruction set, but including a few additional instructions
16890 at each version. There are exceptions to this however. For details on
16891 what instructions each variant supports, please see the chip's
16892 architecture reference manual.
16894 By default, `as' assumes the core instruction set (SPARC v6), but
16895 "bumps" the architecture level as needed: it switches to successively
16896 higher architectures as it encounters instructions that only exist in
16899 If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump
16900 past sparclite by default, an option must be passed to enable the v9
16903 GAS treats sparclite as being compatible with v8, unless an
16904 architecture is explicitly requested. SPARC v9 is always incompatible
16907 `-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
16908 `-Av8plus | -Av8plusa | -Av8plusb | -Av8plusc | -Av8plusd | -Av8plusv'
16909 `-Av9 | -Av9a | -Av9b | -Av9c | -Av9d | -Av9v'
16910 `-Asparc | -Asparcvis | -Asparcvis2 | -Asparcfmaf | -Asparcima'
16911 `-Asparcvis3 | -Asparcvis3r'
16912 Use one of the `-A' options to select one of the SPARC
16913 architectures explicitly. If you select an architecture
16914 explicitly, `as' reports a fatal error if it encounters an
16915 instruction or feature requiring an incompatible or higher level.
16917 `-Av8plus', `-Av8plusa', `-Av8plusb', `-Av8plusc', `-Av8plusd',
16918 and `-Av8plusv' select a 32 bit environment.
16920 `-Av9', `-Av9a', `-Av9b', `-Av9c', `-Av9d', and `-Av9v' select a
16921 64 bit environment and are not available unless GAS is explicitly
16922 configured with 64 bit environment support.
16924 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
16925 UltraSPARC VIS 1.0 extensions.
16927 `-Av8plusb' and `-Av9b' enable the UltraSPARC VIS 2.0 instructions,
16928 as well as the instructions enabled by `-Av8plusa' and `-Av9a'.
16930 `-Av8plusc' and `-Av9c' enable the UltraSPARC Niagara instructions,
16931 as well as the instructions enabled by `-Av8plusb' and `-Av9b'.
16933 `-Av8plusd' and `-Av9d' enable the floating point fused
16934 multiply-add, VIS 3.0, and HPC extension instructions, as well as
16935 the instructions enabled by `-Av8plusc' and `-Av9c'.
16937 `-Av8plusv' and `-Av9v' enable the 'random', transactional memory,
16938 floating point unfused multiply-add, integer multiply-add, and
16939 cache sparing store instructions, as well as the instructions
16940 enabled by `-Av8plusd' and `-Av9d'.
16942 `-Asparc' specifies a v9 environment. It is equivalent to `-Av9'
16943 if the word size is 64-bit, and `-Av8plus' otherwise.
16945 `-Asparcvis' specifies a v9a environment. It is equivalent to
16946 `-Av9a' if the word size is 64-bit, and `-Av8plusa' otherwise.
16948 `-Asparcvis2' specifies a v9b environment. It is equivalent to
16949 `-Av9b' if the word size is 64-bit, and `-Av8plusb' otherwise.
16951 `-Asparcfmaf' specifies a v9b environment with the floating point
16952 fused multiply-add instructions enabled.
16954 `-Asparcima' specifies a v9b environment with the integer
16955 multiply-add instructions enabled.
16957 `-Asparcvis3' specifies a v9b environment with the VIS 3.0, HPC ,
16958 and floating point fused multiply-add instructions enabled.
16960 `-Asparcvis3r' specifies a v9b environment with the VIS 3.0, HPC,
16961 transactional memory, random, and floating point unfused
16962 multiply-add instructions enabled.
16964 `-xarch=v8plus | -xarch=v8plusa | -xarch=v8plusb | -xarch=v8plusc'
16965 `-xarch=v8plusd | -xarch=v8plusv | -xarch=v9 | -xarch=v9a'
16966 `-xarch=v9b | -xarch=v9c | -xarch=v9d | -xarch=v9v'
16967 `-xarch=sparc | -xarch=sparcvis | -xarch=sparcvis2'
16968 `-xarch=sparcfmaf | -xarch=sparcima | -xarch=sparcvis3'
16969 `-xarch=sparcvis3r'
16970 For compatibility with the SunOS v9 assembler. These options are
16971 equivalent to -Av8plus, -Av8plusa, -Av8plusb, -Av8plusc, -Av8plusd,
16972 -Av8plusv, -Av9, -Av9a, -Av9b, -Av9c, -Av9d, -Av9v, -Asparc,
16973 -Asparcvis, -Asparcvis2, -Asparcfmaf, -Asparcima, -Asparcvis3, and
16974 -Asparcvis3r, respectively.
16977 Warn whenever it is necessary to switch to another level. If an
16978 architecture level is explicitly requested, GAS will not issue
16979 warnings until that level is reached, and will then bump the level
16980 as required (except between incompatible levels).
16983 Select the word size, either 32 bits or 64 bits. These options
16984 are only available with the ELF object file format, and require
16985 that the necessary BFD support has been included.
16988 File: as.info, Node: Sparc-Aligned-Data, Next: Sparc-Syntax, Prev: Sparc-Opts, Up: Sparc-Dependent
16990 9.39.2 Enforcing aligned data
16991 -----------------------------
16993 SPARC GAS normally permits data to be misaligned. For example, it
16994 permits the `.long' pseudo-op to be used on a byte boundary. However,
16995 the native SunOS assemblers issue an error when they see misaligned
16998 You can use the `--enforce-aligned-data' option to make SPARC GAS
16999 also issue an error about misaligned data, just as the SunOS assemblers
17002 The `--enforce-aligned-data' option is not the default because gcc
17003 issues misaligned data pseudo-ops when it initializes certain packed
17004 data structures (structures defined using the `packed' attribute). You
17005 may have to assemble with GAS in order to initialize packed data
17006 structures in your own code.
17009 File: as.info, Node: Sparc-Syntax, Next: Sparc-Float, Prev: Sparc-Aligned-Data, Up: Sparc-Dependent
17011 9.39.3 Sparc Syntax
17012 -------------------
17014 The assembler syntax closely follows The Sparc Architecture Manual,
17015 versions 8 and 9, as well as most extensions defined by Sun for their
17016 UltraSPARC and Niagara line of processors.
17020 * Sparc-Chars:: Special Characters
17021 * Sparc-Regs:: Register Names
17022 * Sparc-Constants:: Constant Names
17023 * Sparc-Relocs:: Relocations
17024 * Sparc-Size-Translations:: Size Translations
17027 File: as.info, Node: Sparc-Chars, Next: Sparc-Regs, Up: Sparc-Syntax
17029 9.39.3.1 Special Characters
17030 ...........................
17032 A `!' character appearing anywhere on a line indicates the start of a
17033 comment that extends to the end of that line.
17035 If a `#' appears as the first character of a line then the whole
17036 line is treated as a comment, but in this case the line could also be a
17037 logical line number directive (*note Comments::) or a preprocessor
17038 control command (*note Preprocessing::).
17040 `;' can be used instead of a newline to separate statements.
17043 File: as.info, Node: Sparc-Regs, Next: Sparc-Constants, Prev: Sparc-Chars, Up: Sparc-Syntax
17045 9.39.3.2 Register Names
17046 .......................
17048 The Sparc integer register file is broken down into global, outgoing,
17049 local, and incoming.
17051 * The 8 global registers are referred to as `%gN'.
17053 * The 8 outgoing registers are referred to as `%oN'.
17055 * The 8 local registers are referred to as `%lN'.
17057 * The 8 incoming registers are referred to as `%iN'.
17059 * The frame pointer register `%i6' can be referenced using the alias
17062 * The stack pointer register `%o6' can be referenced using the alias
17065 Floating point registers are simply referred to as `%fN'. When
17066 assembling for pre-V9, only 32 floating point registers are available.
17067 For V9 and later there are 64, but there are restrictions when
17068 referencing the upper 32 registers. They can only be accessed as
17069 double or quad, and thus only even or quad numbered accesses are
17070 allowed. For example, `%f34' is a legal floating point register, but
17073 Certain V9 instructions allow access to ancillary state registers.
17074 Most simply they can be referred to as `%asrN' where N can be from 16
17075 to 31. However, there are some aliases defined to reference ASR
17076 registers defined for various UltraSPARC processors:
17078 * The tick compare register is referred to as `%tick_cmpr'.
17080 * The system tick register is referred to as `%stick'. An alias,
17081 `%sys_tick', exists but is deprecated and should not be used by
17084 * The system tick compare register is referred to as `%stick_cmpr'.
17085 An alias, `%sys_tick_cmpr', exists but is deprecated and should
17086 not be used by new software.
17088 * The software interrupt register is referred to as `%softint'.
17090 * The set software interrupt register is referred to as
17091 `%set_softint'. The mnemonic `%softint_set' is provided as an
17094 * The clear software interrupt register is referred to as
17095 `%clear_softint'. The mnemonic `%softint_clear' is provided as an
17098 * The performance instrumentation counters register is referred to as
17101 * The performance control register is referred to as `%pcr'.
17103 * The graphics status register is referred to as `%gsr'.
17105 * The V9 dispatch control register is referred to as `%dcr'.
17107 Various V9 branch and conditional move instructions allow
17108 specification of which set of integer condition codes to test. These
17109 are referred to as `%xcc' and `%icc'.
17111 In V9, there are 4 sets of floating point condition codes which are
17112 referred to as `%fccN'.
17114 Several special privileged and non-privileged registers exist:
17116 * The V9 address space identifier register is referred to as `%asi'.
17118 * The V9 restorable windows register is referred to as `%canrestore'.
17120 * The V9 savable windows register is referred to as `%cansave'.
17122 * The V9 clean windows register is referred to as `%cleanwin'.
17124 * The V9 current window pointer register is referred to as `%cwp'.
17126 * The floating-point queue register is referred to as `%fq'.
17128 * The V8 co-processor queue register is referred to as `%cq'.
17130 * The floating point status register is referred to as `%fsr'.
17132 * The other windows register is referred to as `%otherwin'.
17134 * The V9 program counter register is referred to as `%pc'.
17136 * The V9 next program counter register is referred to as `%npc'.
17138 * The V9 processor interrupt level register is referred to as `%pil'.
17140 * The V9 processor state register is referred to as `%pstate'.
17142 * The trap base address register is referred to as `%tba'.
17144 * The V9 tick register is referred to as `%tick'.
17146 * The V9 trap level is referred to as `%tl'.
17148 * The V9 trap program counter is referred to as `%tpc'.
17150 * The V9 trap next program counter is referred to as `%tnpc'.
17152 * The V9 trap state is referred to as `%tstate'.
17154 * The V9 trap type is referred to as `%tt'.
17156 * The V9 condition codes is referred to as `%ccr'.
17158 * The V9 floating-point registers state is referred to as `%fprs'.
17160 * The V9 version register is referred to as `%ver'.
17162 * The V9 window state register is referred to as `%wstate'.
17164 * The Y register is referred to as `%y'.
17166 * The V8 window invalid mask register is referred to as `%wim'.
17168 * The V8 processor state register is referred to as `%psr'.
17170 * The V9 global register level register is referred to as `%gl'.
17172 Several special register names exist for hypervisor mode code:
17174 * The hyperprivileged processor state register is referred to as
17177 * The hyperprivileged trap state register is referred to as
17180 * The hyperprivileged interrupt pending register is referred to as
17183 * The hyperprivileged trap base address register is referred to as
17186 * The hyperprivileged implementation version register is referred to
17189 * The hyperprivileged system tick compare register is referred to as
17190 `%hstick_cmpr'. Note that there is no `%hstick' register, the
17191 normal `%stick' is used.
17194 File: as.info, Node: Sparc-Constants, Next: Sparc-Relocs, Prev: Sparc-Regs, Up: Sparc-Syntax
17199 Several Sparc instructions take an immediate operand field for which
17200 mnemonic names exist. Two such examples are `membar' and `prefetch'.
17201 Another example are the set of V9 memory access instruction that allow
17202 specification of an address space identifier.
17204 The `membar' instruction specifies a memory barrier that is the
17205 defined by the operand which is a bitmask. The supported mask
17208 * `#Sync' requests that all operations (including nonmemory
17209 reference operations) appearing prior to the `membar' must have
17210 been performed and the effects of any exceptions become visible
17211 before any instructions after the `membar' may be initiated. This
17212 corresponds to `membar' cmask field bit 2.
17214 * `#MemIssue' requests that all memory reference operations
17215 appearing prior to the `membar' must have been performed before
17216 any memory operation after the `membar' may be initiated. This
17217 corresponds to `membar' cmask field bit 1.
17219 * `#Lookaside' requests that a store appearing prior to the `membar'
17220 must complete before any load following the `membar' referencing
17221 the same address can be initiated. This corresponds to `membar'
17224 * `#StoreStore' defines that the effects of all stores appearing
17225 prior to the `membar' instruction must be visible to all
17226 processors before the effect of any stores following the `membar'.
17227 Equivalent to the deprecated `stbar' instruction. This
17228 corresponds to `membar' mmask field bit 3.
17230 * `#LoadStore' defines all loads appearing prior to the `membar'
17231 instruction must have been performed before the effect of any
17232 stores following the `membar' is visible to any other processor.
17233 This corresponds to `membar' mmask field bit 2.
17235 * `#StoreLoad' defines that the effects of all stores appearing
17236 prior to the `membar' instruction must be visible to all
17237 processors before loads following the `membar' may be performed.
17238 This corresponds to `membar' mmask field bit 1.
17240 * `#LoadLoad' defines that all loads appearing prior to the `membar'
17241 instruction must have been performed before any loads following
17242 the `membar' may be performed. This corresponds to `membar' mmask
17246 These values can be ored together, for example:
17249 membar #StoreLoad | #LoadLoad
17250 membar #StoreLoad | #StoreStore
17252 The `prefetch' and `prefetcha' instructions take a prefetch function
17253 code. The following prefetch function code constant mnemonics are
17256 * `#n_reads' requests a prefetch for several reads, and corresponds
17257 to a prefetch function code of 0.
17259 `#one_read' requests a prefetch for one read, and corresponds to a
17260 prefetch function code of 1.
17262 `#n_writes' requests a prefetch for several writes (and possibly
17263 reads), and corresponds to a prefetch function code of 2.
17265 `#one_write' requests a prefetch for one write, and corresponds to
17266 a prefetch function code of 3.
17268 `#page' requests a prefetch page, and corresponds to a prefetch
17269 function code of 4.
17271 `#invalidate' requests a prefetch invalidate, and corresponds to a
17272 prefetch function code of 16.
17274 `#unified' requests a prefetch to the nearest unified cache, and
17275 corresponds to a prefetch function code of 17.
17277 `#n_reads_strong' requests a strong prefetch for several reads,
17278 and corresponds to a prefetch function code of 20.
17280 `#one_read_strong' requests a strong prefetch for one read, and
17281 corresponds to a prefetch function code of 21.
17283 `#n_writes_strong' requests a strong prefetch for several writes,
17284 and corresponds to a prefetch function code of 22.
17286 `#one_write_strong' requests a strong prefetch for one write, and
17287 corresponds to a prefetch function code of 23.
17289 Onle one prefetch code may be specified. Here are some examples:
17291 prefetch [%l0 + %l2], #one_read
17292 prefetch [%g2 + 8], #n_writes
17293 prefetcha [%g1] 0x8, #unified
17294 prefetcha [%o0 + 0x10] %asi, #n_reads
17296 The actual behavior of a given prefetch function code is processor
17297 specific. If a processor does not implement a given prefetch
17298 function code, it will treat the prefetch instruction as a nop.
17300 For instructions that accept an immediate address space identifier,
17301 `as' provides many mnemonics corresponding to V9 defined as well
17302 as UltraSPARC and Niagara extended values. For example, `#ASI_P'
17303 and `#ASI_BLK_INIT_QUAD_LDD_AIUS'. See the V9 and processor
17304 specific manuals for details.
17308 File: as.info, Node: Sparc-Relocs, Next: Sparc-Size-Translations, Prev: Sparc-Constants, Up: Sparc-Syntax
17310 9.39.3.4 Relocations
17311 ....................
17313 ELF relocations are available as defined in the 32-bit and 64-bit Sparc
17314 ELF specifications.
17316 `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is
17317 obtained using `%lo'. Likewise `R_SPARC_HIX22' is obtained from `%hix'
17318 and `R_SPARC_LOX10' is obtained using `%lox'. For example:
17320 sethi %hi(symbol), %g1
17321 or %g1, %lo(symbol), %g1
17323 sethi %hix(symbol), %g1
17324 xor %g1, %lox(symbol), %g1
17326 These "high" mnemonics extract bits 31:10 of their operand, and the
17327 "low" mnemonics extract bits 9:0 of their operand.
17329 V9 code model relocations can be requested as follows:
17331 * `R_SPARC_HH22' is requested using `%hh'. It can also be generated
17334 * `R_SPARC_HM10' is requested using `%hm'. It can also be generated
17337 * `R_SPARC_LM22' is requested using `%lm'.
17339 * `R_SPARC_H44' is requested using `%h44'.
17341 * `R_SPARC_M44' is requested using `%m44'.
17343 * `R_SPARC_L44' is requested using `%l44' or `%l34'.
17345 * `R_SPARC_H34' is requested using `%h34'.
17347 The `%l34' generates a `R_SPARC_L44' relocation because it
17348 calculates the necessary value, and therefore no explicit `R_SPARC_L34'
17349 relocation needed to be created for this purpose.
17351 The `%h34' and `%l34' relocations are used for the abs34 code model.
17352 Here is an example abs34 address generation sequence:
17354 sethi %h34(symbol), %g1
17356 or %g1, %l34(symbol), %g1
17358 The PC relative relocation `R_SPARC_PC22' can be obtained by
17359 enclosing an operand inside of `%pc22'. Likewise, the `R_SPARC_PC10'
17360 relocation can be obtained using `%pc10'. These are mostly used when
17361 assembling PIC code. For example, the standard PIC sequence on Sparc
17362 to get the base of the global offset table, PC relative, into a
17363 register, can be performed as:
17365 sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7
17366 add %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7
17368 Several relocations exist to allow the link editor to potentially
17369 optimize GOT data references. The `R_SPARC_GOTDATA_OP_HIX22'
17370 relocation can obtained by enclosing an operand inside of
17371 `%gdop_hix22'. The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained
17372 by enclosing an operand inside of `%gdop_lox10'. Likewise,
17373 `R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of
17374 `%gdop'. For example, assuming the GOT base is in register `%l7':
17376 sethi %gdop_hix22(symbol), %l1
17377 xor %l1, %gdop_lox10(symbol), %l1
17378 ld [%l7 + %l1], %l2, %gdop(symbol)
17380 There are many relocations that can be requested for access to
17381 thread local storage variables. All of the Sparc TLS mnemonics are
17384 * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'.
17386 * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'.
17388 * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'.
17390 * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'.
17392 * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'.
17394 * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'.
17396 * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'.
17398 * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'.
17400 * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'.
17402 * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'.
17404 * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'.
17406 * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'.
17408 * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'.
17410 * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'.
17412 * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'.
17414 * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'.
17416 * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'.
17418 * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'.
17420 Here are some example TLS model sequences.
17422 First, General Dynamic:
17424 sethi %tgd_hi22(symbol), %l1
17425 add %l1, %tgd_lo10(symbol), %l1
17426 add %l7, %l1, %o0, %tgd_add(symbol)
17427 call __tls_get_addr, %tgd_call(symbol)
17432 sethi %tldm_hi22(symbol), %l1
17433 add %l1, %tldm_lo10(symbol), %l1
17434 add %l7, %l1, %o0, %tldm_add(symbol)
17435 call __tls_get_addr, %tldm_call(symbol)
17438 sethi %tldo_hix22(symbol), %l1
17439 xor %l1, %tldo_lox10(symbol), %l1
17440 add %o0, %l1, %l1, %tldo_add(symbol)
17444 sethi %tie_hi22(symbol), %l1
17445 add %l1, %tie_lo10(symbol), %l1
17446 ld [%l7 + %l1], %o0, %tie_ld(symbol)
17447 add %g7, %o0, %o0, %tie_add(symbol)
17449 sethi %tie_hi22(symbol), %l1
17450 add %l1, %tie_lo10(symbol), %l1
17451 ldx [%l7 + %l1], %o0, %tie_ldx(symbol)
17452 add %g7, %o0, %o0, %tie_add(symbol)
17454 And finally, Local Exec:
17456 sethi %tle_hix22(symbol), %l1
17457 add %l1, %tle_lox10(symbol), %l1
17460 When assembling for 64-bit, and a secondary constant addend is
17461 specified in an address expression that would normally generate an
17462 `R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10'
17466 File: as.info, Node: Sparc-Size-Translations, Prev: Sparc-Relocs, Up: Sparc-Syntax
17468 9.39.3.5 Size Translations
17469 ..........................
17471 Often it is desirable to write code in an operand size agnostic manner.
17472 `as' provides support for this via operand size opcode translations.
17473 Translations are supported for loads, stores, shifts, compare-and-swap
17474 atomics, and the `clr' synthetic instruction.
17476 If generating 32-bit code, `as' will generate the 32-bit opcode.
17477 Whereas if 64-bit code is being generated, the 64-bit opcode will be
17478 emitted. For example `ldn' will be transformed into `ld' for 32-bit
17479 code and `ldx' for 64-bit code.
17481 Here is an example meant to demonstrate all the supported opcode
17485 ldna [%o0] %asi, %o2
17487 stna %o2, [%o0] %asi
17491 casn [%o0], %o1, %o2
17492 casna [%o0] %asi, %o1, %o2
17495 In 32-bit mode `as' will emit:
17498 lda [%o0] %asi, %o2
17500 sta %o2, [%o0] %asi
17504 cas [%o0], %o1, %o2
17505 casa [%o0] %asi, %o1, %o2
17508 And in 64-bit mode `as' will emit:
17511 ldxa [%o0] %asi, %o2
17513 stxa %o2, [%o0] %asi
17517 casx [%o0], %o1, %o2
17518 casxa [%o0] %asi, %o1, %o2
17521 Finally, the `.nword' translating directive is supported as well.
17522 It is documented in the section on Sparc machine directives.
17525 File: as.info, Node: Sparc-Float, Next: Sparc-Directives, Prev: Sparc-Syntax, Up: Sparc-Dependent
17527 9.39.4 Floating Point
17528 ---------------------
17530 The Sparc uses IEEE floating-point numbers.
17533 File: as.info, Node: Sparc-Directives, Prev: Sparc-Float, Up: Sparc-Dependent
17535 9.39.5 Sparc Machine Directives
17536 -------------------------------
17538 The Sparc version of `as' supports the following additional machine
17542 This must be followed by the desired alignment in bytes.
17545 This must be followed by a symbol name, a positive number, and
17546 `"bss"'. This behaves somewhat like `.comm', but the syntax is
17550 This is functionally identical to `.short'.
17553 On the Sparc, the `.nword' directive produces native word sized
17554 value, ie. if assembling with -32 it is equivalent to `.word', if
17555 assembling with -64 it is equivalent to `.xword'.
17558 This directive is ignored. Any text following it on the same line
17562 This directive declares use of a global application or system
17563 register. It must be followed by a register name %g2, %g3, %g6 or
17564 %g7, comma and the symbol name for that register. If symbol name
17565 is `#scratch', it is a scratch register, if it is `#ignore', it
17566 just suppresses any errors about using undeclared global register,
17567 but does not emit any information about it into the object file.
17568 This can be useful e.g. if you save the register before use and
17572 This must be followed by a symbol name, a positive number, and
17573 `"bss"'. This behaves somewhat like `.lcomm', but the syntax is
17577 This must be followed by `"text"', `"data"', or `"data1"'. It
17578 behaves like `.text', `.data', or `.data 1'.
17581 This is functionally identical to the `.space' directive.
17584 On the Sparc, the `.word' directive produces 32 bit values,
17585 instead of the 16 bit values it produces on many other machines.
17588 On the Sparc V9 processor, the `.xword' directive produces 64 bit
17592 File: as.info, Node: TIC54X-Dependent, Next: TIC6X-Dependent, Prev: Sparc-Dependent, Up: Machine Dependencies
17594 9.40 TIC54X Dependent Features
17595 ==============================
17599 * TIC54X-Opts:: Command-line Options
17600 * TIC54X-Block:: Blocking
17601 * TIC54X-Env:: Environment Settings
17602 * TIC54X-Constants:: Constants Syntax
17603 * TIC54X-Subsyms:: String Substitution
17604 * TIC54X-Locals:: Local Label Syntax
17605 * TIC54X-Builtins:: Builtin Assembler Math Functions
17606 * TIC54X-Ext:: Extended Addressing Support
17607 * TIC54X-Directives:: Directives
17608 * TIC54X-Macros:: Macro Features
17609 * TIC54X-MMRegs:: Memory-mapped Registers
17610 * TIC54X-Syntax:: Syntax
17613 File: as.info, Node: TIC54X-Opts, Next: TIC54X-Block, Up: TIC54X-Dependent
17618 The TMS320C54X version of `as' has a few machine-dependent options.
17620 You can use the `-mfar-mode' option to enable extended addressing
17621 mode. All addresses will be assumed to be > 16 bits, and the
17622 appropriate relocation types will be used. This option is equivalent
17623 to using the `.far_mode' directive in the assembly code. If you do not
17624 use the `-mfar-mode' option, all references will be assumed to be 16
17625 bits. This option may be abbreviated to `-mf'.
17627 You can use the `-mcpu' option to specify a particular CPU. This
17628 option is equivalent to using the `.version' directive in the assembly
17629 code. For recognized CPU codes, see *Note `.version':
17630 TIC54X-Directives. The default CPU version is `542'.
17632 You can use the `-merrors-to-file' option to redirect error output
17633 to a file (this provided for those deficient environments which don't
17634 provide adequate output redirection). This option may be abbreviated to
17638 File: as.info, Node: TIC54X-Block, Next: TIC54X-Env, Prev: TIC54X-Opts, Up: TIC54X-Dependent
17643 A blocked section or memory block is guaranteed not to cross the
17644 blocking boundary (usually a page, or 128 words) if it is smaller than
17645 the blocking size, or to start on a page boundary if it is larger than
17649 File: as.info, Node: TIC54X-Env, Next: TIC54X-Constants, Prev: TIC54X-Block, Up: TIC54X-Dependent
17651 9.40.3 Environment Settings
17652 ---------------------------
17654 `C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added
17655 to the list of directories normally searched for source and include
17656 files. `C54XDSP_DIR' will override `A_DIR'.
17659 File: as.info, Node: TIC54X-Constants, Next: TIC54X-Subsyms, Prev: TIC54X-Env, Up: TIC54X-Dependent
17661 9.40.4 Constants Syntax
17662 -----------------------
17664 The TIC54X version of `as' allows the following additional constant
17665 formats, using a suffix to indicate the radix:
17667 Binary `000000B, 011000b'
17669 Hexadecimal `45h, 0FH'
17672 File: as.info, Node: TIC54X-Subsyms, Next: TIC54X-Locals, Prev: TIC54X-Constants, Up: TIC54X-Dependent
17674 9.40.5 String Substitution
17675 --------------------------
17677 A subset of allowable symbols (which we'll call subsyms) may be assigned
17678 arbitrary string values. This is roughly equivalent to C preprocessor
17679 #define macros. When `as' encounters one of these symbols, the symbol
17680 is replaced in the input stream by its string value. Subsym names
17681 *must* begin with a letter.
17683 Subsyms may be defined using the `.asg' and `.eval' directives
17684 (*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives.
17686 Expansion is recursive until a previously encountered symbol is
17687 seen, at which point substitution stops.
17689 In this example, x is replaced with SYM2; SYM2 is replaced with
17690 SYM1, and SYM1 is replaced with x. At this point, x has already been
17691 encountered and the substitution stops.
17696 add x,a ; final code assembled is "add x, a"
17698 Macro parameters are converted to subsyms; a side effect of this is
17699 the normal `as' '\ARG' dereferencing syntax is unnecessary. Subsyms
17700 defined within a macro will have global scope, unless the `.var'
17701 directive is used to identify the subsym as a local macro variable
17702 *note `.var': TIC54X-Directives.
17704 Substitution may be forced in situations where replacement might be
17705 ambiguous by placing colons on either side of the subsym. The following
17711 When assembled becomes:
17715 Smaller parts of the string assigned to a subsym may be accessed with
17716 the following syntax:
17718 ``:SYMBOL(CHAR_INDEX):''
17719 Evaluates to a single-character string, the character at
17722 ``:SYMBOL(START,LENGTH):''
17723 Evaluates to a substring of SYMBOL beginning at START with length
17727 File: as.info, Node: TIC54X-Locals, Next: TIC54X-Builtins, Prev: TIC54X-Subsyms, Up: TIC54X-Dependent
17729 9.40.6 Local Labels
17730 -------------------
17732 Local labels may be defined in two ways:
17734 * $N, where N is a decimal number between 0 and 9
17736 * LABEL?, where LABEL is any legal symbol name.
17738 Local labels thus defined may be redefined or automatically
17739 generated. The scope of a local label is based on when it may be
17740 undefined or reset. This happens when one of the following situations
17743 * .newblock directive *note `.newblock': TIC54X-Directives.
17745 * The current section is changed (.sect, .text, or .data)
17747 * Entering or leaving an included file
17749 * The macro scope where the label was defined is exited
17752 File: as.info, Node: TIC54X-Builtins, Next: TIC54X-Ext, Prev: TIC54X-Locals, Up: TIC54X-Dependent
17754 9.40.7 Math Builtins
17755 --------------------
17757 The following built-in functions may be used to generate a
17758 floating-point value. All return a floating-point value except `$cvi',
17759 `$int', and `$sgn', which return an integer value.
17762 Returns the floating point arccosine of EXPR.
17765 Returns the floating point arcsine of EXPR.
17768 Returns the floating point arctangent of EXPR.
17770 ``$atan2(EXPR1,EXPR2)''
17771 Returns the floating point arctangent of EXPR1 / EXPR2.
17774 Returns the smallest integer not less than EXPR as floating point.
17777 Returns the floating point hyperbolic cosine of EXPR.
17780 Returns the floating point cosine of EXPR.
17783 Returns the integer value EXPR converted to floating-point.
17786 Returns the floating point value EXPR converted to integer.
17789 Returns the floating point value e ^ EXPR.
17792 Returns the floating point absolute value of EXPR.
17795 Returns the largest integer that is not greater than EXPR as
17798 ``$fmod(EXPR1,EXPR2)''
17799 Returns the floating point remainder of EXPR1 / EXPR2.
17802 Returns 1 if EXPR evaluates to an integer, zero otherwise.
17804 ``$ldexp(EXPR1,EXPR2)''
17805 Returns the floating point value EXPR1 * 2 ^ EXPR2.
17808 Returns the base 10 logarithm of EXPR.
17811 Returns the natural logarithm of EXPR.
17813 ``$max(EXPR1,EXPR2)''
17814 Returns the floating point maximum of EXPR1 and EXPR2.
17816 ``$min(EXPR1,EXPR2)''
17817 Returns the floating point minimum of EXPR1 and EXPR2.
17819 ``$pow(EXPR1,EXPR2)''
17820 Returns the floating point value EXPR1 ^ EXPR2.
17823 Returns the nearest integer to EXPR as a floating point number.
17826 Returns -1, 0, or 1 based on the sign of EXPR.
17829 Returns the floating point sine of EXPR.
17832 Returns the floating point hyperbolic sine of EXPR.
17835 Returns the floating point square root of EXPR.
17838 Returns the floating point tangent of EXPR.
17841 Returns the floating point hyperbolic tangent of EXPR.
17844 Returns the integer value of EXPR truncated towards zero as
17849 File: as.info, Node: TIC54X-Ext, Next: TIC54X-Directives, Prev: TIC54X-Builtins, Up: TIC54X-Dependent
17851 9.40.8 Extended Addressing
17852 --------------------------
17854 The `LDX' pseudo-op is provided for loading the extended addressing bits
17855 of a label or address. For example, if an address `_label' resides in
17856 extended program memory, the value of `_label' may be loaded as follows:
17857 ldx #_label,16,a ; loads extended bits of _label
17858 or #_label,a ; loads lower 16 bits of _label
17859 bacc a ; full address is in accumulator A
17862 File: as.info, Node: TIC54X-Directives, Next: TIC54X-Macros, Prev: TIC54X-Ext, Up: TIC54X-Dependent
17869 Align the section program counter on the next boundary, based on
17870 SIZE. SIZE may be any power of 2. `.even' is equivalent to
17871 `.align' with a SIZE of 2.
17873 Align SPC to word boundary
17876 Align SPC to longword boundary (same as .even)
17879 Align SPC to page boundary
17881 `.asg STRING, NAME'
17882 Assign NAME the string STRING. String replacement is performed on
17883 STRING before assignment.
17885 `.eval STRING, NAME'
17886 Evaluate the contents of string STRING and assign the result as a
17887 string to the subsym NAME. String replacement is performed on
17888 STRING before assignment.
17890 `.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
17891 Reserve space for SYMBOL in the .bss section. SIZE is in words.
17892 If present, BLOCKING_FLAG indicates the allocated space should be
17893 aligned on a page boundary if it would otherwise cross a page
17894 boundary. If present, ALIGNMENT_FLAG causes the assembler to
17895 allocate SIZE on a long word boundary.
17897 `.byte VALUE [,...,VALUE_N]'
17898 `.ubyte VALUE [,...,VALUE_N]'
17899 `.char VALUE [,...,VALUE_N]'
17900 `.uchar VALUE [,...,VALUE_N]'
17901 Place one or more bytes into consecutive words of the current
17902 section. The upper 8 bits of each word is zero-filled. If a
17903 label is used, it points to the word allocated for the first byte
17906 `.clink ["SECTION_NAME"]'
17907 Set STYP_CLINK flag for this section, which indicates to the
17908 linker that if no symbols from this section are referenced, the
17909 section should not be included in the link. If SECTION_NAME is
17910 omitted, the current section is used.
17915 `.copy "FILENAME" | FILENAME'
17916 `.include "FILENAME" | FILENAME'
17917 Read source statements from FILENAME. The normal include search
17918 path is used. Normally .copy will cause statements from the
17919 included file to be printed in the assembly listing and .include
17920 will not, but this distinction is not currently implemented.
17923 Begin assembling code into the .data section.
17925 `.double VALUE [,...,VALUE_N]'
17926 `.ldouble VALUE [,...,VALUE_N]'
17927 `.float VALUE [,...,VALUE_N]'
17928 `.xfloat VALUE [,...,VALUE_N]'
17929 Place an IEEE single-precision floating-point representation of
17930 one or more floating-point values into the current section. All
17931 but `.xfloat' align the result on a longword boundary. Values are
17932 stored most-significant word first.
17936 Control printing of directives to the listing file. Ignored.
17941 Emit a user-defined error, message, or warning, respectively.
17944 Use extended addressing when assembling statements. This should
17945 appear only once per file, and is equivalent to the -mfar-mode
17946 option *note `-mfar-mode': TIC54X-Opts.
17950 Control printing of false conditional blocks to the listing file.
17952 `.field VALUE [,SIZE]'
17953 Initialize a bitfield of SIZE bits in the current section. If
17954 VALUE is relocatable, then SIZE must be 16. SIZE defaults to 16
17955 bits. If VALUE does not fit into SIZE bits, the value will be
17956 truncated. Successive `.field' directives will pack starting at
17957 the current word, filling the most significant bits first, and
17958 aligning to the start of the next word if the field size does not
17959 fit into the space remaining in the current word. A `.align'
17960 directive with an operand of 1 will force the next `.field'
17961 directive to begin packing into a new word. If a label is used, it
17962 points to the word that contains the specified field.
17964 `.global SYMBOL [,...,SYMBOL_N]'
17965 `.def SYMBOL [,...,SYMBOL_N]'
17966 `.ref SYMBOL [,...,SYMBOL_N]'
17967 `.def' nominally identifies a symbol defined in the current file
17968 and available to other files. `.ref' identifies a symbol used in
17969 the current file but defined elsewhere. Both map to the standard
17970 `.global' directive.
17972 `.half VALUE [,...,VALUE_N]'
17973 `.uhalf VALUE [,...,VALUE_N]'
17974 `.short VALUE [,...,VALUE_N]'
17975 `.ushort VALUE [,...,VALUE_N]'
17976 `.int VALUE [,...,VALUE_N]'
17977 `.uint VALUE [,...,VALUE_N]'
17978 `.word VALUE [,...,VALUE_N]'
17979 `.uword VALUE [,...,VALUE_N]'
17980 Place one or more values into consecutive words of the current
17981 section. If a label is used, it points to the word allocated for
17982 the first value encountered.
17985 Define a special SYMBOL to refer to the load time address of the
17986 current section program counter.
17990 Set the page length and width of the output listing file. Ignored.
17994 Control whether the source listing is printed. Ignored.
17996 `.long VALUE [,...,VALUE_N]'
17997 `.ulong VALUE [,...,VALUE_N]'
17998 `.xlong VALUE [,...,VALUE_N]'
17999 Place one or more 32-bit values into consecutive words in the
18000 current section. The most significant word is stored first.
18001 `.long' and `.ulong' align the result on a longword boundary;
18005 `.break [CONDITION]'
18007 Repeatedly assemble a block of code. `.loop' begins the block, and
18008 `.endloop' marks its termination. COUNT defaults to 1024, and
18009 indicates the number of times the block should be repeated.
18010 `.break' terminates the loop so that assembly begins after the
18011 `.endloop' directive. The optional CONDITION will cause the loop
18012 to terminate only if it evaluates to zero.
18014 `MACRO_NAME .macro [PARAM1][,...PARAM_N]'
18017 See the section on macros for more explanation (*Note
18020 `.mlib "FILENAME" | FILENAME'
18021 Load the macro library FILENAME. FILENAME must be an archived
18022 library (BFD ar-compatible) of text files, expected to contain
18023 only macro definitions. The standard include search path is used.
18027 Control whether to include macro and loop block expansions in the
18028 listing output. Ignored.
18031 Define global symbolic names for the 'c54x registers. Supposedly
18032 equivalent to executing `.set' directives for each register with
18033 its memory-mapped value, but in reality is provided only for
18034 compatibility and does nothing.
18037 This directive resets any TIC54X local labels currently defined.
18038 Normal `as' local labels are unaffected.
18040 `.option OPTION_LIST'
18041 Set listing options. Ignored.
18043 `.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]'
18044 Designate SECTION_NAME for blocking. Blocking guarantees that a
18045 section will start on a page boundary (128 words) if it would
18046 otherwise cross a page boundary. Only initialized sections may be
18047 designated with this directive. See also *Note TIC54X-Block::.
18049 `.sect "SECTION_NAME"'
18050 Define a named initialized section and make it the current section.
18052 `SYMBOL .set "VALUE"'
18053 `SYMBOL .equ "VALUE"'
18054 Equate a constant VALUE to a SYMBOL, which is placed in the symbol
18055 table. SYMBOL may not be previously defined.
18057 `.space SIZE_IN_BITS'
18058 `.bes SIZE_IN_BITS'
18059 Reserve the given number of bits in the current section and
18060 zero-fill them. If a label is used with `.space', it points to the
18061 *first* word reserved. With `.bes', the label points to the
18062 *last* word reserved.
18066 Controls the inclusion of subsym replacement in the listing
18069 `.string "STRING" [,...,"STRING_N"]'
18070 `.pstring "STRING" [,...,"STRING_N"]'
18071 Place 8-bit characters from STRING into the current section.
18072 `.string' zero-fills the upper 8 bits of each word, while
18073 `.pstring' puts two characters into each word, filling the
18074 most-significant bits first. Unused space is zero-filled. If a
18075 label is used, it points to the first word initialized.
18077 `[STAG] .struct [OFFSET]'
18078 `[NAME_1] element [COUNT_1]'
18079 `[NAME_2] element [COUNT_2]'
18080 `[TNAME] .tag STAGX [TCOUNT]'
18082 `[NAME_N] element [COUNT_N]'
18083 `[SSIZE] .endstruct'
18084 `LABEL .tag [STAG]'
18085 Assign symbolic offsets to the elements of a structure. STAG
18086 defines a symbol to use to reference the structure. OFFSET
18087 indicates a starting value to use for the first element
18088 encountered; otherwise it defaults to zero. Each element can have
18089 a named offset, NAME, which is a symbol assigned the value of the
18090 element's offset into the structure. If STAG is missing, these
18091 become global symbols. COUNT adjusts the offset that many times,
18092 as if `element' were an array. `element' may be one of `.byte',
18093 `.word', `.long', `.float', or any equivalent of those, and the
18094 structure offset is adjusted accordingly. `.field' and `.string'
18095 are also allowed; the size of `.field' is one bit, and `.string'
18096 is considered to be one word in size. Only element descriptors,
18097 structure/union tags, `.align' and conditional assembly directives
18098 are allowed within `.struct'/`.endstruct'. `.align' aligns member
18099 offsets to word boundaries only. SSIZE, if provided, will always
18100 be assigned the size of the structure.
18102 The `.tag' directive, in addition to being used to define a
18103 structure/union element within a structure, may be used to apply a
18104 structure to a symbol. Once applied to LABEL, the individual
18105 structure elements may be applied to LABEL to produce the desired
18106 offsets using LABEL as the structure base.
18109 Set the tab size in the output listing. Ignored.
18112 `[NAME_1] element [COUNT_1]'
18113 `[NAME_2] element [COUNT_2]'
18114 `[TNAME] .tag UTAGX[,TCOUNT]'
18116 `[NAME_N] element [COUNT_N]'
18117 `[USIZE] .endstruct'
18118 `LABEL .tag [UTAG]'
18119 Similar to `.struct', but the offset after each element is reset to
18120 zero, and the USIZE is set to the maximum of all defined elements.
18121 Starting offset for the union is always zero.
18123 `[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
18124 Reserve space for variables in a named, uninitialized section
18125 (similar to .bss). `.usect' allows definitions sections
18126 independent of .bss. SYMBOL points to the first location reserved
18127 by this allocation. The symbol may be used as a variable name.
18128 SIZE is the allocated size in words. BLOCKING_FLAG indicates
18129 whether to block this section on a page boundary (128 words)
18130 (*note TIC54X-Block::). ALIGNMENT FLAG indicates whether the
18131 section should be longword-aligned.
18133 `.var SYM[,..., SYM_N]'
18134 Define a subsym to be a local variable within a macro. See *Note
18138 Set which processor to build instructions for. Though the
18139 following values are accepted, the op is ignored.
18150 File: as.info, Node: TIC54X-Macros, Next: TIC54X-MMRegs, Prev: TIC54X-Directives, Up: TIC54X-Dependent
18155 Macros do not require explicit dereferencing of arguments (i.e., \ARG).
18157 During macro expansion, the macro parameters are converted to
18158 subsyms. If the number of arguments passed the macro invocation
18159 exceeds the number of parameters defined, the last parameter is
18160 assigned the string equivalent of all remaining arguments. If fewer
18161 arguments are given than parameters, the missing parameters are
18162 assigned empty strings. To include a comma in an argument, you must
18163 enclose the argument in quotes.
18165 The following built-in subsym functions allow examination of the
18166 string value of subsyms (or ordinary strings). The arguments are
18167 strings unless otherwise indicated (subsyms passed as args will be
18168 replaced by the strings they represent).
18170 Returns the length of STR.
18172 ``$symcmp(STR1,STR2)''
18173 Returns 0 if STR1 == STR2, non-zero otherwise.
18175 ``$firstch(STR,CH)''
18176 Returns index of the first occurrence of character constant CH in
18179 ``$lastch(STR,CH)''
18180 Returns index of the last occurrence of character constant CH in
18183 ``$isdefed(SYMBOL)''
18184 Returns zero if the symbol SYMBOL is not in the symbol table,
18185 non-zero otherwise.
18187 ``$ismember(SYMBOL,LIST)''
18188 Assign the first member of comma-separated string LIST to SYMBOL;
18189 LIST is reassigned the remainder of the list. Returns zero if
18190 LIST is a null string. Both arguments must be subsyms.
18193 Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal,
18194 4 if a character, 5 if decimal, and zero if not an integer.
18197 Returns 1 if NAME is a valid symbol name, zero otherwise.
18200 Returns 1 if REG is a valid predefined register name (AR0-AR7
18203 ``$structsz(STAG)''
18204 Returns the size of the structure or union represented by STAG.
18206 ``$structacc(STAG)''
18207 Returns the reference point of the structure or union represented
18208 by STAG. Always returns zero.
18212 File: as.info, Node: TIC54X-MMRegs, Next: TIC54X-Syntax, Prev: TIC54X-Macros, Up: TIC54X-Dependent
18214 9.40.11 Memory-mapped Registers
18215 -------------------------------
18217 The following symbols are recognized as memory-mapped registers:
18221 File: as.info, Node: TIC54X-Syntax, Prev: TIC54X-MMRegs, Up: TIC54X-Dependent
18223 9.40.12 TIC54X Syntax
18224 ---------------------
18228 * TIC54X-Chars:: Special Characters
18231 File: as.info, Node: TIC54X-Chars, Up: TIC54X-Syntax
18233 9.40.12.1 Special Characters
18234 ............................
18236 The presence of a `;' appearing anywhere on a line indicates the start
18237 of a comment that extends to the end of that line.
18239 If a `#' appears as the first character of a line then the whole
18240 line is treated as a comment, but in this case the line can also be a
18241 logical line number directive (*note Comments::) or a preprocessor
18242 control command (*note Preprocessing::).
18244 The presence of an asterisk (`*') at the start of a line also
18245 indicates a comment that extends to the end of that line.
18247 The TIC54X assembler does not currently support a line separator
18251 File: as.info, Node: TIC6X-Dependent, Next: TILE-Gx-Dependent, Prev: TIC54X-Dependent, Up: Machine Dependencies
18253 9.41 TIC6X Dependent Features
18254 =============================
18258 * TIC6X Options:: Options
18259 * TIC6X Syntax:: Syntax
18260 * TIC6X Directives:: Directives
18263 File: as.info, Node: TIC6X Options, Next: TIC6X Syntax, Up: TIC6X-Dependent
18265 9.41.1 TIC6X Options
18266 --------------------
18269 Enable (only) instructions from architecture ARCH. By default,
18270 all instructions are permitted.
18272 The following values of ARCH are accepted: `c62x', `c64x',
18273 `c64x+', `c67x', `c67x+', `c674x'.
18277 The `-mdsbt' option causes the assembler to generate the
18278 `Tag_ABI_DSBT' attribute with a value of 1, indicating that the
18279 code is using DSBT addressing. The `-mno-dsbt' option, the
18280 default, causes the tag to have a value of 0, indicating that the
18281 code does not use DSBT addressing. The linker will emit a warning
18282 if objects of different type (DSBT and non-DSBT) are linked
18288 The `-mpid=' option causes the assembler to generate the
18289 `Tag_ABI_PID' attribute with a value indicating the form of data
18290 addressing used by the code. `-mpid=no', the default, indicates
18291 position-dependent data addressing, `-mpid=near' indicates
18292 position-independent addressing with GOT accesses using near DP
18293 addressing, and `-mpid=far' indicates position-independent
18294 addressing with GOT accesses using far DP addressing. The linker
18295 will emit a warning if objects built with different settings of
18296 this option are linked together.
18300 The `-mpic' option causes the assembler to generate the
18301 `Tag_ABI_PIC' attribute with a value of 1, indicating that the
18302 code is using position-independent code addressing, The
18303 `-mno-pic' option, the default, causes the tag to have a value of
18304 0, indicating position-dependent code addressing. The linker will
18305 emit a warning if objects of different type (position-dependent and
18306 position-independent) are linked together.
18310 Generate code for the specified endianness. The default is
18315 File: as.info, Node: TIC6X Syntax, Next: TIC6X Directives, Prev: TIC6X Options, Up: TIC6X-Dependent
18317 9.41.2 TIC6X Syntax
18318 -------------------
18320 The presence of a `;' on a line indicates the start of a comment that
18321 extends to the end of the current line. If a `#' or `*' appears as the
18322 first character of a line, the whole line is treated as a comment.
18323 Note that if a line starts with a `#' character then it can also be a
18324 logical line number directive (*note Comments::) or a preprocessor
18325 control command (*note Preprocessing::).
18327 The `@' character can be used instead of a newline to separate
18330 Instruction, register and functional unit names are case-insensitive.
18331 `as' requires fully-specified functional unit names, such as `.S1',
18332 `.L1X' or `.D1T2', on all instructions using a functional unit.
18334 For some instructions, there may be syntactic ambiguity between
18335 register or functional unit names and the names of labels or other
18336 symbols. To avoid this, enclose the ambiguous symbol name in
18337 parentheses; register and functional unit names may not be enclosed in
18341 File: as.info, Node: TIC6X Directives, Prev: TIC6X Syntax, Up: TIC6X-Dependent
18343 9.41.3 TIC6X Directives
18344 -----------------------
18346 Directives controlling the set of instructions accepted by the
18347 assembler have effect for instructions between the directive and any
18348 subsequent directive overriding it.
18351 This has the same effect as `-march=ARCH'.
18354 Prevents unwinding through the current function. No personality
18355 routine or exception table data is required or permitted.
18357 If this is not specified then frame unwinding information will be
18358 constructed from CFI directives. *note CFI directives::.
18360 `.c6xabi_attribute TAG, VALUE'
18361 Set the C6000 EABI build attribute TAG to VALUE.
18363 The TAG is either an attribute number or one of `Tag_ISA',
18364 `Tag_ABI_wchar_t', `Tag_ABI_stack_align_needed',
18365 `Tag_ABI_stack_align_preserved', `Tag_ABI_DSBT', `Tag_ABI_PID',
18366 `Tag_ABI_PIC', `TAG_ABI_array_object_alignment',
18367 `TAG_ABI_array_object_align_expected', `Tag_ABI_compatibility' and
18368 `Tag_ABI_conformance'. The VALUE is either a `number',
18369 `"string"', or `number, "string"' depending on the tag.
18372 Output an exception type table reference to SYMBOL.
18375 Marks the end of and exception table or function. If preceeded by
18376 a `.handlerdata' directive then this also switched back to the
18377 previous text section.
18380 Marks the end of the current function, and the start of the
18381 exception table entry for that function. Anything between this
18382 directive and the `.endp' directive will be added to the exception
18385 Must be preceded by a CFI block containing a `.cfi_lsda' directive.
18388 Disallow use of C64x+ compact instructions in the current text
18391 `.personalityindex INDEX'
18392 Sets the personality routine for the current function to the ABI
18393 specified compact routine number INDEX
18395 `.personality NAME'
18396 Sets the personality routine for the current function to NAME.
18398 `.scomm SYMBOL, SIZE, ALIGN'
18399 Like `.comm', creating a common symbol SYMBOL with size SIZE and
18400 alignment ALIGN, but unlike when using `.comm', this symbol will
18401 be placed into the small BSS section by the linker.
18405 File: as.info, Node: TILE-Gx-Dependent, Next: TILEPro-Dependent, Prev: TIC6X-Dependent, Up: Machine Dependencies
18407 9.42 TILE-Gx Dependent Features
18408 ===============================
18412 * TILE-Gx Options:: TILE-Gx Options
18413 * TILE-Gx Syntax:: TILE-Gx Syntax
18414 * TILE-Gx Directives:: TILE-Gx Directives
18417 File: as.info, Node: TILE-Gx Options, Next: TILE-Gx Syntax, Up: TILE-Gx-Dependent
18422 The following table lists all available TILE-Gx specific options:
18425 Select the word size, either 32 bits or 64 bits.
18428 Select the endianness, either big-endian (-EB) or little-endian
18433 File: as.info, Node: TILE-Gx Syntax, Next: TILE-Gx Directives, Prev: TILE-Gx Options, Up: TILE-Gx-Dependent
18438 Block comments are delimited by `/*' and `*/'. End of line comments
18439 may be introduced by `#'.
18441 Instructions consist of a leading opcode or macro name followed by
18442 whitespace and an optional comma-separated list of operands:
18444 OPCODE [OPERAND, ...]
18446 Instructions must be separated by a newline or semicolon.
18448 There are two ways to write code: either write naked instructions,
18449 which the assembler is free to combine into VLIW bundles, or specify
18450 the VLIW bundles explicitly.
18452 Bundles are specified using curly braces:
18454 { ADD r3,r4,r5 ; ADD r7,r8,r9 ; LW r10,r11 }
18456 A bundle can span multiple lines. If you want to put multiple
18457 instructions on a line, whether in a bundle or not, you need to
18458 separate them with semicolons as in this example.
18460 A bundle may contain one or more instructions, up to the limit
18461 specified by the ISA (currently three). If fewer instructions are
18462 specified than the hardware supports in a bundle, the assembler inserts
18463 `fnop' instructions automatically.
18465 The assembler will prefer to preserve the ordering of instructions
18466 within the bundle, putting the first instruction in a lower-numbered
18467 pipeline than the next one, etc. This fact, combined with the optional
18468 use of explicit `fnop' or `nop' instructions, allows precise control
18469 over which pipeline executes each instruction.
18471 If the instructions cannot be bundled in the listed order, the
18472 assembler will automatically try to find a valid pipeline assignment.
18473 If there is no way to bundle the instructions together, the assembler
18476 The assembler does not yet auto-bundle (automatically combine
18477 multiple instructions into one bundle), but it reserves the right to do
18478 so in the future. If you want to force an instruction to run by
18479 itself, put it in a bundle explicitly with curly braces and use `nop'
18480 instructions (not `fnop') to fill the remaining pipeline slots in that
18485 * TILE-Gx Opcodes:: Opcode Naming Conventions.
18486 * TILE-Gx Registers:: Register Naming.
18487 * TILE-Gx Modifiers:: Symbolic Operand Modifiers.
18490 File: as.info, Node: TILE-Gx Opcodes, Next: TILE-Gx Registers, Up: TILE-Gx Syntax
18492 9.42.2.1 Opcode Names
18493 .....................
18495 For a complete list of opcodes and descriptions of their semantics, see
18496 `TILE-Gx Instruction Set Architecture', available upon request at
18500 File: as.info, Node: TILE-Gx Registers, Next: TILE-Gx Modifiers, Prev: TILE-Gx Opcodes, Up: TILE-Gx Syntax
18502 9.42.2.2 Register Names
18503 .......................
18505 General-purpose registers are represented by predefined symbols of the
18506 form `rN', where N represents a number between `0' and `63'. However,
18507 the following registers have canonical names that must be used instead:
18540 The assembler will emit a warning if a numeric name is used instead
18541 of the non-numeric name. The `.no_require_canonical_reg_names'
18542 assembler pseudo-op turns off this warning.
18543 `.require_canonical_reg_names' turns it back on.
18546 File: as.info, Node: TILE-Gx Modifiers, Prev: TILE-Gx Registers, Up: TILE-Gx Syntax
18548 9.42.2.3 Symbolic Operand Modifiers
18549 ...................................
18551 The assembler supports several modifiers when using symbol addresses in
18552 TILE-Gx instruction operands. The general syntax is the following:
18556 The following modifiers are supported:
18559 This modifier is used to load bits 0-15 of the symbol's address.
18562 This modifier is used to load bits 16-31 of the symbol's address.
18565 This modifier is used to load bits 32-47 of the symbol's address.
18568 This modifier is used to load bits 48-63 of the symbol's address.
18571 This modifier yields the same value as `hw0', but it also checks
18572 that the value does not overflow.
18575 This modifier yields the same value as `hw1', but it also checks
18576 that the value does not overflow.
18579 This modifier yields the same value as `hw2', but it also checks
18580 that the value does not overflow.
18582 A 48-bit symbolic value is constructed by using the following
18585 moveli r0, hw2_last(sym)
18586 shl16insli r0, r0, hw1(sym)
18587 shl16insli r0, r0, hw0(sym)
18590 This modifier is used to load bits 0-15 of the symbol's offset in
18591 the GOT entry corresponding to the symbol.
18594 This modifier yields the same value as `hw0_got', but it also
18595 checks that the value does not overflow.
18598 This modifier is used to load bits 16-31 of the symbol's offset in
18599 the GOT entry corresponding to the symbol, and it also checks that
18600 the value does not overflow.
18603 This modifier is used for function symbols. It causes a
18604 _procedure linkage table_, an array of code stubs, to be created
18605 at the time the shared object is created or linked against,
18606 together with a global offset table entry. The value is a
18607 pc-relative offset to the corresponding stub code in the procedure
18608 linkage table. This arrangement causes the run-time symbol
18609 resolver to be called to look up and set the value of the symbol
18610 the first time the function is called (at latest; depending
18611 environment variables). It is only safe to leave the symbol
18612 unresolved this way if all references are function calls.
18615 This modifier is used to load bits 0-15 of the offset of the GOT
18616 entry of the symbol's TLS descriptor, to be used for
18617 general-dynamic TLS accesses.
18620 This modifier yields the same value as `hw0_tls_gd', but it also
18621 checks that the value does not overflow.
18624 This modifier is used to load bits 16-31 of the offset of the GOT
18625 entry of the symbol's TLS descriptor, to be used for
18626 general-dynamic TLS accesses. It also checks that the value does
18630 This modifier is used to load bits 0-15 of the offset of the GOT
18631 entry containing the offset of the symbol's address from the TCB,
18632 to be used for initial-exec TLS accesses.
18635 This modifier yields the same value as `hw0_tls_ie', but it also
18636 checks that the value does not overflow.
18639 This modifier is used to load bits 16-31 of the offset of the GOT
18640 entry containing the offset of the symbol's address from the TCB,
18641 to be used for initial-exec TLS accesses. It also checks that the
18642 value does not overflow.
18645 This modifier is used to load bits 0-15 of the offset of the
18646 symbol's address from the TCB, to be used for local-exec TLS
18650 This modifier yields the same value as `hw0_tls_le', but it also
18651 checks that the value does not overflow.
18654 This modifier is used to load bits 16-31 of the offset of the
18655 symbol's address from the TCB, to be used for local-exec TLS
18656 accesses. It also checks that the value does not overflow.
18659 This modifier is used to tag an instrution as the "call" part of a
18660 calling sequence for a TLS GD reference of its operand.
18663 This modifier is used to tag an instruction as the "add" part of a
18664 calling sequence for a TLS GD reference of its operand.
18667 This modifier is used to tag an instruction as the "load" part of a
18668 calling sequence for a TLS IE reference of its operand.
18672 File: as.info, Node: TILE-Gx Directives, Prev: TILE-Gx Syntax, Up: TILE-Gx-Dependent
18674 9.42.3 TILE-Gx Directives
18675 -------------------------
18677 `.align EXPRESSION [, EXPRESSION]'
18678 This is the generic .ALIGN directive. The first argument is the
18679 requested alignment in bytes.
18681 `.allow_suspicious_bundles'
18682 Turns on error checking for combinations of instructions in a
18683 bundle that probably indicate a programming error. This is on by
18686 `.no_allow_suspicious_bundles'
18687 Turns off error checking for combinations of instructions in a
18688 bundle that probably indicate a programming error.
18690 `.require_canonical_reg_names'
18691 Require that canonical register names be used, and emit a warning
18692 if the numeric names are used. This is on by default.
18694 `.no_require_canonical_reg_names'
18695 Permit the use of numeric names for registers that have canonical
18700 File: as.info, Node: TILEPro-Dependent, Next: V850-Dependent, Prev: TILE-Gx-Dependent, Up: Machine Dependencies
18702 9.43 TILEPro Dependent Features
18703 ===============================
18707 * TILEPro Options:: TILEPro Options
18708 * TILEPro Syntax:: TILEPro Syntax
18709 * TILEPro Directives:: TILEPro Directives
18712 File: as.info, Node: TILEPro Options, Next: TILEPro Syntax, Up: TILEPro-Dependent
18717 `as' has no machine-dependent command-line options for TILEPro.
18720 File: as.info, Node: TILEPro Syntax, Next: TILEPro Directives, Prev: TILEPro Options, Up: TILEPro-Dependent
18725 Block comments are delimited by `/*' and `*/'. End of line comments
18726 may be introduced by `#'.
18728 Instructions consist of a leading opcode or macro name followed by
18729 whitespace and an optional comma-separated list of operands:
18731 OPCODE [OPERAND, ...]
18733 Instructions must be separated by a newline or semicolon.
18735 There are two ways to write code: either write naked instructions,
18736 which the assembler is free to combine into VLIW bundles, or specify
18737 the VLIW bundles explicitly.
18739 Bundles are specified using curly braces:
18741 { ADD r3,r4,r5 ; ADD r7,r8,r9 ; LW r10,r11 }
18743 A bundle can span multiple lines. If you want to put multiple
18744 instructions on a line, whether in a bundle or not, you need to
18745 separate them with semicolons as in this example.
18747 A bundle may contain one or more instructions, up to the limit
18748 specified by the ISA (currently three). If fewer instructions are
18749 specified than the hardware supports in a bundle, the assembler inserts
18750 `fnop' instructions automatically.
18752 The assembler will prefer to preserve the ordering of instructions
18753 within the bundle, putting the first instruction in a lower-numbered
18754 pipeline than the next one, etc. This fact, combined with the optional
18755 use of explicit `fnop' or `nop' instructions, allows precise control
18756 over which pipeline executes each instruction.
18758 If the instructions cannot be bundled in the listed order, the
18759 assembler will automatically try to find a valid pipeline assignment.
18760 If there is no way to bundle the instructions together, the assembler
18763 The assembler does not yet auto-bundle (automatically combine
18764 multiple instructions into one bundle), but it reserves the right to do
18765 so in the future. If you want to force an instruction to run by
18766 itself, put it in a bundle explicitly with curly braces and use `nop'
18767 instructions (not `fnop') to fill the remaining pipeline slots in that
18772 * TILEPro Opcodes:: Opcode Naming Conventions.
18773 * TILEPro Registers:: Register Naming.
18774 * TILEPro Modifiers:: Symbolic Operand Modifiers.
18777 File: as.info, Node: TILEPro Opcodes, Next: TILEPro Registers, Up: TILEPro Syntax
18779 9.43.2.1 Opcode Names
18780 .....................
18782 For a complete list of opcodes and descriptions of their semantics, see
18783 `TILE Processor User Architecture Manual', available upon request at
18787 File: as.info, Node: TILEPro Registers, Next: TILEPro Modifiers, Prev: TILEPro Opcodes, Up: TILEPro Syntax
18789 9.43.2.2 Register Names
18790 .......................
18792 General-purpose registers are represented by predefined symbols of the
18793 form `rN', where N represents a number between `0' and `63'. However,
18794 the following registers have canonical names that must be used instead:
18827 The assembler will emit a warning if a numeric name is used instead
18828 of the canonical name. The `.no_require_canonical_reg_names' assembler
18829 pseudo-op turns off this warning. `.require_canonical_reg_names' turns
18833 File: as.info, Node: TILEPro Modifiers, Prev: TILEPro Registers, Up: TILEPro Syntax
18835 9.43.2.3 Symbolic Operand Modifiers
18836 ...................................
18838 The assembler supports several modifiers when using symbol addresses in
18839 TILEPro instruction operands. The general syntax is the following:
18843 The following modifiers are supported:
18846 This modifier is used to load the low 16 bits of the symbol's
18847 address, sign-extended to a 32-bit value (sign-extension allows it
18848 to be range-checked against signed 16 bit immediate operands
18849 without complaint).
18852 This modifier is used to load the high 16 bits of the symbol's
18853 address, also sign-extended to a 32-bit value.
18856 `ha16(N)' is identical to `hi16(N)', except if `lo16(N)' is
18857 negative it adds one to the `hi16(N)' value. This way `lo16' and
18858 `ha16' can be added to create any 32-bit value using `auli'. For
18859 example, here is how you move an arbitrary 32-bit address into r3:
18861 moveli r3, lo16(sym)
18862 auli r3, r3, ha16(sym)
18865 This modifier is used to load the offset of the GOT entry
18866 corresponding to the symbol.
18869 This modifier is used to load the sign-extended low 16 bits of the
18870 offset of the GOT entry corresponding to the symbol.
18873 This modifier is used to load the sign-extended high 16 bits of the
18874 offset of the GOT entry corresponding to the symbol.
18877 This modifier is like `got_hi16', but it adds one if `got_lo16' of
18878 the input value is negative.
18881 This modifier is used for function symbols. It causes a
18882 _procedure linkage table_, an array of code stubs, to be created
18883 at the time the shared object is created or linked against,
18884 together with a global offset table entry. The value is a
18885 pc-relative offset to the corresponding stub code in the procedure
18886 linkage table. This arrangement causes the run-time symbol
18887 resolver to be called to look up and set the value of the symbol
18888 the first time the function is called (at latest; depending
18889 environment variables). It is only safe to leave the symbol
18890 unresolved this way if all references are function calls.
18893 This modifier is used to load the offset of the GOT entry of the
18894 symbol's TLS descriptor, to be used for general-dynamic TLS
18898 This modifier is used to load the sign-extended low 16 bits of the
18899 offset of the GOT entry of the symbol's TLS descriptor, to be used
18900 for general dynamic TLS accesses.
18903 This modifier is used to load the sign-extended high 16 bits of the
18904 offset of the GOT entry of the symbol's TLS descriptor, to be used
18905 for general dynamic TLS accesses.
18908 This modifier is like `tls_gd_hi16', but it adds one to the value
18909 if `tls_gd_lo16' of the input value is negative.
18912 This modifier is used to load the offset of the GOT entry
18913 containing the offset of the symbol's address from the TCB, to be
18914 used for initial-exec TLS accesses.
18917 This modifier is used to load the low 16 bits of the offset of the
18918 GOT entry containing the offset of the symbol's address from the
18919 TCB, to be used for initial-exec TLS accesses.
18922 This modifier is used to load the high 16 bits of the offset of the
18923 GOT entry containing the offset of the symbol's address from the
18924 TCB, to be used for initial-exec TLS accesses.
18927 This modifier is like `tls_ie_hi16', but it adds one to the value
18928 if `tls_ie_lo16' of the input value is negative.
18931 This modifier is used to load the offset of the symbol's address
18932 from the TCB, to be used for local-exec TLS accesses.
18935 This modifier is used to load the low 16 bits of the offset of the
18936 symbol's address from the TCB, to be used for local-exec TLS
18940 This modifier is used to load the high 16 bits of the offset of the
18941 symbol's address from the TCB, to be used for local-exec TLS
18945 This modifier is like `tls_le_hi16', but it adds one to the value
18946 if `tls_le_lo16' of the input value is negative.
18949 This modifier is used to tag an instrution as the "call" part of a
18950 calling sequence for a TLS GD reference of its operand.
18953 This modifier is used to tag an instruction as the "add" part of a
18954 calling sequence for a TLS GD reference of its operand.
18957 This modifier is used to tag an instruction as the "load" part of a
18958 calling sequence for a TLS IE reference of its operand.
18962 File: as.info, Node: TILEPro Directives, Prev: TILEPro Syntax, Up: TILEPro-Dependent
18964 9.43.3 TILEPro Directives
18965 -------------------------
18967 `.align EXPRESSION [, EXPRESSION]'
18968 This is the generic .ALIGN directive. The first argument is the
18969 requested alignment in bytes.
18971 `.allow_suspicious_bundles'
18972 Turns on error checking for combinations of instructions in a
18973 bundle that probably indicate a programming error. This is on by
18976 `.no_allow_suspicious_bundles'
18977 Turns off error checking for combinations of instructions in a
18978 bundle that probably indicate a programming error.
18980 `.require_canonical_reg_names'
18981 Require that canonical register names be used, and emit a warning
18982 if the numeric names are used. This is on by default.
18984 `.no_require_canonical_reg_names'
18985 Permit the use of numeric names for registers that have canonical
18990 File: as.info, Node: Z80-Dependent, Next: Z8000-Dependent, Prev: Xtensa-Dependent, Up: Machine Dependencies
18992 9.44 Z80 Dependent Features
18993 ===========================
18997 * Z80 Options:: Options
18998 * Z80 Syntax:: Syntax
18999 * Z80 Floating Point:: Floating Point
19000 * Z80 Directives:: Z80 Machine Directives
19001 * Z80 Opcodes:: Opcodes
19004 File: as.info, Node: Z80 Options, Next: Z80 Syntax, Up: Z80-Dependent
19009 The Zilog Z80 and Ascii R800 version of `as' have a few machine
19012 Produce code for the Z80 processor. There are additional options to
19013 request warnings and error messages for undocumented instructions.
19015 `-ignore-undocumented-instructions'
19017 Silently assemble undocumented Z80-instructions that have been
19018 adopted as documented R800-instructions.
19020 `-ignore-unportable-instructions'
19022 Silently assemble all undocumented Z80-instructions.
19024 `-warn-undocumented-instructions'
19026 Issue warnings for undocumented Z80-instructions that work on
19027 R800, do not assemble other undocumented instructions without
19030 `-warn-unportable-instructions'
19032 Issue warnings for other undocumented Z80-instructions, do not
19033 treat any undocumented instructions as errors.
19035 `-forbid-undocumented-instructions'
19037 Treat all undocumented z80-instructions as errors.
19039 `-forbid-unportable-instructions'
19041 Treat undocumented z80-instructions that do not work on R800 as
19045 Produce code for the R800 processor. The assembler does not support
19046 undocumented instructions for the R800. In line with common
19047 practice, `as' uses Z80 instruction names for the R800 processor,
19048 as far as they exist.
19051 File: as.info, Node: Z80 Syntax, Next: Z80 Floating Point, Prev: Z80 Options, Up: Z80-Dependent
19056 The assembler syntax closely follows the 'Z80 family CPU User Manual' by
19057 Zilog. In expressions a single `=' may be used as "is equal to"
19058 comparison operator.
19060 Suffices can be used to indicate the radix of integer constants; `H'
19061 or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o'
19062 for octal, and `B' for binary.
19064 The suffix `b' denotes a backreference to local label.
19068 * Z80-Chars:: Special Characters
19069 * Z80-Regs:: Register Names
19070 * Z80-Case:: Case Sensitivity
19073 File: as.info, Node: Z80-Chars, Next: Z80-Regs, Up: Z80 Syntax
19075 9.44.2.1 Special Characters
19076 ...........................
19078 The semicolon `;' is the line comment character;
19080 If a `#' appears as the first character of a line then the whole
19081 line is treated as a comment, but in this case the line could also be a
19082 logical line number directive (*note Comments::) or a preprocessor
19083 control command (*note Preprocessing::).
19085 The Z80 assembler does not support a line separator character.
19087 The dollar sign `$' can be used as a prefix for hexadecimal numbers
19088 and as a symbol denoting the current location counter.
19090 A backslash `\' is an ordinary character for the Z80 assembler.
19092 The single quote `'' must be followed by a closing quote. If there
19093 is one character in between, it is a character constant, otherwise it is
19097 File: as.info, Node: Z80-Regs, Next: Z80-Case, Prev: Z80-Chars, Up: Z80 Syntax
19099 9.44.2.2 Register Names
19100 .......................
19102 The registers are referred to with the letters assigned to them by
19103 Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and
19104 most significant octet in `ix', and similarly `iyl' and `iyh' as parts
19108 File: as.info, Node: Z80-Case, Prev: Z80-Regs, Up: Z80 Syntax
19110 9.44.2.3 Case Sensitivity
19111 .........................
19113 Upper and lower case are equivalent in register names, opcodes,
19114 condition codes and assembler directives. The case of letters is
19115 significant in labels and symbol names. The case is also important to
19116 distinguish the suffix `b' for a backward reference to a local label
19117 from the suffix `B' for a number in binary notation.
19120 File: as.info, Node: Z80 Floating Point, Next: Z80 Directives, Prev: Z80 Syntax, Up: Z80-Dependent
19122 9.44.3 Floating Point
19123 ---------------------
19125 Floating-point numbers are not supported.
19128 File: as.info, Node: Z80 Directives, Next: Z80 Opcodes, Prev: Z80 Floating Point, Up: Z80-Dependent
19130 9.44.4 Z80 Assembler Directives
19131 -------------------------------
19133 `as' for the Z80 supports some additional directives for compatibility
19134 with other assemblers.
19136 These are the additional directives in `as' for the Z80:
19138 `db EXPRESSION|STRING[,EXPRESSION|STRING...]'
19139 `defb EXPRESSION|STRING[,EXPRESSION|STRING...]'
19140 For each STRING the characters are copied to the object file, for
19141 each other EXPRESSION the value is stored in one byte. A warning
19142 is issued in case of an overflow.
19144 `dw EXPRESSION[,EXPRESSION...]'
19145 `defw EXPRESSION[,EXPRESSION...]'
19146 For each EXPRESSION the value is stored in two bytes, ignoring
19149 `d24 EXPRESSION[,EXPRESSION...]'
19150 `def24 EXPRESSION[,EXPRESSION...]'
19151 For each EXPRESSION the value is stored in three bytes, ignoring
19154 `d32 EXPRESSION[,EXPRESSION...]'
19155 `def32 EXPRESSION[,EXPRESSION...]'
19156 For each EXPRESSION the value is stored in four bytes, ignoring
19159 `ds COUNT[, VALUE]'
19160 `defs COUNT[, VALUE]'
19161 Fill COUNT bytes in the object file with VALUE, if VALUE is
19162 omitted it defaults to zero.
19164 `SYMBOL equ EXPRESSION'
19165 `SYMBOL defl EXPRESSION'
19166 These directives set the value of SYMBOL to EXPRESSION. If `equ'
19167 is used, it is an error if SYMBOL is already defined. Symbols
19168 defined with `equ' are not protected from redefinition.
19171 This is a normal instruction on Z80, and not an assembler
19175 A synonym for *Note Section::, no second argument should be given.
19179 File: as.info, Node: Z80 Opcodes, Prev: Z80 Directives, Up: Z80-Dependent
19184 In line with common practice, Z80 mnemonics are used for both the Z80
19187 In many instructions it is possible to use one of the half index
19188 registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general
19189 purpose register. This yields instructions that are documented on the
19190 R800 and undocumented on the Z80. Similarly `in f,(c)' is documented
19191 on the R800 and undocumented on the Z80.
19193 The assembler also supports the following undocumented
19194 Z80-instructions, that have not been adopted in the R800 instruction
19197 Sends zero to the port pointed to by register c.
19200 Equivalent to `M = (M<<1)+1', the operand M can be any operand
19201 that is valid for `sla'. One can use `sll' as a synonym for `sli'.
19204 This is equivalent to
19210 The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc',
19211 `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R'
19212 may be any of `a', `b', `c', `d', `e', `h' and `l'.
19215 As above, but with `iy' instead of `ix'.
19217 The web site at `http://www.z80.info' is a good starting place to
19218 find more information on programming the Z80.
19221 File: as.info, Node: Z8000-Dependent, Next: Vax-Dependent, Prev: Z80-Dependent, Up: Machine Dependencies
19223 9.45 Z8000 Dependent Features
19224 =============================
19226 The Z8000 as supports both members of the Z8000 family: the
19227 unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
19230 When the assembler is in unsegmented mode (specified with the
19231 `unsegm' directive), an address takes up one word (16 bit) sized
19232 register. When the assembler is in segmented mode (specified with the
19233 `segm' directive), a 24-bit address takes up a long (32 bit) register.
19234 *Note Assembler Directives for the Z8000: Z8000 Directives, for a list
19235 of other Z8000 specific assembler directives.
19239 * Z8000 Options:: Command-line options for the Z8000
19240 * Z8000 Syntax:: Assembler syntax for the Z8000
19241 * Z8000 Directives:: Special directives for the Z8000
19242 * Z8000 Opcodes:: Opcodes
19245 File: as.info, Node: Z8000 Options, Next: Z8000 Syntax, Up: Z8000-Dependent
19251 Generate segmented code by default.
19254 Generate unsegmented code by default.
19257 File: as.info, Node: Z8000 Syntax, Next: Z8000 Directives, Prev: Z8000 Options, Up: Z8000-Dependent
19264 * Z8000-Chars:: Special Characters
19265 * Z8000-Regs:: Register Names
19266 * Z8000-Addressing:: Addressing Modes
19269 File: as.info, Node: Z8000-Chars, Next: Z8000-Regs, Up: Z8000 Syntax
19271 9.45.2.1 Special Characters
19272 ...........................
19274 `!' is the line comment character.
19276 If a `#' appears as the first character of a line then the whole
19277 line is treated as a comment, but in this case the line could also be a
19278 logical line number directive (*note Comments::) or a preprocessor
19279 control command (*note Preprocessing::).
19281 You can use `;' instead of a newline to separate statements.
19284 File: as.info, Node: Z8000-Regs, Next: Z8000-Addressing, Prev: Z8000-Chars, Up: Z8000 Syntax
19286 9.45.2.2 Register Names
19287 .......................
19289 The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
19290 to different sized groups of registers by register number, with the
19291 prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for
19292 64 bit registers. You can also refer to the contents of the first
19293 eight (of the sixteen 16 bit registers) by bytes. They are named `rlN'
19297 rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3
19298 rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7
19301 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
19303 _long word registers_
19304 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
19306 _quad word registers_
19310 File: as.info, Node: Z8000-Addressing, Prev: Z8000-Regs, Up: Z8000 Syntax
19312 9.45.2.3 Addressing Modes
19313 .........................
19315 as understands the following addressing modes for the Z8000:
19322 Register direct: 8bit, 16bit, 32bit, and 64bit registers.
19326 Indirect register: @rrN in segmented mode, @rN in unsegmented
19330 Direct: the 16 bit or 24 bit address (depending on whether the
19331 assembler is in segmented or unsegmented mode) of the operand is
19332 in the instruction.
19335 Indexed: the 16 or 24 bit address is added to the 16 bit register
19336 to produce the final address in memory of the operand.
19340 Base Address: the 16 or 24 bit register is added to the 16 bit sign
19341 extended immediate displacement to produce the final address in
19342 memory of the operand.
19346 Base Index: the 16 or 24 bit register rN or rrN is added to the
19347 sign extended 16 bit index register rM to produce the final
19348 address in memory of the operand.
19354 File: as.info, Node: Z8000 Directives, Next: Z8000 Opcodes, Prev: Z8000 Syntax, Up: Z8000-Dependent
19356 9.45.3 Assembler Directives for the Z8000
19357 -----------------------------------------
19359 The Z8000 port of as includes additional assembler directives, for
19360 compatibility with other Z8000 assemblers. These do not begin with `.'
19361 (unlike the ordinary as directives).
19365 Generate code for the segmented Z8001.
19369 Generate code for the unsegmented Z8002.
19372 Synonym for `.file'
19375 Synonym for `.global'
19378 Synonym for `.word'
19381 Synonym for `.long'
19384 Synonym for `.byte'
19387 Assemble a string. `sval' expects one string literal, delimited by
19388 single quotes. It assembles each byte of the string into
19389 consecutive addresses. You can use the escape sequence `%XX'
19390 (where XX represents a two-digit hexadecimal number) to represent
19391 the character whose ASCII value is XX. Use this feature to
19392 describe single quote and other characters that may not appear in
19393 string literals as themselves. For example, the C statement
19394 `char *a = "he said \"it's 50% off\"";' is represented in Z8000
19395 assembly language (shown with the assembler output in hex at the
19398 68652073 sval 'he said %22it%27s 50%25 off%22%00'
19406 synonym for `.section'
19409 synonym for `.space'
19412 special case of `.align'; aligns output to even byte boundary.
19415 File: as.info, Node: Z8000 Opcodes, Prev: Z8000 Directives, Up: Z8000-Dependent
19420 For detailed information on the Z8000 machine instruction set, see
19421 `Z8000 Technical Manual'.
19423 The following table summarizes the opcodes and their arguments:
19425 rs 16 bit source register
19426 rd 16 bit destination register
19427 rbs 8 bit source register
19428 rbd 8 bit destination register
19429 rrs 32 bit source register
19430 rrd 32 bit destination register
19431 rqs 64 bit source register
19432 rqd 64 bit destination register
19433 addr 16/24 bit address
19436 adc rd,rs clrb addr cpsir @rd,@rs,rr,cc
19437 adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc
19438 add rd,@rs clrb rbd dab rbd
19439 add rd,addr com @rd dbjnz rbd,disp7
19440 add rd,addr(rs) com addr dec @rd,imm4m1
19441 add rd,imm16 com addr(rd) dec addr(rd),imm4m1
19442 add rd,rs com rd dec addr,imm4m1
19443 addb rbd,@rs comb @rd dec rd,imm4m1
19444 addb rbd,addr comb addr decb @rd,imm4m1
19445 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
19446 addb rbd,imm8 comb rbd decb addr,imm4m1
19447 addb rbd,rbs comflg flags decb rbd,imm4m1
19448 addl rrd,@rs cp @rd,imm16 di i2
19449 addl rrd,addr cp addr(rd),imm16 div rrd,@rs
19450 addl rrd,addr(rs) cp addr,imm16 div rrd,addr
19451 addl rrd,imm32 cp rd,@rs div rrd,addr(rs)
19452 addl rrd,rrs cp rd,addr div rrd,imm16
19453 and rd,@rs cp rd,addr(rs) div rrd,rs
19454 and rd,addr cp rd,imm16 divl rqd,@rs
19455 and rd,addr(rs) cp rd,rs divl rqd,addr
19456 and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs)
19457 and rd,rs cpb addr(rd),imm8 divl rqd,imm32
19458 andb rbd,@rs cpb addr,imm8 divl rqd,rrs
19459 andb rbd,addr cpb rbd,@rs djnz rd,disp7
19460 andb rbd,addr(rs) cpb rbd,addr ei i2
19461 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs
19462 andb rbd,rbs cpb rbd,imm8 ex rd,addr
19463 bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs)
19464 bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs
19465 bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs
19466 bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr
19467 bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs)
19468 bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs
19469 bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8
19470 bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8
19471 bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8
19472 bitb rbd,rs cpl rrd,@rs ext8f imm8
19473 bpt cpl rrd,addr exts rrd
19474 call @rd cpl rrd,addr(rs) extsb rd
19475 call addr cpl rrd,imm32 extsl rqd
19476 call addr(rd) cpl rrd,rrs halt
19477 calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs
19478 clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16
19479 clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs
19480 clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16
19481 clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1
19482 clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1
19483 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
19484 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
19485 incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
19486 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs
19487 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
19488 incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs)
19489 ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32
19490 indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs
19491 inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd
19492 inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr
19493 iret ldib @rd,@rs,rr neg addr(rd)
19494 jp cc,@rd ldir @rd,@rs,rr neg rd
19495 jp cc,addr ldirb @rd,@rs,rr negb @rd
19496 jp cc,addr(rd) ldk rd,imm4 negb addr
19497 jr cc,disp8 ldl @rd,rrs negb addr(rd)
19498 ld @rd,imm16 ldl addr(rd),rrs negb rbd
19499 ld @rd,rs ldl addr,rrs nop
19500 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs
19501 ld addr(rd),rs ldl rd(rx),rrs or rd,addr
19502 ld addr,imm16 ldl rrd,@rs or rd,addr(rs)
19503 ld addr,rs ldl rrd,addr or rd,imm16
19504 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
19505 ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs
19506 ld rd,@rs ldl rrd,rrs orb rbd,addr
19507 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
19508 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
19509 ld rd,imm16 ldm @rd,rs,n orb rbd,rbs
19510 ld rd,rs ldm addr(rd),rs,n out @rd,rs
19511 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
19512 ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs
19513 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
19514 lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra
19515 lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba
19516 lda rd,rs(rx) ldps addr outib @rd,@rs,ra
19517 ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra
19518 ldb @rd,imm8 ldr disp16,rs pop @rd,@rs
19519 ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs
19520 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs
19521 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs
19522 ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs
19523 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs
19524 ldb rbd,@rs mbit popl addr,@rs
19525 ldb rbd,addr mreq rd popl rrd,@rs
19526 ldb rbd,addr(rs) mres push @rd,@rs
19527 ldb rbd,imm8 mset push @rd,addr
19528 ldb rbd,rbs mult rrd,@rs push @rd,addr(rs)
19529 ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16
19530 push @rd,rs set addr,imm4 subl rrd,imm32
19531 pushl @rd,@rs set rd,imm4 subl rrd,rrs
19532 pushl @rd,addr set rd,rs tcc cc,rd
19533 pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd
19534 pushl @rd,rrs setb addr(rd),imm4 test @rd
19535 res @rd,imm4 setb addr,imm4 test addr
19536 res addr(rd),imm4 setb rbd,imm4 test addr(rd)
19537 res addr,imm4 setb rbd,rs test rd
19538 res rd,imm4 setflg imm4 testb @rd
19539 res rd,rs sinb rbd,imm16 testb addr
19540 resb @rd,imm4 sinb rd,imm16 testb addr(rd)
19541 resb addr(rd),imm4 sind @rd,@rs,ra testb rbd
19542 resb addr,imm4 sindb @rd,@rs,rba testl @rd
19543 resb rbd,imm4 sinib @rd,@rs,ra testl addr
19544 resb rbd,rs sinibr @rd,@rs,ra testl addr(rd)
19545 resflg imm4 sla rd,imm8 testl rrd
19546 ret cc slab rbd,imm8 trdb @rd,@rs,rba
19547 rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba
19548 rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr
19549 rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr
19550 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr
19551 rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr
19552 rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr
19553 rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr
19554 rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd
19555 rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr
19556 rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd)
19557 rsvd36 sra rd,imm8 tset rd
19558 rsvd38 srab rbd,imm8 tsetb @rd
19559 rsvd78 sral rrd,imm8 tsetb addr
19560 rsvd7e srl rd,imm8 tsetb addr(rd)
19561 rsvd9d srlb rbd,imm8 tsetb rbd
19562 rsvd9f srll rrd,imm8 xor rd,@rs
19563 rsvdb9 sub rd,@rs xor rd,addr
19564 rsvdbf sub rd,addr xor rd,addr(rs)
19565 sbc rd,rs sub rd,addr(rs) xor rd,imm16
19566 sbcb rbd,rbs sub rd,imm16 xor rd,rs
19567 sc imm8 sub rd,rs xorb rbd,@rs
19568 sda rd,rs subb rbd,@rs xorb rbd,addr
19569 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
19570 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
19571 sdl rd,rs subb rbd,imm8 xorb rbd,rbs
19572 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
19573 sdll rrd,rs subl rrd,@rs
19574 set @rd,imm4 subl rrd,addr
19575 set addr(rd),imm4 subl rrd,addr(rs)
19578 File: as.info, Node: Vax-Dependent, Prev: Z8000-Dependent, Up: Machine Dependencies
19580 9.46 VAX Dependent Features
19581 ===========================
19585 * VAX-Opts:: VAX Command-Line Options
19586 * VAX-float:: VAX Floating Point
19587 * VAX-directives:: Vax Machine Directives
19588 * VAX-opcodes:: VAX Opcodes
19589 * VAX-branch:: VAX Branch Improvement
19590 * VAX-operands:: VAX Operands
19591 * VAX-no:: Not Supported on VAX
19592 * VAX-Syntax:: VAX Syntax
19595 File: as.info, Node: VAX-Opts, Next: VAX-float, Up: Vax-Dependent
19597 9.46.1 VAX Command-Line Options
19598 -------------------------------
19600 The Vax version of `as' accepts any of the following options, gives a
19601 warning message that the option was ignored and proceeds. These
19602 options are for compatibility with scripts designed for other people's
19606 ``-S' (Symbol Table)'
19607 ``-T' (Token Trace)'
19608 These are obsolete options used to debug old assemblers.
19610 ``-d' (Displacement size for JUMPs)'
19611 This option expects a number following the `-d'. Like options
19612 that expect filenames, the number may immediately follow the `-d'
19613 (old standard) or constitute the whole of the command line
19614 argument that follows `-d' (GNU standard).
19616 ``-V' (Virtualize Interpass Temporary File)'
19617 Some other assemblers use a temporary file. This option commanded
19618 them to keep the information in active memory rather than in a
19619 disk file. `as' always does this, so this option is redundant.
19621 ``-J' (JUMPify Longer Branches)'
19622 Many 32-bit computers permit a variety of branch instructions to
19623 do the same job. Some of these instructions are short (and fast)
19624 but have a limited range; others are long (and slow) but can
19625 branch anywhere in virtual memory. Often there are 3 flavors of
19626 branch: short, medium and long. Some other assemblers would emit
19627 short and medium branches, unless told by this option to emit
19628 short and long branches.
19630 ``-t' (Temporary File Directory)'
19631 Some other assemblers may use a temporary file, and this option
19632 takes a filename being the directory to site the temporary file.
19633 Since `as' does not use a temporary disk file, this option makes
19634 no difference. `-t' needs exactly one filename.
19636 The Vax version of the assembler accepts additional options when
19640 External symbol or section (used for global variables) names are
19641 not case sensitive on VAX/VMS and always mapped to upper case.
19642 This is contrary to the C language definition which explicitly
19643 distinguishes upper and lower case. To implement a standard
19644 conforming C compiler, names must be changed (mapped) to preserve
19645 the case information. The default mapping is to convert all lower
19646 case characters to uppercase and adding an underscore followed by
19647 a 6 digit hex value, representing a 24 digit binary value. The
19648 one digits in the binary value represent which characters are
19649 uppercase in the original symbol name.
19651 The `-h N' option determines how we map names. This takes several
19652 values. No `-h' switch at all allows case hacking as described
19653 above. A value of zero (`-h0') implies names should be upper
19654 case, and inhibits the case hack. A value of 2 (`-h2') implies
19655 names should be all lower case, with no case hack. A value of 3
19656 (`-h3') implies that case should be preserved. The value 1 is
19657 unused. The `-H' option directs `as' to display every mapped
19658 symbol during assembly.
19660 Symbols whose names include a dollar sign `$' are exceptions to the
19661 general name mapping. These symbols are normally only used to
19662 reference VMS library names. Such symbols are always mapped to
19666 The `-+' option causes `as' to truncate any symbol name larger
19667 than 31 characters. The `-+' option also prevents some code
19668 following the `_main' symbol normally added to make the object
19669 file compatible with Vax-11 "C".
19672 This option is ignored for backward compatibility with `as'
19676 The `-H' option causes `as' to print every symbol which was
19677 changed by case mapping.
19680 File: as.info, Node: VAX-float, Next: VAX-directives, Prev: VAX-Opts, Up: Vax-Dependent
19682 9.46.2 VAX Floating Point
19683 -------------------------
19685 Conversion of flonums to floating point is correct, and compatible with
19686 previous assemblers. Rounding is towards zero if the remainder is
19687 exactly half the least significant bit.
19689 `D', `F', `G' and `H' floating point formats are understood.
19691 Immediate floating literals (_e.g._ `S`$6.9') are rendered
19692 correctly. Again, rounding is towards zero in the boundary case.
19694 The `.float' directive produces `f' format numbers. The `.double'
19695 directive produces `d' format numbers.
19698 File: as.info, Node: VAX-directives, Next: VAX-opcodes, Prev: VAX-float, Up: Vax-Dependent
19700 9.46.3 Vax Machine Directives
19701 -----------------------------
19703 The Vax version of the assembler supports four directives for
19704 generating Vax floating point constants. They are described in the
19708 This expects zero or more flonums, separated by commas, and
19709 assembles Vax `d' format 64-bit floating point constants.
19712 This expects zero or more flonums, separated by commas, and
19713 assembles Vax `f' format 32-bit floating point constants.
19716 This expects zero or more flonums, separated by commas, and
19717 assembles Vax `g' format 64-bit floating point constants.
19720 This expects zero or more flonums, separated by commas, and
19721 assembles Vax `h' format 128-bit floating point constants.
19725 File: as.info, Node: VAX-opcodes, Next: VAX-branch, Prev: VAX-directives, Up: Vax-Dependent
19730 All DEC mnemonics are supported. Beware that `case...' instructions
19731 have exactly 3 operands. The dispatch table that follows the `case...'
19732 instruction should be made with `.word' statements. This is compatible
19733 with all unix assemblers we know of.
19736 File: as.info, Node: VAX-branch, Next: VAX-operands, Prev: VAX-opcodes, Up: Vax-Dependent
19738 9.46.5 VAX Branch Improvement
19739 -----------------------------
19741 Certain pseudo opcodes are permitted. They are for branch
19742 instructions. They expand to the shortest branch instruction that
19743 reaches the target. Generally these mnemonics are made by substituting
19744 `j' for `b' at the start of a DEC mnemonic. This feature is included
19745 both for compatibility and to help compilers. If you do not need this
19746 feature, avoid these opcodes. Here are the mnemonics, and the code
19747 they can expand into.
19750 `Jsb' is already an instruction mnemonic, so we chose `jbsb'.
19751 (byte displacement)
19754 (word displacement)
19757 (long displacement)
19762 Unconditional branch.
19763 (byte displacement)
19766 (word displacement)
19769 (long displacement)
19773 COND may be any one of the conditional branches `neq', `nequ',
19774 `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs',
19775 `gequ', `cc', `lssu', `cs'. COND may also be one of the bit tests
19776 `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs',
19777 `lbc'. NOTCOND is the opposite condition to COND.
19778 (byte displacement)
19781 (word displacement)
19782 `bNOTCOND foo ; brw ... ; foo:'
19784 (long displacement)
19785 `bNOTCOND foo ; jmp ... ; foo:'
19788 X may be one of `b d f g h l w'.
19789 (word displacement)
19792 (long displacement)
19799 YYY may be one of `lss leq'.
19802 ZZZ may be one of `geq gtr'.
19803 (byte displacement)
19806 (word displacement)
19809 foo: brw DESTINATION ;
19812 (long displacement)
19815 foo: jmp DESTINATION ;
19823 (byte displacement)
19826 (word displacement)
19829 foo: brw DESTINATION ;
19832 (long displacement)
19835 foo: jmp DESTINATION ;
19839 File: as.info, Node: VAX-operands, Next: VAX-no, Prev: VAX-branch, Up: Vax-Dependent
19841 9.46.6 VAX Operands
19842 -------------------
19844 The immediate character is `$' for Unix compatibility, not `#' as DEC
19847 The indirect character is `*' for Unix compatibility, not `@' as DEC
19850 The displacement sizing character is ``' (an accent grave) for Unix
19851 compatibility, not `^' as DEC writes it. The letter preceding ``' may
19852 have either case. `G' is not understood, but all other letters (`b i l
19853 s w') are understood.
19855 Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'. Upper
19856 and lower case letters are equivalent.
19861 Any expression is permitted in an operand. Operands are comma
19865 File: as.info, Node: VAX-no, Next: VAX-Syntax, Prev: VAX-operands, Up: Vax-Dependent
19867 9.46.7 Not Supported on VAX
19868 ---------------------------
19870 Vax bit fields can not be assembled with `as'. Someone can add the
19871 required code if they really need it.
19874 File: as.info, Node: VAX-Syntax, Prev: VAX-no, Up: Vax-Dependent
19881 * VAX-Chars:: Special Characters
19884 File: as.info, Node: VAX-Chars, Up: VAX-Syntax
19886 9.46.8.1 Special Characters
19887 ...........................
19889 The presence of a `#' appearing anywhere on a line indicates the start
19890 of a comment that extends to the end of that line.
19892 If a `#' appears as the first character of a line then the whole
19893 line is treated as a comment, but in this case the line can also be a
19894 logical line number directive (*note Comments::) or a preprocessor
19895 control command (*note Preprocessing::).
19897 The `;' character can be used to separate statements on the same
19901 File: as.info, Node: V850-Dependent, Next: XGATE-Dependent, Prev: TILEPro-Dependent, Up: Machine Dependencies
19903 9.47 v850 Dependent Features
19904 ============================
19908 * V850 Options:: Options
19909 * V850 Syntax:: Syntax
19910 * V850 Floating Point:: Floating Point
19911 * V850 Directives:: V850 Machine Directives
19912 * V850 Opcodes:: Opcodes
19915 File: as.info, Node: V850 Options, Next: V850 Syntax, Up: V850-Dependent
19920 `as' supports the following additional command-line options for the
19921 V850 processor family:
19923 `-wsigned_overflow'
19924 Causes warnings to be produced when signed immediate values
19925 overflow the space available for then within their opcodes. By
19926 default this option is disabled as it is possible to receive
19927 spurious warnings due to using exact bit patterns as immediate
19930 `-wunsigned_overflow'
19931 Causes warnings to be produced when unsigned immediate values
19932 overflow the space available for then within their opcodes. By
19933 default this option is disabled as it is possible to receive
19934 spurious warnings due to using exact bit patterns as immediate
19938 Specifies that the assembled code should be marked as being
19939 targeted at the V850 processor. This allows the linker to detect
19940 attempts to link such code with code assembled for other
19944 Specifies that the assembled code should be marked as being
19945 targeted at the V850E processor. This allows the linker to detect
19946 attempts to link such code with code assembled for other
19950 Specifies that the assembled code should be marked as being
19951 targeted at the V850E1 processor. This allows the linker to
19952 detect attempts to link such code with code assembled for other
19956 Specifies that the assembled code should be marked as being
19957 targeted at the V850 processor but support instructions that are
19958 specific to the extended variants of the process. This allows the
19959 production of binaries that contain target specific code, but
19960 which are also intended to be used in a generic fashion. For
19961 example libgcc.a contains generic routines used by the code
19962 produced by GCC for all versions of the v850 architecture,
19963 together with support routines only used by the V850E architecture.
19966 Specifies that the assembled code should be marked as being
19967 targeted at the V850E2 processor. This allows the linker to
19968 detect attempts to link such code with code assembled for other
19972 Specifies that the assembled code should be marked as being
19973 targeted at the V850E2V3 processor. This allows the linker to
19974 detect attempts to link such code with code assembled for other
19978 Enables relaxation. This allows the .longcall and .longjump pseudo
19979 ops to be used in the assembler source code. These ops label
19980 sections of code which are either a long function call or a long
19981 branch. The assembler will then flag these sections of code and
19982 the linker will attempt to relax them.
19986 File: as.info, Node: V850 Syntax, Next: V850 Floating Point, Prev: V850 Options, Up: V850-Dependent
19993 * V850-Chars:: Special Characters
19994 * V850-Regs:: Register Names
19997 File: as.info, Node: V850-Chars, Next: V850-Regs, Up: V850 Syntax
19999 9.47.2.1 Special Characters
20000 ...........................
20002 `#' is the line comment character. If a `#' appears as the first
20003 character of a line, the whole line is treated as a comment, but in
20004 this case the line can also be a logical line number directive (*note
20005 Comments::) or a preprocessor control command (*note Preprocessing::).
20007 Two dashes (`--') can also be used to start a line comment.
20009 The `;' character can be used to separate statements on the same
20013 File: as.info, Node: V850-Regs, Prev: V850-Chars, Up: V850 Syntax
20015 9.47.2.2 Register Names
20016 .......................
20018 `as' supports the following names for registers:
20019 `general register 0'
20022 `general register 1'
20025 `general register 2'
20028 `general register 3'
20031 `general register 4'
20034 `general register 5'
20037 `general register 6'
20040 `general register 7'
20043 `general register 8'
20046 `general register 9'
20049 `general register 10'
20052 `general register 11'
20055 `general register 12'
20058 `general register 13'
20061 `general register 14'
20064 `general register 15'
20067 `general register 16'
20070 `general register 17'
20073 `general register 18'
20076 `general register 19'
20079 `general register 20'
20082 `general register 21'
20085 `general register 22'
20088 `general register 23'
20091 `general register 24'
20094 `general register 25'
20097 `general register 26'
20100 `general register 27'
20103 `general register 28'
20106 `general register 29'
20109 `general register 30'
20112 `general register 31'
20115 `system register 0'
20118 `system register 1'
20121 `system register 2'
20124 `system register 3'
20127 `system register 4'
20130 `system register 5'
20133 `system register 16'
20136 `system register 17'
20139 `system register 18'
20142 `system register 19'
20145 `system register 20'
20149 File: as.info, Node: V850 Floating Point, Next: V850 Directives, Prev: V850 Syntax, Up: V850-Dependent
20151 9.47.3 Floating Point
20152 ---------------------
20154 The V850 family uses IEEE floating-point numbers.
20157 File: as.info, Node: V850 Directives, Next: V850 Opcodes, Prev: V850 Floating Point, Up: V850-Dependent
20159 9.47.4 V850 Machine Directives
20160 ------------------------------
20162 `.offset <EXPRESSION>'
20163 Moves the offset into the current section to the specified amount.
20165 `.section "name", <type>'
20166 This is an extension to the standard .section directive. It sets
20167 the current section to be <type> and creates an alias for this
20168 section called "name".
20171 Specifies that the assembled code should be marked as being
20172 targeted at the V850 processor. This allows the linker to detect
20173 attempts to link such code with code assembled for other
20177 Specifies that the assembled code should be marked as being
20178 targeted at the V850E processor. This allows the linker to detect
20179 attempts to link such code with code assembled for other
20183 Specifies that the assembled code should be marked as being
20184 targeted at the V850E1 processor. This allows the linker to
20185 detect attempts to link such code with code assembled for other
20189 Specifies that the assembled code should be marked as being
20190 targeted at the V850E2 processor. This allows the linker to
20191 detect attempts to link such code with code assembled for other
20195 Specifies that the assembled code should be marked as being
20196 targeted at the V850E2V3 processor. This allows the linker to
20197 detect attempts to link such code with code assembled for other
20202 File: as.info, Node: V850 Opcodes, Prev: V850 Directives, Up: V850-Dependent
20207 `as' implements all the standard V850 opcodes.
20209 `as' also implements the following pseudo ops:
20212 Computes the higher 16 bits of the given expression and stores it
20213 into the immediate operand field of the given instruction. For
20216 `mulhi hi0(here - there), r5, r6'
20218 computes the difference between the address of labels 'here' and
20219 'there', takes the upper 16 bits of this difference, shifts it
20220 down 16 bits and then multiplies it by the lower 16 bits in
20221 register 5, putting the result into register 6.
20224 Computes the lower 16 bits of the given expression and stores it
20225 into the immediate operand field of the given instruction. For
20228 `addi lo(here - there), r5, r6'
20230 computes the difference between the address of labels 'here' and
20231 'there', takes the lower 16 bits of this difference and adds it to
20232 register 5, putting the result into register 6.
20235 Computes the higher 16 bits of the given expression and then adds
20236 the value of the most significant bit of the lower 16 bits of the
20237 expression and stores the result into the immediate operand field
20238 of the given instruction. For example the following code can be
20239 used to compute the address of the label 'here' and store it into
20242 `movhi hi(here), r0, r6' `movea lo(here), r6, r6'
20244 The reason for this special behaviour is that movea performs a sign
20245 extension on its immediate operand. So for example if the address
20246 of 'here' was 0xFFFFFFFF then without the special behaviour of the
20247 hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6,
20248 then the movea instruction would takes its immediate operand,
20249 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it
20250 into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E).
20251 With the hi() pseudo op adding in the top bit of the lo() pseudo
20252 op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 =
20253 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 -
20257 Computes the 32 bit value of the given expression and stores it
20258 into the immediate operand field of the given instruction (which
20259 must be a mov instruction). For example:
20261 `mov hilo(here), r6'
20263 computes the absolute address of label 'here' and puts the result
20267 Computes the offset of the named variable from the start of the
20268 Small Data Area (whoes address is held in register 4, the GP
20269 register) and stores the result as a 16 bit signed value in the
20270 immediate operand field of the given instruction. For example:
20272 `ld.w sdaoff(_a_variable)[gp],r6'
20274 loads the contents of the location pointed to by the label
20275 '_a_variable' into register 6, provided that the label is located
20276 somewhere within +/- 32K of the address held in the GP register.
20277 [Note the linker assumes that the GP register contains a fixed
20278 address set to the address of the label called '__gp'. This can
20279 either be set up automatically by the linker, or specifically set
20280 by using the `--defsym __gp=<value>' command line option].
20283 Computes the offset of the named variable from the start of the
20284 Tiny Data Area (whoes address is held in register 30, the EP
20285 register) and stores the result as a 4,5, 7 or 8 bit unsigned
20286 value in the immediate operand field of the given instruction.
20289 `sld.w tdaoff(_a_variable)[ep],r6'
20291 loads the contents of the location pointed to by the label
20292 '_a_variable' into register 6, provided that the label is located
20293 somewhere within +256 bytes of the address held in the EP
20294 register. [Note the linker assumes that the EP register contains
20295 a fixed address set to the address of the label called '__ep'.
20296 This can either be set up automatically by the linker, or
20297 specifically set by using the `--defsym __ep=<value>' command line
20301 Computes the offset of the named variable from address 0 and
20302 stores the result as a 16 bit signed value in the immediate
20303 operand field of the given instruction. For example:
20305 `movea zdaoff(_a_variable),zero,r6'
20307 puts the address of the label '_a_variable' into register 6,
20308 assuming that the label is somewhere within the first 32K of
20309 memory. (Strictly speaking it also possible to access the last
20310 32K of memory as well, as the offsets are signed).
20313 Computes the offset of the named variable from the start of the
20314 Call Table Area (whoes address is helg in system register 20, the
20315 CTBP register) and stores the result a 6 or 16 bit unsigned value
20316 in the immediate field of then given instruction or piece of data.
20319 `callt ctoff(table_func1)'
20321 will put the call the function whoes address is held in the call
20322 table at the location labeled 'table_func1'.
20325 Indicates that the following sequence of instructions is a long
20326 call to function `name'. The linker will attempt to shorten this
20327 call sequence if `name' is within a 22bit offset of the call. Only
20328 valid if the `-mrelax' command line switch has been enabled.
20331 Indicates that the following sequence of instructions is a long
20332 jump to label `name'. The linker will attempt to shorten this code
20333 sequence if `name' is within a 22bit offset of the jump. Only
20334 valid if the `-mrelax' command line switch has been enabled.
20337 For information on the V850 instruction set, see `V850 Family
20338 32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC.
20342 File: as.info, Node: XGATE-Dependent, Next: XSTORMY16-Dependent, Prev: V850-Dependent, Up: Machine Dependencies
20344 9.48 XGATE Dependent Features
20345 =============================
20349 * XGATE-Opts:: XGATE Options
20350 * XGATE-Syntax:: Syntax
20351 * XGATE-Directives:: Assembler Directives
20352 * XGATE-Float:: Floating Point
20353 * XGATE-opcodes:: Opcodes
20356 File: as.info, Node: XGATE-Opts, Next: XGATE-Syntax, Up: XGATE-Dependent
20358 9.48.1 XGATE Options
20359 --------------------
20361 The Freescale XGATE version of `as' has a few machine dependent options.
20364 This option controls the ABI and indicates to use a 16-bit integer
20365 ABI. It has no effect on the assembled instructions. This is the
20369 This option controls the ABI and indicates to use a 32-bit integer
20373 This option controls the ABI and indicates to use a 32-bit float
20374 ABI. This is the default.
20377 This option controls the ABI and indicates to use a 64-bit float
20380 `--print-insn-syntax'
20381 You can use the `--print-insn-syntax' option to obtain the syntax
20382 description of the instruction when an error is detected.
20385 The `--print-opcodes' option prints the list of all the
20386 instructions with their syntax. Once the list is printed `as'
20391 File: as.info, Node: XGATE-Syntax, Next: XGATE-Directives, Prev: XGATE-Opts, Up: XGATE-Dependent
20396 In XGATE RISC syntax, the instruction name comes first and it may be
20397 followed by up to three operands. Operands are separated by commas
20398 (`,'). `as' will complain if too many operands are specified for a
20399 given instruction. The same will happen if you specified too few
20406 The presence of a `;' character or a `!' character anywhere on a
20407 line indicates the start of a comment that extends to the end of that
20410 A `*' or a `#' character at the start of a line also introduces a
20411 line comment, but these characters do not work elsewhere on the line.
20412 If the first character of the line is a `#' then as well as starting a
20413 comment, the line could also be logical line number directive (*note
20414 Comments::) or a preprocessor control command (*note Preprocessing::).
20416 The XGATE assembler does not currently support a line separator
20419 The following addressing modes are understood for XGATE:
20423 "Immediate 3 Bit Wide"
20426 "Immediate 4 Bit Wide"
20429 "Immediate 8 Bit Wide"
20432 "Monadic Addressing"
20435 "Dyadic Addressing"
20438 "Triadic Addressing"
20441 "Relative Addressing 9 Bit Wide"
20444 "Relative Addressing 10 Bit Wide"
20447 "Index Register plus Immediate Offset"
20448 `REG, (REG, #NUMBER)'
20450 "Index Register plus Register Offset"
20453 "Index Register plus Register Offset with Post-increment"
20456 "Index Register plus Register Offset with Pre-decrement"
20459 The register can be either `R0', `R1', `R2', `R3', `R4', `R5',
20463 Convience macro opcodes to deal with 16-bit values have been added.
20465 "Immediate 16 Bit Wide"
20466 `#NUMBER', or `*SYMBOL'
20477 File: as.info, Node: XGATE-Directives, Next: XGATE-Float, Prev: XGATE-Syntax, Up: XGATE-Dependent
20479 9.48.3 Assembler Directives
20480 ---------------------------
20482 The XGATE version of `as' have the following specific assembler
20486 File: as.info, Node: XGATE-Float, Next: XGATE-opcodes, Prev: XGATE-Directives, Up: XGATE-Dependent
20488 9.48.4 Floating Point
20489 ---------------------
20491 Packed decimal (P) format floating literals are not supported(yet).
20493 The floating point formats generated by directives are these.
20496 `Single' precision floating point constants.
20499 `Double' precision floating point constants.
20503 `Extended' precision (`long double') floating point constants.
20506 File: as.info, Node: XGATE-opcodes, Prev: XGATE-Float, Up: XGATE-Dependent
20512 File: as.info, Node: XSTORMY16-Dependent, Next: Xtensa-Dependent, Prev: XGATE-Dependent, Up: Machine Dependencies
20514 9.49 XStormy16 Dependent Features
20515 =================================
20519 * XStormy16 Syntax:: Syntax
20520 * XStormy16 Directives:: Machine Directives
20521 * XStormy16 Opcodes:: Pseudo-Opcodes
20524 File: as.info, Node: XStormy16 Syntax, Next: XStormy16 Directives, Up: XSTORMY16-Dependent
20531 * XStormy16-Chars:: Special Characters
20534 File: as.info, Node: XStormy16-Chars, Up: XStormy16 Syntax
20536 9.49.1.1 Special Characters
20537 ...........................
20539 `#' is the line comment character. If a `#' appears as the first
20540 character of a line, the whole line is treated as a comment, but in
20541 this case the line can also be a logical line number directive (*note
20542 Comments::) or a preprocessor control command (*note Preprocessing::).
20544 A semicolon (`;') can be used to start a comment that extends from
20545 wherever the character appears on the line up to the end of the line.
20547 The `|' character can be used to separate statements on the same
20551 File: as.info, Node: XStormy16 Directives, Next: XStormy16 Opcodes, Prev: XStormy16 Syntax, Up: XSTORMY16-Dependent
20553 9.49.2 XStormy16 Machine Directives
20554 -----------------------------------
20557 Like the `--16bit-pointers' command line option this directive
20558 indicates that the assembly code makes use of 16-bit pointers.
20561 Like the `--32bit-pointers' command line option this directive
20562 indicates that the assembly code makes use of 32-bit pointers.
20565 Like the `--no-pointers' command line option this directive
20566 indicates that the assembly code does not makes use pointers.
20570 File: as.info, Node: XStormy16 Opcodes, Prev: XStormy16 Directives, Up: XSTORMY16-Dependent
20572 9.49.3 XStormy16 Pseudo-Opcodes
20573 -------------------------------
20575 `as' implements all the standard XStormy16 opcodes.
20577 `as' also implements the following pseudo ops:
20580 Computes the lower 16 bits of the given expression and stores it
20581 into the immediate operand field of the given instruction. For
20584 `add r6, @lo(here - there)'
20586 computes the difference between the address of labels 'here' and
20587 'there', takes the lower 16 bits of this difference and adds it to
20591 Computes the higher 16 bits of the given expression and stores it
20592 into the immediate operand field of the given instruction. For
20595 `addc r7, @hi(here - there)'
20597 computes the difference between the address of labels 'here' and
20598 'there', takes the upper 16 bits of this difference, shifts it
20599 down 16 bits and then adds it, along with the carry bit, to the
20600 value in register 7.
20604 File: as.info, Node: Xtensa-Dependent, Next: Z80-Dependent, Prev: XSTORMY16-Dependent, Up: Machine Dependencies
20606 9.50 Xtensa Dependent Features
20607 ==============================
20609 This chapter covers features of the GNU assembler that are specific
20610 to the Xtensa architecture. For details about the Xtensa instruction
20611 set, please consult the `Xtensa Instruction Set Architecture (ISA)
20616 * Xtensa Options:: Command-line Options.
20617 * Xtensa Syntax:: Assembler Syntax for Xtensa Processors.
20618 * Xtensa Optimizations:: Assembler Optimizations.
20619 * Xtensa Relaxation:: Other Automatic Transformations.
20620 * Xtensa Directives:: Directives for Xtensa Processors.
20623 File: as.info, Node: Xtensa Options, Next: Xtensa Syntax, Up: Xtensa-Dependent
20625 9.50.1 Command Line Options
20626 ---------------------------
20628 `--text-section-literals | --no-text-section-literals'
20629 Control the treatment of literal pools. The default is
20630 `--no-text-section-literals', which places literals in separate
20631 sections in the output file. This allows the literal pool to be
20632 placed in a data RAM/ROM. With `--text-section-literals', the
20633 literals are interspersed in the text section in order to keep
20634 them as close as possible to their references. This may be
20635 necessary for large assembly files, where the literals would
20636 otherwise be out of range of the `L32R' instructions in the text
20637 section. These options only affect literals referenced via
20638 PC-relative `L32R' instructions; literals for absolute mode `L32R'
20639 instructions are handled separately. *Note literal: Literal
20642 `--absolute-literals | --no-absolute-literals'
20643 Indicate to the assembler whether `L32R' instructions use absolute
20644 or PC-relative addressing. If the processor includes the absolute
20645 addressing option, the default is to use absolute `L32R'
20646 relocations. Otherwise, only the PC-relative `L32R' relocations
20649 `--target-align | --no-target-align'
20650 Enable or disable automatic alignment to reduce branch penalties
20651 at some expense in code size. *Note Automatic Instruction
20652 Alignment: Xtensa Automatic Alignment. This optimization is
20653 enabled by default. Note that the assembler will always align
20654 instructions like `LOOP' that have fixed alignment requirements.
20656 `--longcalls | --no-longcalls'
20657 Enable or disable transformation of call instructions to allow
20658 calls across a greater range of addresses. *Note Function Call
20659 Relaxation: Xtensa Call Relaxation. This option should be used
20660 when call targets can potentially be out of range. It may degrade
20661 both code size and performance, but the linker can generally
20662 optimize away the unnecessary overhead when a call ends up within
20663 range. The default is `--no-longcalls'.
20665 `--transform | --no-transform'
20666 Enable or disable all assembler transformations of Xtensa
20667 instructions, including both relaxation and optimization. The
20668 default is `--transform'; `--no-transform' should only be used in
20669 the rare cases when the instructions must be exactly as specified
20670 in the assembly source. Using `--no-transform' causes out of range
20671 instruction operands to be errors.
20673 `--rename-section OLDNAME=NEWNAME'
20674 Rename the OLDNAME section to NEWNAME. This option can be used
20675 multiple times to rename multiple sections.
20678 File: as.info, Node: Xtensa Syntax, Next: Xtensa Optimizations, Prev: Xtensa Options, Up: Xtensa-Dependent
20680 9.50.2 Assembler Syntax
20681 -----------------------
20683 Block comments are delimited by `/*' and `*/'. End of line comments
20684 may be introduced with either `#' or `//'.
20686 If a `#' appears as the first character of a line then the whole
20687 line is treated as a comment, but in this case the line could also be a
20688 logical line number directive (*note Comments::) or a preprocessor
20689 control command (*note Preprocessing::).
20691 Instructions consist of a leading opcode or macro name followed by
20692 whitespace and an optional comma-separated list of operands:
20694 OPCODE [OPERAND, ...]
20696 Instructions must be separated by a newline or semicolon (`;').
20698 FLIX instructions, which bundle multiple opcodes together in a single
20699 instruction, are specified by enclosing the bundled opcodes inside
20710 The opcodes in a FLIX instruction are listed in the same order as the
20711 corresponding instruction slots in the TIE format declaration.
20712 Directives and labels are not allowed inside the braces of a FLIX
20713 instruction. A particular TIE format name can optionally be specified
20714 immediately after the opening brace, but this is usually unnecessary.
20715 The assembler will automatically search for a format that can encode the
20716 specified opcodes, so the format name need only be specified in rare
20717 cases where there is more than one applicable format and where it
20718 matters which of those formats is used. A FLIX instruction can also be
20719 specified on a single line by separating the opcodes with semicolons:
20721 { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... }
20723 If an opcode can only be encoded in a FLIX instruction but is not
20724 specified as part of a FLIX bundle, the assembler will choose the
20725 smallest format where the opcode can be encoded and will fill unused
20726 instruction slots with no-ops.
20730 * Xtensa Opcodes:: Opcode Naming Conventions.
20731 * Xtensa Registers:: Register Naming.
20734 File: as.info, Node: Xtensa Opcodes, Next: Xtensa Registers, Up: Xtensa Syntax
20736 9.50.2.1 Opcode Names
20737 .....................
20739 See the `Xtensa Instruction Set Architecture (ISA) Reference Manual'
20740 for a complete list of opcodes and descriptions of their semantics.
20742 If an opcode name is prefixed with an underscore character (`_'),
20743 `as' will not transform that instruction in any way. The underscore
20744 prefix disables both optimization (*note Xtensa Optimizations: Xtensa
20745 Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa
20746 Relaxation.) for that particular instruction. Only use the underscore
20747 prefix when it is essential to select the exact opcode produced by the
20748 assembler. Using this feature unnecessarily makes the code less
20749 efficient by disabling assembler optimization and less flexible by
20750 disabling relaxation.
20752 Note that this special handling of underscore prefixes only applies
20753 to Xtensa opcodes, not to either built-in macros or user-defined macros.
20754 When an underscore prefix is used with a macro (e.g., `_MOV'), it
20755 refers to a different macro. The assembler generally provides built-in
20756 macros both with and without the underscore prefix, where the underscore
20757 versions behave as if the underscore carries through to the instructions
20758 in the macros. For example, `_MOV' may expand to `_MOV.N'.
20760 The underscore prefix only applies to individual instructions, not to
20761 series of instructions. For example, if a series of instructions have
20762 underscore prefixes, the assembler will not transform the individual
20763 instructions, but it may insert other instructions between them (e.g.,
20764 to align a `LOOP' instruction). To prevent the assembler from
20765 modifying a series of instructions as a whole, use the `no-transform'
20766 directive. *Note transform: Transform Directive.
20769 File: as.info, Node: Xtensa Registers, Prev: Xtensa Opcodes, Up: Xtensa Syntax
20771 9.50.2.2 Register Names
20772 .......................
20774 The assembly syntax for a register file entry is the "short" name for a
20775 TIE register file followed by the index into that register file. For
20776 example, the general-purpose `AR' register file has a short name of
20777 `a', so these registers are named `a0'...`a15'. As a special feature,
20778 `sp' is also supported as a synonym for `a1'. Additional registers may
20779 be added by processor configuration options and by designer-defined TIE
20780 extensions. An initial `$' character is optional in all register names.
20783 File: as.info, Node: Xtensa Optimizations, Next: Xtensa Relaxation, Prev: Xtensa Syntax, Up: Xtensa-Dependent
20785 9.50.3 Xtensa Optimizations
20786 ---------------------------
20788 The optimizations currently supported by `as' are generation of density
20789 instructions where appropriate and automatic branch target alignment.
20793 * Density Instructions:: Using Density Instructions.
20794 * Xtensa Automatic Alignment:: Automatic Instruction Alignment.
20797 File: as.info, Node: Density Instructions, Next: Xtensa Automatic Alignment, Up: Xtensa Optimizations
20799 9.50.3.1 Using Density Instructions
20800 ...................................
20802 The Xtensa instruction set has a code density option that provides
20803 16-bit versions of some of the most commonly used opcodes. Use of these
20804 opcodes can significantly reduce code size. When possible, the
20805 assembler automatically translates instructions from the core Xtensa
20806 instruction set into equivalent instructions from the Xtensa code
20807 density option. This translation can be disabled by using underscore
20808 prefixes (*note Opcode Names: Xtensa Opcodes.), by using the
20809 `--no-transform' command-line option (*note Command Line Options:
20810 Xtensa Options.), or by using the `no-transform' directive (*note
20811 transform: Transform Directive.).
20813 It is a good idea _not_ to use the density instructions directly.
20814 The assembler will automatically select dense instructions where
20815 possible. If you later need to use an Xtensa processor without the code
20816 density option, the same assembly code will then work without
20820 File: as.info, Node: Xtensa Automatic Alignment, Prev: Density Instructions, Up: Xtensa Optimizations
20822 9.50.3.2 Automatic Instruction Alignment
20823 ........................................
20825 The Xtensa assembler will automatically align certain instructions, both
20826 to optimize performance and to satisfy architectural requirements.
20828 As an optimization to improve performance, the assembler attempts to
20829 align branch targets so they do not cross instruction fetch boundaries.
20830 (Xtensa processors can be configured with either 32-bit or 64-bit
20831 instruction fetch widths.) An instruction immediately following a call
20832 is treated as a branch target in this context, because it will be the
20833 target of a return from the call. This alignment has the potential to
20834 reduce branch penalties at some expense in code size. This
20835 optimization is enabled by default. You can disable it with the
20836 `--no-target-align' command-line option (*note Command Line Options:
20839 The target alignment optimization is done without adding instructions
20840 that could increase the execution time of the program. If there are
20841 density instructions in the code preceding a target, the assembler can
20842 change the target alignment by widening some of those instructions to
20843 the equivalent 24-bit instructions. Extra bytes of padding can be
20844 inserted immediately following unconditional jump and return
20845 instructions. This approach is usually successful in aligning many,
20846 but not all, branch targets.
20848 The `LOOP' family of instructions must be aligned such that the
20849 first instruction in the loop body does not cross an instruction fetch
20850 boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be
20851 on either a 1 or 2 mod 4 byte boundary). The assembler knows about
20852 this restriction and inserts the minimal number of 2 or 3 byte no-op
20853 instructions to satisfy it. When no-op instructions are added, any
20854 label immediately preceding the original loop will be moved in order to
20855 refer to the loop instruction, not the newly generated no-op
20856 instruction. To preserve binary compatibility across processors with
20857 different fetch widths, the assembler conservatively assumes a 32-bit
20858 fetch width when aligning `LOOP' instructions (except if the first
20859 instruction in the loop is a 64-bit instruction).
20861 Previous versions of the assembler automatically aligned `ENTRY'
20862 instructions to 4-byte boundaries, but that alignment is now the
20863 programmer's responsibility.
20866 File: as.info, Node: Xtensa Relaxation, Next: Xtensa Directives, Prev: Xtensa Optimizations, Up: Xtensa-Dependent
20868 9.50.4 Xtensa Relaxation
20869 ------------------------
20871 When an instruction operand is outside the range allowed for that
20872 particular instruction field, `as' can transform the code to use a
20873 functionally-equivalent instruction or sequence of instructions. This
20874 process is known as "relaxation". This is typically done for branch
20875 instructions because the distance of the branch targets is not known
20876 until assembly-time. The Xtensa assembler offers branch relaxation and
20877 also extends this concept to function calls, `MOVI' instructions and
20878 other instructions with immediate fields.
20882 * Xtensa Branch Relaxation:: Relaxation of Branches.
20883 * Xtensa Call Relaxation:: Relaxation of Function Calls.
20884 * Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields.
20887 File: as.info, Node: Xtensa Branch Relaxation, Next: Xtensa Call Relaxation, Up: Xtensa Relaxation
20889 9.50.4.1 Conditional Branch Relaxation
20890 ......................................
20892 When the target of a branch is too far away from the branch itself,
20893 i.e., when the offset from the branch to the target is too large to fit
20894 in the immediate field of the branch instruction, it may be necessary to
20895 replace the branch with a branch around a jump. For example,
20905 (The `BNEZ.N' instruction would be used in this example only if the
20906 density option is available. Otherwise, `BNEZ' would be used.)
20908 This relaxation works well because the unconditional jump instruction
20909 has a much larger offset range than the various conditional branches.
20910 However, an error will occur if a branch target is beyond the range of a
20911 jump instruction. `as' cannot relax unconditional jumps. Similarly,
20912 an error will occur if the original input contains an unconditional
20913 jump to a target that is out of range.
20915 Branch relaxation is enabled by default. It can be disabled by using
20916 underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the
20917 `--no-transform' command-line option (*note Command Line Options:
20918 Xtensa Options.), or the `no-transform' directive (*note transform:
20919 Transform Directive.).
20922 File: as.info, Node: Xtensa Call Relaxation, Next: Xtensa Immediate Relaxation, Prev: Xtensa Branch Relaxation, Up: Xtensa Relaxation
20924 9.50.4.2 Function Call Relaxation
20925 .................................
20927 Function calls may require relaxation because the Xtensa immediate call
20928 instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a
20929 PC-relative offset of only 512 Kbytes in either direction. For larger
20930 programs, it may be necessary to use indirect calls (`CALLX0',
20931 `CALLX4', `CALLX8' and `CALLX12') where the target address is specified
20932 in a register. The Xtensa assembler can automatically relax immediate
20933 call instructions into indirect call instructions. This relaxation is
20934 done by loading the address of the called function into the callee's
20935 return address register and then using a `CALLX' instruction. So, for
20940 might be relaxed to:
20946 Because the addresses of targets of function calls are not generally
20947 known until link-time, the assembler must assume the worst and relax all
20948 the calls to functions in other source files, not just those that really
20949 will be out of range. The linker can recognize calls that were
20950 unnecessarily relaxed, and it will remove the overhead introduced by the
20951 assembler for those cases where direct calls are sufficient.
20953 Call relaxation is disabled by default because it can have a negative
20954 effect on both code size and performance, although the linker can
20955 usually eliminate the unnecessary overhead. If a program is too large
20956 and some of the calls are out of range, function call relaxation can be
20957 enabled using the `--longcalls' command-line option or the `longcalls'
20958 directive (*note longcalls: Longcalls Directive.).
20961 File: as.info, Node: Xtensa Immediate Relaxation, Prev: Xtensa Call Relaxation, Up: Xtensa Relaxation
20963 9.50.4.3 Other Immediate Field Relaxation
20964 .........................................
20966 The assembler normally performs the following other relaxations. They
20967 can be disabled by using underscore prefixes (*note Opcode Names:
20968 Xtensa Opcodes.), the `--no-transform' command-line option (*note
20969 Command Line Options: Xtensa Options.), or the `no-transform' directive
20970 (*note transform: Transform Directive.).
20972 The `MOVI' machine instruction can only materialize values in the
20973 range from -2048 to 2047. Values outside this range are best
20974 materialized with `L32R' instructions. Thus:
20978 is assembled into the following machine code:
20980 .literal .L1, 100000
20983 The `L8UI' machine instruction can only be used with immediate
20984 offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine
20985 instructions can only be used with offsets from 0 to 510. The `L32I'
20986 machine instruction can only be used with offsets from 0 to 1020. A
20987 load offset outside these ranges can be materialized with an `L32R'
20988 instruction if the destination register of the load is different than
20989 the source address register. For example:
21000 If the load destination and source address register are the same, an
21001 out-of-range offset causes an error.
21003 The Xtensa `ADDI' instruction only allows immediate operands in the
21004 range from -128 to 127. There are a number of alternate instruction
21005 sequences for the `ADDI' operation. First, if the immediate is 0, the
21006 `ADDI' will be turned into a `MOV.N' instruction (or the equivalent
21007 `OR' instruction if the code density option is not available). If the
21008 `ADDI' immediate is outside of the range -128 to 127, but inside the
21009 range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI'
21010 sequence will be used. Finally, if the immediate is outside of this
21011 range and a free register is available, an `L32R'/`ADD' sequence will
21012 be used with a literal allocated from the literal pool.
21021 is assembled into the following:
21023 .literal .L1, 50000
21025 addmi a5, a6, 0x200
21026 addmi a5, a6, 0x200
21032 File: as.info, Node: Xtensa Directives, Prev: Xtensa Relaxation, Up: Xtensa-Dependent
21037 The Xtensa assembler supports a region-based directive syntax:
21039 .begin DIRECTIVE [OPTIONS]
21043 All the Xtensa-specific directives that apply to a region of code use
21046 The directive applies to code between the `.begin' and the `.end'.
21047 The state of the option after the `.end' reverts to what it was before
21048 the `.begin'. A nested `.begin'/`.end' region can further change the
21049 state of the directive without having to be aware of its outer state.
21050 For example, consider:
21052 .begin no-transform
21060 The `ADD' opcodes at `L' and `N' in the outer `no-transform' region
21061 both result in `ADD' machine instructions, but the assembler selects an
21062 `ADD.N' instruction for the `ADD' at `M' in the inner `transform'
21065 The advantage of this style is that it works well inside macros
21066 which can preserve the context of their callers.
21068 The following directives are available:
21072 * Schedule Directive:: Enable instruction scheduling.
21073 * Longcalls Directive:: Use Indirect Calls for Greater Range.
21074 * Transform Directive:: Disable All Assembler Transformations.
21075 * Literal Directive:: Intermix Literals with Instructions.
21076 * Literal Position Directive:: Specify Inline Literal Pool Locations.
21077 * Literal Prefix Directive:: Specify Literal Section Name Prefix.
21078 * Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals.
21081 File: as.info, Node: Schedule Directive, Next: Longcalls Directive, Up: Xtensa Directives
21086 The `schedule' directive is recognized only for compatibility with
21087 Tensilica's assembler.
21089 .begin [no-]schedule
21092 This directive is ignored and has no effect on `as'.
21095 File: as.info, Node: Longcalls Directive, Next: Transform Directive, Prev: Schedule Directive, Up: Xtensa Directives
21100 The `longcalls' directive enables or disables function call relaxation.
21101 *Note Function Call Relaxation: Xtensa Call Relaxation.
21103 .begin [no-]longcalls
21104 .end [no-]longcalls
21106 Call relaxation is disabled by default unless the `--longcalls'
21107 command-line option is specified. The `longcalls' directive overrides
21108 the default determined by the command-line options.
21111 File: as.info, Node: Transform Directive, Next: Literal Directive, Prev: Longcalls Directive, Up: Xtensa Directives
21116 This directive enables or disables all assembler transformation,
21117 including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and
21118 optimization (*note Xtensa Optimizations: Xtensa Optimizations.).
21120 .begin [no-]transform
21121 .end [no-]transform
21123 Transformations are enabled by default unless the `--no-transform'
21124 option is used. The `transform' directive overrides the default
21125 determined by the command-line options. An underscore opcode prefix,
21126 disabling transformation of that opcode, always takes precedence over
21127 both directives and command-line flags.
21130 File: as.info, Node: Literal Directive, Next: Literal Position Directive, Prev: Transform Directive, Up: Xtensa Directives
21135 The `.literal' directive is used to define literal pool data, i.e.,
21136 read-only 32-bit data accessed via `L32R' instructions.
21138 .literal LABEL, VALUE[, VALUE...]
21140 This directive is similar to the standard `.word' directive, except
21141 that the actual location of the literal data is determined by the
21142 assembler and linker, not by the position of the `.literal' directive.
21143 Using this directive gives the assembler freedom to locate the literal
21144 data in the most appropriate place and possibly to combine identical
21145 literals. For example, the code:
21151 can be used to load a pointer to the symbol `sym' into register
21152 `a4'. The value of `sym' will not be placed between the `ENTRY' and
21153 `L32R' instructions; instead, the assembler puts the data in a literal
21156 Literal pools are placed by default in separate literal sections;
21157 however, when using the `--text-section-literals' option (*note Command
21158 Line Options: Xtensa Options.), the literal pools for PC-relative mode
21159 `L32R' instructions are placed in the current section.(1) These text
21160 section literal pools are created automatically before `ENTRY'
21161 instructions and manually after `.literal_position' directives (*note
21162 literal_position: Literal Position Directive.). If there are no
21163 preceding `ENTRY' instructions, explicit `.literal_position' directives
21164 must be used to place the text section literal pools; otherwise, `as'
21165 will report an error.
21167 When literals are placed in separate sections, the literal section
21168 names are derived from the names of the sections where the literals are
21169 defined. The base literal section names are `.literal' for PC-relative
21170 mode `L32R' instructions and `.lit4' for absolute mode `L32R'
21171 instructions (*note absolute-literals: Absolute Literals Directive.).
21172 These base names are used for literals defined in the default `.text'
21173 section. For literals defined in other sections or within the scope of
21174 a `literal_prefix' directive (*note literal_prefix: Literal Prefix
21175 Directive.), the following rules determine the literal section name:
21177 1. If the current section is a member of a section group, the literal
21178 section name includes the group name as a suffix to the base
21179 `.literal' or `.lit4' name, with a period to separate the base
21180 name and group name. The literal section is also made a member of
21183 2. If the current section name (or `literal_prefix' value) begins with
21184 "`.gnu.linkonce.KIND.'", the literal section name is formed by
21185 replacing "`.KIND'" with the base `.literal' or `.lit4' name. For
21186 example, for literals defined in a section named
21187 `.gnu.linkonce.t.func', the literal section will be
21188 `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'.
21190 3. If the current section name (or `literal_prefix' value) ends with
21191 `.text', the literal section name is formed by replacing that
21192 suffix with the base `.literal' or `.lit4' name. For example, for
21193 literals defined in a section named `.iram0.text', the literal
21194 section will be `.iram0.literal' or `.iram0.lit4'.
21196 4. If none of the preceding conditions apply, the literal section
21197 name is formed by adding the base `.literal' or `.lit4' name as a
21198 suffix to the current section name (or `literal_prefix' value).
21200 ---------- Footnotes ----------
21202 (1) Literals for the `.init' and `.fini' sections are always placed
21203 in separate sections, even when `--text-section-literals' is enabled.
21206 File: as.info, Node: Literal Position Directive, Next: Literal Prefix Directive, Prev: Literal Directive, Up: Xtensa Directives
21208 9.50.5.5 literal_position
21209 .........................
21211 When using `--text-section-literals' to place literals inline in the
21212 section being assembled, the `.literal_position' directive can be used
21213 to mark a potential location for a literal pool.
21217 The `.literal_position' directive is ignored when the
21218 `--text-section-literals' option is not used or when `L32R'
21219 instructions use the absolute addressing mode.
21221 The assembler will automatically place text section literal pools
21222 before `ENTRY' instructions, so the `.literal_position' directive is
21223 only needed to specify some other location for a literal pool. You may
21224 need to add an explicit jump instruction to skip over an inline literal
21227 For example, an interrupt vector does not begin with an `ENTRY'
21228 instruction so the assembler will be unable to automatically find a good
21229 place to put a literal pool. Moreover, the code for the interrupt
21230 vector must be at a specific starting address, so the literal pool
21231 cannot come before the start of the code. The literal pool for the
21232 vector must be explicitly positioned in the middle of the vector (before
21233 any uses of the literals, due to the negative offsets used by
21234 PC-relative `L32R' instructions). The `.literal_position' directive
21235 can be used to do this. In the following code, the literal for `M'
21236 will automatically be aligned correctly and is placed after the
21237 unconditional jump.
21248 File: as.info, Node: Literal Prefix Directive, Next: Absolute Literals Directive, Prev: Literal Position Directive, Up: Xtensa Directives
21250 9.50.5.6 literal_prefix
21251 .......................
21253 The `literal_prefix' directive allows you to override the default
21254 literal section names, which are derived from the names of the sections
21255 where the literals are defined.
21257 .begin literal_prefix [NAME]
21258 .end literal_prefix
21260 For literals defined within the delimited region, the literal section
21261 names are derived from the NAME argument instead of the name of the
21262 current section. The rules used to derive the literal section names do
21263 not change. *Note literal: Literal Directive. If the NAME argument is
21264 omitted, the literal sections revert to the defaults. This directive
21265 has no effect when using the `--text-section-literals' option (*note
21266 Command Line Options: Xtensa Options.).
21269 File: as.info, Node: Absolute Literals Directive, Prev: Literal Prefix Directive, Up: Xtensa Directives
21271 9.50.5.7 absolute-literals
21272 ..........................
21274 The `absolute-literals' and `no-absolute-literals' directives control
21275 the absolute vs. PC-relative mode for `L32R' instructions. These are
21276 relevant only for Xtensa configurations that include the absolute
21277 addressing option for `L32R' instructions.
21279 .begin [no-]absolute-literals
21280 .end [no-]absolute-literals
21282 These directives do not change the `L32R' mode--they only cause the
21283 assembler to emit the appropriate kind of relocation for `L32R'
21284 instructions and to place the literal values in the appropriate section.
21285 To change the `L32R' mode, the program must write the `LITBASE' special
21286 register. It is the programmer's responsibility to keep track of the
21287 mode and indicate to the assembler which mode is used in each region of
21290 If the Xtensa configuration includes the absolute `L32R' addressing
21291 option, the default is to assume absolute `L32R' addressing unless the
21292 `--no-absolute-literals' command-line option is specified. Otherwise,
21293 the default is to assume PC-relative `L32R' addressing. The
21294 `absolute-literals' directive can then be used to override the default
21295 determined by the command-line options.
21298 File: as.info, Node: Reporting Bugs, Next: Acknowledgements, Prev: Machine Dependencies, Up: Top
21303 Your bug reports play an essential role in making `as' reliable.
21305 Reporting a bug may help you by bringing a solution to your problem,
21306 or it may not. But in any case the principal function of a bug report
21307 is to help the entire community by making the next version of `as' work
21308 better. Bug reports are your contribution to the maintenance of `as'.
21310 In order for a bug report to serve its purpose, you must include the
21311 information that enables us to fix the bug.
21315 * Bug Criteria:: Have you found a bug?
21316 * Bug Reporting:: How to report bugs
21319 File: as.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs
21321 10.1 Have You Found a Bug?
21322 ==========================
21324 If you are not sure whether you have found a bug, here are some
21327 * If the assembler gets a fatal signal, for any input whatever, that
21328 is a `as' bug. Reliable assemblers never crash.
21330 * If `as' produces an error message for valid input, that is a bug.
21332 * If `as' does not produce an error message for invalid input, that
21333 is a bug. However, you should note that your idea of "invalid
21334 input" might be our idea of "an extension" or "support for
21335 traditional practice".
21337 * If you are an experienced user of assemblers, your suggestions for
21338 improvement of `as' are welcome in any case.
21341 File: as.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs
21343 10.2 How to Report Bugs
21344 =======================
21346 A number of companies and individuals offer support for GNU products.
21347 If you obtained `as' from a support organization, we recommend you
21348 contact that organization first.
21350 You can find contact information for many support companies and
21351 individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
21353 In any event, we also recommend that you send bug reports for `as'
21354 to `http://www.sourceware.org/bugzilla/'.
21356 The fundamental principle of reporting bugs usefully is this:
21357 *report all the facts*. If you are not sure whether to state a fact or
21358 leave it out, state it!
21360 Often people omit facts because they think they know what causes the
21361 problem and assume that some details do not matter. Thus, you might
21362 assume that the name of a symbol you use in an example does not matter.
21363 Well, probably it does not, but one cannot be sure. Perhaps the bug
21364 is a stray memory reference which happens to fetch from the location
21365 where that name is stored in memory; perhaps, if the name were
21366 different, the contents of that location would fool the assembler into
21367 doing the right thing despite the bug. Play it safe and give a
21368 specific, complete example. That is the easiest thing for you to do,
21369 and the most helpful.
21371 Keep in mind that the purpose of a bug report is to enable us to fix
21372 the bug if it is new to us. Therefore, always write your bug reports
21373 on the assumption that the bug has not been reported previously.
21375 Sometimes people give a few sketchy facts and ask, "Does this ring a
21376 bell?" This cannot help us fix a bug, so it is basically useless. We
21377 respond by asking for enough details to enable us to investigate. You
21378 might as well expedite matters by sending them to begin with.
21380 To enable us to fix the bug, you should include all these things:
21382 * The version of `as'. `as' announces it if you start it with the
21383 `--version' argument.
21385 Without this, we will not know whether there is any point in
21386 looking for the bug in the current version of `as'.
21388 * Any patches you may have applied to the `as' source.
21390 * The type of machine you are using, and the operating system name
21391 and version number.
21393 * What compiler (and its version) was used to compile `as'--e.g.
21396 * The command arguments you gave the assembler to assemble your
21397 example and observe the bug. To guarantee you will not omit
21398 something important, list them all. A copy of the Makefile (or
21399 the output from make) is sufficient.
21401 If we were to try to guess the arguments, we would probably guess
21402 wrong and then we might not encounter the bug.
21404 * A complete input file that will reproduce the bug. If the bug is
21405 observed when the assembler is invoked via a compiler, send the
21406 assembler source, not the high level language source. Most
21407 compilers will produce the assembler source when run with the `-S'
21408 option. If you are using `gcc', use the options `-v
21409 --save-temps'; this will save the assembler source in a file with
21410 an extension of `.s', and also show you exactly how `as' is being
21413 * A description of what behavior you observe that you believe is
21414 incorrect. For example, "It gets a fatal signal."
21416 Of course, if the bug is that `as' gets a fatal signal, then we
21417 will certainly notice it. But if the bug is incorrect output, we
21418 might not notice unless it is glaringly wrong. You might as well
21419 not give us a chance to make a mistake.
21421 Even if the problem you experience is a fatal signal, you should
21422 still say so explicitly. Suppose something strange is going on,
21423 such as, your copy of `as' is out of sync, or you have encountered
21424 a bug in the C library on your system. (This has happened!) Your
21425 copy might crash and ours would not. If you told us to expect a
21426 crash, then when ours fails to crash, we would know that the bug
21427 was not happening for us. If you had not told us to expect a
21428 crash, then we would not be able to draw any conclusion from our
21431 * If you wish to suggest changes to the `as' source, send us context
21432 diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
21433 Always send diffs from the old file to the new file. If you even
21434 discuss something in the `as' source, refer to it by context, not
21437 The line numbers in our development sources will not match those
21438 in your sources. Your line numbers would convey no useful
21441 Here are some things that are not necessary:
21443 * A description of the envelope of the bug.
21445 Often people who encounter a bug spend a lot of time investigating
21446 which changes to the input file will make the bug go away and which
21447 changes will not affect it.
21449 This is often time consuming and not very useful, because the way
21450 we will find the bug is by running a single example under the
21451 debugger with breakpoints, not by pure deduction from a series of
21452 examples. We recommend that you save your time for something else.
21454 Of course, if you can find a simpler example to report _instead_
21455 of the original one, that is a convenience for us. Errors in the
21456 output will be easier to spot, running under the debugger will take
21457 less time, and so on.
21459 However, simplification is not vital; if you do not want to do
21460 this, report the bug anyway and send us the entire test case you
21463 * A patch for the bug.
21465 A patch for the bug does help us if it is a good one. But do not
21466 omit the necessary information, such as the test case, on the
21467 assumption that a patch is all we need. We might see problems
21468 with your patch and decide to fix the problem another way, or we
21469 might not understand it at all.
21471 Sometimes with a program as complicated as `as' it is very hard to
21472 construct an example that will make the program follow a certain
21473 path through the code. If you do not send us the example, we will
21474 not be able to construct one, so we will not be able to verify
21475 that the bug is fixed.
21477 And if we cannot understand what bug you are trying to fix, or why
21478 your patch should be an improvement, we will not install it. A
21479 test case will help us to understand.
21481 * A guess about what the bug is or what it depends on.
21483 Such guesses are usually wrong. Even we cannot guess right about
21484 such things without first using the debugger to find the facts.
21487 File: as.info, Node: Acknowledgements, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top
21489 11 Acknowledgements
21490 *******************
21492 If you have contributed to GAS and your name isn't listed here, it is
21493 not meant as a slight. We just don't know about it. Send mail to the
21494 maintainer, and we'll correct the situation. Currently the maintainer
21495 is Ken Raeburn (email address `raeburn@cygnus.com').
21497 Dean Elsner wrote the original GNU assembler for the VAX.(1)
21499 Jay Fenlason maintained GAS for a while, adding support for
21500 GDB-specific debug information and the 68k series machines, most of the
21501 preprocessing pass, and extensive changes in `messages.c',
21502 `input-file.c', `write.c'.
21504 K. Richard Pixley maintained GAS for a while, adding various
21505 enhancements and many bug fixes, including merging support for several
21506 processors, breaking GAS up to handle multiple object file format back
21507 ends (including heavy rewrite, testing, an integration of the coff and
21508 b.out back ends), adding configuration including heavy testing and
21509 verification of cross assemblers and file splits and renaming,
21510 converted GAS to strictly ANSI C including full prototypes, added
21511 support for m680[34]0 and cpu32, did considerable work on i960
21512 including a COFF port (including considerable amounts of reverse
21513 engineering), a SPARC opcode file rewrite, DECstation, rs6000, and
21514 hp300hpux host ports, updated "know" assertions and made them work,
21515 much other reorganization, cleanup, and lint.
21517 Ken Raeburn wrote the high-level BFD interface code to replace most
21518 of the code in format-specific I/O modules.
21520 The original VMS support was contributed by David L. Kashtan. Eric
21521 Youngdale has done much work with it since.
21523 The Intel 80386 machine description was written by Eliot Dresselhaus.
21525 Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
21527 The Motorola 88k machine description was contributed by Devon Bowen
21528 of Buffalo University and Torbjorn Granlund of the Swedish Institute of
21531 Keith Knowles at the Open Software Foundation wrote the original
21532 MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format
21533 support (which hasn't been merged in yet). Ralph Campbell worked with
21534 the MIPS code to support a.out format.
21536 Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k,
21537 tc-h8300), and IEEE 695 object file format (obj-ieee), was written by
21538 Steve Chamberlain of Cygnus Support. Steve also modified the COFF back
21539 end to use BFD for some low-level operations, for use with the H8/300
21540 and AMD 29k targets.
21542 John Gilmore built the AMD 29000 support, added `.include' support,
21543 and simplified the configuration of which versions accept which
21544 directives. He updated the 68k machine description so that Motorola's
21545 opcodes always produced fixed-size instructions (e.g., `jsr'), while
21546 synthetic instructions remained shrinkable (`jbsr'). John fixed many
21547 bugs, including true tested cross-compilation support, and one bug in
21548 relaxation that took a week and required the proverbial one-bit fix.
21550 Ian Lance Taylor of Cygnus Support merged the Motorola and MIT
21551 syntax for the 68k, completed support for some COFF targets (68k, i386
21552 SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets,
21553 wrote the initial RS/6000 and PowerPC assembler, and made a few other
21556 Steve Chamberlain made GAS able to generate listings.
21558 Hewlett-Packard contributed support for the HP9000/300.
21560 Jeff Law wrote GAS and BFD support for the native HPPA object format
21561 (SOM) along with a fairly extensive HPPA testsuite (for both SOM and
21562 ELF object formats). This work was supported by both the Center for
21563 Software Science at the University of Utah and Cygnus Support.
21565 Support for ELF format files has been worked on by Mark Eichin of
21566 Cygnus Support (original, incomplete implementation for SPARC), Pete
21567 Hoogenboom and Jeff Law at the University of Utah (HPPA mainly),
21568 Michael Meissner of the Open Software Foundation (i386 mainly), and Ken
21569 Raeburn of Cygnus Support (sparc, and some initial 64-bit support).
21571 Linas Vepstas added GAS support for the ESA/390 "IBM 370"
21574 Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote
21575 GAS and BFD support for openVMS/Alpha.
21577 Timothy Wall, Michael Hayes, and Greg Smart contributed to the
21578 various tic* flavors.
21580 David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from
21581 Tensilica, Inc. added support for Xtensa processors.
21583 Several engineers at Cygnus Support have also provided many small
21584 bug fixes and configuration enhancements.
21586 Jon Beniston added support for the Lattice Mico32 architecture.
21588 Many others have contributed large or small bugfixes and
21589 enhancements. If you have contributed significant work and are not
21590 mentioned on this list, and want to be, let us know. Some of the
21591 history has been lost; we are not intentionally leaving anyone out.
21593 ---------- Footnotes ----------
21595 (1) Any more details?
21598 File: as.info, Node: GNU Free Documentation License, Next: AS Index, Prev: Acknowledgements, Up: Top
21600 Appendix A GNU Free Documentation License
21601 *****************************************
21603 Version 1.3, 3 November 2008
21605 Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
21608 Everyone is permitted to copy and distribute verbatim copies
21609 of this license document, but changing it is not allowed.
21613 The purpose of this License is to make a manual, textbook, or other
21614 functional and useful document "free" in the sense of freedom: to
21615 assure everyone the effective freedom to copy and redistribute it,
21616 with or without modifying it, either commercially or
21617 noncommercially. Secondarily, this License preserves for the
21618 author and publisher a way to get credit for their work, while not
21619 being considered responsible for modifications made by others.
21621 This License is a kind of "copyleft", which means that derivative
21622 works of the document must themselves be free in the same sense.
21623 It complements the GNU General Public License, which is a copyleft
21624 license designed for free software.
21626 We have designed this License in order to use it for manuals for
21627 free software, because free software needs free documentation: a
21628 free program should come with manuals providing the same freedoms
21629 that the software does. But this License is not limited to
21630 software manuals; it can be used for any textual work, regardless
21631 of subject matter or whether it is published as a printed book.
21632 We recommend this License principally for works whose purpose is
21633 instruction or reference.
21635 1. APPLICABILITY AND DEFINITIONS
21637 This License applies to any manual or other work, in any medium,
21638 that contains a notice placed by the copyright holder saying it
21639 can be distributed under the terms of this License. Such a notice
21640 grants a world-wide, royalty-free license, unlimited in duration,
21641 to use that work under the conditions stated herein. The
21642 "Document", below, refers to any such manual or work. Any member
21643 of the public is a licensee, and is addressed as "you". You
21644 accept the license if you copy, modify or distribute the work in a
21645 way requiring permission under copyright law.
21647 A "Modified Version" of the Document means any work containing the
21648 Document or a portion of it, either copied verbatim, or with
21649 modifications and/or translated into another language.
21651 A "Secondary Section" is a named appendix or a front-matter section
21652 of the Document that deals exclusively with the relationship of the
21653 publishers or authors of the Document to the Document's overall
21654 subject (or to related matters) and contains nothing that could
21655 fall directly within that overall subject. (Thus, if the Document
21656 is in part a textbook of mathematics, a Secondary Section may not
21657 explain any mathematics.) The relationship could be a matter of
21658 historical connection with the subject or with related matters, or
21659 of legal, commercial, philosophical, ethical or political position
21662 The "Invariant Sections" are certain Secondary Sections whose
21663 titles are designated, as being those of Invariant Sections, in
21664 the notice that says that the Document is released under this
21665 License. If a section does not fit the above definition of
21666 Secondary then it is not allowed to be designated as Invariant.
21667 The Document may contain zero Invariant Sections. If the Document
21668 does not identify any Invariant Sections then there are none.
21670 The "Cover Texts" are certain short passages of text that are
21671 listed, as Front-Cover Texts or Back-Cover Texts, in the notice
21672 that says that the Document is released under this License. A
21673 Front-Cover Text may be at most 5 words, and a Back-Cover Text may
21674 be at most 25 words.
21676 A "Transparent" copy of the Document means a machine-readable copy,
21677 represented in a format whose specification is available to the
21678 general public, that is suitable for revising the document
21679 straightforwardly with generic text editors or (for images
21680 composed of pixels) generic paint programs or (for drawings) some
21681 widely available drawing editor, and that is suitable for input to
21682 text formatters or for automatic translation to a variety of
21683 formats suitable for input to text formatters. A copy made in an
21684 otherwise Transparent file format whose markup, or absence of
21685 markup, has been arranged to thwart or discourage subsequent
21686 modification by readers is not Transparent. An image format is
21687 not Transparent if used for any substantial amount of text. A
21688 copy that is not "Transparent" is called "Opaque".
21690 Examples of suitable formats for Transparent copies include plain
21691 ASCII without markup, Texinfo input format, LaTeX input format,
21692 SGML or XML using a publicly available DTD, and
21693 standard-conforming simple HTML, PostScript or PDF designed for
21694 human modification. Examples of transparent image formats include
21695 PNG, XCF and JPG. Opaque formats include proprietary formats that
21696 can be read and edited only by proprietary word processors, SGML or
21697 XML for which the DTD and/or processing tools are not generally
21698 available, and the machine-generated HTML, PostScript or PDF
21699 produced by some word processors for output purposes only.
21701 The "Title Page" means, for a printed book, the title page itself,
21702 plus such following pages as are needed to hold, legibly, the
21703 material this License requires to appear in the title page. For
21704 works in formats which do not have any title page as such, "Title
21705 Page" means the text near the most prominent appearance of the
21706 work's title, preceding the beginning of the body of the text.
21708 The "publisher" means any person or entity that distributes copies
21709 of the Document to the public.
21711 A section "Entitled XYZ" means a named subunit of the Document
21712 whose title either is precisely XYZ or contains XYZ in parentheses
21713 following text that translates XYZ in another language. (Here XYZ
21714 stands for a specific section name mentioned below, such as
21715 "Acknowledgements", "Dedications", "Endorsements", or "History".)
21716 To "Preserve the Title" of such a section when you modify the
21717 Document means that it remains a section "Entitled XYZ" according
21718 to this definition.
21720 The Document may include Warranty Disclaimers next to the notice
21721 which states that this License applies to the Document. These
21722 Warranty Disclaimers are considered to be included by reference in
21723 this License, but only as regards disclaiming warranties: any other
21724 implication that these Warranty Disclaimers may have is void and
21725 has no effect on the meaning of this License.
21727 2. VERBATIM COPYING
21729 You may copy and distribute the Document in any medium, either
21730 commercially or noncommercially, provided that this License, the
21731 copyright notices, and the license notice saying this License
21732 applies to the Document are reproduced in all copies, and that you
21733 add no other conditions whatsoever to those of this License. You
21734 may not use technical measures to obstruct or control the reading
21735 or further copying of the copies you make or distribute. However,
21736 you may accept compensation in exchange for copies. If you
21737 distribute a large enough number of copies you must also follow
21738 the conditions in section 3.
21740 You may also lend copies, under the same conditions stated above,
21741 and you may publicly display copies.
21743 3. COPYING IN QUANTITY
21745 If you publish printed copies (or copies in media that commonly
21746 have printed covers) of the Document, numbering more than 100, and
21747 the Document's license notice requires Cover Texts, you must
21748 enclose the copies in covers that carry, clearly and legibly, all
21749 these Cover Texts: Front-Cover Texts on the front cover, and
21750 Back-Cover Texts on the back cover. Both covers must also clearly
21751 and legibly identify you as the publisher of these copies. The
21752 front cover must present the full title with all words of the
21753 title equally prominent and visible. You may add other material
21754 on the covers in addition. Copying with changes limited to the
21755 covers, as long as they preserve the title of the Document and
21756 satisfy these conditions, can be treated as verbatim copying in
21759 If the required texts for either cover are too voluminous to fit
21760 legibly, you should put the first ones listed (as many as fit
21761 reasonably) on the actual cover, and continue the rest onto
21764 If you publish or distribute Opaque copies of the Document
21765 numbering more than 100, you must either include a
21766 machine-readable Transparent copy along with each Opaque copy, or
21767 state in or with each Opaque copy a computer-network location from
21768 which the general network-using public has access to download
21769 using public-standard network protocols a complete Transparent
21770 copy of the Document, free of added material. If you use the
21771 latter option, you must take reasonably prudent steps, when you
21772 begin distribution of Opaque copies in quantity, to ensure that
21773 this Transparent copy will remain thus accessible at the stated
21774 location until at least one year after the last time you
21775 distribute an Opaque copy (directly or through your agents or
21776 retailers) of that edition to the public.
21778 It is requested, but not required, that you contact the authors of
21779 the Document well before redistributing any large number of
21780 copies, to give them a chance to provide you with an updated
21781 version of the Document.
21785 You may copy and distribute a Modified Version of the Document
21786 under the conditions of sections 2 and 3 above, provided that you
21787 release the Modified Version under precisely this License, with
21788 the Modified Version filling the role of the Document, thus
21789 licensing distribution and modification of the Modified Version to
21790 whoever possesses a copy of it. In addition, you must do these
21791 things in the Modified Version:
21793 A. Use in the Title Page (and on the covers, if any) a title
21794 distinct from that of the Document, and from those of
21795 previous versions (which should, if there were any, be listed
21796 in the History section of the Document). You may use the
21797 same title as a previous version if the original publisher of
21798 that version gives permission.
21800 B. List on the Title Page, as authors, one or more persons or
21801 entities responsible for authorship of the modifications in
21802 the Modified Version, together with at least five of the
21803 principal authors of the Document (all of its principal
21804 authors, if it has fewer than five), unless they release you
21805 from this requirement.
21807 C. State on the Title page the name of the publisher of the
21808 Modified Version, as the publisher.
21810 D. Preserve all the copyright notices of the Document.
21812 E. Add an appropriate copyright notice for your modifications
21813 adjacent to the other copyright notices.
21815 F. Include, immediately after the copyright notices, a license
21816 notice giving the public permission to use the Modified
21817 Version under the terms of this License, in the form shown in
21818 the Addendum below.
21820 G. Preserve in that license notice the full lists of Invariant
21821 Sections and required Cover Texts given in the Document's
21824 H. Include an unaltered copy of this License.
21826 I. Preserve the section Entitled "History", Preserve its Title,
21827 and add to it an item stating at least the title, year, new
21828 authors, and publisher of the Modified Version as given on
21829 the Title Page. If there is no section Entitled "History" in
21830 the Document, create one stating the title, year, authors,
21831 and publisher of the Document as given on its Title Page,
21832 then add an item describing the Modified Version as stated in
21833 the previous sentence.
21835 J. Preserve the network location, if any, given in the Document
21836 for public access to a Transparent copy of the Document, and
21837 likewise the network locations given in the Document for
21838 previous versions it was based on. These may be placed in
21839 the "History" section. You may omit a network location for a
21840 work that was published at least four years before the
21841 Document itself, or if the original publisher of the version
21842 it refers to gives permission.
21844 K. For any section Entitled "Acknowledgements" or "Dedications",
21845 Preserve the Title of the section, and preserve in the
21846 section all the substance and tone of each of the contributor
21847 acknowledgements and/or dedications given therein.
21849 L. Preserve all the Invariant Sections of the Document,
21850 unaltered in their text and in their titles. Section numbers
21851 or the equivalent are not considered part of the section
21854 M. Delete any section Entitled "Endorsements". Such a section
21855 may not be included in the Modified Version.
21857 N. Do not retitle any existing section to be Entitled
21858 "Endorsements" or to conflict in title with any Invariant
21861 O. Preserve any Warranty Disclaimers.
21863 If the Modified Version includes new front-matter sections or
21864 appendices that qualify as Secondary Sections and contain no
21865 material copied from the Document, you may at your option
21866 designate some or all of these sections as invariant. To do this,
21867 add their titles to the list of Invariant Sections in the Modified
21868 Version's license notice. These titles must be distinct from any
21869 other section titles.
21871 You may add a section Entitled "Endorsements", provided it contains
21872 nothing but endorsements of your Modified Version by various
21873 parties--for example, statements of peer review or that the text
21874 has been approved by an organization as the authoritative
21875 definition of a standard.
21877 You may add a passage of up to five words as a Front-Cover Text,
21878 and a passage of up to 25 words as a Back-Cover Text, to the end
21879 of the list of Cover Texts in the Modified Version. Only one
21880 passage of Front-Cover Text and one of Back-Cover Text may be
21881 added by (or through arrangements made by) any one entity. If the
21882 Document already includes a cover text for the same cover,
21883 previously added by you or by arrangement made by the same entity
21884 you are acting on behalf of, you may not add another; but you may
21885 replace the old one, on explicit permission from the previous
21886 publisher that added the old one.
21888 The author(s) and publisher(s) of the Document do not by this
21889 License give permission to use their names for publicity for or to
21890 assert or imply endorsement of any Modified Version.
21892 5. COMBINING DOCUMENTS
21894 You may combine the Document with other documents released under
21895 this License, under the terms defined in section 4 above for
21896 modified versions, provided that you include in the combination
21897 all of the Invariant Sections of all of the original documents,
21898 unmodified, and list them all as Invariant Sections of your
21899 combined work in its license notice, and that you preserve all
21900 their Warranty Disclaimers.
21902 The combined work need only contain one copy of this License, and
21903 multiple identical Invariant Sections may be replaced with a single
21904 copy. If there are multiple Invariant Sections with the same name
21905 but different contents, make the title of each such section unique
21906 by adding at the end of it, in parentheses, the name of the
21907 original author or publisher of that section if known, or else a
21908 unique number. Make the same adjustment to the section titles in
21909 the list of Invariant Sections in the license notice of the
21912 In the combination, you must combine any sections Entitled
21913 "History" in the various original documents, forming one section
21914 Entitled "History"; likewise combine any sections Entitled
21915 "Acknowledgements", and any sections Entitled "Dedications". You
21916 must delete all sections Entitled "Endorsements."
21918 6. COLLECTIONS OF DOCUMENTS
21920 You may make a collection consisting of the Document and other
21921 documents released under this License, and replace the individual
21922 copies of this License in the various documents with a single copy
21923 that is included in the collection, provided that you follow the
21924 rules of this License for verbatim copying of each of the
21925 documents in all other respects.
21927 You may extract a single document from such a collection, and
21928 distribute it individually under this License, provided you insert
21929 a copy of this License into the extracted document, and follow
21930 this License in all other respects regarding verbatim copying of
21933 7. AGGREGATION WITH INDEPENDENT WORKS
21935 A compilation of the Document or its derivatives with other
21936 separate and independent documents or works, in or on a volume of
21937 a storage or distribution medium, is called an "aggregate" if the
21938 copyright resulting from the compilation is not used to limit the
21939 legal rights of the compilation's users beyond what the individual
21940 works permit. When the Document is included in an aggregate, this
21941 License does not apply to the other works in the aggregate which
21942 are not themselves derivative works of the Document.
21944 If the Cover Text requirement of section 3 is applicable to these
21945 copies of the Document, then if the Document is less than one half
21946 of the entire aggregate, the Document's Cover Texts may be placed
21947 on covers that bracket the Document within the aggregate, or the
21948 electronic equivalent of covers if the Document is in electronic
21949 form. Otherwise they must appear on printed covers that bracket
21950 the whole aggregate.
21954 Translation is considered a kind of modification, so you may
21955 distribute translations of the Document under the terms of section
21956 4. Replacing Invariant Sections with translations requires special
21957 permission from their copyright holders, but you may include
21958 translations of some or all Invariant Sections in addition to the
21959 original versions of these Invariant Sections. You may include a
21960 translation of this License, and all the license notices in the
21961 Document, and any Warranty Disclaimers, provided that you also
21962 include the original English version of this License and the
21963 original versions of those notices and disclaimers. In case of a
21964 disagreement between the translation and the original version of
21965 this License or a notice or disclaimer, the original version will
21968 If a section in the Document is Entitled "Acknowledgements",
21969 "Dedications", or "History", the requirement (section 4) to
21970 Preserve its Title (section 1) will typically require changing the
21975 You may not copy, modify, sublicense, or distribute the Document
21976 except as expressly provided under this License. Any attempt
21977 otherwise to copy, modify, sublicense, or distribute it is void,
21978 and will automatically terminate your rights under this License.
21980 However, if you cease all violation of this License, then your
21981 license from a particular copyright holder is reinstated (a)
21982 provisionally, unless and until the copyright holder explicitly
21983 and finally terminates your license, and (b) permanently, if the
21984 copyright holder fails to notify you of the violation by some
21985 reasonable means prior to 60 days after the cessation.
21987 Moreover, your license from a particular copyright holder is
21988 reinstated permanently if the copyright holder notifies you of the
21989 violation by some reasonable means, this is the first time you have
21990 received notice of violation of this License (for any work) from
21991 that copyright holder, and you cure the violation prior to 30 days
21992 after your receipt of the notice.
21994 Termination of your rights under this section does not terminate
21995 the licenses of parties who have received copies or rights from
21996 you under this License. If your rights have been terminated and
21997 not permanently reinstated, receipt of a copy of some or all of
21998 the same material does not give you any rights to use it.
22000 10. FUTURE REVISIONS OF THIS LICENSE
22002 The Free Software Foundation may publish new, revised versions of
22003 the GNU Free Documentation License from time to time. Such new
22004 versions will be similar in spirit to the present version, but may
22005 differ in detail to address new problems or concerns. See
22006 `http://www.gnu.org/copyleft/'.
22008 Each version of the License is given a distinguishing version
22009 number. If the Document specifies that a particular numbered
22010 version of this License "or any later version" applies to it, you
22011 have the option of following the terms and conditions either of
22012 that specified version or of any later version that has been
22013 published (not as a draft) by the Free Software Foundation. If
22014 the Document does not specify a version number of this License,
22015 you may choose any version ever published (not as a draft) by the
22016 Free Software Foundation. If the Document specifies that a proxy
22017 can decide which future versions of this License can be used, that
22018 proxy's public statement of acceptance of a version permanently
22019 authorizes you to choose that version for the Document.
22023 "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
22024 World Wide Web server that publishes copyrightable works and also
22025 provides prominent facilities for anybody to edit those works. A
22026 public wiki that anybody can edit is an example of such a server.
22027 A "Massive Multiauthor Collaboration" (or "MMC") contained in the
22028 site means any set of copyrightable works thus published on the MMC
22031 "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
22032 license published by Creative Commons Corporation, a not-for-profit
22033 corporation with a principal place of business in San Francisco,
22034 California, as well as future copyleft versions of that license
22035 published by that same organization.
22037 "Incorporate" means to publish or republish a Document, in whole or
22038 in part, as part of another Document.
22040 An MMC is "eligible for relicensing" if it is licensed under this
22041 License, and if all works that were first published under this
22042 License somewhere other than this MMC, and subsequently
22043 incorporated in whole or in part into the MMC, (1) had no cover
22044 texts or invariant sections, and (2) were thus incorporated prior
22045 to November 1, 2008.
22047 The operator of an MMC Site may republish an MMC contained in the
22048 site under CC-BY-SA on the same site at any time before August 1,
22049 2009, provided the MMC is eligible for relicensing.
22052 ADDENDUM: How to use this License for your documents
22053 ====================================================
22055 To use this License in a document you have written, include a copy of
22056 the License in the document and put the following copyright and license
22057 notices just after the title page:
22059 Copyright (C) YEAR YOUR NAME.
22060 Permission is granted to copy, distribute and/or modify this document
22061 under the terms of the GNU Free Documentation License, Version 1.3
22062 or any later version published by the Free Software Foundation;
22063 with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
22064 Texts. A copy of the license is included in the section entitled ``GNU
22065 Free Documentation License''.
22067 If you have Invariant Sections, Front-Cover Texts and Back-Cover
22068 Texts, replace the "with...Texts." line with this:
22070 with the Invariant Sections being LIST THEIR TITLES, with
22071 the Front-Cover Texts being LIST, and with the Back-Cover Texts
22074 If you have Invariant Sections without Cover Texts, or some other
22075 combination of the three, merge those two alternatives to suit the
22078 If your document contains nontrivial examples of program code, we
22079 recommend releasing these examples in parallel under your choice of
22080 free software license, such as the GNU General Public License, to
22081 permit their use in free software.
22084 File: as.info, Node: AS Index, Prev: GNU Free Documentation License, Up: Top
22092 * #: Comments. (line 33)
22093 * #APP: Preprocessing. (line 27)
22094 * #NO_APP: Preprocessing. (line 27)
22095 * $ in symbol names <1>: SH-Chars. (line 15)
22096 * $ in symbol names <2>: SH64-Chars. (line 15)
22097 * $ in symbol names <3>: D10V-Chars. (line 53)
22098 * $ in symbol names: D30V-Chars. (line 70)
22099 * $a: ARM Mapping Symbols. (line 9)
22100 * $acos math builtin, TIC54X: TIC54X-Builtins. (line 10)
22101 * $asin math builtin, TIC54X: TIC54X-Builtins. (line 13)
22102 * $atan math builtin, TIC54X: TIC54X-Builtins. (line 16)
22103 * $atan2 math builtin, TIC54X: TIC54X-Builtins. (line 19)
22104 * $ceil math builtin, TIC54X: TIC54X-Builtins. (line 22)
22105 * $cos math builtin, TIC54X: TIC54X-Builtins. (line 28)
22106 * $cosh math builtin, TIC54X: TIC54X-Builtins. (line 25)
22107 * $cvf math builtin, TIC54X: TIC54X-Builtins. (line 31)
22108 * $cvi math builtin, TIC54X: TIC54X-Builtins. (line 34)
22109 * $d <1>: AArch64 Mapping Symbols.
22111 * $d: ARM Mapping Symbols. (line 15)
22112 * $exp math builtin, TIC54X: TIC54X-Builtins. (line 37)
22113 * $fabs math builtin, TIC54X: TIC54X-Builtins. (line 40)
22114 * $firstch subsym builtin, TIC54X: TIC54X-Macros. (line 26)
22115 * $floor math builtin, TIC54X: TIC54X-Builtins. (line 43)
22116 * $fmod math builtin, TIC54X: TIC54X-Builtins. (line 47)
22117 * $int math builtin, TIC54X: TIC54X-Builtins. (line 50)
22118 * $iscons subsym builtin, TIC54X: TIC54X-Macros. (line 43)
22119 * $isdefed subsym builtin, TIC54X: TIC54X-Macros. (line 34)
22120 * $ismember subsym builtin, TIC54X: TIC54X-Macros. (line 38)
22121 * $isname subsym builtin, TIC54X: TIC54X-Macros. (line 47)
22122 * $isreg subsym builtin, TIC54X: TIC54X-Macros. (line 50)
22123 * $lastch subsym builtin, TIC54X: TIC54X-Macros. (line 30)
22124 * $ldexp math builtin, TIC54X: TIC54X-Builtins. (line 53)
22125 * $log math builtin, TIC54X: TIC54X-Builtins. (line 59)
22126 * $log10 math builtin, TIC54X: TIC54X-Builtins. (line 56)
22127 * $max math builtin, TIC54X: TIC54X-Builtins. (line 62)
22128 * $min math builtin, TIC54X: TIC54X-Builtins. (line 65)
22129 * $pow math builtin, TIC54X: TIC54X-Builtins. (line 68)
22130 * $round math builtin, TIC54X: TIC54X-Builtins. (line 71)
22131 * $sgn math builtin, TIC54X: TIC54X-Builtins. (line 74)
22132 * $sin math builtin, TIC54X: TIC54X-Builtins. (line 77)
22133 * $sinh math builtin, TIC54X: TIC54X-Builtins. (line 80)
22134 * $sqrt math builtin, TIC54X: TIC54X-Builtins. (line 83)
22135 * $structacc subsym builtin, TIC54X: TIC54X-Macros. (line 57)
22136 * $structsz subsym builtin, TIC54X: TIC54X-Macros. (line 54)
22137 * $symcmp subsym builtin, TIC54X: TIC54X-Macros. (line 23)
22138 * $symlen subsym builtin, TIC54X: TIC54X-Macros. (line 20)
22139 * $t: ARM Mapping Symbols. (line 12)
22140 * $tan math builtin, TIC54X: TIC54X-Builtins. (line 86)
22141 * $tanh math builtin, TIC54X: TIC54X-Builtins. (line 89)
22142 * $trunc math builtin, TIC54X: TIC54X-Builtins. (line 92)
22143 * $x: AArch64 Mapping Symbols.
22145 * %gp: RX-Modifiers. (line 6)
22146 * %gpreg: RX-Modifiers. (line 22)
22147 * %pidreg: RX-Modifiers. (line 25)
22148 * -+ option, VAX/VMS: VAX-Opts. (line 71)
22149 * --: Command Line. (line 10)
22150 * --32 option, i386: i386-Options. (line 8)
22151 * --32 option, x86-64: i386-Options. (line 8)
22152 * --64 option, i386: i386-Options. (line 8)
22153 * --64 option, x86-64: i386-Options. (line 8)
22154 * --absolute-literals: Xtensa Options. (line 21)
22155 * --allow-reg-prefix: SH Options. (line 9)
22156 * --alternate: alternate. (line 6)
22157 * --base-size-default-16: M68K-Opts. (line 65)
22158 * --base-size-default-32: M68K-Opts. (line 65)
22159 * --big: SH Options. (line 9)
22160 * --bitwise-or option, M680x0: M68K-Opts. (line 58)
22161 * --disp-size-default-16: M68K-Opts. (line 74)
22162 * --disp-size-default-32: M68K-Opts. (line 74)
22163 * --divide option, i386: i386-Options. (line 24)
22164 * --dsp: SH Options. (line 9)
22165 * --emulation=crisaout command line option, CRIS: CRIS-Opts. (line 9)
22166 * --emulation=criself command line option, CRIS: CRIS-Opts. (line 9)
22167 * --enforce-aligned-data: Sparc-Aligned-Data. (line 11)
22168 * --fatal-warnings: W. (line 16)
22169 * --fdpic: SH Options. (line 31)
22170 * --fix-v4bx command line option, ARM: ARM Options. (line 173)
22171 * --fixed-special-register-names command line option, MMIX: MMIX-Opts.
22173 * --force-long-branches: M68HC11-Opts. (line 82)
22174 * --generate-example: M68HC11-Opts. (line 99)
22175 * --globalize-symbols command line option, MMIX: MMIX-Opts. (line 12)
22176 * --gnu-syntax command line option, MMIX: MMIX-Opts. (line 16)
22177 * --hash-size=NUMBER: Overview. (line 375)
22178 * --linker-allocated-gregs command line option, MMIX: MMIX-Opts.
22180 * --listing-cont-lines: listing. (line 34)
22181 * --listing-lhs-width: listing. (line 16)
22182 * --listing-lhs-width2: listing. (line 21)
22183 * --listing-rhs-width: listing. (line 28)
22184 * --little: SH Options. (line 9)
22185 * --longcalls: Xtensa Options. (line 35)
22186 * --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 34)
22187 * --MD: MD. (line 6)
22188 * --mul-bug-abort command line option, CRIS: CRIS-Opts. (line 62)
22189 * --no-absolute-literals: Xtensa Options. (line 21)
22190 * --no-expand command line option, MMIX: MMIX-Opts. (line 31)
22191 * --no-longcalls: Xtensa Options. (line 35)
22192 * --no-merge-gregs command line option, MMIX: MMIX-Opts. (line 36)
22193 * --no-mul-bug-abort command line option, CRIS: CRIS-Opts. (line 62)
22194 * --no-predefined-syms command line option, MMIX: MMIX-Opts. (line 22)
22195 * --no-pushj-stubs command line option, MMIX: MMIX-Opts. (line 54)
22196 * --no-stubs command line option, MMIX: MMIX-Opts. (line 54)
22197 * --no-target-align: Xtensa Options. (line 28)
22198 * --no-text-section-literals: Xtensa Options. (line 7)
22199 * --no-transform: Xtensa Options. (line 44)
22200 * --no-underscore command line option, CRIS: CRIS-Opts. (line 15)
22201 * --no-warn: W. (line 11)
22202 * --pcrel: M68K-Opts. (line 86)
22203 * --pic command line option, CRIS: CRIS-Opts. (line 27)
22204 * --print-insn-syntax <1>: XGATE-Opts. (line 25)
22205 * --print-insn-syntax: M68HC11-Opts. (line 88)
22206 * --print-opcodes <1>: M68HC11-Opts. (line 92)
22207 * --print-opcodes: XGATE-Opts. (line 29)
22208 * --register-prefix-optional option, M680x0: M68K-Opts. (line 45)
22209 * --relax: SH Options. (line 9)
22210 * --relax command line option, MMIX: MMIX-Opts. (line 19)
22211 * --rename-section: Xtensa Options. (line 52)
22212 * --renesas: SH Options. (line 9)
22213 * --short-branches: M68HC11-Opts. (line 67)
22214 * --small: SH Options. (line 9)
22215 * --statistics: statistics. (line 6)
22216 * --strict-direct-mode: M68HC11-Opts. (line 57)
22217 * --target-align: Xtensa Options. (line 28)
22218 * --text-section-literals: Xtensa Options. (line 7)
22219 * --traditional-format: traditional-format. (line 6)
22220 * --transform: Xtensa Options. (line 44)
22221 * --underscore command line option, CRIS: CRIS-Opts. (line 15)
22222 * --warn: W. (line 19)
22223 * --x32 option, i386: i386-Options. (line 8)
22224 * --x32 option, x86-64: i386-Options. (line 8)
22225 * --xgate-ramoffset: M68HC11-Opts. (line 36)
22226 * -1 option, VAX/VMS: VAX-Opts. (line 77)
22227 * -32addr command line option, Alpha: Alpha Options. (line 57)
22229 * -A options, i960: Options-i960. (line 6)
22237 * -Asparc: Sparc-Opts. (line 25)
22238 * -Asparcfmaf: Sparc-Opts. (line 25)
22239 * -Asparcima: Sparc-Opts. (line 25)
22240 * -Asparclet: Sparc-Opts. (line 25)
22241 * -Asparclite: Sparc-Opts. (line 25)
22242 * -Asparcvis: Sparc-Opts. (line 25)
22243 * -Asparcvis2: Sparc-Opts. (line 25)
22244 * -Asparcvis3: Sparc-Opts. (line 25)
22245 * -Asparcvis3r: Sparc-Opts. (line 25)
22246 * -Av6: Sparc-Opts. (line 25)
22247 * -Av7: Sparc-Opts. (line 25)
22248 * -Av8: Sparc-Opts. (line 25)
22249 * -Av9: Sparc-Opts. (line 25)
22250 * -Av9a: Sparc-Opts. (line 25)
22251 * -Av9b: Sparc-Opts. (line 25)
22252 * -Av9c: Sparc-Opts. (line 25)
22253 * -Av9d: Sparc-Opts. (line 25)
22254 * -Av9v: Sparc-Opts. (line 25)
22255 * -b option, i960: Options-i960. (line 22)
22256 * -big option, M32R: M32R-Opts. (line 35)
22258 * -D, ignored on VAX: VAX-Opts. (line 11)
22259 * -d, VAX option: VAX-Opts. (line 16)
22260 * -eabi= command line option, ARM: ARM Options. (line 156)
22261 * -EB command line option, AArch64: AArch64 Options. (line 6)
22262 * -EB command line option, ARC: ARC Options. (line 31)
22263 * -EB command line option, ARM: ARM Options. (line 161)
22264 * -EB option (MIPS): MIPS Opts. (line 13)
22265 * -EB option, M32R: M32R-Opts. (line 39)
22266 * -EB option, TILE-Gx: TILE-Gx Options. (line 11)
22267 * -EL command line option, AArch64: AArch64 Options. (line 10)
22268 * -EL command line option, ARC: ARC Options. (line 35)
22269 * -EL command line option, ARM: ARM Options. (line 165)
22270 * -EL option (MIPS): MIPS Opts. (line 13)
22271 * -EL option, M32R: M32R-Opts. (line 32)
22272 * -EL option, TILE-Gx: TILE-Gx Options. (line 11)
22274 * -F command line option, Alpha: Alpha Options. (line 57)
22275 * -g command line option, Alpha: Alpha Options. (line 47)
22276 * -G command line option, Alpha: Alpha Options. (line 53)
22277 * -G option (MIPS): MIPS Opts. (line 8)
22278 * -H option, VAX/VMS: VAX-Opts. (line 81)
22279 * -h option, VAX/VMS: VAX-Opts. (line 45)
22280 * -I PATH: I. (line 6)
22281 * -ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 87)
22282 * -Ip option, M32RX: M32R-Opts. (line 97)
22283 * -J, ignored on VAX: VAX-Opts. (line 27)
22285 * -k command line option, ARM: ARM Options. (line 169)
22286 * -KPIC option, M32R: M32R-Opts. (line 42)
22287 * -KPIC option, MIPS: MIPS Opts. (line 21)
22289 * -l option, M680x0: M68K-Opts. (line 33)
22290 * -little option, M32R: M32R-Opts. (line 27)
22292 * -m11/03: PDP-11-Options. (line 140)
22293 * -m11/04: PDP-11-Options. (line 143)
22294 * -m11/05: PDP-11-Options. (line 146)
22295 * -m11/10: PDP-11-Options. (line 146)
22296 * -m11/15: PDP-11-Options. (line 149)
22297 * -m11/20: PDP-11-Options. (line 149)
22298 * -m11/21: PDP-11-Options. (line 152)
22299 * -m11/23: PDP-11-Options. (line 155)
22300 * -m11/24: PDP-11-Options. (line 155)
22301 * -m11/34: PDP-11-Options. (line 158)
22302 * -m11/34a: PDP-11-Options. (line 161)
22303 * -m11/35: PDP-11-Options. (line 164)
22304 * -m11/40: PDP-11-Options. (line 164)
22305 * -m11/44: PDP-11-Options. (line 167)
22306 * -m11/45: PDP-11-Options. (line 170)
22307 * -m11/50: PDP-11-Options. (line 170)
22308 * -m11/53: PDP-11-Options. (line 173)
22309 * -m11/55: PDP-11-Options. (line 170)
22310 * -m11/60: PDP-11-Options. (line 176)
22311 * -m11/70: PDP-11-Options. (line 170)
22312 * -m11/73: PDP-11-Options. (line 173)
22313 * -m11/83: PDP-11-Options. (line 173)
22314 * -m11/84: PDP-11-Options. (line 173)
22315 * -m11/93: PDP-11-Options. (line 173)
22316 * -m11/94: PDP-11-Options. (line 173)
22317 * -m16c option, M16C: M32C-Opts. (line 12)
22318 * -m31 option, s390: s390 Options. (line 8)
22319 * -m32 option, TILE-Gx: TILE-Gx Options. (line 8)
22320 * -m32bit-doubles: RX-Opts. (line 9)
22321 * -m32c option, M32C: M32C-Opts. (line 9)
22322 * -m32r option, M32R: M32R-Opts. (line 21)
22323 * -m32rx option, M32R2: M32R-Opts. (line 17)
22324 * -m32rx option, M32RX: M32R-Opts. (line 9)
22325 * -m64 option, s390: s390 Options. (line 8)
22326 * -m64 option, TILE-Gx: TILE-Gx Options. (line 8)
22327 * -m64bit-doubles: RX-Opts. (line 15)
22328 * -m68000 and related options: M68K-Opts. (line 98)
22329 * -m68hc11: M68HC11-Opts. (line 9)
22330 * -m68hc12: M68HC11-Opts. (line 14)
22331 * -m68hcs12: M68HC11-Opts. (line 21)
22332 * -m[no-]68851 command line option, M680x0: M68K-Opts. (line 21)
22333 * -m[no-]68881 command line option, M680x0: M68K-Opts. (line 21)
22334 * -m[no-]div command line option, M680x0: M68K-Opts. (line 21)
22335 * -m[no-]emac command line option, M680x0: M68K-Opts. (line 21)
22336 * -m[no-]float command line option, M680x0: M68K-Opts. (line 21)
22337 * -m[no-]mac command line option, M680x0: M68K-Opts. (line 21)
22338 * -m[no-]usp command line option, M680x0: M68K-Opts. (line 21)
22339 * -mall: PDP-11-Options. (line 26)
22340 * -mall-enabled command line option, LM32: LM32 Options. (line 30)
22341 * -mall-extensions: PDP-11-Options. (line 26)
22342 * -mall-opcodes command line option, AVR: AVR Options. (line 96)
22343 * -mapcs-26 command line option, ARM: ARM Options. (line 128)
22344 * -mapcs-32 command line option, ARM: ARM Options. (line 128)
22345 * -mapcs-float command line option, ARM: ARM Options. (line 142)
22346 * -mapcs-reentrant command line option, ARM: ARM Options. (line 147)
22347 * -marc[5|6|7|8] command line option, ARC: ARC Options. (line 6)
22348 * -march= command line option, ARM: ARM Options. (line 65)
22349 * -march= command line option, M680x0: M68K-Opts. (line 8)
22350 * -march= command line option, TIC6X: TIC6X Options. (line 6)
22351 * -march= option, i386: i386-Options. (line 31)
22352 * -march= option, s390: s390 Options. (line 25)
22353 * -march= option, x86-64: i386-Options. (line 31)
22354 * -matpcs command line option, ARM: ARM Options. (line 134)
22355 * -mavxscalar= option, i386: i386-Options. (line 81)
22356 * -mavxscalar= option, x86-64: i386-Options. (line 81)
22357 * -mbarrel-shift-enabled command line option, LM32: LM32 Options.
22359 * -mbig-endian: RX-Opts. (line 20)
22360 * -mbreak-enabled command line option, LM32: LM32 Options. (line 27)
22361 * -mcis: PDP-11-Options. (line 32)
22362 * -mconstant-gp command line option, IA-64: IA-64 Options. (line 6)
22363 * -mCPU command line option, Alpha: Alpha Options. (line 6)
22364 * -mcpu option, cpu: TIC54X-Opts. (line 15)
22365 * -mcpu= command line option, ARM: ARM Options. (line 6)
22366 * -mcpu= command line option, Blackfin: Blackfin Options. (line 6)
22367 * -mcpu= command line option, M680x0: M68K-Opts. (line 14)
22368 * -mcsm: PDP-11-Options. (line 43)
22369 * -mdcache-enabled command line option, LM32: LM32 Options. (line 24)
22370 * -mdebug command line option, Alpha: Alpha Options. (line 25)
22371 * -mdivide-enabled command line option, LM32: LM32 Options. (line 9)
22372 * -mdsbt command line option, TIC6X: TIC6X Options. (line 13)
22373 * -me option, stderr redirect: TIC54X-Opts. (line 20)
22374 * -meis: PDP-11-Options. (line 46)
22375 * -mepiphany command line option, Epiphany: Epiphany Options. (line 9)
22376 * -mepiphany16 command line option, Epiphany: Epiphany Options.
22378 * -merrors-to-file option, stderr redirect: TIC54X-Opts. (line 20)
22379 * -mesa option, s390: s390 Options. (line 17)
22380 * -mf option, far-mode: TIC54X-Opts. (line 8)
22381 * -mf11: PDP-11-Options. (line 122)
22382 * -mfar-mode option, far-mode: TIC54X-Opts. (line 8)
22383 * -mfdpic command line option, Blackfin: Blackfin Options. (line 19)
22384 * -mfis: PDP-11-Options. (line 51)
22385 * -mfloat-abi= command line option, ARM: ARM Options. (line 151)
22386 * -mfp-11: PDP-11-Options. (line 56)
22387 * -mfpp: PDP-11-Options. (line 56)
22388 * -mfpu: PDP-11-Options. (line 56)
22389 * -mfpu= command line option, ARM: ARM Options. (line 81)
22390 * -micache-enabled command line option, LM32: LM32 Options. (line 21)
22391 * -mimplicit-it command line option, ARM: ARM Options. (line 112)
22392 * -mint-register: RX-Opts. (line 57)
22393 * -mip2022 option, IP2K: IP2K-Opts. (line 14)
22394 * -mip2022ext option, IP2022: IP2K-Opts. (line 9)
22395 * -mj11: PDP-11-Options. (line 126)
22396 * -mka11: PDP-11-Options. (line 92)
22397 * -mkb11: PDP-11-Options. (line 95)
22398 * -mkd11a: PDP-11-Options. (line 98)
22399 * -mkd11b: PDP-11-Options. (line 101)
22400 * -mkd11d: PDP-11-Options. (line 104)
22401 * -mkd11e: PDP-11-Options. (line 107)
22402 * -mkd11f: PDP-11-Options. (line 110)
22403 * -mkd11h: PDP-11-Options. (line 110)
22404 * -mkd11k: PDP-11-Options. (line 114)
22405 * -mkd11q: PDP-11-Options. (line 110)
22406 * -mkd11z: PDP-11-Options. (line 118)
22407 * -mkev11: PDP-11-Options. (line 51)
22408 * -mlimited-eis: PDP-11-Options. (line 64)
22409 * -mlittle-endian: RX-Opts. (line 26)
22410 * -mlong <1>: M68HC11-Opts. (line 45)
22411 * -mlong: XGATE-Opts. (line 13)
22412 * -mlong-double <1>: XGATE-Opts. (line 21)
22413 * -mlong-double: M68HC11-Opts. (line 53)
22414 * -mm9s12x: M68HC11-Opts. (line 27)
22415 * -mm9s12xg: M68HC11-Opts. (line 32)
22416 * -mmcu= command line option, AVR: AVR Options. (line 6)
22417 * -mmfpt: PDP-11-Options. (line 70)
22418 * -mmicrocode: PDP-11-Options. (line 83)
22419 * -mmnemonic= option, i386: i386-Options. (line 89)
22420 * -mmnemonic= option, x86-64: i386-Options. (line 89)
22421 * -mmultiply-enabled command line option, LM32: LM32 Options. (line 6)
22422 * -mmutiproc: PDP-11-Options. (line 73)
22423 * -mmxps: PDP-11-Options. (line 77)
22424 * -mnaked-reg option, i386: i386-Options. (line 101)
22425 * -mnaked-reg option, x86-64: i386-Options. (line 101)
22426 * -mno-cis: PDP-11-Options. (line 32)
22427 * -mno-csm: PDP-11-Options. (line 43)
22428 * -mno-dsbt command line option, TIC6X: TIC6X Options. (line 13)
22429 * -mno-eis: PDP-11-Options. (line 46)
22430 * -mno-extensions: PDP-11-Options. (line 29)
22431 * -mno-fdpic command line option, Blackfin: Blackfin Options. (line 22)
22432 * -mno-fis: PDP-11-Options. (line 51)
22433 * -mno-fp-11: PDP-11-Options. (line 56)
22434 * -mno-fpp: PDP-11-Options. (line 56)
22435 * -mno-fpu: PDP-11-Options. (line 56)
22436 * -mno-kev11: PDP-11-Options. (line 51)
22437 * -mno-limited-eis: PDP-11-Options. (line 64)
22438 * -mno-mfpt: PDP-11-Options. (line 70)
22439 * -mno-microcode: PDP-11-Options. (line 83)
22440 * -mno-mutiproc: PDP-11-Options. (line 73)
22441 * -mno-mxps: PDP-11-Options. (line 77)
22442 * -mno-pic: PDP-11-Options. (line 11)
22443 * -mno-pic command line option, TIC6X: TIC6X Options. (line 36)
22444 * -mno-regnames option, s390: s390 Options. (line 35)
22445 * -mno-skip-bug command line option, AVR: AVR Options. (line 99)
22446 * -mno-spl: PDP-11-Options. (line 80)
22447 * -mno-sym32: MIPS Opts. (line 222)
22448 * -mno-wrap command line option, AVR: AVR Options. (line 102)
22449 * -mnopic command line option, Blackfin: Blackfin Options. (line 22)
22450 * -mpic: PDP-11-Options. (line 11)
22451 * -mpic command line option, TIC6X: TIC6X Options. (line 36)
22452 * -mpid: RX-Opts. (line 50)
22453 * -mpid= command line option, TIC6X: TIC6X Options. (line 23)
22454 * -mregnames option, s390: s390 Options. (line 32)
22455 * -mrelax command line option, V850: V850 Options. (line 63)
22456 * -mshort <1>: M68HC11-Opts. (line 40)
22457 * -mshort: XGATE-Opts. (line 8)
22458 * -mshort-double <1>: XGATE-Opts. (line 17)
22459 * -mshort-double: M68HC11-Opts. (line 49)
22460 * -msign-extend-enabled command line option, LM32: LM32 Options.
22462 * -msmall-data-limit: RX-Opts. (line 42)
22463 * -mspl: PDP-11-Options. (line 80)
22464 * -msse-check= option, i386: i386-Options. (line 71)
22465 * -msse-check= option, x86-64: i386-Options. (line 71)
22466 * -msse2avx option, i386: i386-Options. (line 67)
22467 * -msse2avx option, x86-64: i386-Options. (line 67)
22468 * -msym32: MIPS Opts. (line 222)
22469 * -msyntax= option, i386: i386-Options. (line 95)
22470 * -msyntax= option, x86-64: i386-Options. (line 95)
22471 * -mt11: PDP-11-Options. (line 130)
22472 * -mthumb command line option, ARM: ARM Options. (line 103)
22473 * -mthumb-interwork command line option, ARM: ARM Options. (line 108)
22474 * -mtune= option, i386: i386-Options. (line 59)
22475 * -mtune= option, x86-64: i386-Options. (line 59)
22476 * -muse-conventional-section-names: RX-Opts. (line 33)
22477 * -muse-renesas-section-names: RX-Opts. (line 37)
22478 * -muser-enabled command line option, LM32: LM32 Options. (line 18)
22479 * -mv850 command line option, V850: V850 Options. (line 23)
22480 * -mv850any command line option, V850: V850 Options. (line 41)
22481 * -mv850e command line option, V850: V850 Options. (line 29)
22482 * -mv850e1 command line option, V850: V850 Options. (line 35)
22483 * -mv850e2 command line option, V850: V850 Options. (line 51)
22484 * -mv850e2v3 command line option, V850: V850 Options. (line 57)
22485 * -mvxworks-pic option, MIPS: MIPS Opts. (line 26)
22486 * -mwarn-areg-zero option, s390: s390 Options. (line 38)
22487 * -mwarn-deprecated command line option, ARM: ARM Options. (line 177)
22488 * -mzarch option, s390: s390 Options. (line 17)
22489 * -N command line option, CRIS: CRIS-Opts. (line 58)
22490 * -nIp option, M32RX: M32R-Opts. (line 101)
22491 * -no-bitinst, M32R2: M32R-Opts. (line 54)
22492 * -no-ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 93)
22493 * -no-mdebug command line option, Alpha: Alpha Options. (line 25)
22494 * -no-parallel option, M32RX: M32R-Opts. (line 51)
22495 * -no-relax option, i960: Options-i960. (line 66)
22496 * -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts.
22498 * -no-warn-unmatched-high option, M32R: M32R-Opts. (line 111)
22499 * -nocpp ignored (MIPS): MIPS Opts. (line 225)
22500 * -noreplace command line option, Alpha: Alpha Options. (line 40)
22502 * -O option, M32RX: M32R-Opts. (line 59)
22503 * -parallel option, M32RX: M32R-Opts. (line 46)
22505 * -r800 command line option, Z80: Z80 Options. (line 41)
22506 * -relax command line option, Alpha: Alpha Options. (line 32)
22507 * -replace command line option, Alpha: Alpha Options. (line 40)
22508 * -S, ignored on VAX: VAX-Opts. (line 11)
22509 * -t, ignored on VAX: VAX-Opts. (line 36)
22510 * -T, ignored on VAX: VAX-Opts. (line 11)
22512 * -V, redundant on VAX: VAX-Opts. (line 22)
22513 * -version: v. (line 6)
22515 * -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line 65)
22516 * -warn-unmatched-high option, M32R: M32R-Opts. (line 105)
22517 * -Wnp option, M32RX: M32R-Opts. (line 83)
22518 * -Wnuh option, M32RX: M32R-Opts. (line 117)
22519 * -Wp option, M32RX: M32R-Opts. (line 75)
22520 * -wsigned_overflow command line option, V850: V850 Options. (line 9)
22521 * -Wuh option, M32RX: M32R-Opts. (line 114)
22522 * -wunsigned_overflow command line option, V850: V850 Options.
22524 * -x command line option, MMIX: MMIX-Opts. (line 44)
22525 * -z80 command line option, Z80: Z80 Options. (line 8)
22526 * -z8001 command line option, Z8000: Z8000 Options. (line 6)
22527 * -z8002 command line option, Z8000: Z8000 Options. (line 9)
22528 * . (symbol): Dot. (line 6)
22529 * .2byte directive, ARM: ARM Directives. (line 6)
22530 * .4byte directive, ARM: ARM Directives. (line 6)
22531 * .8byte directive, ARM: ARM Directives. (line 6)
22532 * .align directive, ARM: ARM Directives. (line 11)
22533 * .align directive, TILE-Gx: TILE-Gx Directives. (line 6)
22534 * .align directive, TILEPro: TILEPro Directives. (line 6)
22535 * .allow_suspicious_bundles directive, TILE-Gx: TILE-Gx Directives.
22537 * .allow_suspicious_bundles directive, TILEPro: TILEPro Directives.
22539 * .arch directive, ARM: ARM Directives. (line 18)
22540 * .arch directive, TIC6X: TIC6X Directives. (line 10)
22541 * .arch_extension directive, ARM: ARM Directives. (line 25)
22542 * .arm directive, ARM: ARM Directives. (line 34)
22543 * .big directive, M32RX: M32R-Directives. (line 88)
22544 * .bss directive, AArch64: AArch64 Directives. (line 6)
22545 * .bss directive, ARM: ARM Directives. (line 42)
22546 * .c6xabi_attribute directive, TIC6X: TIC6X Directives. (line 20)
22547 * .cantunwind directive, ARM: ARM Directives. (line 45)
22548 * .cantunwind directive, TIC6X: TIC6X Directives. (line 13)
22549 * .code directive, ARM: ARM Directives. (line 49)
22550 * .cpu directive, ARM: ARM Directives. (line 53)
22551 * .dn and .qn directives, ARM: ARM Directives. (line 60)
22552 * .eabi_attribute directive, ARM: ARM Directives. (line 83)
22553 * .ehtype directive, TIC6X: TIC6X Directives. (line 31)
22554 * .endp directive, TIC6X: TIC6X Directives. (line 34)
22555 * .even directive, ARM: ARM Directives. (line 111)
22556 * .extend directive, ARM: ARM Directives. (line 114)
22557 * .fnend directive, ARM: ARM Directives. (line 120)
22558 * .fnstart directive, ARM: ARM Directives. (line 129)
22559 * .force_thumb directive, ARM: ARM Directives. (line 132)
22560 * .fpu directive, ARM: ARM Directives. (line 136)
22561 * .global: MIPS insn. (line 12)
22562 * .handlerdata directive, ARM: ARM Directives. (line 140)
22563 * .handlerdata directive, TIC6X: TIC6X Directives. (line 39)
22564 * .insn: MIPS insn. (line 6)
22565 * .insn directive, s390: s390 Directives. (line 11)
22566 * .inst directive, ARM: ARM Directives. (line 149)
22567 * .ldouble directive, ARM: ARM Directives. (line 114)
22568 * .little directive, M32RX: M32R-Directives. (line 82)
22569 * .long directive, s390: s390 Directives. (line 16)
22570 * .ltorg directive, AArch64: AArch64 Directives. (line 9)
22571 * .ltorg directive, ARM: ARM Directives. (line 159)
22572 * .ltorg directive, s390: s390 Directives. (line 88)
22573 * .m32r directive, M32R: M32R-Directives. (line 66)
22574 * .m32r2 directive, M32R2: M32R-Directives. (line 77)
22575 * .m32rx directive, M32RX: M32R-Directives. (line 72)
22576 * .machine directive, s390: s390 Directives. (line 93)
22577 * .movsp directive, ARM: ARM Directives. (line 173)
22578 * .no_pointers directive, XStormy16: XStormy16 Directives.
22580 * .nocmp directive, TIC6X: TIC6X Directives. (line 47)
22581 * .o: Object. (line 6)
22582 * .object_arch directive, ARM: ARM Directives. (line 178)
22583 * .packed directive, ARM: ARM Directives. (line 184)
22584 * .pad directive, ARM: ARM Directives. (line 189)
22585 * .param on HPPA: HPPA Directives. (line 19)
22586 * .personality directive, ARM: ARM Directives. (line 194)
22587 * .personality directive, TIC6X: TIC6X Directives. (line 55)
22588 * .personalityindex directive, ARM: ARM Directives. (line 197)
22589 * .personalityindex directive, TIC6X: TIC6X Directives. (line 51)
22590 * .pool directive, AArch64: AArch64 Directives. (line 23)
22591 * .pool directive, ARM: ARM Directives. (line 201)
22592 * .quad directive, s390: s390 Directives. (line 16)
22593 * .req directive, AArch64: AArch64 Directives. (line 26)
22594 * .req directive, ARM: ARM Directives. (line 204)
22595 * .require_canonical_reg_names directive, TILE-Gx: TILE-Gx Directives.
22597 * .require_canonical_reg_names directive, TILEPro: TILEPro Directives.
22599 * .save directive, ARM: ARM Directives. (line 209)
22600 * .scomm directive, TIC6X: TIC6X Directives. (line 58)
22601 * .secrel32 directive, ARM: ARM Directives. (line 247)
22602 * .set arch=CPU: MIPS ISA. (line 18)
22603 * .set autoextend: MIPS autoextend. (line 6)
22604 * .set doublefloat: MIPS floating-point. (line 12)
22605 * .set dsp: MIPS ASE instruction generation overrides.
22607 * .set dspr2: MIPS ASE instruction generation overrides.
22609 * .set hardfloat: MIPS floating-point. (line 6)
22610 * .set mcu: MIPS ASE instruction generation overrides.
22612 * .set mdmx: MIPS ASE instruction generation overrides.
22614 * .set mips3d: MIPS ASE instruction generation overrides.
22616 * .set mipsN: MIPS ISA. (line 6)
22617 * .set mt: MIPS ASE instruction generation overrides.
22619 * .set noautoextend: MIPS autoextend. (line 6)
22620 * .set nodsp: MIPS ASE instruction generation overrides.
22622 * .set nodspr2: MIPS ASE instruction generation overrides.
22624 * .set nomcu: MIPS ASE instruction generation overrides.
22626 * .set nomdmx: MIPS ASE instruction generation overrides.
22628 * .set nomips3d: MIPS ASE instruction generation overrides.
22630 * .set nomt: MIPS ASE instruction generation overrides.
22632 * .set nosmartmips: MIPS ASE instruction generation overrides.
22634 * .set nosym32: MIPS symbol sizes. (line 6)
22635 * .set pop: MIPS option stack. (line 6)
22636 * .set push: MIPS option stack. (line 6)
22637 * .set singlefloat: MIPS floating-point. (line 12)
22638 * .set smartmips: MIPS ASE instruction generation overrides.
22640 * .set softfloat: MIPS floating-point. (line 6)
22641 * .set sym32: MIPS symbol sizes. (line 6)
22642 * .setfp directive, ARM: ARM Directives. (line 233)
22643 * .short directive, s390: s390 Directives. (line 16)
22644 * .syntax directive, ARM: ARM Directives. (line 252)
22645 * .thumb directive, ARM: ARM Directives. (line 256)
22646 * .thumb_func directive, ARM: ARM Directives. (line 259)
22647 * .thumb_set directive, ARM: ARM Directives. (line 270)
22648 * .tlsdescseq directive, ARM: ARM Directives. (line 277)
22649 * .unreq directive, AArch64: AArch64 Directives. (line 31)
22650 * .unreq directive, ARM: ARM Directives. (line 282)
22651 * .unwind_raw directive, ARM: ARM Directives. (line 293)
22652 * .v850 directive, V850: V850 Directives. (line 14)
22653 * .v850e directive, V850: V850 Directives. (line 20)
22654 * .v850e1 directive, V850: V850 Directives. (line 26)
22655 * .v850e2 directive, V850: V850 Directives. (line 32)
22656 * .v850e2v3 directive, V850: V850 Directives. (line 38)
22657 * .vsave directive, ARM: ARM Directives. (line 300)
22658 * .z8001: Z8000 Directives. (line 11)
22659 * .z8002: Z8000 Directives. (line 15)
22660 * 16-bit code, i386: i386-16bit. (line 6)
22661 * 16bit_pointers directive, XStormy16: XStormy16 Directives.
22663 * 2byte directive, ARC: ARC Directives. (line 9)
22664 * 32bit_pointers directive, XStormy16: XStormy16 Directives.
22666 * 3byte directive, ARC: ARC Directives. (line 12)
22667 * 3DNow!, i386: i386-SIMD. (line 6)
22668 * 3DNow!, x86-64: i386-SIMD. (line 6)
22669 * 430 support: MSP430-Dependent. (line 6)
22670 * 4byte directive, ARC: ARC Directives. (line 15)
22671 * : (label): Statements. (line 31)
22672 * @hi pseudo-op, XStormy16: XStormy16 Opcodes. (line 21)
22673 * @lo pseudo-op, XStormy16: XStormy16 Opcodes. (line 10)
22674 * @word modifier, D10V: D10V-Word. (line 6)
22675 * \" (doublequote character): Strings. (line 43)
22676 * \\ (\ character): Strings. (line 40)
22677 * \b (backspace character): Strings. (line 15)
22678 * \DDD (octal character code): Strings. (line 30)
22679 * \f (formfeed character): Strings. (line 18)
22680 * \n (newline character): Strings. (line 21)
22681 * \r (carriage return character): Strings. (line 24)
22682 * \t (tab): Strings. (line 27)
22683 * \XD... (hex character code): Strings. (line 36)
22684 * _ opcode prefix: Xtensa Opcodes. (line 9)
22685 * a.out: Object. (line 6)
22686 * a.out symbol attributes: a.out Symbols. (line 6)
22687 * A_DIR environment variable, TIC54X: TIC54X-Env. (line 6)
22688 * AArch64 floating point (IEEE): AArch64 Floating Point.
22690 * AArch64 immediate character: AArch64-Chars. (line 13)
22691 * AArch64 line comment character: AArch64-Chars. (line 6)
22692 * AArch64 line separator: AArch64-Chars. (line 10)
22693 * AArch64 machine directives: AArch64 Directives. (line 6)
22694 * AArch64 opcodes: AArch64 Opcodes. (line 6)
22695 * AArch64 options (none): AArch64 Options. (line 6)
22696 * AArch64 register names: AArch64-Regs. (line 6)
22697 * AArch64 relocations: AArch64-Relocations. (line 6)
22698 * AArch64 support: AArch64-Dependent. (line 6)
22699 * ABI options, SH64: SH64 Options. (line 29)
22700 * abort directive: Abort. (line 6)
22701 * ABORT directive: ABORT (COFF). (line 6)
22702 * absolute section: Ld Sections. (line 29)
22703 * absolute-literals directive: Absolute Literals Directive.
22705 * ADDI instructions, relaxation: Xtensa Immediate Relaxation.
22707 * addition, permitted arguments: Infix Ops. (line 44)
22708 * addresses: Expressions. (line 6)
22709 * addresses, format of: Secs Background. (line 68)
22710 * addressing modes, D10V: D10V-Addressing. (line 6)
22711 * addressing modes, D30V: D30V-Addressing. (line 6)
22712 * addressing modes, H8/300: H8/300-Addressing. (line 6)
22713 * addressing modes, M680x0: M68K-Syntax. (line 21)
22714 * addressing modes, M68HC11: M68HC11-Syntax. (line 30)
22715 * addressing modes, SH: SH-Addressing. (line 6)
22716 * addressing modes, SH64: SH64-Addressing. (line 6)
22717 * addressing modes, XGATE: XGATE-Syntax. (line 29)
22718 * addressing modes, Z8000: Z8000-Addressing. (line 6)
22719 * ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25)
22720 * ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35)
22721 * ADRP, ADD, LDR/STR group relocations, AArch64: AArch64-Relocations.
22723 * advancing location counter: Org. (line 6)
22724 * align directive: Align. (line 6)
22725 * align directive, SPARC: Sparc-Directives. (line 9)
22726 * align directive, TIC54X: TIC54X-Directives. (line 6)
22727 * aligned instruction bundle: Bundle directives. (line 6)
22728 * alignment for NEON instructions: ARM-Neon-Alignment. (line 6)
22729 * alignment of branch targets: Xtensa Automatic Alignment.
22731 * alignment of LOOP instructions: Xtensa Automatic Alignment.
22733 * Alpha floating point (IEEE): Alpha Floating Point.
22735 * Alpha line comment character: Alpha-Chars. (line 6)
22736 * Alpha line separator: Alpha-Chars. (line 11)
22737 * Alpha notes: Alpha Notes. (line 6)
22738 * Alpha options: Alpha Options. (line 6)
22739 * Alpha registers: Alpha-Regs. (line 6)
22740 * Alpha relocations: Alpha-Relocs. (line 6)
22741 * Alpha support: Alpha-Dependent. (line 6)
22742 * Alpha Syntax: Alpha Options. (line 61)
22743 * Alpha-only directives: Alpha Directives. (line 10)
22744 * altered difference tables: Word. (line 12)
22745 * alternate syntax for the 680x0: M68K-Moto-Syntax. (line 6)
22746 * ARC floating point (IEEE): ARC Floating Point. (line 6)
22747 * ARC line comment character: ARC-Chars. (line 6)
22748 * ARC line separator: ARC-Chars. (line 12)
22749 * ARC machine directives: ARC Directives. (line 6)
22750 * ARC opcodes: ARC Opcodes. (line 6)
22751 * ARC options (none): ARC Options. (line 6)
22752 * ARC register names: ARC-Regs. (line 6)
22753 * ARC support: ARC-Dependent. (line 6)
22754 * arc5 arc5, ARC: ARC Options. (line 10)
22755 * arc6 arc6, ARC: ARC Options. (line 13)
22756 * arc7 arc7, ARC: ARC Options. (line 21)
22757 * arc8 arc8, ARC: ARC Options. (line 24)
22758 * arch directive, i386: i386-Arch. (line 6)
22759 * arch directive, M680x0: M68K-Directives. (line 22)
22760 * arch directive, x86-64: i386-Arch. (line 6)
22761 * architecture options, i960: Options-i960. (line 6)
22762 * architecture options, IP2022: IP2K-Opts. (line 9)
22763 * architecture options, IP2K: IP2K-Opts. (line 14)
22764 * architecture options, M16C: M32C-Opts. (line 12)
22765 * architecture options, M32C: M32C-Opts. (line 9)
22766 * architecture options, M32R: M32R-Opts. (line 21)
22767 * architecture options, M32R2: M32R-Opts. (line 17)
22768 * architecture options, M32RX: M32R-Opts. (line 9)
22769 * architecture options, M680x0: M68K-Opts. (line 98)
22770 * Architecture variant option, CRIS: CRIS-Opts. (line 34)
22771 * architectures, PowerPC: PowerPC-Opts. (line 6)
22772 * architectures, SCORE: SCORE-Opts. (line 6)
22773 * architectures, SPARC: Sparc-Opts. (line 6)
22774 * arguments for addition: Infix Ops. (line 44)
22775 * arguments for subtraction: Infix Ops. (line 49)
22776 * arguments in expressions: Arguments. (line 6)
22777 * arithmetic functions: Operators. (line 6)
22778 * arithmetic operands: Arguments. (line 6)
22779 * ARM data relocations: ARM-Relocations. (line 6)
22780 * ARM floating point (IEEE): ARM Floating Point. (line 6)
22781 * ARM identifiers: ARM-Chars. (line 19)
22782 * ARM immediate character: ARM-Chars. (line 17)
22783 * ARM line comment character: ARM-Chars. (line 6)
22784 * ARM line separator: ARM-Chars. (line 14)
22785 * ARM machine directives: ARM Directives. (line 6)
22786 * ARM opcodes: ARM Opcodes. (line 6)
22787 * ARM options (none): ARM Options. (line 6)
22788 * ARM register names: ARM-Regs. (line 6)
22789 * ARM support: ARM-Dependent. (line 6)
22790 * ascii directive: Ascii. (line 6)
22791 * asciz directive: Asciz. (line 6)
22792 * asg directive, TIC54X: TIC54X-Directives. (line 20)
22793 * assembler bugs, reporting: Bug Reporting. (line 6)
22794 * assembler crash: Bug Criteria. (line 9)
22795 * assembler directive .3byte, RX: RX-Directives. (line 9)
22796 * assembler directive .arch, CRIS: CRIS-Pseudos. (line 45)
22797 * assembler directive .dword, CRIS: CRIS-Pseudos. (line 12)
22798 * assembler directive .far, M68HC11: M68HC11-Directives. (line 20)
22799 * assembler directive .fetchalign, RX: RX-Directives. (line 13)
22800 * assembler directive .interrupt, M68HC11: M68HC11-Directives.
22802 * assembler directive .mode, M68HC11: M68HC11-Directives. (line 16)
22803 * assembler directive .relax, M68HC11: M68HC11-Directives. (line 10)
22804 * assembler directive .syntax, CRIS: CRIS-Pseudos. (line 17)
22805 * assembler directive .xrefb, M68HC11: M68HC11-Directives. (line 31)
22806 * assembler directive BSPEC, MMIX: MMIX-Pseudos. (line 131)
22807 * assembler directive BYTE, MMIX: MMIX-Pseudos. (line 97)
22808 * assembler directive ESPEC, MMIX: MMIX-Pseudos. (line 131)
22809 * assembler directive GREG, MMIX: MMIX-Pseudos. (line 50)
22810 * assembler directive IS, MMIX: MMIX-Pseudos. (line 42)
22811 * assembler directive LOC, MMIX: MMIX-Pseudos. (line 7)
22812 * assembler directive LOCAL, MMIX: MMIX-Pseudos. (line 28)
22813 * assembler directive OCTA, MMIX: MMIX-Pseudos. (line 108)
22814 * assembler directive PREFIX, MMIX: MMIX-Pseudos. (line 120)
22815 * assembler directive TETRA, MMIX: MMIX-Pseudos. (line 108)
22816 * assembler directive WYDE, MMIX: MMIX-Pseudos. (line 108)
22817 * assembler directives, CRIS: CRIS-Pseudos. (line 6)
22818 * assembler directives, M68HC11: M68HC11-Directives. (line 6)
22819 * assembler directives, M68HC12: M68HC11-Directives. (line 6)
22820 * assembler directives, MMIX: MMIX-Pseudos. (line 6)
22821 * assembler directives, RL78: RL78-Directives. (line 6)
22822 * assembler directives, RX: RX-Directives. (line 6)
22823 * assembler directives, XGATE: XGATE-Directives. (line 6)
22824 * assembler internal logic error: As Sections. (line 13)
22825 * assembler version: v. (line 6)
22826 * assembler, and linker: Secs Background. (line 10)
22827 * assembly listings, enabling: a. (line 6)
22828 * assigning values to symbols <1>: Equ. (line 6)
22829 * assigning values to symbols: Setting Symbols. (line 6)
22830 * atmp directive, i860: Directives-i860. (line 16)
22831 * att_syntax pseudo op, i386: i386-Variations. (line 6)
22832 * att_syntax pseudo op, x86-64: i386-Variations. (line 6)
22833 * attributes, symbol: Symbol Attributes. (line 6)
22834 * auxiliary attributes, COFF symbols: COFF Symbols. (line 19)
22835 * auxiliary symbol information, COFF: Dim. (line 6)
22836 * AVR line comment character: AVR-Chars. (line 6)
22837 * AVR line separator: AVR-Chars. (line 14)
22838 * AVR modifiers: AVR-Modifiers. (line 6)
22839 * AVR opcode summary: AVR Opcodes. (line 6)
22840 * AVR options (none): AVR Options. (line 6)
22841 * AVR register names: AVR-Regs. (line 6)
22842 * AVR support: AVR-Dependent. (line 6)
22843 * backslash (\\): Strings. (line 40)
22844 * backspace (\b): Strings. (line 15)
22845 * balign directive: Balign. (line 6)
22846 * balignl directive: Balign. (line 27)
22847 * balignw directive: Balign. (line 27)
22848 * bes directive, TIC54X: TIC54X-Directives. (line 196)
22849 * big endian output, MIPS: Overview. (line 712)
22850 * big endian output, PJ: Overview. (line 615)
22851 * big-endian output, MIPS: MIPS Opts. (line 13)
22852 * big-endian output, TIC6X: TIC6X Options. (line 46)
22853 * bignums: Bignums. (line 6)
22854 * binary constants, TIC54X: TIC54X-Constants. (line 8)
22855 * binary files, including: Incbin. (line 6)
22856 * binary integers: Integers. (line 6)
22857 * bit names, IA-64: IA-64-Bits. (line 6)
22858 * bitfields, not supported on VAX: VAX-no. (line 6)
22859 * Blackfin directives: Blackfin Directives. (line 6)
22860 * Blackfin options (none): Blackfin Options. (line 6)
22861 * Blackfin support: Blackfin-Dependent. (line 6)
22862 * Blackfin syntax: Blackfin Syntax. (line 6)
22863 * block: Z8000 Directives. (line 55)
22864 * BMI, i386: i386-BMI. (line 6)
22865 * BMI, x86-64: i386-BMI. (line 6)
22866 * branch improvement, M680x0: M68K-Branch. (line 6)
22867 * branch improvement, M68HC11: M68HC11-Branch. (line 6)
22868 * branch improvement, VAX: VAX-branch. (line 6)
22869 * branch instructions, relaxation: Xtensa Branch Relaxation.
22871 * branch recording, i960: Options-i960. (line 22)
22872 * branch statistics table, i960: Options-i960. (line 40)
22873 * branch target alignment: Xtensa Automatic Alignment.
22875 * break directive, TIC54X: TIC54X-Directives. (line 143)
22876 * BSD syntax: PDP-11-Syntax. (line 6)
22877 * bss directive, i960: Directives-i960. (line 6)
22878 * bss directive, TIC54X: TIC54X-Directives. (line 29)
22879 * bss section <1>: bss. (line 6)
22880 * bss section: Ld Sections. (line 20)
22881 * bug criteria: Bug Criteria. (line 6)
22882 * bug reports: Bug Reporting. (line 6)
22883 * bugs in assembler: Reporting Bugs. (line 6)
22884 * Built-in symbols, CRIS: CRIS-Symbols. (line 6)
22885 * builtin math functions, TIC54X: TIC54X-Builtins. (line 6)
22886 * builtin subsym functions, TIC54X: TIC54X-Macros. (line 16)
22887 * bundle: Bundle directives. (line 6)
22888 * bundle-locked: Bundle directives. (line 35)
22889 * bundle_align_mode directive: Bundle directives. (line 6)
22890 * bundle_lock directive: Bundle directives. (line 28)
22891 * bundle_unlock directive: Bundle directives. (line 28)
22892 * bus lock prefixes, i386: i386-Prefixes. (line 36)
22893 * bval: Z8000 Directives. (line 30)
22894 * byte directive: Byte. (line 6)
22895 * byte directive, TIC54X: TIC54X-Directives. (line 36)
22896 * C54XDSP_DIR environment variable, TIC54X: TIC54X-Env. (line 6)
22897 * c_mode directive, TIC54X: TIC54X-Directives. (line 51)
22898 * call instructions, i386: i386-Mnemonics. (line 56)
22899 * call instructions, relaxation: Xtensa Call Relaxation.
22901 * call instructions, x86-64: i386-Mnemonics. (line 56)
22902 * callj, i960 pseudo-opcode: callj-i960. (line 6)
22903 * carriage return (\r): Strings. (line 24)
22904 * case sensitivity, Z80: Z80-Case. (line 6)
22905 * cfi_endproc directive: CFI directives. (line 26)
22906 * cfi_sections directive: CFI directives. (line 6)
22907 * cfi_startproc directive: CFI directives. (line 16)
22908 * char directive, TIC54X: TIC54X-Directives. (line 36)
22909 * character constant, Z80: Z80-Chars. (line 20)
22910 * character constants: Characters. (line 6)
22911 * character escape codes: Strings. (line 15)
22912 * character escapes, Z80: Z80-Chars. (line 18)
22913 * character, single: Chars. (line 6)
22914 * characters used in symbols: Symbol Intro. (line 6)
22915 * clink directive, TIC54X: TIC54X-Directives. (line 45)
22916 * code16 directive, i386: i386-16bit. (line 6)
22917 * code16gcc directive, i386: i386-16bit. (line 6)
22918 * code32 directive, i386: i386-16bit. (line 6)
22919 * code64 directive, i386: i386-16bit. (line 6)
22920 * code64 directive, x86-64: i386-16bit. (line 6)
22921 * COFF auxiliary symbol information: Dim. (line 6)
22922 * COFF structure debugging: Tag. (line 6)
22923 * COFF symbol attributes: COFF Symbols. (line 6)
22924 * COFF symbol descriptor: Desc. (line 6)
22925 * COFF symbol storage class: Scl. (line 6)
22926 * COFF symbol type: Type. (line 11)
22927 * COFF symbols, debugging: Def. (line 6)
22928 * COFF value attribute: Val. (line 6)
22929 * COMDAT: Linkonce. (line 6)
22930 * comm directive: Comm. (line 6)
22931 * command line conventions: Command Line. (line 6)
22932 * command line options, V850: V850 Options. (line 9)
22933 * command-line options ignored, VAX: VAX-Opts. (line 6)
22934 * comment character, XStormy16: XStormy16-Chars. (line 11)
22935 * comments: Comments. (line 6)
22936 * comments, M680x0: M68K-Chars. (line 6)
22937 * comments, removed by preprocessor: Preprocessing. (line 11)
22938 * common directive, SPARC: Sparc-Directives. (line 12)
22939 * common sections: Linkonce. (line 6)
22940 * common variable storage: bss. (line 6)
22941 * compare and jump expansions, i960: Compare-and-branch-i960.
22943 * compare/branch instructions, i960: Compare-and-branch-i960.
22945 * comparison expressions: Infix Ops. (line 55)
22946 * conditional assembly: If. (line 6)
22947 * constant, single character: Chars. (line 6)
22948 * constants: Constants. (line 6)
22949 * constants, bignum: Bignums. (line 6)
22950 * constants, character: Characters. (line 6)
22951 * constants, converted by preprocessor: Preprocessing. (line 14)
22952 * constants, floating point: Flonums. (line 6)
22953 * constants, integer: Integers. (line 6)
22954 * constants, number: Numbers. (line 6)
22955 * constants, Sparc: Sparc-Constants. (line 6)
22956 * constants, string: Strings. (line 6)
22957 * constants, TIC54X: TIC54X-Constants. (line 6)
22958 * conversion instructions, i386: i386-Mnemonics. (line 37)
22959 * conversion instructions, x86-64: i386-Mnemonics. (line 37)
22960 * coprocessor wait, i386: i386-Prefixes. (line 40)
22961 * copy directive, TIC54X: TIC54X-Directives. (line 54)
22962 * cpu directive, M680x0: M68K-Directives. (line 30)
22963 * CR16 line comment character: CR16-Chars. (line 6)
22964 * CR16 line separator: CR16-Chars. (line 13)
22965 * CR16 Operand Qualifiers: CR16 Operand Qualifiers.
22967 * CR16 support: CR16-Dependent. (line 6)
22968 * crash of assembler: Bug Criteria. (line 9)
22969 * CRIS --emulation=crisaout command line option: CRIS-Opts. (line 9)
22970 * CRIS --emulation=criself command line option: CRIS-Opts. (line 9)
22971 * CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 34)
22972 * CRIS --mul-bug-abort command line option: CRIS-Opts. (line 62)
22973 * CRIS --no-mul-bug-abort command line option: CRIS-Opts. (line 62)
22974 * CRIS --no-underscore command line option: CRIS-Opts. (line 15)
22975 * CRIS --pic command line option: CRIS-Opts. (line 27)
22976 * CRIS --underscore command line option: CRIS-Opts. (line 15)
22977 * CRIS -N command line option: CRIS-Opts. (line 58)
22978 * CRIS architecture variant option: CRIS-Opts. (line 34)
22979 * CRIS assembler directive .arch: CRIS-Pseudos. (line 45)
22980 * CRIS assembler directive .dword: CRIS-Pseudos. (line 12)
22981 * CRIS assembler directive .syntax: CRIS-Pseudos. (line 17)
22982 * CRIS assembler directives: CRIS-Pseudos. (line 6)
22983 * CRIS built-in symbols: CRIS-Symbols. (line 6)
22984 * CRIS instruction expansion: CRIS-Expand. (line 6)
22985 * CRIS line comment characters: CRIS-Chars. (line 6)
22986 * CRIS options: CRIS-Opts. (line 6)
22987 * CRIS position-independent code: CRIS-Opts. (line 27)
22988 * CRIS pseudo-op .arch: CRIS-Pseudos. (line 45)
22989 * CRIS pseudo-op .dword: CRIS-Pseudos. (line 12)
22990 * CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17)
22991 * CRIS pseudo-ops: CRIS-Pseudos. (line 6)
22992 * CRIS register names: CRIS-Regs. (line 6)
22993 * CRIS support: CRIS-Dependent. (line 6)
22994 * CRIS symbols in position-independent code: CRIS-Pic. (line 6)
22995 * ctbp register, V850: V850-Regs. (line 131)
22996 * ctoff pseudo-op, V850: V850 Opcodes. (line 111)
22997 * ctpc register, V850: V850-Regs. (line 119)
22998 * ctpsw register, V850: V850-Regs. (line 122)
22999 * current address: Dot. (line 6)
23000 * current address, advancing: Org. (line 6)
23001 * D10V @word modifier: D10V-Word. (line 6)
23002 * D10V addressing modes: D10V-Addressing. (line 6)
23003 * D10V floating point: D10V-Float. (line 6)
23004 * D10V line comment character: D10V-Chars. (line 6)
23005 * D10V opcode summary: D10V-Opcodes. (line 6)
23006 * D10V optimization: Overview. (line 478)
23007 * D10V options: D10V-Opts. (line 6)
23008 * D10V registers: D10V-Regs. (line 6)
23009 * D10V size modifiers: D10V-Size. (line 6)
23010 * D10V sub-instruction ordering: D10V-Chars. (line 14)
23011 * D10V sub-instructions: D10V-Subs. (line 6)
23012 * D10V support: D10V-Dependent. (line 6)
23013 * D10V syntax: D10V-Syntax. (line 6)
23014 * D30V addressing modes: D30V-Addressing. (line 6)
23015 * D30V floating point: D30V-Float. (line 6)
23016 * D30V Guarded Execution: D30V-Guarded. (line 6)
23017 * D30V line comment character: D30V-Chars. (line 6)
23018 * D30V nops: Overview. (line 486)
23019 * D30V nops after 32-bit multiply: Overview. (line 489)
23020 * D30V opcode summary: D30V-Opcodes. (line 6)
23021 * D30V optimization: Overview. (line 483)
23022 * D30V options: D30V-Opts. (line 6)
23023 * D30V registers: D30V-Regs. (line 6)
23024 * D30V size modifiers: D30V-Size. (line 6)
23025 * D30V sub-instruction ordering: D30V-Chars. (line 14)
23026 * D30V sub-instructions: D30V-Subs. (line 6)
23027 * D30V support: D30V-Dependent. (line 6)
23028 * D30V syntax: D30V-Syntax. (line 6)
23029 * data alignment on SPARC: Sparc-Aligned-Data. (line 6)
23030 * data and text sections, joining: R. (line 6)
23031 * data directive: Data. (line 6)
23032 * data directive, TIC54X: TIC54X-Directives. (line 61)
23033 * data relocations, ARM: ARM-Relocations. (line 6)
23034 * data section: Ld Sections. (line 9)
23035 * data1 directive, M680x0: M68K-Directives. (line 9)
23036 * data2 directive, M680x0: M68K-Directives. (line 12)
23037 * datalabel, SH64: SH64-Addressing. (line 16)
23038 * dbpc register, V850: V850-Regs. (line 125)
23039 * dbpsw register, V850: V850-Regs. (line 128)
23040 * debuggers, and symbol order: Symbols. (line 10)
23041 * debugging COFF symbols: Def. (line 6)
23042 * DEC syntax: PDP-11-Syntax. (line 6)
23043 * decimal integers: Integers. (line 12)
23044 * def directive: Def. (line 6)
23045 * def directive, TIC54X: TIC54X-Directives. (line 103)
23046 * density instructions: Density Instructions.
23048 * dependency tracking: MD. (line 6)
23049 * deprecated directives: Deprecated. (line 6)
23050 * desc directive: Desc. (line 6)
23051 * descriptor, of a.out symbol: Symbol Desc. (line 6)
23052 * dfloat directive, VAX: VAX-directives. (line 10)
23053 * difference tables altered: Word. (line 12)
23054 * difference tables, warning: K. (line 6)
23055 * differences, mmixal: MMIX-mmixal. (line 6)
23056 * dim directive: Dim. (line 6)
23057 * directives and instructions: Statements. (line 20)
23058 * directives for PowerPC: PowerPC-Pseudo. (line 6)
23059 * directives for SCORE: SCORE-Pseudo. (line 6)
23060 * directives, Blackfin: Blackfin Directives. (line 6)
23061 * directives, M32R: M32R-Directives. (line 6)
23062 * directives, M680x0: M68K-Directives. (line 6)
23063 * directives, machine independent: Pseudo Ops. (line 6)
23064 * directives, Xtensa: Xtensa Directives. (line 6)
23065 * directives, Z8000: Z8000 Directives. (line 6)
23066 * Disable floating-point instructions: MIPS floating-point. (line 6)
23067 * Disable single-precision floating-point operations: MIPS floating-point.
23069 * displacement sizing character, VAX: VAX-operands. (line 12)
23070 * dollar local symbols: Symbol Names. (line 110)
23071 * dot (symbol): Dot. (line 6)
23072 * double directive: Double. (line 6)
23073 * double directive, i386: i386-Float. (line 14)
23074 * double directive, M680x0: M68K-Float. (line 14)
23075 * double directive, M68HC11: M68HC11-Float. (line 14)
23076 * double directive, RX: RX-Float. (line 11)
23077 * double directive, TIC54X: TIC54X-Directives. (line 64)
23078 * double directive, VAX: VAX-float. (line 15)
23079 * double directive, x86-64: i386-Float. (line 14)
23080 * double directive, XGATE: XGATE-Float. (line 13)
23081 * doublequote (\"): Strings. (line 43)
23082 * drlist directive, TIC54X: TIC54X-Directives. (line 73)
23083 * drnolist directive, TIC54X: TIC54X-Directives. (line 73)
23084 * dual directive, i860: Directives-i860. (line 6)
23085 * ECOFF sections: MIPS Object. (line 6)
23086 * ecr register, V850: V850-Regs. (line 113)
23087 * eight-byte integer: Quad. (line 9)
23088 * eipc register, V850: V850-Regs. (line 101)
23089 * eipsw register, V850: V850-Regs. (line 104)
23090 * eject directive: Eject. (line 6)
23091 * ELF symbol type: Type. (line 22)
23092 * else directive: Else. (line 6)
23093 * elseif directive: Elseif. (line 6)
23094 * empty expressions: Empty Exprs. (line 6)
23095 * emsg directive, TIC54X: TIC54X-Directives. (line 77)
23096 * emulation: Overview. (line 828)
23097 * encoding options, i386: i386-Mnemonics. (line 32)
23098 * encoding options, x86-64: i386-Mnemonics. (line 32)
23099 * end directive: End. (line 6)
23100 * enddual directive, i860: Directives-i860. (line 11)
23101 * endef directive: Endef. (line 6)
23102 * endfunc directive: Endfunc. (line 6)
23103 * endianness, MIPS: Overview. (line 712)
23104 * endianness, PJ: Overview. (line 615)
23105 * endif directive: Endif. (line 6)
23106 * endloop directive, TIC54X: TIC54X-Directives. (line 143)
23107 * endm directive: Macro. (line 138)
23108 * endm directive, TIC54X: TIC54X-Directives. (line 153)
23109 * endstruct directive, TIC54X: TIC54X-Directives. (line 216)
23110 * endunion directive, TIC54X: TIC54X-Directives. (line 250)
23111 * environment settings, TIC54X: TIC54X-Env. (line 6)
23112 * EOF, newline must precede: Statements. (line 14)
23113 * ep register, V850: V850-Regs. (line 95)
23114 * Epiphany line comment character: Epiphany-Chars. (line 6)
23115 * Epiphany line separator: Epiphany-Chars. (line 14)
23116 * Epiphany options: Epiphany Options. (line 6)
23117 * Epiphany support: Epiphany-Dependent. (line 6)
23118 * equ directive: Equ. (line 6)
23119 * equ directive, TIC54X: TIC54X-Directives. (line 191)
23120 * equiv directive: Equiv. (line 6)
23121 * eqv directive: Eqv. (line 6)
23122 * err directive: Err. (line 6)
23123 * error directive: Error. (line 6)
23124 * error messages: Errors. (line 6)
23125 * error on valid input: Bug Criteria. (line 12)
23126 * errors, caused by warnings: W. (line 16)
23127 * errors, continuing after: Z. (line 6)
23128 * ESA/390 floating point (IEEE): ESA/390 Floating Point.
23130 * ESA/390 support: ESA/390-Dependent. (line 6)
23131 * ESA/390 Syntax: ESA/390 Options. (line 8)
23132 * ESA/390-only directives: ESA/390 Directives. (line 12)
23133 * escape codes, character: Strings. (line 15)
23134 * eval directive, TIC54X: TIC54X-Directives. (line 24)
23135 * even: Z8000 Directives. (line 58)
23136 * even directive, M680x0: M68K-Directives. (line 15)
23137 * even directive, TIC54X: TIC54X-Directives. (line 6)
23138 * exitm directive: Macro. (line 141)
23139 * expr (internal section): As Sections. (line 17)
23140 * expression arguments: Arguments. (line 6)
23141 * expressions: Expressions. (line 6)
23142 * expressions, comparison: Infix Ops. (line 55)
23143 * expressions, empty: Empty Exprs. (line 6)
23144 * expressions, integer: Integer Exprs. (line 6)
23145 * extAuxRegister directive, ARC: ARC Directives. (line 18)
23146 * extCondCode directive, ARC: ARC Directives. (line 41)
23147 * extCoreRegister directive, ARC: ARC Directives. (line 53)
23148 * extend directive M680x0: M68K-Float. (line 17)
23149 * extend directive M68HC11: M68HC11-Float. (line 17)
23150 * extend directive XGATE: XGATE-Float. (line 16)
23151 * extended directive, i960: Directives-i960. (line 13)
23152 * extern directive: Extern. (line 6)
23153 * extInstruction directive, ARC: ARC Directives. (line 78)
23154 * fail directive: Fail. (line 6)
23155 * far_mode directive, TIC54X: TIC54X-Directives. (line 82)
23156 * faster processing (-f): f. (line 6)
23157 * fatal signal: Bug Criteria. (line 9)
23158 * fclist directive, TIC54X: TIC54X-Directives. (line 87)
23159 * fcnolist directive, TIC54X: TIC54X-Directives. (line 87)
23160 * fepc register, V850: V850-Regs. (line 107)
23161 * fepsw register, V850: V850-Regs. (line 110)
23162 * ffloat directive, VAX: VAX-directives. (line 14)
23163 * field directive, TIC54X: TIC54X-Directives. (line 91)
23164 * file directive: File. (line 6)
23165 * file directive, MSP 430: MSP430 Directives. (line 6)
23166 * file name, logical: File. (line 13)
23167 * files, including: Include. (line 6)
23168 * files, input: Input Files. (line 6)
23169 * fill directive: Fill. (line 6)
23170 * filling memory <1>: Skip. (line 6)
23171 * filling memory: Space. (line 6)
23172 * FLIX syntax: Xtensa Syntax. (line 6)
23173 * float directive: Float. (line 6)
23174 * float directive, i386: i386-Float. (line 14)
23175 * float directive, M680x0: M68K-Float. (line 11)
23176 * float directive, M68HC11: M68HC11-Float. (line 11)
23177 * float directive, RX: RX-Float. (line 8)
23178 * float directive, TIC54X: TIC54X-Directives. (line 64)
23179 * float directive, VAX: VAX-float. (line 15)
23180 * float directive, x86-64: i386-Float. (line 14)
23181 * float directive, XGATE: XGATE-Float. (line 10)
23182 * floating point numbers: Flonums. (line 6)
23183 * floating point numbers (double): Double. (line 6)
23184 * floating point numbers (single) <1>: Float. (line 6)
23185 * floating point numbers (single): Single. (line 6)
23186 * floating point, AArch64 (IEEE): AArch64 Floating Point.
23188 * floating point, Alpha (IEEE): Alpha Floating Point.
23190 * floating point, ARC (IEEE): ARC Floating Point. (line 6)
23191 * floating point, ARM (IEEE): ARM Floating Point. (line 6)
23192 * floating point, D10V: D10V-Float. (line 6)
23193 * floating point, D30V: D30V-Float. (line 6)
23194 * floating point, ESA/390 (IEEE): ESA/390 Floating Point.
23196 * floating point, H8/300 (IEEE): H8/300 Floating Point.
23198 * floating point, HPPA (IEEE): HPPA Floating Point. (line 6)
23199 * floating point, i386: i386-Float. (line 6)
23200 * floating point, i960 (IEEE): Floating Point-i960. (line 6)
23201 * floating point, M680x0: M68K-Float. (line 6)
23202 * floating point, M68HC11: M68HC11-Float. (line 6)
23203 * floating point, MSP 430 (IEEE): MSP430 Floating Point.
23205 * floating point, RX: RX-Float. (line 6)
23206 * floating point, s390: s390 Floating Point. (line 6)
23207 * floating point, SH (IEEE): SH Floating Point. (line 6)
23208 * floating point, SPARC (IEEE): Sparc-Float. (line 6)
23209 * floating point, V850 (IEEE): V850 Floating Point. (line 6)
23210 * floating point, VAX: VAX-float. (line 6)
23211 * floating point, x86-64: i386-Float. (line 6)
23212 * floating point, XGATE: XGATE-Float. (line 6)
23213 * floating point, Z80: Z80 Floating Point. (line 6)
23214 * flonums: Flonums. (line 6)
23215 * format of error messages: Errors. (line 24)
23216 * format of warning messages: Errors. (line 12)
23217 * formfeed (\f): Strings. (line 18)
23218 * func directive: Func. (line 6)
23219 * functions, in expressions: Operators. (line 6)
23220 * gbr960, i960 postprocessor: Options-i960. (line 40)
23221 * gfloat directive, VAX: VAX-directives. (line 18)
23222 * global: Z8000 Directives. (line 21)
23223 * global directive: Global. (line 6)
23224 * global directive, TIC54X: TIC54X-Directives. (line 103)
23225 * gp register, MIPS: MIPS Object. (line 11)
23226 * gp register, V850: V850-Regs. (line 17)
23227 * grouping data: Sub-Sections. (line 6)
23228 * H8/300 addressing modes: H8/300-Addressing. (line 6)
23229 * H8/300 floating point (IEEE): H8/300 Floating Point.
23231 * H8/300 line comment character: H8/300-Chars. (line 6)
23232 * H8/300 line separator: H8/300-Chars. (line 8)
23233 * H8/300 machine directives (none): H8/300 Directives. (line 6)
23234 * H8/300 opcode summary: H8/300 Opcodes. (line 6)
23235 * H8/300 options: H8/300 Options. (line 6)
23236 * H8/300 registers: H8/300-Regs. (line 6)
23237 * H8/300 size suffixes: H8/300 Opcodes. (line 163)
23238 * H8/300 support: H8/300-Dependent. (line 6)
23239 * H8/300H, assembling for: H8/300 Directives. (line 8)
23240 * half directive, ARC: ARC Directives. (line 156)
23241 * half directive, SPARC: Sparc-Directives. (line 17)
23242 * half directive, TIC54X: TIC54X-Directives. (line 111)
23243 * hex character code (\XD...): Strings. (line 36)
23244 * hexadecimal integers: Integers. (line 15)
23245 * hexadecimal prefix, Z80: Z80-Chars. (line 15)
23246 * hfloat directive, VAX: VAX-directives. (line 22)
23247 * hi pseudo-op, V850: V850 Opcodes. (line 33)
23248 * hi0 pseudo-op, V850: V850 Opcodes. (line 10)
23249 * hidden directive: Hidden. (line 6)
23250 * high directive, M32R: M32R-Directives. (line 18)
23251 * hilo pseudo-op, V850: V850 Opcodes. (line 55)
23252 * HPPA directives not supported: HPPA Directives. (line 11)
23253 * HPPA floating point (IEEE): HPPA Floating Point. (line 6)
23254 * HPPA Syntax: HPPA Options. (line 8)
23255 * HPPA-only directives: HPPA Directives. (line 24)
23256 * hword directive: hword. (line 6)
23257 * i370 support: ESA/390-Dependent. (line 6)
23258 * i386 16-bit code: i386-16bit. (line 6)
23259 * i386 arch directive: i386-Arch. (line 6)
23260 * i386 att_syntax pseudo op: i386-Variations. (line 6)
23261 * i386 conversion instructions: i386-Mnemonics. (line 37)
23262 * i386 floating point: i386-Float. (line 6)
23263 * i386 immediate operands: i386-Variations. (line 15)
23264 * i386 instruction naming: i386-Mnemonics. (line 6)
23265 * i386 instruction prefixes: i386-Prefixes. (line 6)
23266 * i386 intel_syntax pseudo op: i386-Variations. (line 6)
23267 * i386 jump optimization: i386-Jumps. (line 6)
23268 * i386 jump, call, return: i386-Variations. (line 41)
23269 * i386 jump/call operands: i386-Variations. (line 15)
23270 * i386 line comment character: i386-Chars. (line 6)
23271 * i386 line separator: i386-Chars. (line 18)
23272 * i386 memory references: i386-Memory. (line 6)
23273 * i386 mnemonic compatibility: i386-Mnemonics. (line 62)
23274 * i386 mul, imul instructions: i386-Notes. (line 6)
23275 * i386 options: i386-Options. (line 6)
23276 * i386 register operands: i386-Variations. (line 15)
23277 * i386 registers: i386-Regs. (line 6)
23278 * i386 sections: i386-Variations. (line 47)
23279 * i386 size suffixes: i386-Variations. (line 29)
23280 * i386 source, destination operands: i386-Variations. (line 22)
23281 * i386 support: i386-Dependent. (line 6)
23282 * i386 syntax compatibility: i386-Variations. (line 6)
23283 * i80386 support: i386-Dependent. (line 6)
23284 * i860 line comment character: i860-Chars. (line 6)
23285 * i860 line separator: i860-Chars. (line 14)
23286 * i860 machine directives: Directives-i860. (line 6)
23287 * i860 opcodes: Opcodes for i860. (line 6)
23288 * i860 support: i860-Dependent. (line 6)
23289 * i960 architecture options: Options-i960. (line 6)
23290 * i960 branch recording: Options-i960. (line 22)
23291 * i960 callj pseudo-opcode: callj-i960. (line 6)
23292 * i960 compare and jump expansions: Compare-and-branch-i960.
23294 * i960 compare/branch instructions: Compare-and-branch-i960.
23296 * i960 floating point (IEEE): Floating Point-i960. (line 6)
23297 * i960 line comment character: i960-Chars. (line 6)
23298 * i960 line separator: i960-Chars. (line 14)
23299 * i960 machine directives: Directives-i960. (line 6)
23300 * i960 opcodes: Opcodes for i960. (line 6)
23301 * i960 options: Options-i960. (line 6)
23302 * i960 support: i960-Dependent. (line 6)
23303 * IA-64 line comment character: IA-64-Chars. (line 6)
23304 * IA-64 line separator: IA-64-Chars. (line 8)
23305 * IA-64 options: IA-64 Options. (line 6)
23306 * IA-64 Processor-status-Register bit names: IA-64-Bits. (line 6)
23307 * IA-64 registers: IA-64-Regs. (line 6)
23308 * IA-64 relocations: IA-64-Relocs. (line 6)
23309 * IA-64 support: IA-64-Dependent. (line 6)
23310 * IA-64 Syntax: IA-64 Options. (line 87)
23311 * ident directive: Ident. (line 6)
23312 * identifiers, ARM: ARM-Chars. (line 19)
23313 * identifiers, MSP 430: MSP430-Chars. (line 17)
23314 * if directive: If. (line 6)
23315 * ifb directive: If. (line 21)
23316 * ifc directive: If. (line 25)
23317 * ifdef directive: If. (line 16)
23318 * ifeq directive: If. (line 33)
23319 * ifeqs directive: If. (line 36)
23320 * ifge directive: If. (line 40)
23321 * ifgt directive: If. (line 44)
23322 * ifle directive: If. (line 48)
23323 * iflt directive: If. (line 52)
23324 * ifnb directive: If. (line 56)
23325 * ifnc directive: If. (line 61)
23326 * ifndef directive: If. (line 65)
23327 * ifne directive: If. (line 72)
23328 * ifnes directive: If. (line 76)
23329 * ifnotdef directive: If. (line 65)
23330 * immediate character, AArch64: AArch64-Chars. (line 13)
23331 * immediate character, ARM: ARM-Chars. (line 17)
23332 * immediate character, M680x0: M68K-Chars. (line 13)
23333 * immediate character, VAX: VAX-operands. (line 6)
23334 * immediate fields, relaxation: Xtensa Immediate Relaxation.
23336 * immediate operands, i386: i386-Variations. (line 15)
23337 * immediate operands, x86-64: i386-Variations. (line 15)
23338 * imul instruction, i386: i386-Notes. (line 6)
23339 * imul instruction, x86-64: i386-Notes. (line 6)
23340 * incbin directive: Incbin. (line 6)
23341 * include directive: Include. (line 6)
23342 * include directive search path: I. (line 6)
23343 * indirect character, VAX: VAX-operands. (line 9)
23344 * infix operators: Infix Ops. (line 6)
23345 * inhibiting interrupts, i386: i386-Prefixes. (line 36)
23346 * input: Input Files. (line 6)
23347 * input file linenumbers: Input Files. (line 35)
23348 * instruction aliases, s390: s390 Aliases. (line 6)
23349 * instruction bundle: Bundle directives. (line 6)
23350 * instruction expansion, CRIS: CRIS-Expand. (line 6)
23351 * instruction expansion, MMIX: MMIX-Expand. (line 6)
23352 * instruction formats, s390: s390 Formats. (line 6)
23353 * instruction marker, s390: s390 Instruction Marker.
23355 * instruction mnemonics, s390: s390 Mnemonics. (line 6)
23356 * instruction naming, i386: i386-Mnemonics. (line 6)
23357 * instruction naming, x86-64: i386-Mnemonics. (line 6)
23358 * instruction operand modifier, s390: s390 Operand Modifier.
23360 * instruction operands, s390: s390 Operands. (line 6)
23361 * instruction prefixes, i386: i386-Prefixes. (line 6)
23362 * instruction set, M680x0: M68K-opcodes. (line 6)
23363 * instruction set, M68HC11: M68HC11-opcodes. (line 6)
23364 * instruction set, XGATE: XGATE-opcodes. (line 6)
23365 * instruction summary, AVR: AVR Opcodes. (line 6)
23366 * instruction summary, D10V: D10V-Opcodes. (line 6)
23367 * instruction summary, D30V: D30V-Opcodes. (line 6)
23368 * instruction summary, H8/300: H8/300 Opcodes. (line 6)
23369 * instruction summary, LM32: LM32 Opcodes. (line 6)
23370 * instruction summary, SH: SH Opcodes. (line 6)
23371 * instruction summary, SH64: SH64 Opcodes. (line 6)
23372 * instruction summary, Z8000: Z8000 Opcodes. (line 6)
23373 * instruction syntax, s390: s390 Syntax. (line 6)
23374 * instructions and directives: Statements. (line 20)
23375 * int directive: Int. (line 6)
23376 * int directive, H8/300: H8/300 Directives. (line 6)
23377 * int directive, i386: i386-Float. (line 21)
23378 * int directive, TIC54X: TIC54X-Directives. (line 111)
23379 * int directive, x86-64: i386-Float. (line 21)
23380 * integer expressions: Integer Exprs. (line 6)
23381 * integer, 16-byte: Octa. (line 6)
23382 * integer, 8-byte: Quad. (line 9)
23383 * integers: Integers. (line 6)
23384 * integers, 16-bit: hword. (line 6)
23385 * integers, 32-bit: Int. (line 6)
23386 * integers, binary: Integers. (line 6)
23387 * integers, decimal: Integers. (line 12)
23388 * integers, hexadecimal: Integers. (line 15)
23389 * integers, octal: Integers. (line 9)
23390 * integers, one byte: Byte. (line 6)
23391 * intel_syntax pseudo op, i386: i386-Variations. (line 6)
23392 * intel_syntax pseudo op, x86-64: i386-Variations. (line 6)
23393 * internal assembler sections: As Sections. (line 6)
23394 * internal directive: Internal. (line 6)
23395 * invalid input: Bug Criteria. (line 14)
23396 * invocation summary: Overview. (line 6)
23397 * IP2K architecture options: IP2K-Opts. (line 14)
23398 * IP2K line comment character: IP2K-Chars. (line 6)
23399 * IP2K line separator: IP2K-Chars. (line 14)
23400 * IP2K options: IP2K-Opts. (line 6)
23401 * IP2K support: IP2K-Dependent. (line 6)
23402 * irp directive: Irp. (line 6)
23403 * irpc directive: Irpc. (line 6)
23404 * ISA options, SH64: SH64 Options. (line 6)
23405 * joining text and data sections: R. (line 6)
23406 * jump instructions, i386: i386-Mnemonics. (line 56)
23407 * jump instructions, x86-64: i386-Mnemonics. (line 56)
23408 * jump optimization, i386: i386-Jumps. (line 6)
23409 * jump optimization, x86-64: i386-Jumps. (line 6)
23410 * jump/call operands, i386: i386-Variations. (line 15)
23411 * jump/call operands, x86-64: i386-Variations. (line 15)
23412 * L16SI instructions, relaxation: Xtensa Immediate Relaxation.
23414 * L16UI instructions, relaxation: Xtensa Immediate Relaxation.
23416 * L32I instructions, relaxation: Xtensa Immediate Relaxation.
23418 * L8UI instructions, relaxation: Xtensa Immediate Relaxation.
23420 * label (:): Statements. (line 31)
23421 * label directive, TIC54X: TIC54X-Directives. (line 123)
23422 * labels: Labels. (line 6)
23423 * lcomm directive: Lcomm. (line 6)
23424 * lcomm directive, COFF: i386-Directives. (line 6)
23425 * ld: Object. (line 15)
23426 * ldouble directive M680x0: M68K-Float. (line 17)
23427 * ldouble directive M68HC11: M68HC11-Float. (line 17)
23428 * ldouble directive XGATE: XGATE-Float. (line 16)
23429 * ldouble directive, TIC54X: TIC54X-Directives. (line 64)
23430 * LDR reg,=<expr> pseudo op, AArch64: AArch64 Opcodes. (line 9)
23431 * LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15)
23432 * leafproc directive, i960: Directives-i960. (line 18)
23433 * length directive, TIC54X: TIC54X-Directives. (line 127)
23434 * length of symbols: Symbol Intro. (line 14)
23435 * lflags directive (ignored): Lflags. (line 6)
23436 * line comment character: Comments. (line 19)
23437 * line comment character, AArch64: AArch64-Chars. (line 6)
23438 * line comment character, Alpha: Alpha-Chars. (line 6)
23439 * line comment character, ARC: ARC-Chars. (line 6)
23440 * line comment character, ARM: ARM-Chars. (line 6)
23441 * line comment character, AVR: AVR-Chars. (line 6)
23442 * line comment character, CR16: CR16-Chars. (line 6)
23443 * line comment character, D10V: D10V-Chars. (line 6)
23444 * line comment character, D30V: D30V-Chars. (line 6)
23445 * line comment character, Epiphany: Epiphany-Chars. (line 6)
23446 * line comment character, H8/300: H8/300-Chars. (line 6)
23447 * line comment character, i386: i386-Chars. (line 6)
23448 * line comment character, i860: i860-Chars. (line 6)
23449 * line comment character, i960: i960-Chars. (line 6)
23450 * line comment character, IA-64: IA-64-Chars. (line 6)
23451 * line comment character, IP2K: IP2K-Chars. (line 6)
23452 * line comment character, LM32: LM32-Chars. (line 6)
23453 * line comment character, M32C: M32C-Chars. (line 6)
23454 * line comment character, M680x0: M68K-Chars. (line 6)
23455 * line comment character, M68HC11: M68HC11-Syntax. (line 17)
23456 * line comment character, MicroBlaze: MicroBlaze-Chars. (line 6)
23457 * line comment character, MIPS: MIPS-Chars. (line 6)
23458 * line comment character, MSP 430: MSP430-Chars. (line 6)
23459 * line comment character, NS32K: NS32K-Chars. (line 6)
23460 * line comment character, PJ: PJ-Chars. (line 6)
23461 * line comment character, PowerPC: PowerPC-Chars. (line 6)
23462 * line comment character, RL78: RL78-Chars. (line 6)
23463 * line comment character, RX: RX-Chars. (line 6)
23464 * line comment character, s390: s390 Characters. (line 6)
23465 * line comment character, SCORE: SCORE-Chars. (line 6)
23466 * line comment character, SH: SH-Chars. (line 6)
23467 * line comment character, SH64: SH64-Chars. (line 6)
23468 * line comment character, Sparc: Sparc-Chars. (line 6)
23469 * line comment character, TIC54X: TIC54X-Chars. (line 6)
23470 * line comment character, TIC6X: TIC6X Syntax. (line 6)
23471 * line comment character, V850: V850-Chars. (line 6)
23472 * line comment character, VAX: VAX-Chars. (line 6)
23473 * line comment character, XGATE: XGATE-Syntax. (line 16)
23474 * line comment character, XStormy16: XStormy16-Chars. (line 6)
23475 * line comment character, Z80: Z80-Chars. (line 6)
23476 * line comment character, Z8000: Z8000-Chars. (line 6)
23477 * line comment characters, CRIS: CRIS-Chars. (line 6)
23478 * line comment characters, MMIX: MMIX-Chars. (line 6)
23479 * line directive: Line. (line 6)
23480 * line directive, MSP 430: MSP430 Directives. (line 14)
23481 * line numbers, in input files: Input Files. (line 35)
23482 * line numbers, in warnings/errors: Errors. (line 16)
23483 * line separator character: Statements. (line 6)
23484 * line separator, AArch64: AArch64-Chars. (line 10)
23485 * line separator, Alpha: Alpha-Chars. (line 11)
23486 * line separator, ARC: ARC-Chars. (line 12)
23487 * line separator, ARM: ARM-Chars. (line 14)
23488 * line separator, AVR: AVR-Chars. (line 14)
23489 * line separator, CR16: CR16-Chars. (line 13)
23490 * line separator, Epiphany: Epiphany-Chars. (line 14)
23491 * line separator, H8/300: H8/300-Chars. (line 8)
23492 * line separator, i386: i386-Chars. (line 18)
23493 * line separator, i860: i860-Chars. (line 14)
23494 * line separator, i960: i960-Chars. (line 14)
23495 * line separator, IA-64: IA-64-Chars. (line 8)
23496 * line separator, IP2K: IP2K-Chars. (line 14)
23497 * line separator, LM32: LM32-Chars. (line 12)
23498 * line separator, M32C: M32C-Chars. (line 14)
23499 * line separator, M680x0: M68K-Chars. (line 20)
23500 * line separator, M68HC11: M68HC11-Syntax. (line 27)
23501 * line separator, MicroBlaze: MicroBlaze-Chars. (line 14)
23502 * line separator, MIPS: MIPS-Chars. (line 14)
23503 * line separator, MSP 430: MSP430-Chars. (line 14)
23504 * line separator, NS32K: NS32K-Chars. (line 18)
23505 * line separator, PJ: PJ-Chars. (line 14)
23506 * line separator, PowerPC: PowerPC-Chars. (line 18)
23507 * line separator, RL78: RL78-Chars. (line 14)
23508 * line separator, RX: RX-Chars. (line 14)
23509 * line separator, s390: s390 Characters. (line 13)
23510 * line separator, SCORE: SCORE-Chars. (line 14)
23511 * line separator, SH: SH-Chars. (line 8)
23512 * line separator, SH64: SH64-Chars. (line 13)
23513 * line separator, Sparc: Sparc-Chars. (line 14)
23514 * line separator, TIC54X: TIC54X-Chars. (line 17)
23515 * line separator, TIC6X: TIC6X Syntax. (line 13)
23516 * line separator, V850: V850-Chars. (line 13)
23517 * line separator, VAX: VAX-Chars. (line 14)
23518 * line separator, XGATE: XGATE-Syntax. (line 26)
23519 * line separator, XStormy16: XStormy16-Chars. (line 14)
23520 * line separator, Z80: Z80-Chars. (line 13)
23521 * line separator, Z8000: Z8000-Chars. (line 13)
23522 * lines starting with #: Comments. (line 33)
23523 * linker: Object. (line 15)
23524 * linker, and assembler: Secs Background. (line 10)
23525 * linkonce directive: Linkonce. (line 6)
23526 * list directive: List. (line 6)
23527 * list directive, TIC54X: TIC54X-Directives. (line 131)
23528 * listing control, turning off: Nolist. (line 6)
23529 * listing control, turning on: List. (line 6)
23530 * listing control: new page: Eject. (line 6)
23531 * listing control: paper size: Psize. (line 6)
23532 * listing control: subtitle: Sbttl. (line 6)
23533 * listing control: title line: Title. (line 6)
23534 * listings, enabling: a. (line 6)
23535 * literal directive: Literal Directive. (line 6)
23536 * literal pool entries, s390: s390 Literal Pool Entries.
23538 * literal_position directive: Literal Position Directive.
23540 * literal_prefix directive: Literal Prefix Directive.
23542 * little endian output, MIPS: Overview. (line 715)
23543 * little endian output, PJ: Overview. (line 618)
23544 * little-endian output, MIPS: MIPS Opts. (line 13)
23545 * little-endian output, TIC6X: TIC6X Options. (line 46)
23546 * LM32 line comment character: LM32-Chars. (line 6)
23547 * LM32 line separator: LM32-Chars. (line 12)
23548 * LM32 modifiers: LM32-Modifiers. (line 6)
23549 * LM32 opcode summary: LM32 Opcodes. (line 6)
23550 * LM32 options (none): LM32 Options. (line 6)
23551 * LM32 register names: LM32-Regs. (line 6)
23552 * LM32 support: LM32-Dependent. (line 6)
23553 * ln directive: Ln. (line 6)
23554 * lo pseudo-op, V850: V850 Opcodes. (line 22)
23555 * loc directive: Loc. (line 6)
23556 * loc_mark_labels directive: Loc_mark_labels. (line 6)
23557 * local common symbols: Lcomm. (line 6)
23558 * local directive: Local. (line 6)
23559 * local labels: Symbol Names. (line 40)
23560 * local symbol names: Symbol Names. (line 27)
23561 * local symbols, retaining in output: L. (line 6)
23562 * location counter: Dot. (line 6)
23563 * location counter, advancing: Org. (line 6)
23564 * location counter, Z80: Z80-Chars. (line 15)
23565 * logical file name: File. (line 13)
23566 * logical line number: Line. (line 6)
23567 * logical line numbers: Comments. (line 33)
23568 * long directive: Long. (line 6)
23569 * long directive, ARC: ARC Directives. (line 159)
23570 * long directive, i386: i386-Float. (line 21)
23571 * long directive, TIC54X: TIC54X-Directives. (line 135)
23572 * long directive, x86-64: i386-Float. (line 21)
23573 * longcall pseudo-op, V850: V850 Opcodes. (line 123)
23574 * longcalls directive: Longcalls Directive. (line 6)
23575 * longjump pseudo-op, V850: V850 Opcodes. (line 129)
23576 * loop directive, TIC54X: TIC54X-Directives. (line 143)
23577 * LOOP instructions, alignment: Xtensa Automatic Alignment.
23579 * low directive, M32R: M32R-Directives. (line 9)
23580 * lp register, V850: V850-Regs. (line 98)
23581 * lval: Z8000 Directives. (line 27)
23582 * LWP, i386: i386-LWP. (line 6)
23583 * LWP, x86-64: i386-LWP. (line 6)
23584 * M16C architecture option: M32C-Opts. (line 12)
23585 * M32C architecture option: M32C-Opts. (line 9)
23586 * M32C line comment character: M32C-Chars. (line 6)
23587 * M32C line separator: M32C-Chars. (line 14)
23588 * M32C modifiers: M32C-Modifiers. (line 6)
23589 * M32C options: M32C-Opts. (line 6)
23590 * M32C support: M32C-Dependent. (line 6)
23591 * M32R architecture options: M32R-Opts. (line 9)
23592 * M32R directives: M32R-Directives. (line 6)
23593 * M32R options: M32R-Opts. (line 6)
23594 * M32R support: M32R-Dependent. (line 6)
23595 * M32R warnings: M32R-Warnings. (line 6)
23596 * M680x0 addressing modes: M68K-Syntax. (line 21)
23597 * M680x0 architecture options: M68K-Opts. (line 98)
23598 * M680x0 branch improvement: M68K-Branch. (line 6)
23599 * M680x0 directives: M68K-Directives. (line 6)
23600 * M680x0 floating point: M68K-Float. (line 6)
23601 * M680x0 immediate character: M68K-Chars. (line 13)
23602 * M680x0 line comment character: M68K-Chars. (line 6)
23603 * M680x0 line separator: M68K-Chars. (line 20)
23604 * M680x0 opcodes: M68K-opcodes. (line 6)
23605 * M680x0 options: M68K-Opts. (line 6)
23606 * M680x0 pseudo-opcodes: M68K-Branch. (line 6)
23607 * M680x0 size modifiers: M68K-Syntax. (line 8)
23608 * M680x0 support: M68K-Dependent. (line 6)
23609 * M680x0 syntax: M68K-Syntax. (line 8)
23610 * M68HC11 addressing modes: M68HC11-Syntax. (line 30)
23611 * M68HC11 and M68HC12 support: M68HC11-Dependent. (line 6)
23612 * M68HC11 assembler directive .far: M68HC11-Directives. (line 20)
23613 * M68HC11 assembler directive .interrupt: M68HC11-Directives. (line 26)
23614 * M68HC11 assembler directive .mode: M68HC11-Directives. (line 16)
23615 * M68HC11 assembler directive .relax: M68HC11-Directives. (line 10)
23616 * M68HC11 assembler directive .xrefb: M68HC11-Directives. (line 31)
23617 * M68HC11 assembler directives: M68HC11-Directives. (line 6)
23618 * M68HC11 branch improvement: M68HC11-Branch. (line 6)
23619 * M68HC11 floating point: M68HC11-Float. (line 6)
23620 * M68HC11 line comment character: M68HC11-Syntax. (line 17)
23621 * M68HC11 line separator: M68HC11-Syntax. (line 27)
23622 * M68HC11 modifiers: M68HC11-Modifiers. (line 6)
23623 * M68HC11 opcodes: M68HC11-opcodes. (line 6)
23624 * M68HC11 options: M68HC11-Opts. (line 6)
23625 * M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6)
23626 * M68HC11 syntax: M68HC11-Syntax. (line 6)
23627 * M68HC12 assembler directives: M68HC11-Directives. (line 6)
23628 * machine dependencies: Machine Dependencies.
23630 * machine directives, AArch64: AArch64 Directives. (line 6)
23631 * machine directives, ARC: ARC Directives. (line 6)
23632 * machine directives, ARM: ARM Directives. (line 6)
23633 * machine directives, H8/300 (none): H8/300 Directives. (line 6)
23634 * machine directives, i860: Directives-i860. (line 6)
23635 * machine directives, i960: Directives-i960. (line 6)
23636 * machine directives, MSP 430: MSP430 Directives. (line 6)
23637 * machine directives, SH: SH Directives. (line 6)
23638 * machine directives, SH64: SH64 Directives. (line 9)
23639 * machine directives, SPARC: Sparc-Directives. (line 6)
23640 * machine directives, TIC54X: TIC54X-Directives. (line 6)
23641 * machine directives, TIC6X: TIC6X Directives. (line 6)
23642 * machine directives, TILE-Gx: TILE-Gx Directives. (line 6)
23643 * machine directives, TILEPro: TILEPro Directives. (line 6)
23644 * machine directives, V850: V850 Directives. (line 6)
23645 * machine directives, VAX: VAX-directives. (line 6)
23646 * machine directives, x86: i386-Directives. (line 6)
23647 * machine directives, XStormy16: XStormy16 Directives.
23649 * machine independent directives: Pseudo Ops. (line 6)
23650 * machine instructions (not covered): Manual. (line 14)
23651 * machine-independent syntax: Syntax. (line 6)
23652 * macro directive: Macro. (line 28)
23653 * macro directive, TIC54X: TIC54X-Directives. (line 153)
23654 * macros: Macro. (line 6)
23655 * macros, count executed: Macro. (line 143)
23656 * Macros, MSP 430: MSP430-Macros. (line 6)
23657 * macros, TIC54X: TIC54X-Macros. (line 6)
23658 * make rules: MD. (line 6)
23659 * manual, structure and purpose: Manual. (line 6)
23660 * math builtins, TIC54X: TIC54X-Builtins. (line 6)
23661 * Maximum number of continuation lines: listing. (line 34)
23662 * memory references, i386: i386-Memory. (line 6)
23663 * memory references, x86-64: i386-Memory. (line 6)
23664 * memory-mapped registers, TIC54X: TIC54X-MMRegs. (line 6)
23665 * merging text and data sections: R. (line 6)
23666 * messages from assembler: Errors. (line 6)
23667 * MicroBlaze architectures: MicroBlaze-Dependent.
23669 * MicroBlaze directives: MicroBlaze Directives.
23671 * MicroBlaze line comment character: MicroBlaze-Chars. (line 6)
23672 * MicroBlaze line separator: MicroBlaze-Chars. (line 14)
23673 * MicroBlaze support: MicroBlaze-Dependent.
23675 * minus, permitted arguments: Infix Ops. (line 49)
23676 * MIPS architecture options: MIPS Opts. (line 29)
23677 * MIPS big-endian output: MIPS Opts. (line 13)
23678 * MIPS CPU override: MIPS ISA. (line 18)
23679 * MIPS debugging directives: MIPS Stabs. (line 6)
23680 * MIPS DSP Release 1 instruction generation override: MIPS ASE instruction generation overrides.
23682 * MIPS DSP Release 2 instruction generation override: MIPS ASE instruction generation overrides.
23684 * MIPS ECOFF sections: MIPS Object. (line 6)
23685 * MIPS endianness: Overview. (line 712)
23686 * MIPS ISA: Overview. (line 718)
23687 * MIPS ISA override: MIPS ISA. (line 6)
23688 * MIPS line comment character: MIPS-Chars. (line 6)
23689 * MIPS line separator: MIPS-Chars. (line 14)
23690 * MIPS little-endian output: MIPS Opts. (line 13)
23691 * MIPS MCU instruction generation override: MIPS ASE instruction generation overrides.
23693 * MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides.
23695 * MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides.
23697 * MIPS MT instruction generation override: MIPS ASE instruction generation overrides.
23699 * MIPS option stack: MIPS option stack. (line 6)
23700 * MIPS processor: MIPS-Dependent. (line 6)
23701 * MIT: M68K-Syntax. (line 6)
23702 * mlib directive, TIC54X: TIC54X-Directives. (line 159)
23703 * mlist directive, TIC54X: TIC54X-Directives. (line 164)
23704 * MMIX assembler directive BSPEC: MMIX-Pseudos. (line 131)
23705 * MMIX assembler directive BYTE: MMIX-Pseudos. (line 97)
23706 * MMIX assembler directive ESPEC: MMIX-Pseudos. (line 131)
23707 * MMIX assembler directive GREG: MMIX-Pseudos. (line 50)
23708 * MMIX assembler directive IS: MMIX-Pseudos. (line 42)
23709 * MMIX assembler directive LOC: MMIX-Pseudos. (line 7)
23710 * MMIX assembler directive LOCAL: MMIX-Pseudos. (line 28)
23711 * MMIX assembler directive OCTA: MMIX-Pseudos. (line 108)
23712 * MMIX assembler directive PREFIX: MMIX-Pseudos. (line 120)
23713 * MMIX assembler directive TETRA: MMIX-Pseudos. (line 108)
23714 * MMIX assembler directive WYDE: MMIX-Pseudos. (line 108)
23715 * MMIX assembler directives: MMIX-Pseudos. (line 6)
23716 * MMIX line comment characters: MMIX-Chars. (line 6)
23717 * MMIX options: MMIX-Opts. (line 6)
23718 * MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131)
23719 * MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97)
23720 * MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131)
23721 * MMIX pseudo-op GREG: MMIX-Pseudos. (line 50)
23722 * MMIX pseudo-op IS: MMIX-Pseudos. (line 42)
23723 * MMIX pseudo-op LOC: MMIX-Pseudos. (line 7)
23724 * MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28)
23725 * MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108)
23726 * MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120)
23727 * MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108)
23728 * MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108)
23729 * MMIX pseudo-ops: MMIX-Pseudos. (line 6)
23730 * MMIX register names: MMIX-Regs. (line 6)
23731 * MMIX support: MMIX-Dependent. (line 6)
23732 * mmixal differences: MMIX-mmixal. (line 6)
23733 * mmregs directive, TIC54X: TIC54X-Directives. (line 169)
23734 * mmsg directive, TIC54X: TIC54X-Directives. (line 77)
23735 * MMX, i386: i386-SIMD. (line 6)
23736 * MMX, x86-64: i386-SIMD. (line 6)
23737 * mnemonic compatibility, i386: i386-Mnemonics. (line 62)
23738 * mnemonic suffixes, i386: i386-Variations. (line 29)
23739 * mnemonic suffixes, x86-64: i386-Variations. (line 29)
23740 * mnemonics for opcodes, VAX: VAX-opcodes. (line 6)
23741 * mnemonics, AVR: AVR Opcodes. (line 6)
23742 * mnemonics, D10V: D10V-Opcodes. (line 6)
23743 * mnemonics, D30V: D30V-Opcodes. (line 6)
23744 * mnemonics, H8/300: H8/300 Opcodes. (line 6)
23745 * mnemonics, LM32: LM32 Opcodes. (line 6)
23746 * mnemonics, SH: SH Opcodes. (line 6)
23747 * mnemonics, SH64: SH64 Opcodes. (line 6)
23748 * mnemonics, Z8000: Z8000 Opcodes. (line 6)
23749 * mnolist directive, TIC54X: TIC54X-Directives. (line 164)
23750 * modifiers, M32C: M32C-Modifiers. (line 6)
23751 * Motorola syntax for the 680x0: M68K-Moto-Syntax. (line 6)
23752 * MOVI instructions, relaxation: Xtensa Immediate Relaxation.
23754 * MOVN, MOVZ and MOVK group relocations, AArch64: AArch64-Relocations.
23756 * MOVW and MOVT relocations, ARM: ARM-Relocations. (line 21)
23757 * MRI compatibility mode: M. (line 6)
23758 * mri directive: MRI. (line 6)
23759 * MRI mode, temporarily: MRI. (line 6)
23760 * MSP 430 floating point (IEEE): MSP430 Floating Point.
23762 * MSP 430 identifiers: MSP430-Chars. (line 17)
23763 * MSP 430 line comment character: MSP430-Chars. (line 6)
23764 * MSP 430 line separator: MSP430-Chars. (line 14)
23765 * MSP 430 machine directives: MSP430 Directives. (line 6)
23766 * MSP 430 macros: MSP430-Macros. (line 6)
23767 * MSP 430 opcodes: MSP430 Opcodes. (line 6)
23768 * MSP 430 options (none): MSP430 Options. (line 6)
23769 * MSP 430 profiling capability: MSP430 Profiling Capability.
23771 * MSP 430 register names: MSP430-Regs. (line 6)
23772 * MSP 430 support: MSP430-Dependent. (line 6)
23773 * MSP430 Assembler Extensions: MSP430-Ext. (line 6)
23774 * mul instruction, i386: i386-Notes. (line 6)
23775 * mul instruction, x86-64: i386-Notes. (line 6)
23776 * N32K support: NS32K-Dependent. (line 6)
23777 * name: Z8000 Directives. (line 18)
23778 * named section: Section. (line 6)
23779 * named sections: Ld Sections. (line 8)
23780 * names, symbol: Symbol Names. (line 6)
23781 * naming object file: o. (line 6)
23782 * new page, in listings: Eject. (line 6)
23783 * newblock directive, TIC54X: TIC54X-Directives. (line 175)
23784 * newline (\n): Strings. (line 21)
23785 * newline, required at file end: Statements. (line 14)
23786 * no-absolute-literals directive: Absolute Literals Directive.
23788 * no-longcalls directive: Longcalls Directive. (line 6)
23789 * no-schedule directive: Schedule Directive. (line 6)
23790 * no-transform directive: Transform Directive. (line 6)
23791 * nolist directive: Nolist. (line 6)
23792 * nolist directive, TIC54X: TIC54X-Directives. (line 131)
23793 * NOP pseudo op, ARM: ARM Opcodes. (line 9)
23794 * notes for Alpha: Alpha Notes. (line 6)
23795 * NS32K line comment character: NS32K-Chars. (line 6)
23796 * NS32K line separator: NS32K-Chars. (line 18)
23797 * null-terminated strings: Asciz. (line 6)
23798 * number constants: Numbers. (line 6)
23799 * number of macros executed: Macro. (line 143)
23800 * numbered subsections: Sub-Sections. (line 6)
23801 * numbers, 16-bit: hword. (line 6)
23802 * numeric values: Expressions. (line 6)
23803 * nword directive, SPARC: Sparc-Directives. (line 20)
23804 * object attributes: Object Attributes. (line 6)
23805 * object file: Object. (line 6)
23806 * object file format: Object Formats. (line 6)
23807 * object file name: o. (line 6)
23808 * object file, after errors: Z. (line 6)
23809 * obsolescent directives: Deprecated. (line 6)
23810 * octa directive: Octa. (line 6)
23811 * octal character code (\DDD): Strings. (line 30)
23812 * octal integers: Integers. (line 9)
23813 * offset directive: Offset. (line 6)
23814 * offset directive, V850: V850 Directives. (line 6)
23815 * opcode mnemonics, VAX: VAX-opcodes. (line 6)
23816 * opcode names, TILE-Gx: TILE-Gx Opcodes. (line 6)
23817 * opcode names, TILEPro: TILEPro Opcodes. (line 6)
23818 * opcode names, Xtensa: Xtensa Opcodes. (line 6)
23819 * opcode summary, AVR: AVR Opcodes. (line 6)
23820 * opcode summary, D10V: D10V-Opcodes. (line 6)
23821 * opcode summary, D30V: D30V-Opcodes. (line 6)
23822 * opcode summary, H8/300: H8/300 Opcodes. (line 6)
23823 * opcode summary, LM32: LM32 Opcodes. (line 6)
23824 * opcode summary, SH: SH Opcodes. (line 6)
23825 * opcode summary, SH64: SH64 Opcodes. (line 6)
23826 * opcode summary, Z8000: Z8000 Opcodes. (line 6)
23827 * opcodes for AArch64: AArch64 Opcodes. (line 6)
23828 * opcodes for ARC: ARC Opcodes. (line 6)
23829 * opcodes for ARM: ARM Opcodes. (line 6)
23830 * opcodes for MSP 430: MSP430 Opcodes. (line 6)
23831 * opcodes for V850: V850 Opcodes. (line 6)
23832 * opcodes, i860: Opcodes for i860. (line 6)
23833 * opcodes, i960: Opcodes for i960. (line 6)
23834 * opcodes, M680x0: M68K-opcodes. (line 6)
23835 * opcodes, M68HC11: M68HC11-opcodes. (line 6)
23836 * operand delimiters, i386: i386-Variations. (line 15)
23837 * operand delimiters, x86-64: i386-Variations. (line 15)
23838 * operand notation, VAX: VAX-operands. (line 6)
23839 * operands in expressions: Arguments. (line 6)
23840 * operator precedence: Infix Ops. (line 11)
23841 * operators, in expressions: Operators. (line 6)
23842 * operators, permitted arguments: Infix Ops. (line 6)
23843 * optimization, D10V: Overview. (line 478)
23844 * optimization, D30V: Overview. (line 483)
23845 * optimizations: Xtensa Optimizations.
23847 * option directive, ARC: ARC Directives. (line 162)
23848 * option directive, TIC54X: TIC54X-Directives. (line 179)
23849 * option summary: Overview. (line 6)
23850 * options for AArch64 (none): AArch64 Options. (line 6)
23851 * options for Alpha: Alpha Options. (line 6)
23852 * options for ARC (none): ARC Options. (line 6)
23853 * options for ARM (none): ARM Options. (line 6)
23854 * options for AVR (none): AVR Options. (line 6)
23855 * options for Blackfin (none): Blackfin Options. (line 6)
23856 * options for i386: i386-Options. (line 6)
23857 * options for IA-64: IA-64 Options. (line 6)
23858 * options for LM32 (none): LM32 Options. (line 6)
23859 * options for MSP430 (none): MSP430 Options. (line 6)
23860 * options for PDP-11: PDP-11-Options. (line 6)
23861 * options for PowerPC: PowerPC-Opts. (line 6)
23862 * options for s390: s390 Options. (line 6)
23863 * options for SCORE: SCORE-Opts. (line 6)
23864 * options for SPARC: Sparc-Opts. (line 6)
23865 * options for TIC6X: TIC6X Options. (line 6)
23866 * options for V850 (none): V850 Options. (line 6)
23867 * options for VAX/VMS: VAX-Opts. (line 42)
23868 * options for x86-64: i386-Options. (line 6)
23869 * options for Z80: Z80 Options. (line 6)
23870 * options, all versions of assembler: Invoking. (line 6)
23871 * options, command line: Command Line. (line 13)
23872 * options, CRIS: CRIS-Opts. (line 6)
23873 * options, D10V: D10V-Opts. (line 6)
23874 * options, D30V: D30V-Opts. (line 6)
23875 * options, Epiphany: Epiphany Options. (line 6)
23876 * options, H8/300: H8/300 Options. (line 6)
23877 * options, i960: Options-i960. (line 6)
23878 * options, IP2K: IP2K-Opts. (line 6)
23879 * options, M32C: M32C-Opts. (line 6)
23880 * options, M32R: M32R-Opts. (line 6)
23881 * options, M680x0: M68K-Opts. (line 6)
23882 * options, M68HC11: M68HC11-Opts. (line 6)
23883 * options, MMIX: MMIX-Opts. (line 6)
23884 * options, PJ: PJ Options. (line 6)
23885 * options, RL78: RL78-Opts. (line 6)
23886 * options, RX: RX-Opts. (line 6)
23887 * options, SH: SH Options. (line 6)
23888 * options, SH64: SH64 Options. (line 6)
23889 * options, TIC54X: TIC54X-Opts. (line 6)
23890 * options, XGATE: XGATE-Opts. (line 6)
23891 * options, Z8000: Z8000 Options. (line 6)
23892 * org directive: Org. (line 6)
23893 * other attribute, of a.out symbol: Symbol Other. (line 6)
23894 * output file: Object. (line 6)
23895 * p2align directive: P2align. (line 6)
23896 * p2alignl directive: P2align. (line 28)
23897 * p2alignw directive: P2align. (line 28)
23898 * padding the location counter: Align. (line 6)
23899 * padding the location counter given a power of two: P2align. (line 6)
23900 * padding the location counter given number of bytes: Balign. (line 6)
23901 * page, in listings: Eject. (line 6)
23902 * paper size, for listings: Psize. (line 6)
23903 * paths for .include: I. (line 6)
23904 * patterns, writing in memory: Fill. (line 6)
23905 * PDP-11 comments: PDP-11-Syntax. (line 16)
23906 * PDP-11 floating-point register syntax: PDP-11-Syntax. (line 13)
23907 * PDP-11 general-purpose register syntax: PDP-11-Syntax. (line 10)
23908 * PDP-11 instruction naming: PDP-11-Mnemonics. (line 6)
23909 * PDP-11 line separator: PDP-11-Syntax. (line 19)
23910 * PDP-11 support: PDP-11-Dependent. (line 6)
23911 * PDP-11 syntax: PDP-11-Syntax. (line 6)
23912 * PIC code generation for ARM: ARM Options. (line 169)
23913 * PIC code generation for M32R: M32R-Opts. (line 42)
23914 * PIC selection, MIPS: MIPS Opts. (line 21)
23915 * PJ endianness: Overview. (line 615)
23916 * PJ line comment character: PJ-Chars. (line 6)
23917 * PJ line separator: PJ-Chars. (line 14)
23918 * PJ options: PJ Options. (line 6)
23919 * PJ support: PJ-Dependent. (line 6)
23920 * plus, permitted arguments: Infix Ops. (line 44)
23921 * popsection directive: PopSection. (line 6)
23922 * Position-independent code, CRIS: CRIS-Opts. (line 27)
23923 * Position-independent code, symbols in, CRIS: CRIS-Pic. (line 6)
23924 * PowerPC architectures: PowerPC-Opts. (line 6)
23925 * PowerPC directives: PowerPC-Pseudo. (line 6)
23926 * PowerPC line comment character: PowerPC-Chars. (line 6)
23927 * PowerPC line separator: PowerPC-Chars. (line 18)
23928 * PowerPC options: PowerPC-Opts. (line 6)
23929 * PowerPC support: PPC-Dependent. (line 6)
23930 * precedence of operators: Infix Ops. (line 11)
23931 * precision, floating point: Flonums. (line 6)
23932 * prefix operators: Prefix Ops. (line 6)
23933 * prefixes, i386: i386-Prefixes. (line 6)
23934 * preprocessing: Preprocessing. (line 6)
23935 * preprocessing, turning on and off: Preprocessing. (line 27)
23936 * previous directive: Previous. (line 6)
23937 * primary attributes, COFF symbols: COFF Symbols. (line 13)
23938 * print directive: Print. (line 6)
23939 * proc directive, SPARC: Sparc-Directives. (line 25)
23940 * profiler directive, MSP 430: MSP430 Directives. (line 22)
23941 * profiling capability for MSP 430: MSP430 Profiling Capability.
23943 * protected directive: Protected. (line 6)
23944 * pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45)
23945 * pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12)
23946 * pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17)
23947 * pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131)
23948 * pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97)
23949 * pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131)
23950 * pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50)
23951 * pseudo-op IS, MMIX: MMIX-Pseudos. (line 42)
23952 * pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7)
23953 * pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28)
23954 * pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108)
23955 * pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120)
23956 * pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108)
23957 * pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108)
23958 * pseudo-opcodes for XStormy16: XStormy16 Opcodes. (line 6)
23959 * pseudo-opcodes, M680x0: M68K-Branch. (line 6)
23960 * pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6)
23961 * pseudo-ops for branch, VAX: VAX-branch. (line 6)
23962 * pseudo-ops, CRIS: CRIS-Pseudos. (line 6)
23963 * pseudo-ops, machine independent: Pseudo Ops. (line 6)
23964 * pseudo-ops, MMIX: MMIX-Pseudos. (line 6)
23965 * psize directive: Psize. (line 6)
23966 * PSR bits: IA-64-Bits. (line 6)
23967 * pstring directive, TIC54X: TIC54X-Directives. (line 208)
23968 * psw register, V850: V850-Regs. (line 116)
23969 * purgem directive: Purgem. (line 6)
23970 * purpose of GNU assembler: GNU Assembler. (line 12)
23971 * pushsection directive: PushSection. (line 6)
23972 * quad directive: Quad. (line 6)
23973 * quad directive, i386: i386-Float. (line 21)
23974 * quad directive, x86-64: i386-Float. (line 21)
23975 * real-mode code, i386: i386-16bit. (line 6)
23976 * ref directive, TIC54X: TIC54X-Directives. (line 103)
23977 * register directive, SPARC: Sparc-Directives. (line 29)
23978 * register names, AArch64: AArch64-Regs. (line 6)
23979 * register names, Alpha: Alpha-Regs. (line 6)
23980 * register names, ARC: ARC-Regs. (line 6)
23981 * register names, ARM: ARM-Regs. (line 6)
23982 * register names, AVR: AVR-Regs. (line 6)
23983 * register names, CRIS: CRIS-Regs. (line 6)
23984 * register names, H8/300: H8/300-Regs. (line 6)
23985 * register names, IA-64: IA-64-Regs. (line 6)
23986 * register names, LM32: LM32-Regs. (line 6)
23987 * register names, MMIX: MMIX-Regs. (line 6)
23988 * register names, MSP 430: MSP430-Regs. (line 6)
23989 * register names, Sparc: Sparc-Regs. (line 6)
23990 * register names, TILE-Gx: TILE-Gx Registers. (line 6)
23991 * register names, TILEPro: TILEPro Registers. (line 6)
23992 * register names, V850: V850-Regs. (line 6)
23993 * register names, VAX: VAX-operands. (line 17)
23994 * register names, Xtensa: Xtensa Registers. (line 6)
23995 * register names, Z80: Z80-Regs. (line 6)
23996 * register naming, s390: s390 Register. (line 6)
23997 * register operands, i386: i386-Variations. (line 15)
23998 * register operands, x86-64: i386-Variations. (line 15)
23999 * registers, D10V: D10V-Regs. (line 6)
24000 * registers, D30V: D30V-Regs. (line 6)
24001 * registers, i386: i386-Regs. (line 6)
24002 * registers, SH: SH-Regs. (line 6)
24003 * registers, SH64: SH64-Regs. (line 6)
24004 * registers, TIC54X memory-mapped: TIC54X-MMRegs. (line 6)
24005 * registers, x86-64: i386-Regs. (line 6)
24006 * registers, Z8000: Z8000-Regs. (line 6)
24007 * relaxation: Xtensa Relaxation. (line 6)
24008 * relaxation of ADDI instructions: Xtensa Immediate Relaxation.
24010 * relaxation of branch instructions: Xtensa Branch Relaxation.
24012 * relaxation of call instructions: Xtensa Call Relaxation.
24014 * relaxation of immediate fields: Xtensa Immediate Relaxation.
24016 * relaxation of L16SI instructions: Xtensa Immediate Relaxation.
24018 * relaxation of L16UI instructions: Xtensa Immediate Relaxation.
24020 * relaxation of L32I instructions: Xtensa Immediate Relaxation.
24022 * relaxation of L8UI instructions: Xtensa Immediate Relaxation.
24024 * relaxation of MOVI instructions: Xtensa Immediate Relaxation.
24026 * reloc directive: Reloc. (line 6)
24027 * relocation: Sections. (line 6)
24028 * relocation example: Ld Sections. (line 40)
24029 * relocations, AArch64: AArch64-Relocations. (line 6)
24030 * relocations, Alpha: Alpha-Relocs. (line 6)
24031 * relocations, Sparc: Sparc-Relocs. (line 6)
24032 * repeat prefixes, i386: i386-Prefixes. (line 44)
24033 * reporting bugs in assembler: Reporting Bugs. (line 6)
24034 * rept directive: Rept. (line 6)
24035 * reserve directive, SPARC: Sparc-Directives. (line 39)
24036 * return instructions, i386: i386-Variations. (line 41)
24037 * return instructions, x86-64: i386-Variations. (line 41)
24038 * REX prefixes, i386: i386-Prefixes. (line 46)
24039 * RL78 assembler directives: RL78-Directives. (line 6)
24040 * RL78 line comment character: RL78-Chars. (line 6)
24041 * RL78 line separator: RL78-Chars. (line 14)
24042 * RL78 modifiers: RL78-Modifiers. (line 6)
24043 * RL78 options: RL78-Opts. (line 6)
24044 * RL78 support: RL78-Dependent. (line 6)
24045 * rsect: Z8000 Directives. (line 52)
24046 * RX assembler directive .3byte: RX-Directives. (line 9)
24047 * RX assembler directive .fetchalign: RX-Directives. (line 13)
24048 * RX assembler directives: RX-Directives. (line 6)
24049 * RX floating point: RX-Float. (line 6)
24050 * RX line comment character: RX-Chars. (line 6)
24051 * RX line separator: RX-Chars. (line 14)
24052 * RX modifiers: RX-Modifiers. (line 6)
24053 * RX options: RX-Opts. (line 6)
24054 * RX support: RX-Dependent. (line 6)
24055 * s390 floating point: s390 Floating Point. (line 6)
24056 * s390 instruction aliases: s390 Aliases. (line 6)
24057 * s390 instruction formats: s390 Formats. (line 6)
24058 * s390 instruction marker: s390 Instruction Marker.
24060 * s390 instruction mnemonics: s390 Mnemonics. (line 6)
24061 * s390 instruction operand modifier: s390 Operand Modifier.
24063 * s390 instruction operands: s390 Operands. (line 6)
24064 * s390 instruction syntax: s390 Syntax. (line 6)
24065 * s390 line comment character: s390 Characters. (line 6)
24066 * s390 line separator: s390 Characters. (line 13)
24067 * s390 literal pool entries: s390 Literal Pool Entries.
24069 * s390 options: s390 Options. (line 6)
24070 * s390 register naming: s390 Register. (line 6)
24071 * s390 support: S/390-Dependent. (line 6)
24072 * sblock directive, TIC54X: TIC54X-Directives. (line 182)
24073 * sbttl directive: Sbttl. (line 6)
24074 * schedule directive: Schedule Directive. (line 6)
24075 * scl directive: Scl. (line 6)
24076 * SCORE architectures: SCORE-Opts. (line 6)
24077 * SCORE directives: SCORE-Pseudo. (line 6)
24078 * SCORE line comment character: SCORE-Chars. (line 6)
24079 * SCORE line separator: SCORE-Chars. (line 14)
24080 * SCORE options: SCORE-Opts. (line 6)
24081 * SCORE processor: SCORE-Dependent. (line 6)
24082 * sdaoff pseudo-op, V850: V850 Opcodes. (line 65)
24083 * search path for .include: I. (line 6)
24084 * sect directive, MSP 430: MSP430 Directives. (line 18)
24085 * sect directive, TIC54X: TIC54X-Directives. (line 188)
24086 * section directive (COFF version): Section. (line 16)
24087 * section directive (ELF version): Section. (line 73)
24088 * section directive, V850: V850 Directives. (line 9)
24089 * section override prefixes, i386: i386-Prefixes. (line 23)
24090 * Section Stack <1>: Section. (line 68)
24091 * Section Stack <2>: PushSection. (line 6)
24092 * Section Stack <3>: Previous. (line 6)
24093 * Section Stack <4>: SubSection. (line 6)
24094 * Section Stack: PopSection. (line 6)
24095 * section-relative addressing: Secs Background. (line 68)
24096 * sections: Sections. (line 6)
24097 * sections in messages, internal: As Sections. (line 6)
24098 * sections, i386: i386-Variations. (line 47)
24099 * sections, named: Ld Sections. (line 8)
24100 * sections, x86-64: i386-Variations. (line 47)
24101 * seg directive, SPARC: Sparc-Directives. (line 44)
24102 * segm: Z8000 Directives. (line 10)
24103 * set directive: Set. (line 6)
24104 * set directive, TIC54X: TIC54X-Directives. (line 191)
24105 * SH addressing modes: SH-Addressing. (line 6)
24106 * SH floating point (IEEE): SH Floating Point. (line 6)
24107 * SH line comment character: SH-Chars. (line 6)
24108 * SH line separator: SH-Chars. (line 8)
24109 * SH machine directives: SH Directives. (line 6)
24110 * SH opcode summary: SH Opcodes. (line 6)
24111 * SH options: SH Options. (line 6)
24112 * SH registers: SH-Regs. (line 6)
24113 * SH support: SH-Dependent. (line 6)
24114 * SH64 ABI options: SH64 Options. (line 29)
24115 * SH64 addressing modes: SH64-Addressing. (line 6)
24116 * SH64 ISA options: SH64 Options. (line 6)
24117 * SH64 line comment character: SH64-Chars. (line 6)
24118 * SH64 line separator: SH64-Chars. (line 13)
24119 * SH64 machine directives: SH64 Directives. (line 9)
24120 * SH64 opcode summary: SH64 Opcodes. (line 6)
24121 * SH64 options: SH64 Options. (line 6)
24122 * SH64 registers: SH64-Regs. (line 6)
24123 * SH64 support: SH64-Dependent. (line 6)
24124 * shigh directive, M32R: M32R-Directives. (line 26)
24125 * short directive: Short. (line 6)
24126 * short directive, ARC: ARC Directives. (line 171)
24127 * short directive, TIC54X: TIC54X-Directives. (line 111)
24128 * SIMD, i386: i386-SIMD. (line 6)
24129 * SIMD, x86-64: i386-SIMD. (line 6)
24130 * single character constant: Chars. (line 6)
24131 * single directive: Single. (line 6)
24132 * single directive, i386: i386-Float. (line 14)
24133 * single directive, x86-64: i386-Float. (line 14)
24134 * single quote, Z80: Z80-Chars. (line 20)
24135 * sixteen bit integers: hword. (line 6)
24136 * sixteen byte integer: Octa. (line 6)
24137 * size directive (COFF version): Size. (line 11)
24138 * size directive (ELF version): Size. (line 19)
24139 * size modifiers, D10V: D10V-Size. (line 6)
24140 * size modifiers, D30V: D30V-Size. (line 6)
24141 * size modifiers, M680x0: M68K-Syntax. (line 8)
24142 * size prefixes, i386: i386-Prefixes. (line 27)
24143 * size suffixes, H8/300: H8/300 Opcodes. (line 163)
24144 * size, translations, Sparc: Sparc-Size-Translations.
24146 * sizes operands, i386: i386-Variations. (line 29)
24147 * sizes operands, x86-64: i386-Variations. (line 29)
24148 * skip directive: Skip. (line 6)
24149 * skip directive, M680x0: M68K-Directives. (line 19)
24150 * skip directive, SPARC: Sparc-Directives. (line 48)
24151 * sleb128 directive: Sleb128. (line 6)
24152 * small objects, MIPS ECOFF: MIPS Object. (line 11)
24153 * SmartMIPS instruction generation override: MIPS ASE instruction generation overrides.
24155 * SOM symbol attributes: SOM Symbols. (line 6)
24156 * source program: Input Files. (line 6)
24157 * source, destination operands; i386: i386-Variations. (line 22)
24158 * source, destination operands; x86-64: i386-Variations. (line 22)
24159 * sp register: Xtensa Registers. (line 6)
24160 * sp register, V850: V850-Regs. (line 14)
24161 * space directive: Space. (line 6)
24162 * space directive, TIC54X: TIC54X-Directives. (line 196)
24163 * space used, maximum for assembly: statistics. (line 6)
24164 * SPARC architectures: Sparc-Opts. (line 6)
24165 * Sparc constants: Sparc-Constants. (line 6)
24166 * SPARC data alignment: Sparc-Aligned-Data. (line 6)
24167 * SPARC floating point (IEEE): Sparc-Float. (line 6)
24168 * Sparc line comment character: Sparc-Chars. (line 6)
24169 * Sparc line separator: Sparc-Chars. (line 14)
24170 * SPARC machine directives: Sparc-Directives. (line 6)
24171 * SPARC options: Sparc-Opts. (line 6)
24172 * Sparc registers: Sparc-Regs. (line 6)
24173 * Sparc relocations: Sparc-Relocs. (line 6)
24174 * Sparc size translations: Sparc-Size-Translations.
24176 * SPARC support: Sparc-Dependent. (line 6)
24177 * SPARC syntax: Sparc-Aligned-Data. (line 21)
24178 * special characters, M680x0: M68K-Chars. (line 6)
24179 * special purpose registers, MSP 430: MSP430-Regs. (line 11)
24180 * sslist directive, TIC54X: TIC54X-Directives. (line 203)
24181 * ssnolist directive, TIC54X: TIC54X-Directives. (line 203)
24182 * stabd directive: Stab. (line 38)
24183 * stabn directive: Stab. (line 48)
24184 * stabs directive: Stab. (line 51)
24185 * stabX directives: Stab. (line 6)
24186 * standard assembler sections: Secs Background. (line 27)
24187 * standard input, as input file: Command Line. (line 10)
24188 * statement separator character: Statements. (line 6)
24189 * statement separator, AArch64: AArch64-Chars. (line 10)
24190 * statement separator, Alpha: Alpha-Chars. (line 11)
24191 * statement separator, ARC: ARC-Chars. (line 12)
24192 * statement separator, ARM: ARM-Chars. (line 14)
24193 * statement separator, AVR: AVR-Chars. (line 14)
24194 * statement separator, CR16: CR16-Chars. (line 13)
24195 * statement separator, Epiphany: Epiphany-Chars. (line 14)
24196 * statement separator, H8/300: H8/300-Chars. (line 8)
24197 * statement separator, i386: i386-Chars. (line 18)
24198 * statement separator, i860: i860-Chars. (line 14)
24199 * statement separator, i960: i960-Chars. (line 14)
24200 * statement separator, IA-64: IA-64-Chars. (line 8)
24201 * statement separator, IP2K: IP2K-Chars. (line 14)
24202 * statement separator, LM32: LM32-Chars. (line 12)
24203 * statement separator, M32C: M32C-Chars. (line 14)
24204 * statement separator, M68HC11: M68HC11-Syntax. (line 27)
24205 * statement separator, MicroBlaze: MicroBlaze-Chars. (line 14)
24206 * statement separator, MIPS: MIPS-Chars. (line 14)
24207 * statement separator, MSP 430: MSP430-Chars. (line 14)
24208 * statement separator, NS32K: NS32K-Chars. (line 18)
24209 * statement separator, PJ: PJ-Chars. (line 14)
24210 * statement separator, PowerPC: PowerPC-Chars. (line 18)
24211 * statement separator, RL78: RL78-Chars. (line 14)
24212 * statement separator, RX: RX-Chars. (line 14)
24213 * statement separator, s390: s390 Characters. (line 13)
24214 * statement separator, SCORE: SCORE-Chars. (line 14)
24215 * statement separator, SH: SH-Chars. (line 8)
24216 * statement separator, SH64: SH64-Chars. (line 13)
24217 * statement separator, Sparc: Sparc-Chars. (line 14)
24218 * statement separator, TIC54X: TIC54X-Chars. (line 17)
24219 * statement separator, TIC6X: TIC6X Syntax. (line 13)
24220 * statement separator, V850: V850-Chars. (line 13)
24221 * statement separator, VAX: VAX-Chars. (line 14)
24222 * statement separator, XGATE: XGATE-Syntax. (line 26)
24223 * statement separator, XStormy16: XStormy16-Chars. (line 14)
24224 * statement separator, Z80: Z80-Chars. (line 13)
24225 * statement separator, Z8000: Z8000-Chars. (line 13)
24226 * statements, structure of: Statements. (line 6)
24227 * statistics, about assembly: statistics. (line 6)
24228 * stopping the assembly: Abort. (line 6)
24229 * string constants: Strings. (line 6)
24230 * string directive: String. (line 8)
24231 * string directive on HPPA: HPPA Directives. (line 137)
24232 * string directive, TIC54X: TIC54X-Directives. (line 208)
24233 * string literals: Ascii. (line 6)
24234 * string, copying to object file: String. (line 8)
24235 * string16 directive: String. (line 8)
24236 * string16, copying to object file: String. (line 8)
24237 * string32 directive: String. (line 8)
24238 * string32, copying to object file: String. (line 8)
24239 * string64 directive: String. (line 8)
24240 * string64, copying to object file: String. (line 8)
24241 * string8 directive: String. (line 8)
24242 * string8, copying to object file: String. (line 8)
24243 * struct directive: Struct. (line 6)
24244 * struct directive, TIC54X: TIC54X-Directives. (line 216)
24245 * structure debugging, COFF: Tag. (line 6)
24246 * sub-instruction ordering, D10V: D10V-Chars. (line 14)
24247 * sub-instruction ordering, D30V: D30V-Chars. (line 14)
24248 * sub-instructions, D10V: D10V-Subs. (line 6)
24249 * sub-instructions, D30V: D30V-Subs. (line 6)
24250 * subexpressions: Arguments. (line 24)
24251 * subsection directive: SubSection. (line 6)
24252 * subsym builtins, TIC54X: TIC54X-Macros. (line 16)
24253 * subtitles for listings: Sbttl. (line 6)
24254 * subtraction, permitted arguments: Infix Ops. (line 49)
24255 * summary of options: Overview. (line 6)
24256 * support: HPPA-Dependent. (line 6)
24257 * supporting files, including: Include. (line 6)
24258 * suppressing warnings: W. (line 11)
24259 * sval: Z8000 Directives. (line 33)
24260 * symbol attributes: Symbol Attributes. (line 6)
24261 * symbol attributes, a.out: a.out Symbols. (line 6)
24262 * symbol attributes, COFF: COFF Symbols. (line 6)
24263 * symbol attributes, SOM: SOM Symbols. (line 6)
24264 * symbol descriptor, COFF: Desc. (line 6)
24265 * symbol modifiers <1>: LM32-Modifiers. (line 12)
24266 * symbol modifiers <2>: M32C-Modifiers. (line 11)
24267 * symbol modifiers <3>: M68HC11-Modifiers. (line 12)
24268 * symbol modifiers: AVR-Modifiers. (line 12)
24269 * symbol modifiers, TILE-Gx: TILE-Gx Modifiers. (line 6)
24270 * symbol modifiers, TILEPro: TILEPro Modifiers. (line 6)
24271 * symbol names: Symbol Names. (line 6)
24272 * symbol names, $ in <1>: D10V-Chars. (line 53)
24273 * symbol names, $ in <2>: D30V-Chars. (line 70)
24274 * symbol names, $ in <3>: SH64-Chars. (line 15)
24275 * symbol names, $ in: SH-Chars. (line 15)
24276 * symbol names, local: Symbol Names. (line 27)
24277 * symbol names, temporary: Symbol Names. (line 40)
24278 * symbol storage class (COFF): Scl. (line 6)
24279 * symbol type: Symbol Type. (line 6)
24280 * symbol type, COFF: Type. (line 11)
24281 * symbol type, ELF: Type. (line 22)
24282 * symbol value: Symbol Value. (line 6)
24283 * symbol value, setting: Set. (line 6)
24284 * symbol values, assigning: Setting Symbols. (line 6)
24285 * symbol versioning: Symver. (line 6)
24286 * symbol, common: Comm. (line 6)
24287 * symbol, making visible to linker: Global. (line 6)
24288 * symbolic debuggers, information for: Stab. (line 6)
24289 * symbols: Symbols. (line 6)
24290 * Symbols in position-independent code, CRIS: CRIS-Pic. (line 6)
24291 * symbols with uppercase, VAX/VMS: VAX-Opts. (line 42)
24292 * symbols, assigning values to: Equ. (line 6)
24293 * Symbols, built-in, CRIS: CRIS-Symbols. (line 6)
24294 * Symbols, CRIS, built-in: CRIS-Symbols. (line 6)
24295 * symbols, local common: Lcomm. (line 6)
24296 * symver directive: Symver. (line 6)
24297 * syntax compatibility, i386: i386-Variations. (line 6)
24298 * syntax compatibility, x86-64: i386-Variations. (line 6)
24299 * syntax, AVR: AVR-Modifiers. (line 6)
24300 * syntax, Blackfin: Blackfin Syntax. (line 6)
24301 * syntax, D10V: D10V-Syntax. (line 6)
24302 * syntax, D30V: D30V-Syntax. (line 6)
24303 * syntax, LM32: LM32-Modifiers. (line 6)
24304 * syntax, M680x0: M68K-Syntax. (line 8)
24305 * syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6)
24306 * syntax, M68HC11: M68HC11-Syntax. (line 6)
24307 * syntax, machine-independent: Syntax. (line 6)
24308 * syntax, RL78: RL78-Modifiers. (line 6)
24309 * syntax, RX: RX-Modifiers. (line 6)
24310 * syntax, SPARC: Sparc-Aligned-Data. (line 21)
24311 * syntax, TILE-Gx: TILE-Gx Syntax. (line 6)
24312 * syntax, TILEPro: TILEPro Syntax. (line 6)
24313 * syntax, XGATE: XGATE-Syntax. (line 6)
24314 * syntax, Xtensa assembler: Xtensa Syntax. (line 6)
24315 * sysproc directive, i960: Directives-i960. (line 37)
24316 * tab (\t): Strings. (line 27)
24317 * tab directive, TIC54X: TIC54X-Directives. (line 247)
24318 * tag directive: Tag. (line 6)
24319 * tag directive, TIC54X: TIC54X-Directives. (line 216)
24320 * TBM, i386: i386-TBM. (line 6)
24321 * TBM, x86-64: i386-TBM. (line 6)
24322 * tdaoff pseudo-op, V850: V850 Opcodes. (line 81)
24323 * temporary symbol names: Symbol Names. (line 40)
24324 * text and data sections, joining: R. (line 6)
24325 * text directive: Text. (line 6)
24326 * text section: Ld Sections. (line 9)
24327 * tfloat directive, i386: i386-Float. (line 14)
24328 * tfloat directive, x86-64: i386-Float. (line 14)
24329 * Thumb support <1>: ARM-Dependent. (line 6)
24330 * Thumb support: AArch64-Dependent. (line 6)
24331 * TIC54X builtin math functions: TIC54X-Builtins. (line 6)
24332 * TIC54X line comment character: TIC54X-Chars. (line 6)
24333 * TIC54X line separator: TIC54X-Chars. (line 17)
24334 * TIC54X machine directives: TIC54X-Directives. (line 6)
24335 * TIC54X memory-mapped registers: TIC54X-MMRegs. (line 6)
24336 * TIC54X options: TIC54X-Opts. (line 6)
24337 * TIC54X subsym builtins: TIC54X-Macros. (line 16)
24338 * TIC54X support: TIC54X-Dependent. (line 6)
24339 * TIC54X-specific macros: TIC54X-Macros. (line 6)
24340 * TIC6X big-endian output: TIC6X Options. (line 46)
24341 * TIC6X line comment character: TIC6X Syntax. (line 6)
24342 * TIC6X line separator: TIC6X Syntax. (line 13)
24343 * TIC6X little-endian output: TIC6X Options. (line 46)
24344 * TIC6X machine directives: TIC6X Directives. (line 6)
24345 * TIC6X options: TIC6X Options. (line 6)
24346 * TIC6X support: TIC6X-Dependent. (line 6)
24347 * TILE-Gx machine directives: TILE-Gx Directives. (line 6)
24348 * TILE-Gx modifiers: TILE-Gx Modifiers. (line 6)
24349 * TILE-Gx opcode names: TILE-Gx Opcodes. (line 6)
24350 * TILE-Gx register names: TILE-Gx Registers. (line 6)
24351 * TILE-Gx support: TILE-Gx-Dependent. (line 6)
24352 * TILE-Gx syntax: TILE-Gx Syntax. (line 6)
24353 * TILEPro machine directives: TILEPro Directives. (line 6)
24354 * TILEPro modifiers: TILEPro Modifiers. (line 6)
24355 * TILEPro opcode names: TILEPro Opcodes. (line 6)
24356 * TILEPro register names: TILEPro Registers. (line 6)
24357 * TILEPro support: TILEPro-Dependent. (line 6)
24358 * TILEPro syntax: TILEPro Syntax. (line 6)
24359 * time, total for assembly: statistics. (line 6)
24360 * title directive: Title. (line 6)
24361 * TMS320C6X support: TIC6X-Dependent. (line 6)
24362 * tp register, V850: V850-Regs. (line 20)
24363 * transform directive: Transform Directive. (line 6)
24364 * trusted compiler: f. (line 6)
24365 * turning preprocessing on and off: Preprocessing. (line 27)
24366 * type directive (COFF version): Type. (line 11)
24367 * type directive (ELF version): Type. (line 22)
24368 * type of a symbol: Symbol Type. (line 6)
24369 * ualong directive, SH: SH Directives. (line 6)
24370 * uaquad directive, SH: SH Directives. (line 6)
24371 * uaword directive, SH: SH Directives. (line 6)
24372 * ubyte directive, TIC54X: TIC54X-Directives. (line 36)
24373 * uchar directive, TIC54X: TIC54X-Directives. (line 36)
24374 * uhalf directive, TIC54X: TIC54X-Directives. (line 111)
24375 * uint directive, TIC54X: TIC54X-Directives. (line 111)
24376 * uleb128 directive: Uleb128. (line 6)
24377 * ulong directive, TIC54X: TIC54X-Directives. (line 135)
24378 * undefined section: Ld Sections. (line 36)
24379 * union directive, TIC54X: TIC54X-Directives. (line 250)
24380 * unsegm: Z8000 Directives. (line 14)
24381 * usect directive, TIC54X: TIC54X-Directives. (line 262)
24382 * ushort directive, TIC54X: TIC54X-Directives. (line 111)
24383 * uword directive, TIC54X: TIC54X-Directives. (line 111)
24384 * V850 command line options: V850 Options. (line 9)
24385 * V850 floating point (IEEE): V850 Floating Point. (line 6)
24386 * V850 line comment character: V850-Chars. (line 6)
24387 * V850 line separator: V850-Chars. (line 13)
24388 * V850 machine directives: V850 Directives. (line 6)
24389 * V850 opcodes: V850 Opcodes. (line 6)
24390 * V850 options (none): V850 Options. (line 6)
24391 * V850 register names: V850-Regs. (line 6)
24392 * V850 support: V850-Dependent. (line 6)
24393 * val directive: Val. (line 6)
24394 * value attribute, COFF: Val. (line 6)
24395 * value of a symbol: Symbol Value. (line 6)
24396 * var directive, TIC54X: TIC54X-Directives. (line 272)
24397 * VAX bitfields not supported: VAX-no. (line 6)
24398 * VAX branch improvement: VAX-branch. (line 6)
24399 * VAX command-line options ignored: VAX-Opts. (line 6)
24400 * VAX displacement sizing character: VAX-operands. (line 12)
24401 * VAX floating point: VAX-float. (line 6)
24402 * VAX immediate character: VAX-operands. (line 6)
24403 * VAX indirect character: VAX-operands. (line 9)
24404 * VAX line comment character: VAX-Chars. (line 6)
24405 * VAX line separator: VAX-Chars. (line 14)
24406 * VAX machine directives: VAX-directives. (line 6)
24407 * VAX opcode mnemonics: VAX-opcodes. (line 6)
24408 * VAX operand notation: VAX-operands. (line 6)
24409 * VAX register names: VAX-operands. (line 17)
24410 * VAX support: Vax-Dependent. (line 6)
24411 * Vax-11 C compatibility: VAX-Opts. (line 42)
24412 * VAX/VMS options: VAX-Opts. (line 42)
24413 * version directive: Version. (line 6)
24414 * version directive, TIC54X: TIC54X-Directives. (line 276)
24415 * version of assembler: v. (line 6)
24416 * versions of symbols: Symver. (line 6)
24417 * visibility <1>: Hidden. (line 6)
24418 * visibility <2>: Protected. (line 6)
24419 * visibility: Internal. (line 6)
24420 * VMS (VAX) options: VAX-Opts. (line 42)
24421 * vtable_entry directive: VTableEntry. (line 6)
24422 * vtable_inherit directive: VTableInherit. (line 6)
24423 * warning directive: Warning. (line 6)
24424 * warning for altered difference tables: K. (line 6)
24425 * warning messages: Errors. (line 6)
24426 * warnings, causing error: W. (line 16)
24427 * warnings, M32R: M32R-Warnings. (line 6)
24428 * warnings, suppressing: W. (line 11)
24429 * warnings, switching on: W. (line 19)
24430 * weak directive: Weak. (line 6)
24431 * weakref directive: Weakref. (line 6)
24432 * whitespace: Whitespace. (line 6)
24433 * whitespace, removed by preprocessor: Preprocessing. (line 7)
24434 * wide floating point directives, VAX: VAX-directives. (line 10)
24435 * width directive, TIC54X: TIC54X-Directives. (line 127)
24436 * Width of continuation lines of disassembly output: listing. (line 21)
24437 * Width of first line disassembly output: listing. (line 16)
24438 * Width of source line output: listing. (line 28)
24439 * wmsg directive, TIC54X: TIC54X-Directives. (line 77)
24440 * word directive: Word. (line 6)
24441 * word directive, ARC: ARC Directives. (line 174)
24442 * word directive, H8/300: H8/300 Directives. (line 6)
24443 * word directive, i386: i386-Float. (line 21)
24444 * word directive, SPARC: Sparc-Directives. (line 51)
24445 * word directive, TIC54X: TIC54X-Directives. (line 111)
24446 * word directive, x86-64: i386-Float. (line 21)
24447 * writing patterns in memory: Fill. (line 6)
24448 * wval: Z8000 Directives. (line 24)
24449 * x86 machine directives: i386-Directives. (line 6)
24450 * x86-64 arch directive: i386-Arch. (line 6)
24451 * x86-64 att_syntax pseudo op: i386-Variations. (line 6)
24452 * x86-64 conversion instructions: i386-Mnemonics. (line 37)
24453 * x86-64 floating point: i386-Float. (line 6)
24454 * x86-64 immediate operands: i386-Variations. (line 15)
24455 * x86-64 instruction naming: i386-Mnemonics. (line 6)
24456 * x86-64 intel_syntax pseudo op: i386-Variations. (line 6)
24457 * x86-64 jump optimization: i386-Jumps. (line 6)
24458 * x86-64 jump, call, return: i386-Variations. (line 41)
24459 * x86-64 jump/call operands: i386-Variations. (line 15)
24460 * x86-64 memory references: i386-Memory. (line 6)
24461 * x86-64 options: i386-Options. (line 6)
24462 * x86-64 register operands: i386-Variations. (line 15)
24463 * x86-64 registers: i386-Regs. (line 6)
24464 * x86-64 sections: i386-Variations. (line 47)
24465 * x86-64 size suffixes: i386-Variations. (line 29)
24466 * x86-64 source, destination operands: i386-Variations. (line 22)
24467 * x86-64 support: i386-Dependent. (line 6)
24468 * x86-64 syntax compatibility: i386-Variations. (line 6)
24469 * xfloat directive, TIC54X: TIC54X-Directives. (line 64)
24470 * XGATE addressing modes: XGATE-Syntax. (line 29)
24471 * XGATE assembler directives: XGATE-Directives. (line 6)
24472 * XGATE floating point: XGATE-Float. (line 6)
24473 * XGATE line comment character: XGATE-Syntax. (line 16)
24474 * XGATE line separator: XGATE-Syntax. (line 26)
24475 * XGATE opcodes: XGATE-opcodes. (line 6)
24476 * XGATE options: XGATE-Opts. (line 6)
24477 * XGATE support: XGATE-Dependent. (line 6)
24478 * XGATE syntax: XGATE-Syntax. (line 6)
24479 * xlong directive, TIC54X: TIC54X-Directives. (line 135)
24480 * XStormy16 comment character: XStormy16-Chars. (line 11)
24481 * XStormy16 line comment character: XStormy16-Chars. (line 6)
24482 * XStormy16 line separator: XStormy16-Chars. (line 14)
24483 * XStormy16 machine directives: XStormy16 Directives.
24485 * XStormy16 pseudo-opcodes: XStormy16 Opcodes. (line 6)
24486 * XStormy16 support: XSTORMY16-Dependent. (line 6)
24487 * Xtensa architecture: Xtensa-Dependent. (line 6)
24488 * Xtensa assembler syntax: Xtensa Syntax. (line 6)
24489 * Xtensa directives: Xtensa Directives. (line 6)
24490 * Xtensa opcode names: Xtensa Opcodes. (line 6)
24491 * Xtensa register names: Xtensa Registers. (line 6)
24492 * xword directive, SPARC: Sparc-Directives. (line 55)
24493 * Z80 $: Z80-Chars. (line 15)
24494 * Z80 ': Z80-Chars. (line 20)
24495 * Z80 floating point: Z80 Floating Point. (line 6)
24496 * Z80 line comment character: Z80-Chars. (line 6)
24497 * Z80 line separator: Z80-Chars. (line 13)
24498 * Z80 options: Z80 Options. (line 6)
24499 * Z80 registers: Z80-Regs. (line 6)
24500 * Z80 support: Z80-Dependent. (line 6)
24501 * Z80 Syntax: Z80 Options. (line 47)
24502 * Z80, \: Z80-Chars. (line 18)
24503 * Z80, case sensitivity: Z80-Case. (line 6)
24504 * Z80-only directives: Z80 Directives. (line 9)
24505 * Z800 addressing modes: Z8000-Addressing. (line 6)
24506 * Z8000 directives: Z8000 Directives. (line 6)
24507 * Z8000 line comment character: Z8000-Chars. (line 6)
24508 * Z8000 line separator: Z8000-Chars. (line 13)
24509 * Z8000 opcode summary: Z8000 Opcodes. (line 6)
24510 * Z8000 options: Z8000 Options. (line 6)
24511 * Z8000 registers: Z8000-Regs. (line 6)
24512 * Z8000 support: Z8000-Dependent. (line 6)
24513 * zdaoff pseudo-op, V850: V850 Opcodes. (line 99)
24514 * zero register, V850: V850-Regs. (line 7)
24515 * zero-terminated strings: Asciz. (line 6)
24521 Node: Overview
\7f1824
24522 Node: Manual
\7f32482
24523 Node: GNU Assembler
\7f33426
24524 Node: Object Formats
\7f34597
24525 Node: Command Line
\7f35049
24526 Node: Input Files
\7f36136
24527 Node: Object
\7f38117
24528 Node: Errors
\7f39013
24529 Node: Invoking
\7f40208
24531 Node: alternate
\7f44074
24537 Node: listing
\7f46574
24542 Node: statistics
\7f54545
24543 Node: traditional-format
\7f54952
24547 Node: Syntax
\7f57129
24548 Node: Preprocessing
\7f57721
24549 Node: Whitespace
\7f59284
24550 Node: Comments
\7f59680
24551 Node: Symbol Intro
\7f61691
24552 Node: Statements
\7f62418
24553 Node: Constants
\7f64407
24554 Node: Characters
\7f65038
24555 Node: Strings
\7f65540
24556 Node: Chars
\7f67706
24557 Node: Numbers
\7f68460
24558 Node: Integers
\7f69000
24559 Node: Bignums
\7f69656
24560 Node: Flonums
\7f70012
24561 Node: Sections
\7f71759
24562 Node: Secs Background
\7f72137
24563 Node: Ld Sections
\7f77176
24564 Node: As Sections
\7f79560
24565 Node: Sub-Sections
\7f80470
24567 Node: Symbols
\7f84565
24568 Node: Labels
\7f85213
24569 Node: Setting Symbols
\7f85944
24570 Node: Symbol Names
\7f86498
24572 Node: Symbol Attributes
\7f92236
24573 Node: Symbol Value
\7f92973
24574 Node: Symbol Type
\7f94018
24575 Node: a.out Symbols
\7f94406
24576 Node: Symbol Desc
\7f94668
24577 Node: Symbol Other
\7f94963
24578 Node: COFF Symbols
\7f95132
24579 Node: SOM Symbols
\7f95805
24580 Node: Expressions
\7f96247
24581 Node: Empty Exprs
\7f96996
24582 Node: Integer Exprs
\7f97343
24583 Node: Arguments
\7f97738
24584 Node: Operators
\7f98844
24585 Node: Prefix Ops
\7f99179
24586 Node: Infix Ops
\7f99507
24587 Node: Pseudo Ops
\7f101897
24588 Node: Abort
\7f107521
24589 Node: ABORT (COFF)
\7f107933
24590 Node: Align
\7f108141
24591 Node: Altmacro
\7f110423
24592 Node: Ascii
\7f111752
24593 Node: Asciz
\7f112061
24594 Node: Balign
\7f112306
24595 Node: Bundle directives
\7f114182
24596 Node: Byte
\7f117111
24597 Node: CFI directives
\7f117372
24598 Node: Comm
\7f123001
24599 Ref: Comm-Footnote-1
\7f124602
24600 Node: Data
\7f124964
24602 Node: Desc
\7f125513
24604 Node: Double
\7f126270
24605 Node: Eject
\7f126608
24606 Node: Else
\7f126783
24607 Node: Elseif
\7f127083
24609 Node: Endef
\7f127592
24610 Node: Endfunc
\7f127769
24611 Node: Endif
\7f127944
24613 Node: Equiv
\7f128719
24616 Node: Error
\7f129950
24617 Node: Exitm
\7f130395
24618 Node: Extern
\7f130564
24619 Node: Fail
\7f130825
24620 Node: File
\7f131270
24621 Node: Fill
\7f132599
24622 Node: Float
\7f133563
24623 Node: Func
\7f133905
24624 Node: Global
\7f134495
24625 Node: Gnu_attribute
\7f135252
24626 Node: Hidden
\7f135477
24627 Node: hword
\7f136063
24628 Node: Ident
\7f136391
24630 Node: Incbin
\7f140024
24631 Node: Include
\7f140719
24633 Node: Internal
\7f141651
24635 Node: Irpc
\7f143178
24636 Node: Lcomm
\7f144095
24637 Node: Lflags
\7f144843
24638 Node: Line
\7f145037
24639 Node: Linkonce
\7f145950
24640 Node: List
\7f147179
24643 Node: Loc_mark_labels
\7f149323
24644 Node: Local
\7f149807
24645 Node: Long
\7f150419
24646 Node: Macro
\7f150597
24648 Node: Noaltmacro
\7f156857
24649 Node: Nolist
\7f157026
24650 Node: Octa
\7f157456
24651 Node: Offset
\7f157793
24653 Node: P2align
\7f159405
24654 Node: PopSection
\7f161333
24655 Node: Previous
\7f161841
24656 Node: Print
\7f163254
24657 Node: Protected
\7f163483
24658 Node: Psize
\7f164130
24659 Node: Purgem
\7f164814
24660 Node: PushSection
\7f165035
24661 Node: Quad
\7f165778
24662 Node: Reloc
\7f166234
24663 Node: Rept
\7f166995
24664 Node: Sbttl
\7f167409
24666 Node: Section
\7f168115
24668 Node: Short
\7f174803
24669 Node: Single
\7f175126
24670 Node: Size
\7f175473
24671 Node: Skip
\7f176147
24672 Node: Sleb128
\7f176471
24673 Node: Space
\7f176795
24674 Node: Stab
\7f177436
24675 Node: String
\7f179440
24676 Node: Struct
\7f180434
24677 Node: SubSection
\7f181159
24678 Node: Symver
\7f181722
24680 Node: Text
\7f184497
24681 Node: Title
\7f184818
24682 Node: Type
\7f185199
24683 Node: Uleb128
\7f187512
24685 Node: Version
\7f188086
24686 Node: VTableEntry
\7f188361
24687 Node: VTableInherit
\7f188651
24688 Node: Warning
\7f189101
24689 Node: Weak
\7f189335
24690 Node: Weakref
\7f190004
24691 Node: Word
\7f190969
24692 Node: Deprecated
\7f192815
24693 Node: Object Attributes
\7f193050
24694 Node: GNU Object Attributes
\7f194770
24695 Node: Defining New Object Attributes
\7f197323
24696 Node: Machine Dependencies
\7f198120
24697 Node: AArch64-Dependent
\7f201825
24698 Node: AArch64 Options
\7f202271
24699 Node: AArch64 Syntax
\7f202680
24700 Node: AArch64-Chars
\7f202977
24701 Node: AArch64-Regs
\7f203463
24702 Node: AArch64-Relocations
\7f203757
24703 Node: AArch64 Floating Point
\7f204836
24704 Node: AArch64 Directives
\7f205061
24705 Node: AArch64 Opcodes
\7f206609
24706 Node: AArch64 Mapping Symbols
\7f207288
24707 Node: Alpha-Dependent
\7f207670
24708 Node: Alpha Notes
\7f208110
24709 Node: Alpha Options
\7f208391
24710 Node: Alpha Syntax
\7f210866
24711 Node: Alpha-Chars
\7f211335
24712 Node: Alpha-Regs
\7f211747
24713 Node: Alpha-Relocs
\7f212134
24714 Node: Alpha Floating Point
\7f218392
24715 Node: Alpha Directives
\7f218614
24716 Node: Alpha Opcodes
\7f224137
24717 Node: ARC-Dependent
\7f224432
24718 Node: ARC Options
\7f224815
24719 Node: ARC Syntax
\7f225884
24720 Node: ARC-Chars
\7f226116
24721 Node: ARC-Regs
\7f226597
24722 Node: ARC Floating Point
\7f226721
24723 Node: ARC Directives
\7f227032
24724 Node: ARC Opcodes
\7f233004
24725 Node: ARM-Dependent
\7f233230
24726 Node: ARM Options
\7f233695
24727 Node: ARM Syntax
\7f242529
24728 Node: ARM-Instruction-Set
\7f242897
24729 Node: ARM-Chars
\7f244129
24730 Node: ARM-Regs
\7f244840
24731 Node: ARM-Neon-Alignment
\7f245049
24732 Node: ARM Floating Point
\7f245513
24733 Node: ARM-Relocations
\7f245712
24734 Node: ARM Directives
\7f246846
24735 Ref: arm_pad
\7f248163
24736 Ref: arm_fnend
\7f251500
24737 Ref: arm_fnstart
\7f251824
24738 Ref: arm_save
\7f254834
24739 Ref: arm_setfp
\7f255535
24740 Node: ARM Opcodes
\7f258827
24741 Node: ARM Mapping Symbols
\7f260915
24742 Node: ARM Unwinding Tutorial
\7f261725
24743 Node: AVR-Dependent
\7f267927
24744 Node: AVR Options
\7f268217
24745 Node: AVR Syntax
\7f273009
24746 Node: AVR-Chars
\7f273296
24747 Node: AVR-Regs
\7f273855
24748 Node: AVR-Modifiers
\7f274434
24749 Node: AVR Opcodes
\7f276494
24750 Node: Blackfin-Dependent
\7f281740
24751 Node: Blackfin Options
\7f282052
24752 Node: Blackfin Syntax
\7f283026
24753 Node: Blackfin Directives
\7f289233
24754 Node: CR16-Dependent
\7f289979
24755 Node: CR16 Operand Qualifiers
\7f290279
24756 Node: CR16 Syntax
\7f292940
24757 Node: CR16-Chars
\7f293126
24758 Node: CRIS-Dependent
\7f293663
24759 Node: CRIS-Opts
\7f294009
24760 Ref: march-option
\7f295695
24761 Node: CRIS-Expand
\7f297512
24762 Node: CRIS-Symbols
\7f298695
24763 Node: CRIS-Syntax
\7f299864
24764 Node: CRIS-Chars
\7f300200
24765 Node: CRIS-Pic
\7f300751
24766 Ref: crispic
\7f300947
24767 Node: CRIS-Regs
\7f304487
24768 Node: CRIS-Pseudos
\7f304904
24769 Ref: crisnous
\7f305680
24770 Node: D10V-Dependent
\7f306962
24771 Node: D10V-Opts
\7f307313
24772 Node: D10V-Syntax
\7f308275
24773 Node: D10V-Size
\7f308804
24774 Node: D10V-Subs
\7f309777
24775 Node: D10V-Chars
\7f310812
24776 Node: D10V-Regs
\7f312724
24777 Node: D10V-Addressing
\7f313769
24778 Node: D10V-Word
\7f314455
24779 Node: D10V-Float
\7f314970
24780 Node: D10V-Opcodes
\7f315281
24781 Node: D30V-Dependent
\7f315674
24782 Node: D30V-Opts
\7f316031
24783 Node: D30V-Syntax
\7f316708
24784 Node: D30V-Size
\7f317242
24785 Node: D30V-Subs
\7f318215
24786 Node: D30V-Chars
\7f319252
24787 Node: D30V-Guarded
\7f321860
24788 Node: D30V-Regs
\7f322542
24789 Node: D30V-Addressing
\7f323683
24790 Node: D30V-Float
\7f324353
24791 Node: D30V-Opcodes
\7f324666
24792 Node: Epiphany-Dependent
\7f325061
24793 Node: Epiphany Options
\7f325349
24794 Node: Epiphany Syntax
\7f325748
24795 Node: Epiphany-Chars
\7f325949
24796 Node: H8/300-Dependent
\7f326503
24797 Node: H8/300 Options
\7f326919
24798 Node: H8/300 Syntax
\7f327186
24799 Node: H8/300-Chars
\7f327487
24800 Node: H8/300-Regs
\7f327786
24801 Node: H8/300-Addressing
\7f328705
24802 Node: H8/300 Floating Point
\7f329746
24803 Node: H8/300 Directives
\7f330073
24804 Node: H8/300 Opcodes
\7f331201
24805 Node: HPPA-Dependent
\7f339523
24806 Node: HPPA Notes
\7f339958
24807 Node: HPPA Options
\7f340716
24808 Node: HPPA Syntax
\7f340911
24809 Node: HPPA Floating Point
\7f342181
24810 Node: HPPA Directives
\7f342387
24811 Node: HPPA Opcodes
\7f351073
24812 Node: ESA/390-Dependent
\7f351332
24813 Node: ESA/390 Notes
\7f351792
24814 Node: ESA/390 Options
\7f352583
24815 Node: ESA/390 Syntax
\7f352793
24816 Node: ESA/390 Floating Point
\7f354966
24817 Node: ESA/390 Directives
\7f355245
24818 Node: ESA/390 Opcodes
\7f358534
24819 Node: i386-Dependent
\7f358796
24820 Node: i386-Options
\7f360126
24821 Node: i386-Directives
\7f364692
24822 Node: i386-Syntax
\7f365430
24823 Node: i386-Variations
\7f365735
24824 Node: i386-Chars
\7f368276
24825 Node: i386-Mnemonics
\7f369005
24826 Node: i386-Regs
\7f372316
24827 Node: i386-Prefixes
\7f374361
24828 Node: i386-Memory
\7f377121
24829 Node: i386-Jumps
\7f380058
24830 Node: i386-Float
\7f381179
24831 Node: i386-SIMD
\7f383010
24832 Node: i386-LWP
\7f384119
24833 Node: i386-BMI
\7f384953
24834 Node: i386-TBM
\7f385331
24835 Node: i386-16bit
\7f385861
24836 Node: i386-Bugs
\7f387932
24837 Node: i386-Arch
\7f388686
24838 Node: i386-Notes
\7f391515
24839 Node: i860-Dependent
\7f392373
24840 Node: Notes-i860
\7f392813
24841 Node: Options-i860
\7f393718
24842 Node: Directives-i860
\7f395081
24843 Node: Opcodes for i860
\7f396150
24844 Node: Syntax of i860
\7f398340
24845 Node: i860-Chars
\7f398524
24846 Node: i960-Dependent
\7f399083
24847 Node: Options-i960
\7f399530
24848 Node: Floating Point-i960
\7f403415
24849 Node: Directives-i960
\7f403683
24850 Node: Opcodes for i960
\7f405717
24851 Node: callj-i960
\7f406357
24852 Node: Compare-and-branch-i960
\7f406846
24853 Node: Syntax of i960
\7f408750
24854 Node: i960-Chars
\7f408950
24855 Node: IA-64-Dependent
\7f409493
24856 Node: IA-64 Options
\7f409794
24857 Node: IA-64 Syntax
\7f412945
24858 Node: IA-64-Chars
\7f413351
24859 Node: IA-64-Regs
\7f413581
24860 Node: IA-64-Bits
\7f414507
24861 Node: IA-64-Relocs
\7f415037
24862 Node: IA-64 Opcodes
\7f415509
24863 Node: IP2K-Dependent
\7f415781
24864 Node: IP2K-Opts
\7f416053
24865 Node: IP2K-Syntax
\7f416553
24866 Node: IP2K-Chars
\7f416727
24867 Node: LM32-Dependent
\7f417270
24868 Node: LM32 Options
\7f417565
24869 Node: LM32 Syntax
\7f418199
24870 Node: LM32-Regs
\7f418495
24871 Node: LM32-Modifiers
\7f419454
24872 Node: LM32-Chars
\7f420829
24873 Node: LM32 Opcodes
\7f421337
24874 Node: M32C-Dependent
\7f421641
24875 Node: M32C-Opts
\7f422150
24876 Node: M32C-Syntax
\7f422570
24877 Node: M32C-Modifiers
\7f422805
24878 Node: M32C-Chars
\7f424594
24879 Node: M32R-Dependent
\7f425160
24880 Node: M32R-Opts
\7f425481
24881 Node: M32R-Directives
\7f429648
24882 Node: M32R-Warnings
\7f433623
24883 Node: M68K-Dependent
\7f436629
24884 Node: M68K-Opts
\7f437096
24885 Node: M68K-Syntax
\7f444469
24886 Node: M68K-Moto-Syntax
\7f446309
24887 Node: M68K-Float
\7f448899
24888 Node: M68K-Directives
\7f449419
24889 Node: M68K-opcodes
\7f450747
24890 Node: M68K-Branch
\7f450973
24891 Node: M68K-Chars
\7f455171
24892 Node: M68HC11-Dependent
\7f456034
24893 Node: M68HC11-Opts
\7f456571
24894 Node: M68HC11-Syntax
\7f460876
24895 Node: M68HC11-Modifiers
\7f463667
24896 Node: M68HC11-Directives
\7f465495
24897 Node: M68HC11-Float
\7f466871
24898 Node: M68HC11-opcodes
\7f467399
24899 Node: M68HC11-Branch
\7f467581
24900 Node: MicroBlaze-Dependent
\7f470030
24901 Node: MicroBlaze Directives
\7f470722
24902 Node: MicroBlaze Syntax
\7f472105
24903 Node: MicroBlaze-Chars
\7f472337
24904 Node: MIPS-Dependent
\7f472889
24905 Node: MIPS Opts
\7f474117
24906 Node: MIPS Object
\7f485185
24907 Node: MIPS Stabs
\7f486751
24908 Node: MIPS symbol sizes
\7f487473
24909 Node: MIPS ISA
\7f489142
24910 Node: MIPS autoextend
\7f490879
24911 Node: MIPS insn
\7f491609
24912 Node: MIPS option stack
\7f492894
24913 Node: MIPS ASE instruction generation overrides
\7f493668
24914 Node: MIPS floating-point
\7f495706
24915 Node: MIPS Syntax
\7f496612
24916 Node: MIPS-Chars
\7f496874
24917 Node: MMIX-Dependent
\7f497416
24918 Node: MMIX-Opts
\7f497796
24919 Node: MMIX-Expand
\7f501400
24920 Node: MMIX-Syntax
\7f502715
24921 Ref: mmixsite
\7f503072
24922 Node: MMIX-Chars
\7f503913
24923 Node: MMIX-Symbols
\7f504787
24924 Node: MMIX-Regs
\7f506855
24925 Node: MMIX-Pseudos
\7f507880
24926 Ref: MMIX-loc
\7f508021
24927 Ref: MMIX-local
\7f509101
24928 Ref: MMIX-is
\7f509633
24929 Ref: MMIX-greg
\7f509904
24930 Ref: GREG-base
\7f510823
24931 Ref: MMIX-byte
\7f512140
24932 Ref: MMIX-constants
\7f512611
24933 Ref: MMIX-prefix
\7f513257
24934 Ref: MMIX-spec
\7f513631
24935 Node: MMIX-mmixal
\7f513965
24936 Node: MSP430-Dependent
\7f517463
24937 Node: MSP430 Options
\7f517932
24938 Node: MSP430 Syntax
\7f518218
24939 Node: MSP430-Macros
\7f518534
24940 Node: MSP430-Chars
\7f519265
24941 Node: MSP430-Regs
\7f519980
24942 Node: MSP430-Ext
\7f520540
24943 Node: MSP430 Floating Point
\7f522361
24944 Node: MSP430 Directives
\7f522585
24945 Node: MSP430 Opcodes
\7f523376
24946 Node: MSP430 Profiling Capability
\7f523771
24947 Node: NS32K-Dependent
\7f526100
24948 Node: NS32K Syntax
\7f526323
24949 Node: NS32K-Chars
\7f526472
24950 Node: PDP-11-Dependent
\7f527212
24951 Node: PDP-11-Options
\7f527601
24952 Node: PDP-11-Pseudos
\7f532672
24953 Node: PDP-11-Syntax
\7f533017
24954 Node: PDP-11-Mnemonics
\7f533849
24955 Node: PDP-11-Synthetic
\7f534151
24956 Node: PJ-Dependent
\7f534369
24957 Node: PJ Options
\7f534632
24958 Node: PJ Syntax
\7f534927
24959 Node: PJ-Chars
\7f535092
24960 Node: PPC-Dependent
\7f535641
24961 Node: PowerPC-Opts
\7f535974
24962 Node: PowerPC-Pseudo
\7f539231
24963 Node: PowerPC-Syntax
\7f539853
24964 Node: PowerPC-Chars
\7f540043
24965 Node: RL78-Dependent
\7f540794
24966 Node: RL78-Opts
\7f541192
24967 Node: RL78-Modifiers
\7f541375
24968 Node: RL78-Directives
\7f542151
24969 Node: RL78-Syntax
\7f542649
24970 Node: RL78-Chars
\7f542845
24971 Node: RX-Dependent
\7f543401
24972 Node: RX-Opts
\7f543832
24973 Node: RX-Modifiers
\7f546437
24974 Node: RX-Directives
\7f547541
24975 Node: RX-Float
\7f548281
24976 Node: RX-Syntax
\7f548922
24977 Node: RX-Chars
\7f549101
24978 Node: S/390-Dependent
\7f549653
24979 Node: s390 Options
\7f550361
24980 Node: s390 Characters
\7f551907
24981 Node: s390 Syntax
\7f552428
24982 Node: s390 Register
\7f553329
24983 Node: s390 Mnemonics
\7f554142
24984 Node: s390 Operands
\7f557162
24985 Node: s390 Formats
\7f559781
24986 Node: s390 Aliases
\7f567652
24987 Node: s390 Operand Modifier
\7f571549
24988 Node: s390 Instruction Marker
\7f575350
24989 Node: s390 Literal Pool Entries
\7f576366
24990 Node: s390 Directives
\7f578289
24991 Node: s390 Floating Point
\7f582717
24992 Node: SCORE-Dependent
\7f583163
24993 Node: SCORE-Opts
\7f583468
24994 Node: SCORE-Pseudo
\7f584756
24995 Node: SCORE-Syntax
\7f586833
24996 Node: SCORE-Chars
\7f587015
24997 Node: SH-Dependent
\7f587573
24998 Node: SH Options
\7f587984
24999 Node: SH Syntax
\7f589039
25000 Node: SH-Chars
\7f589312
25001 Node: SH-Regs
\7f589855
25002 Node: SH-Addressing
\7f590469
25003 Node: SH Floating Point
\7f591378
25004 Node: SH Directives
\7f592472
25005 Node: SH Opcodes
\7f592873
25006 Node: SH64-Dependent
\7f597195
25007 Node: SH64 Options
\7f597558
25008 Node: SH64 Syntax
\7f599355
25009 Node: SH64-Chars
\7f599638
25010 Node: SH64-Regs
\7f600187
25011 Node: SH64-Addressing
\7f601283
25012 Node: SH64 Directives
\7f602466
25013 Node: SH64 Opcodes
\7f603451
25014 Node: Sparc-Dependent
\7f604167
25015 Node: Sparc-Opts
\7f604579
25016 Node: Sparc-Aligned-Data
\7f609237
25017 Node: Sparc-Syntax
\7f610069
25018 Node: Sparc-Chars
\7f610643
25019 Node: Sparc-Regs
\7f611206
25020 Node: Sparc-Constants
\7f616317
25021 Node: Sparc-Relocs
\7f621077
25022 Node: Sparc-Size-Translations
\7f626213
25023 Node: Sparc-Float
\7f627862
25024 Node: Sparc-Directives
\7f628057
25025 Node: TIC54X-Dependent
\7f630017
25026 Node: TIC54X-Opts
\7f630780
25027 Node: TIC54X-Block
\7f631823
25028 Node: TIC54X-Env
\7f632183
25029 Node: TIC54X-Constants
\7f632531
25030 Node: TIC54X-Subsyms
\7f632933
25031 Node: TIC54X-Locals
\7f634842
25032 Node: TIC54X-Builtins
\7f635586
25033 Node: TIC54X-Ext
\7f638057
25034 Node: TIC54X-Directives
\7f638628
25035 Node: TIC54X-Macros
\7f649529
25036 Node: TIC54X-MMRegs
\7f651640
25037 Node: TIC54X-Syntax
\7f651878
25038 Node: TIC54X-Chars
\7f652068
25039 Node: TIC6X-Dependent
\7f652759
25040 Node: TIC6X Options
\7f653062
25041 Node: TIC6X Syntax
\7f655063
25042 Node: TIC6X Directives
\7f656165
25043 Node: TILE-Gx-Dependent
\7f658450
25044 Node: TILE-Gx Options
\7f658760
25045 Node: TILE-Gx Syntax
\7f659110
25046 Node: TILE-Gx Opcodes
\7f661344
25047 Node: TILE-Gx Registers
\7f661632
25048 Node: TILE-Gx Modifiers
\7f662404
25049 Node: TILE-Gx Directives
\7f666870
25050 Node: TILEPro-Dependent
\7f667774
25051 Node: TILEPro Options
\7f668083
25052 Node: TILEPro Syntax
\7f668267
25053 Node: TILEPro Opcodes
\7f670501
25054 Node: TILEPro Registers
\7f670792
25055 Node: TILEPro Modifiers
\7f671562
25056 Node: TILEPro Directives
\7f676327
25057 Node: Z80-Dependent
\7f677231
25058 Node: Z80 Options
\7f677619
25059 Node: Z80 Syntax
\7f679042
25060 Node: Z80-Chars
\7f679714
25061 Node: Z80-Regs
\7f680564
25062 Node: Z80-Case
\7f680916
25063 Node: Z80 Floating Point
\7f681361
25064 Node: Z80 Directives
\7f681555
25065 Node: Z80 Opcodes
\7f683180
25066 Node: Z8000-Dependent
\7f684524
25067 Node: Z8000 Options
\7f685485
25068 Node: Z8000 Syntax
\7f685702
25069 Node: Z8000-Chars
\7f685992
25070 Node: Z8000-Regs
\7f686474
25071 Node: Z8000-Addressing
\7f687264
25072 Node: Z8000 Directives
\7f688381
25073 Node: Z8000 Opcodes
\7f689990
25074 Node: Vax-Dependent
\7f699932
25075 Node: VAX-Opts
\7f700492
25076 Node: VAX-float
\7f704227
25077 Node: VAX-directives
\7f704859
25078 Node: VAX-opcodes
\7f705720
25079 Node: VAX-branch
\7f706109
25080 Node: VAX-operands
\7f708616
25081 Node: VAX-no
\7f709379
25082 Node: VAX-Syntax
\7f709635
25083 Node: VAX-Chars
\7f709801
25084 Node: V850-Dependent
\7f710355
25085 Node: V850 Options
\7f710753
25086 Node: V850 Syntax
\7f713604
25087 Node: V850-Chars
\7f713844
25088 Node: V850-Regs
\7f714388
25089 Node: V850 Floating Point
\7f715956
25090 Node: V850 Directives
\7f716162
25091 Node: V850 Opcodes
\7f717765
25092 Node: XGATE-Dependent
\7f723657
25093 Node: XGATE-Opts
\7f724077
25094 Node: XGATE-Syntax
\7f725068
25095 Node: XGATE-Directives
\7f727147
25096 Node: XGATE-Float
\7f727386
25097 Node: XGATE-opcodes
\7f727883
25098 Node: XSTORMY16-Dependent
\7f727995
25099 Node: XStormy16 Syntax
\7f728341
25100 Node: XStormy16-Chars
\7f728531
25101 Node: XStormy16 Directives
\7f729144
25102 Node: XStormy16 Opcodes
\7f729799
25103 Node: Xtensa-Dependent
\7f730855
25104 Node: Xtensa Options
\7f731589
25105 Node: Xtensa Syntax
\7f734326
25106 Node: Xtensa Opcodes
\7f736470
25107 Node: Xtensa Registers
\7f738264
25108 Node: Xtensa Optimizations
\7f738897
25109 Node: Density Instructions
\7f739349
25110 Node: Xtensa Automatic Alignment
\7f740451
25111 Node: Xtensa Relaxation
\7f742898
25112 Node: Xtensa Branch Relaxation
\7f743806
25113 Node: Xtensa Call Relaxation
\7f745178
25114 Node: Xtensa Immediate Relaxation
\7f746964
25115 Node: Xtensa Directives
\7f749538
25116 Node: Schedule Directive
\7f751247
25117 Node: Longcalls Directive
\7f751587
25118 Node: Transform Directive
\7f752131
25119 Node: Literal Directive
\7f752873
25120 Ref: Literal Directive-Footnote-1
\7f756412
25121 Node: Literal Position Directive
\7f756554
25122 Node: Literal Prefix Directive
\7f758253
25123 Node: Absolute Literals Directive
\7f759151
25124 Node: Reporting Bugs
\7f760458
25125 Node: Bug Criteria
\7f761184
25126 Node: Bug Reporting
\7f761951
25127 Node: Acknowledgements
\7f768600
25128 Ref: Acknowledgements-Footnote-1
\7f773566
25129 Node: GNU Free Documentation License
\7f773592
25130 Node: AS Index
\7f798761
projects / fpga / lx-cpu1 / binutils-tumbl.git / blob