2 config BR2_ARM_CPU_HAS_NEON
5 # for some cores, NEON support is optional
6 config BR2_ARM_CPU_MAYBE_HAS_NEON
9 # for some cores, VFPv2 is optional
10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
13 config BR2_ARM_CPU_HAS_VFPV2
16 # for some cores, VFPv3 is optional
17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
19 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
21 config BR2_ARM_CPU_HAS_VFPV3
23 select BR2_ARM_CPU_HAS_VFPV2
25 # for some cores, VFPv4 is optional
26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
28 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
30 config BR2_ARM_CPU_HAS_VFPV4
32 select BR2_ARM_CPU_HAS_VFPV3
34 config BR2_ARM_CPU_HAS_THUMB
37 config BR2_ARM_CPU_HAS_THUMB2
40 config BR2_ARM_CPU_ARMV4
43 config BR2_ARM_CPU_ARMV5
46 config BR2_ARM_CPU_ARMV6
49 config BR2_ARM_CPU_ARMV7A
53 prompt "Target Architecture Variant"
54 depends on BR2_arm || BR2_armeb
57 Specific CPU variant to use
61 select BR2_ARM_CPU_HAS_THUMB
62 select BR2_ARM_CPU_ARMV4
65 select BR2_ARM_CPU_HAS_THUMB
66 select BR2_ARM_CPU_ARMV4
69 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
70 select BR2_ARM_CPU_HAS_THUMB
71 select BR2_ARM_CPU_ARMV5
72 config BR2_arm1136jf_s
74 select BR2_ARM_CPU_HAS_VFPV2
75 select BR2_ARM_CPU_HAS_THUMB
76 select BR2_ARM_CPU_ARMV6
77 config BR2_arm1176jz_s
79 select BR2_ARM_CPU_HAS_THUMB
80 select BR2_ARM_CPU_ARMV6
81 config BR2_arm1176jzf_s
83 select BR2_ARM_CPU_HAS_VFPV2
84 select BR2_ARM_CPU_HAS_THUMB
85 select BR2_ARM_CPU_ARMV6
88 select BR2_ARM_CPU_MAYBE_HAS_NEON
89 select BR2_ARM_CPU_MAYBE_HAS_VFPV4
90 select BR2_ARM_CPU_HAS_THUMB2
91 select BR2_ARM_CPU_ARMV7A
94 select BR2_ARM_CPU_HAS_NEON
95 select BR2_ARM_CPU_HAS_VFPV4
96 select BR2_ARM_CPU_HAS_THUMB2
97 select BR2_ARM_CPU_ARMV7A
100 select BR2_ARM_CPU_HAS_NEON
101 select BR2_ARM_CPU_HAS_VFPV3
102 select BR2_ARM_CPU_HAS_THUMB2
103 select BR2_ARM_CPU_ARMV7A
106 select BR2_ARM_CPU_MAYBE_HAS_NEON
107 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
108 select BR2_ARM_CPU_HAS_THUMB2
109 select BR2_ARM_CPU_ARMV7A
110 config BR2_cortex_a12
112 select BR2_ARM_CPU_HAS_NEON
113 select BR2_ARM_CPU_HAS_VFPV4
114 select BR2_ARM_CPU_HAS_THUMB2
115 select BR2_ARM_CPU_ARMV7A
116 config BR2_cortex_a15
118 select BR2_ARM_CPU_HAS_NEON
119 select BR2_ARM_CPU_HAS_VFPV4
120 select BR2_ARM_CPU_HAS_THUMB2
121 select BR2_ARM_CPU_ARMV7A
124 select BR2_ARM_CPU_ARMV4
127 select BR2_ARM_CPU_HAS_VFPV3
128 select BR2_ARM_CPU_ARMV7A
130 bool "strongarm sa110/sa1100"
131 select BR2_ARM_CPU_ARMV4
134 select BR2_ARM_CPU_HAS_THUMB
135 select BR2_ARM_CPU_ARMV5
138 select BR2_ARM_CPU_ARMV5
143 depends on BR2_arm || BR2_armeb
146 Application Binary Interface to use. The Application Binary
147 Interface describes the calling conventions (how arguments
148 are passed to functions, how the return value is passed, how
149 system calls are made, etc.).
154 The EABI is currently the standard ARM ABI, which is used in
155 most projects. It supports both the 'soft' floating point
156 model (in which floating point instructions are emulated in
157 software) and the 'softfp' floating point model (in which
158 floating point instructions are executed using an hardware
159 floating point unit, but floating point arguments to
160 functions are passed in integer registers).
162 The 'softfp' floating point model is link-compatible with
163 the 'soft' floating point model, i.e you can link a library
164 built 'soft' with some other code built 'softfp'.
166 However, passing the floating point arguments in integer
167 registers is a bit inefficient, so if your ARM processor has
168 a floating point unit, and you don't have pre-compiled
169 'soft' or 'softfp' code, using the EABIhf ABI will provide
170 better floating point performances.
172 If your processor does not have a floating point unit, then
173 you must use this ABI.
175 config BR2_ARM_EABIHF
177 depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
179 The EABIhf is an extension of EABI which supports the 'hard'
180 floating point model. This model uses the floating point
181 unit to execute floating point instructions, and passes
182 floating point arguments in floating point registers.
184 It is more efficient than EABI for floating point related
185 workload. However, it does not allow to link against code
186 that has been pre-built for the 'soft' or 'softfp' floating
189 If your processor has a floating point unit, and you don't
190 depend on existing pre-compiled code, this option is most
191 likely the best choice.
195 config BR2_ARM_ENABLE_NEON
196 bool "Enable NEON SIMD extension support"
197 depends on BR2_ARM_CPU_MAYBE_HAS_NEON
198 select BR2_ARM_CPU_HAS_NEON
200 For some CPU cores, the NEON SIMD extension is optional.
201 Select this option if you are certain your particular
202 implementation has NEON support and you want to use it.
205 prompt "Floating point strategy"
206 depends on BR2_ARM_EABI || BR2_ARM_EABIHF
207 default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
208 default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
209 default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
210 default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
212 config BR2_ARM_SOFT_FLOAT
214 depends on BR2_ARM_EABI
215 select BR2_SOFT_FLOAT
217 This option allows to use software emulated floating
218 point. It should be used for ARM cores that do not include a
219 Vector Floating Point unit, such as ARMv5 cores (ARM926 for
220 example) or certain ARMv6 cores.
222 config BR2_ARM_FPU_VFPV2
224 depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
226 This option allows to use the VFPv2 floating point unit, as
227 available in some ARMv5 processors (ARM926EJ-S) and some
228 ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
231 Note that this option is also safe to use for newer cores
232 such as Cortex-A, because the VFPv3 and VFPv4 units are
233 backward compatible with VFPv2.
235 config BR2_ARM_FPU_VFPV3
237 depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
239 This option allows to use the VFPv3 floating point unit, as
240 available in some ARMv7 processors (Cortex-A{8, 9}). This
241 option requires a VFPv3 unit that has 32 double-precision
242 registers, which is not necessarily the case in all SOCs
243 based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
244 instead, which is guaranteed to work on all Cortex-A{8, 9}.
246 Note that this option is also safe to use for newer cores
247 that have a VFPv4 unit, because VFPv4 is backward compatible
248 with VFPv3. They must of course also have 32
249 double-precision registers.
251 config BR2_ARM_FPU_VFPV3D16
253 depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
255 This option allows to use the VFPv3 floating point unit, as
256 available in some ARMv7 processors (Cortex-A{8, 9}). This
257 option requires a VFPv3 unit that has 16 double-precision
258 registers, which is generally the case in all SOCs based on
259 Cortex-A{8, 9}, even though VFPv3 is technically optional on
260 Cortex-A9. This is the safest option for those cores.
262 Note that this option is also safe to use for newer cores
263 such that have a VFPv4 unit, because the VFPv4 is backward
264 compatible with VFPv3.
266 config BR2_ARM_FPU_VFPV4
268 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
270 This option allows to use the VFPv4 floating point unit, as
271 available in some ARMv7 processors (Cortex-A{5, 7, 12,
272 15}). This option requires a VFPv4 unit that has 32
273 double-precision registers, which is not necessarily the
274 case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
275 unsure, you should probably use VFPv4-D16 instead.
277 Note that if you want binary code that works on all ARMv7
278 cores, including the earlier Cortex-A{8, 9}, you should
279 instead select VFPv3.
281 config BR2_ARM_FPU_VFPV4D16
283 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
285 This option allows to use the VFPv4 floating point unit, as
286 available in some ARMv7 processors (Cortex-A{5, 7, 12,
287 15}). This option requires a VFPv4 unit that has 16
288 double-precision registers, which is always available on
289 Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
292 Note that if you want binary code that works on all ARMv7
293 cores, including the earlier Cortex-A{8, 9}, you should
294 instead select VFPv3-D16.
296 config BR2_ARM_FPU_NEON
298 depends on BR2_ARM_CPU_HAS_NEON
300 This option allows to use the NEON SIMD unit, as available
301 in some ARMv7 processors, as a floating-point unit. It
302 should however be noted that using NEON for floating point
303 operations doesn't provide a complete compatibility with the
306 config BR2_ARM_FPU_NEON_VFPV4
308 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
309 depends on BR2_ARM_CPU_HAS_NEON
311 This option allows to use both the VFPv4 and the NEON SIMD
312 units for floating point operations. Note that some ARMv7
313 cores do not necessarily have VFPv4 and/or NEON support, for
314 example on Cortex-A5 and Cortex-A7, support for VFPv4 and
320 prompt "ARM instruction set"
321 depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
323 config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
326 This option instructs the compiler to generate regular ARM
327 instructions, that are all 32 bits wide.
329 config BR2_ARM_INSTRUCTIONS_THUMB
331 depends on BR2_ARM_CPU_HAS_THUMB
333 This option instructions the compiler to generate Thumb
334 instructions, which allows to mix 16 bits instructions and
335 32 bits instructions. This generally provides a much smaller
336 compiled binary size.
338 config BR2_ARM_INSTRUCTIONS_THUMB2
340 depends on BR2_ARM_CPU_HAS_THUMB2
342 This option instructions the compiler to generate Thumb2
343 instructions, which allows to mix 16 bits instructions and
344 32 bits instructions. This generally provides a much smaller
345 compiled binary size.
349 config BR2_ARM_INSTRUCTIONS_ARM
351 depends on !(BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2)
354 default "arm" if BR2_arm
355 default "armeb" if BR2_armeb
358 default "LITTLE" if BR2_arm
359 default "BIG" if BR2_armeb
361 config BR2_ARCH_HAS_ATOMICS
364 config BR2_GCC_TARGET_CPU
365 default "arm920t" if BR2_arm920t
366 default "arm922t" if BR2_arm922t
367 default "arm926ej-s" if BR2_arm926t
368 default "arm1136j-s" if BR2_arm1136j_s
369 default "arm1136jf-s" if BR2_arm1136jf_s
370 default "arm1176jz-s" if BR2_arm1176jz_s
371 default "arm1176jzf-s" if BR2_arm1176jzf_s
372 default "cortex-a5" if BR2_cortex_a5
373 default "cortex-a7" if BR2_cortex_a7
374 default "cortex-a8" if BR2_cortex_a8
375 default "cortex-a9" if BR2_cortex_a9
376 default "cortex-a12" if BR2_cortex_a12
377 default "cortex-a15" if BR2_cortex_a15
378 default "fa526" if BR2_fa526
379 default "marvell-pj4" if BR2_pj4
380 default "strongarm" if BR2_strongarm
381 default "xscale" if BR2_xscale
382 default "iwmmxt" if BR2_iwmmxt
384 config BR2_GCC_TARGET_ABI
385 default "aapcs-linux"
387 config BR2_GCC_TARGET_FPU
388 default "vfp" if BR2_ARM_FPU_VFPV2
389 default "vfpv3" if BR2_ARM_FPU_VFPV3
390 default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
391 default "vfpv4" if BR2_ARM_FPU_VFPV4
392 default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
393 default "neon" if BR2_ARM_FPU_NEON
394 default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
396 config BR2_GCC_TARGET_FLOAT_ABI
397 default "soft" if BR2_ARM_SOFT_FLOAT
398 default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
399 default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
401 config BR2_GCC_TARGET_MODE
402 default "arm" if BR2_ARM_INSTRUCTIONS_ARM
403 default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2