arch/Config.in.arm

   1 # arm cpu features
   2 config BR2_ARM_CPU_HAS_NEON
   3         bool
   4
   5 # for some cores, NEON support is optional
   6 config BR2_ARM_CPU_MAYBE_HAS_NEON
   7         bool
   8
   9 # for some cores, VFPv2 is optional
  10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  11         bool
  12
  13 config BR2_ARM_CPU_HAS_VFPV2
  14         bool
  15
  16 # for some cores, VFPv3 is optional
  17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  18         bool
  19         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  20
  21 config BR2_ARM_CPU_HAS_VFPV3
  22         bool
  23         select BR2_ARM_CPU_HAS_VFPV2
  24
  25 # for some cores, VFPv4 is optional
  26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  27         bool
  28         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  29
  30 config BR2_ARM_CPU_HAS_VFPV4
  31         bool
  32         select BR2_ARM_CPU_HAS_VFPV3
  33
  34 config BR2_ARM_CPU_HAS_FP_ARMV8
  35         bool
  36         select BR2_ARM_CPU_HAS_VFPV4
  37
  38 config BR2_ARM_CPU_HAS_ARM
  39         bool
  40
  41 config BR2_ARM_CPU_HAS_THUMB
  42         bool
  43
  44 config BR2_ARM_CPU_HAS_THUMB2
  45         bool
  46
  47 config BR2_ARM_CPU_ARMV4
  48         bool
  49
  50 config BR2_ARM_CPU_ARMV5
  51         bool
  52
  53 config BR2_ARM_CPU_ARMV6
  54         bool
  55
  56 config BR2_ARM_CPU_ARMV7A
  57         bool
  58
  59 config BR2_ARM_CPU_ARMV7M
  60         bool
  61
  62 config BR2_ARM_CPU_ARMV8A
  63         bool
  64
  65 choice
  66         prompt "Target Architecture Variant"
  67         default BR2_cortex_a53 if BR2_ARCH_IS_64
  68         default BR2_arm926t
  69         help
  70           Specific CPU variant to use
  71
  72 if !BR2_ARCH_IS_64
  73 comment "armv4 cores"
  74 config BR2_arm920t
  75         bool "arm920t"
  76         select BR2_ARM_CPU_HAS_ARM
  77         select BR2_ARM_CPU_HAS_THUMB
  78         select BR2_ARM_CPU_ARMV4
  79         select BR2_ARCH_HAS_MMU_OPTIONAL
  80 config BR2_arm922t
  81         bool "arm922t"
  82         select BR2_ARM_CPU_HAS_ARM
  83         select BR2_ARM_CPU_HAS_THUMB
  84         select BR2_ARM_CPU_ARMV4
  85         select BR2_ARCH_HAS_MMU_OPTIONAL
  86 config BR2_fa526
  87         bool "fa526/626"
  88         select BR2_ARM_CPU_HAS_ARM
  89         select BR2_ARM_CPU_ARMV4
  90         select BR2_ARCH_HAS_MMU_OPTIONAL
  91 config BR2_strongarm
  92         bool "strongarm sa110/sa1100"
  93         select BR2_ARM_CPU_HAS_ARM
  94         select BR2_ARM_CPU_ARMV4
  95         select BR2_ARCH_HAS_MMU_OPTIONAL
  96
  97 comment "armv5 cores"
  98 config BR2_arm926t
  99         bool "arm926t"
 100         select BR2_ARM_CPU_HAS_ARM
 101         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 102         select BR2_ARM_CPU_HAS_THUMB
 103         select BR2_ARM_CPU_ARMV5
 104         select BR2_ARCH_HAS_MMU_OPTIONAL
 105 config BR2_iwmmxt
 106         bool "iwmmxt"
 107         select BR2_ARM_CPU_HAS_ARM
 108         select BR2_ARM_CPU_ARMV5
 109         select BR2_ARCH_HAS_MMU_OPTIONAL
 110 config BR2_xscale
 111         bool "xscale"
 112         select BR2_ARM_CPU_HAS_ARM
 113         select BR2_ARM_CPU_HAS_THUMB
 114         select BR2_ARM_CPU_ARMV5
 115         select BR2_ARCH_HAS_MMU_OPTIONAL
 116
 117 comment "armv6 cores"
 118 config BR2_arm1136j_s
 119         bool "arm1136j-s"
 120         select BR2_ARM_CPU_HAS_ARM
 121         select BR2_ARM_CPU_HAS_THUMB
 122         select BR2_ARM_CPU_ARMV6
 123         select BR2_ARCH_HAS_MMU_OPTIONAL
 124 config BR2_arm1136jf_s
 125         bool "arm1136jf-s"
 126         select BR2_ARM_CPU_HAS_ARM
 127         select BR2_ARM_CPU_HAS_VFPV2
 128         select BR2_ARM_CPU_HAS_THUMB
 129         select BR2_ARM_CPU_ARMV6
 130         select BR2_ARCH_HAS_MMU_OPTIONAL
 131 config BR2_arm1176jz_s
 132         bool "arm1176jz-s"
 133         select BR2_ARM_CPU_HAS_ARM
 134         select BR2_ARM_CPU_HAS_THUMB
 135         select BR2_ARM_CPU_ARMV6
 136         select BR2_ARCH_HAS_MMU_OPTIONAL
 137 config BR2_arm1176jzf_s
 138         bool "arm1176jzf-s"
 139         select BR2_ARM_CPU_HAS_ARM
 140         select BR2_ARM_CPU_HAS_VFPV2
 141         select BR2_ARM_CPU_HAS_THUMB
 142         select BR2_ARM_CPU_ARMV6
 143         select BR2_ARCH_HAS_MMU_OPTIONAL
 144 config BR2_arm11mpcore
 145         bool "mpcore"
 146         select BR2_ARM_CPU_HAS_ARM
 147         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 148         select BR2_ARM_CPU_HAS_THUMB
 149         select BR2_ARM_CPU_ARMV6
 150         select BR2_ARCH_HAS_MMU_OPTIONAL
 151
 152 comment "armv7a cores"
 153 config BR2_cortex_a5
 154         bool "cortex-A5"
 155         select BR2_ARM_CPU_HAS_ARM
 156         select BR2_ARM_CPU_MAYBE_HAS_NEON
 157         select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 158         select BR2_ARM_CPU_HAS_THUMB2
 159         select BR2_ARM_CPU_ARMV7A
 160         select BR2_ARCH_HAS_MMU_OPTIONAL
 161 config BR2_cortex_a7
 162         bool "cortex-A7"
 163         select BR2_ARM_CPU_HAS_ARM
 164         select BR2_ARM_CPU_HAS_NEON
 165         select BR2_ARM_CPU_HAS_VFPV4
 166         select BR2_ARM_CPU_HAS_THUMB2
 167         select BR2_ARM_CPU_ARMV7A
 168         select BR2_ARCH_HAS_MMU_OPTIONAL
 169 config BR2_cortex_a8
 170         bool "cortex-A8"
 171         select BR2_ARM_CPU_HAS_ARM
 172         select BR2_ARM_CPU_HAS_NEON
 173         select BR2_ARM_CPU_HAS_VFPV3
 174         select BR2_ARM_CPU_HAS_THUMB2
 175         select BR2_ARM_CPU_ARMV7A
 176         select BR2_ARCH_HAS_MMU_OPTIONAL
 177 config BR2_cortex_a9
 178         bool "cortex-A9"
 179         select BR2_ARM_CPU_HAS_ARM
 180         select BR2_ARM_CPU_MAYBE_HAS_NEON
 181         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 182         select BR2_ARM_CPU_HAS_THUMB2
 183         select BR2_ARM_CPU_ARMV7A
 184         select BR2_ARCH_HAS_MMU_OPTIONAL
 185 config BR2_cortex_a12
 186         bool "cortex-A12"
 187         select BR2_ARM_CPU_HAS_ARM
 188         select BR2_ARM_CPU_HAS_NEON
 189         select BR2_ARM_CPU_HAS_VFPV4
 190         select BR2_ARM_CPU_HAS_THUMB2
 191         select BR2_ARM_CPU_ARMV7A
 192         select BR2_ARCH_HAS_MMU_OPTIONAL
 193 config BR2_cortex_a15
 194         bool "cortex-A15"
 195         select BR2_ARM_CPU_HAS_ARM
 196         select BR2_ARM_CPU_HAS_NEON
 197         select BR2_ARM_CPU_HAS_VFPV4
 198         select BR2_ARM_CPU_HAS_THUMB2
 199         select BR2_ARM_CPU_ARMV7A
 200         select BR2_ARCH_HAS_MMU_OPTIONAL
 201 config BR2_cortex_a15_a7
 202         bool "cortex-A15/A7 big.LITTLE"
 203         select BR2_ARM_CPU_HAS_ARM
 204         select BR2_ARM_CPU_HAS_NEON
 205         select BR2_ARM_CPU_HAS_VFPV4
 206         select BR2_ARM_CPU_HAS_THUMB2
 207         select BR2_ARM_CPU_ARMV7A
 208         select BR2_ARCH_HAS_MMU_OPTIONAL
 209         select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 210 config BR2_cortex_a17
 211         bool "cortex-A17"
 212         select BR2_ARM_CPU_HAS_ARM
 213         select BR2_ARM_CPU_HAS_NEON
 214         select BR2_ARM_CPU_HAS_VFPV4
 215         select BR2_ARM_CPU_HAS_THUMB2
 216         select BR2_ARM_CPU_ARMV7A
 217         select BR2_ARCH_HAS_MMU_OPTIONAL
 218         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 219 config BR2_cortex_a17_a7
 220         bool "cortex-A17/A7 big.LITTLE"
 221         select BR2_ARM_CPU_HAS_ARM
 222         select BR2_ARM_CPU_HAS_NEON
 223         select BR2_ARM_CPU_HAS_VFPV4
 224         select BR2_ARM_CPU_HAS_THUMB2
 225         select BR2_ARM_CPU_ARMV7A
 226         select BR2_ARCH_HAS_MMU_OPTIONAL
 227         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 228 config BR2_pj4
 229         bool "pj4"
 230         select BR2_ARM_CPU_HAS_ARM
 231         select BR2_ARM_CPU_HAS_VFPV3
 232         select BR2_ARM_CPU_ARMV7A
 233         select BR2_ARCH_HAS_MMU_OPTIONAL
 234
 235 comment "armv7m cores"
 236 config BR2_cortex_m3
 237         bool "cortex-M3"
 238         select BR2_ARM_CPU_HAS_THUMB2
 239         select BR2_ARM_CPU_ARMV7M
 240 config BR2_cortex_m4
 241         bool "cortex-M4"
 242         select BR2_ARM_CPU_HAS_THUMB2
 243         select BR2_ARM_CPU_ARMV7M
 244 endif # !BR2_ARCH_IS_64
 245
 246 comment "armv8 cores"
 247 config BR2_cortex_a32
 248         bool "cortex-A32"
 249         depends on !BR2_ARCH_IS_64
 250         select BR2_ARM_CPU_HAS_ARM
 251         select BR2_ARM_CPU_HAS_NEON
 252         select BR2_ARM_CPU_HAS_THUMB2
 253         select BR2_ARM_CPU_HAS_FP_ARMV8
 254         select BR2_ARM_CPU_ARMV8A
 255         select BR2_ARCH_HAS_MMU_OPTIONAL
 256         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 257 config BR2_cortex_a35
 258         bool "cortex-A35"
 259         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 260         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 261         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 262         select BR2_ARM_CPU_HAS_FP_ARMV8
 263         select BR2_ARM_CPU_ARMV8A
 264         select BR2_ARCH_HAS_MMU_OPTIONAL
 265         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 266 config BR2_cortex_a53
 267         bool "cortex-A53"
 268         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 269         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 270         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 271         select BR2_ARM_CPU_HAS_FP_ARMV8
 272         select BR2_ARM_CPU_ARMV8A
 273         select BR2_ARCH_HAS_MMU_OPTIONAL
 274 config BR2_cortex_a57
 275         bool "cortex-A57"
 276         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 277         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 278         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 279         select BR2_ARM_CPU_HAS_FP_ARMV8
 280         select BR2_ARM_CPU_ARMV8A
 281         select BR2_ARCH_HAS_MMU_OPTIONAL
 282 config BR2_cortex_a57_a53
 283         bool "cortex-A57/A53 big.LITTLE"
 284         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 285         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 286         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 287         select BR2_ARM_CPU_HAS_FP_ARMV8
 288         select BR2_ARM_CPU_ARMV8A
 289         select BR2_ARCH_HAS_MMU_OPTIONAL
 290         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 291 config BR2_cortex_a72
 292         bool "cortex-A72"
 293         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 294         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 295         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 296         select BR2_ARM_CPU_HAS_FP_ARMV8
 297         select BR2_ARM_CPU_ARMV8A
 298         select BR2_ARCH_HAS_MMU_OPTIONAL
 299         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 300 config BR2_cortex_a72_a53
 301         bool "cortex-A72/A53 big.LITTLE"
 302         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 303         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 304         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 305         select BR2_ARM_CPU_HAS_FP_ARMV8
 306         select BR2_ARM_CPU_ARMV8A
 307         select BR2_ARCH_HAS_MMU_OPTIONAL
 308         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 309 config BR2_cortex_a73
 310         bool "cortex-A73"
 311         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 312         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 313         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 314         select BR2_ARM_CPU_HAS_FP_ARMV8
 315         select BR2_ARM_CPU_ARMV8A
 316         select BR2_ARCH_HAS_MMU_OPTIONAL
 317         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 318 config BR2_cortex_a73_a35
 319         bool "cortex-A73/A35 big.LITTLE"
 320         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 321         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 322         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 323         select BR2_ARM_CPU_HAS_FP_ARMV8
 324         select BR2_ARM_CPU_ARMV8A
 325         select BR2_ARCH_HAS_MMU_OPTIONAL
 326         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 327 config BR2_cortex_a73_a53
 328         bool "cortex-A73/A53 big.LITTLE"
 329         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 330         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 331         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 332         select BR2_ARM_CPU_HAS_FP_ARMV8
 333         select BR2_ARM_CPU_ARMV8A
 334         select BR2_ARCH_HAS_MMU_OPTIONAL
 335         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 336 config BR2_exynos_m1
 337         bool "exynos-m1"
 338         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 339         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 340         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 341         select BR2_ARM_CPU_HAS_FP_ARMV8
 342         select BR2_ARM_CPU_ARMV8A
 343         select BR2_ARCH_HAS_MMU_OPTIONAL
 344         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 345 config BR2_falkor
 346         bool "falkor"
 347         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 348         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 349         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 350         select BR2_ARM_CPU_HAS_FP_ARMV8
 351         select BR2_ARM_CPU_ARMV8A
 352         select BR2_ARCH_HAS_MMU_OPTIONAL
 353         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 354 config BR2_qdf24xx
 355         bool "qdf24xx"
 356         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 357         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 358         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 359         select BR2_ARM_CPU_HAS_FP_ARMV8
 360         select BR2_ARM_CPU_ARMV8A
 361         select BR2_ARCH_HAS_MMU_OPTIONAL
 362         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 363 if BR2_ARCH_IS_64
 364 config BR2_thunderx
 365         bool "thunderx"
 366         select BR2_ARM_CPU_HAS_FP_ARMV8
 367         select BR2_ARM_CPU_ARMV8A
 368         select BR2_ARCH_HAS_MMU_OPTIONAL
 369         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 370 config BR2_thunderxt81
 371         bool "thunderxt81"
 372         select BR2_ARM_CPU_HAS_FP_ARMV8
 373         select BR2_ARM_CPU_ARMV8A
 374         select BR2_ARCH_HAS_MMU_OPTIONAL
 375         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 376 config BR2_thunderxt83
 377         bool "thunderxt83"
 378         select BR2_ARM_CPU_HAS_FP_ARMV8
 379         select BR2_ARM_CPU_ARMV8A
 380         select BR2_ARCH_HAS_MMU_OPTIONAL
 381         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 382 config BR2_thunderxt88
 383         bool "thunderxt88"
 384         select BR2_ARM_CPU_HAS_FP_ARMV8
 385         select BR2_ARM_CPU_ARMV8A
 386         select BR2_ARCH_HAS_MMU_OPTIONAL
 387         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 388 config BR2_thunderxt88p1
 389         bool "thunderxt88p1"
 390         select BR2_ARM_CPU_HAS_FP_ARMV8
 391         select BR2_ARM_CPU_ARMV8A
 392         select BR2_ARCH_HAS_MMU_OPTIONAL
 393         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 394 endif # BR2_ARCH_IS_64
 395 config BR2_xgene1
 396         bool "xgene1"
 397         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 398         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 399         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 400         select BR2_ARM_CPU_HAS_FP_ARMV8
 401         select BR2_ARM_CPU_ARMV8A
 402         select BR2_ARCH_HAS_MMU_OPTIONAL
 403         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 404
 405 if BR2_ARCH_IS_64
 406 comment "armv8.1a cores"
 407 config BR2_thunderx2t99
 408         bool "thunderx2t99"
 409         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 410         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 411         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 412         select BR2_ARM_CPU_HAS_FP_ARMV8
 413         select BR2_ARM_CPU_ARMV8A
 414         select BR2_ARCH_HAS_MMU_OPTIONAL
 415         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 416 config BR2_thunderx2t99p1
 417         bool "thunderx2t99p1"
 418         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 419         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 420         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 421         select BR2_ARM_CPU_HAS_FP_ARMV8
 422         select BR2_ARM_CPU_ARMV8A
 423         select BR2_ARCH_HAS_MMU_OPTIONAL
 424         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 425 config BR2_vulcan
 426         bool "vulcan"
 427         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 428         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 429         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 430         select BR2_ARM_CPU_HAS_FP_ARMV8
 431         select BR2_ARM_CPU_ARMV8A
 432         select BR2_ARCH_HAS_MMU_OPTIONAL
 433         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 434 endif # BR2_ARCH_IS_64
 435 endchoice
 436
 437 config BR2_ARM_ENABLE_NEON
 438         bool "Enable NEON SIMD extension support"
 439         depends on BR2_ARM_CPU_MAYBE_HAS_NEON
 440         select BR2_ARM_CPU_HAS_NEON
 441         help
 442           For some CPU cores, the NEON SIMD extension is optional.
 443           Select this option if you are certain your particular
 444           implementation has NEON support and you want to use it.
 445
 446 config BR2_ARM_ENABLE_VFP
 447         bool "Enable VFP extension support"
 448         depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
 449         select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
 450         select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
 451         select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
 452         help
 453           For some CPU cores, the VFP extension is optional. Select
 454           this option if you are certain your particular
 455           implementation has VFP support and you want to use it.
 456
 457 choice
 458         prompt "Target ABI"
 459         default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 460         default BR2_ARM_EABI
 461         depends on BR2_arm || BR2_armeb
 462         help
 463           Application Binary Interface to use. The Application Binary
 464           Interface describes the calling conventions (how arguments
 465           are passed to functions, how the return value is passed, how
 466           system calls are made, etc.).
 467
 468 config BR2_ARM_EABI
 469         bool "EABI"
 470         help
 471           The EABI is currently the standard ARM ABI, which is used in
 472           most projects. It supports both the 'soft' floating point
 473           model (in which floating point instructions are emulated in
 474           software) and the 'softfp' floating point model (in which
 475           floating point instructions are executed using an hardware
 476           floating point unit, but floating point arguments to
 477           functions are passed in integer registers).
 478
 479           The 'softfp' floating point model is link-compatible with
 480           the 'soft' floating point model, i.e you can link a library
 481           built 'soft' with some other code built 'softfp'.
 482
 483           However, passing the floating point arguments in integer
 484           registers is a bit inefficient, so if your ARM processor has
 485           a floating point unit, and you don't have pre-compiled
 486           'soft' or 'softfp' code, using the EABIhf ABI will provide
 487           better floating point performances.
 488
 489           If your processor does not have a floating point unit, then
 490           you must use this ABI.
 491
 492 config BR2_ARM_EABIHF
 493         bool "EABIhf"
 494         depends on BR2_ARM_CPU_HAS_VFPV2
 495         help
 496           The EABIhf is an extension of EABI which supports the 'hard'
 497           floating point model. This model uses the floating point
 498           unit to execute floating point instructions, and passes
 499           floating point arguments in floating point registers.
 500
 501           It is more efficient than EABI for floating point related
 502           workload. However, it does not allow to link against code
 503           that has been pre-built for the 'soft' or 'softfp' floating
 504           point models.
 505
 506           If your processor has a floating point unit, and you don't
 507           depend on existing pre-compiled code, this option is most
 508           likely the best choice.
 509
 510 endchoice
 511
 512 choice
 513         prompt "Floating point strategy"
 514         default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
 515         default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 516         default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 517         default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
 518         default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
 519
 520 config BR2_ARM_SOFT_FLOAT
 521         bool "Soft float"
 522         depends on BR2_ARM_EABI
 523         select BR2_SOFT_FLOAT
 524         help
 525           This option allows to use software emulated floating
 526           point. It should be used for ARM cores that do not include a
 527           Vector Floating Point unit, such as ARMv5 cores (ARM926 for
 528           example) or certain ARMv6 cores.
 529
 530 config BR2_ARM_FPU_VFPV2
 531         bool "VFPv2"
 532         depends on BR2_ARM_CPU_HAS_VFPV2
 533         help
 534           This option allows to use the VFPv2 floating point unit, as
 535           available in some ARMv5 processors (ARM926EJ-S) and some
 536           ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
 537           MPCore).
 538
 539           Note that this option is also safe to use for newer cores
 540           such as Cortex-A, because the VFPv3 and VFPv4 units are
 541           backward compatible with VFPv2.
 542
 543 config BR2_ARM_FPU_VFPV3
 544         bool "VFPv3"
 545         depends on BR2_ARM_CPU_HAS_VFPV3
 546         help
 547           This option allows to use the VFPv3 floating point unit, as
 548           available in some ARMv7 processors (Cortex-A{8, 9}). This
 549           option requires a VFPv3 unit that has 32 double-precision
 550           registers, which is not necessarily the case in all SOCs
 551           based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
 552           instead, which is guaranteed to work on all Cortex-A{8, 9}.
 553
 554           Note that this option is also safe to use for newer cores
 555           that have a VFPv4 unit, because VFPv4 is backward compatible
 556           with VFPv3. They must of course also have 32
 557           double-precision registers.
 558
 559 config BR2_ARM_FPU_VFPV3D16
 560         bool "VFPv3-D16"
 561         depends on BR2_ARM_CPU_HAS_VFPV3
 562         help
 563           This option allows to use the VFPv3 floating point unit, as
 564           available in some ARMv7 processors (Cortex-A{8, 9}). This
 565           option requires a VFPv3 unit that has 16 double-precision
 566           registers, which is generally the case in all SOCs based on
 567           Cortex-A{8, 9}, even though VFPv3 is technically optional on
 568           Cortex-A9. This is the safest option for those cores.
 569
 570           Note that this option is also safe to use for newer cores
 571           such that have a VFPv4 unit, because the VFPv4 is backward
 572           compatible with VFPv3.
 573
 574 config BR2_ARM_FPU_VFPV4
 575         bool "VFPv4"
 576         depends on BR2_ARM_CPU_HAS_VFPV4
 577         help
 578           This option allows to use the VFPv4 floating point unit, as
 579           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 580           15}). This option requires a VFPv4 unit that has 32
 581           double-precision registers, which is not necessarily the
 582           case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
 583           unsure, you should probably use VFPv4-D16 instead.
 584
 585           Note that if you want binary code that works on all ARMv7
 586           cores, including the earlier Cortex-A{8, 9}, you should
 587           instead select VFPv3.
 588
 589 config BR2_ARM_FPU_VFPV4D16
 590         bool "VFPv4-D16"
 591         depends on BR2_ARM_CPU_HAS_VFPV4
 592         help
 593           This option allows to use the VFPv4 floating point unit, as
 594           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 595           15}). This option requires a VFPv4 unit that has 16
 596           double-precision registers, which is always available on
 597           Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
 598           Cortex-A7.
 599
 600           Note that if you want binary code that works on all ARMv7
 601           cores, including the earlier Cortex-A{8, 9}, you should
 602           instead select VFPv3-D16.
 603
 604 config BR2_ARM_FPU_NEON
 605         bool "NEON"
 606         depends on BR2_ARM_CPU_HAS_NEON
 607         help
 608           This option allows to use the NEON SIMD unit, as available
 609           in some ARMv7 processors, as a floating-point unit. It
 610           should however be noted that using NEON for floating point
 611           operations doesn't provide a complete compatibility with the
 612           IEEE 754.
 613
 614 config BR2_ARM_FPU_NEON_VFPV4
 615         bool "NEON/VFPv4"
 616         depends on BR2_ARM_CPU_HAS_VFPV4
 617         depends on BR2_ARM_CPU_HAS_NEON
 618         help
 619           This option allows to use both the VFPv4 and the NEON SIMD
 620           units for floating point operations. Note that some ARMv7
 621           cores do not necessarily have VFPv4 and/or NEON support, for
 622           example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 623           NEON is optional.
 624
 625 config BR2_ARM_FPU_FP_ARMV8
 626         bool "FP-ARMv8"
 627         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 628         help
 629           This option allows to use the ARMv8 floating point unit.
 630
 631 config BR2_ARM_FPU_NEON_FP_ARMV8
 632         bool "NEON/FP-ARMv8"
 633         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 634         depends on BR2_ARM_CPU_HAS_NEON
 635         help
 636           This option allows to use both the ARMv8 floating point unit
 637           and the NEON SIMD unit for floating point operations.
 638
 639 endchoice
 640
 641 choice
 642         prompt "ARM instruction set"
 643         depends on BR2_arm || BR2_armeb
 644
 645 config BR2_ARM_INSTRUCTIONS_ARM
 646         bool "ARM"
 647         depends on BR2_ARM_CPU_HAS_ARM
 648         help
 649           This option instructs the compiler to generate regular ARM
 650           instructions, that are all 32 bits wide.
 651
 652 config BR2_ARM_INSTRUCTIONS_THUMB
 653         bool "Thumb"
 654         depends on BR2_ARM_CPU_HAS_THUMB
 655         # Thumb-1 and VFP are not compatible
 656         depends on BR2_ARM_SOFT_FLOAT
 657         help
 658           This option instructions the compiler to generate Thumb
 659           instructions, which allows to mix 16 bits instructions and
 660           32 bits instructions. This generally provides a much smaller
 661           compiled binary size.
 662
 663 comment "Thumb1 is not compatible with VFP"
 664         depends on BR2_ARM_CPU_HAS_THUMB
 665         depends on !BR2_ARM_SOFT_FLOAT
 666
 667 config BR2_ARM_INSTRUCTIONS_THUMB2
 668         bool "Thumb2"
 669         depends on BR2_ARM_CPU_HAS_THUMB2
 670         help
 671           This option instructions the compiler to generate Thumb2
 672           instructions, which allows to mix 16 bits instructions and
 673           32 bits instructions. This generally provides a much smaller
 674           compiled binary size.
 675
 676 endchoice
 677
 678 config BR2_ARCH
 679         default "arm"           if BR2_arm
 680         default "armeb"         if BR2_armeb
 681         default "aarch64"       if BR2_aarch64
 682         default "aarch64_be"    if BR2_aarch64_be
 683
 684 config BR2_ENDIAN
 685         default "LITTLE" if (BR2_arm || BR2_aarch64)
 686         default "BIG"    if (BR2_armeb || BR2_aarch64_be)
 687
 688 config BR2_GCC_TARGET_CPU
 689         # armv4
 690         default "arm920t"       if BR2_arm920t
 691         default "arm922t"       if BR2_arm922t
 692         default "fa526"         if BR2_fa526
 693         default "strongarm"     if BR2_strongarm
 694         # armv5
 695         default "arm926ej-s"    if BR2_arm926t
 696         default "iwmmxt"        if BR2_iwmmxt
 697         default "xscale"        if BR2_xscale
 698         # armv6
 699         default "arm1136j-s"    if BR2_arm1136j_s
 700         default "arm1136jf-s"   if BR2_arm1136jf_s
 701         default "arm1176jz-s"   if BR2_arm1176jz_s
 702         default "arm1176jzf-s"  if BR2_arm1176jzf_s
 703         default "mpcore"        if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
 704         default "mpcorenovfp"   if BR2_arm11mpcore
 705         # armv7a
 706         default "cortex-a5"     if BR2_cortex_a5
 707         default "cortex-a7"     if BR2_cortex_a7
 708         default "cortex-a8"     if BR2_cortex_a8
 709         default "cortex-a9"     if BR2_cortex_a9
 710         default "cortex-a12"    if BR2_cortex_a12
 711         default "cortex-a15"    if BR2_cortex_a15
 712         default "cortex-a15.cortex-a7"  if BR2_cortex_a15_a7
 713         default "cortex-a17"    if BR2_cortex_a17
 714         default "cortex-a17.cortex-a7"  if BR2_cortex_a17_a7
 715         default "marvell-pj4"   if BR2_pj4
 716         # armv7m
 717         default "cortex-m3"     if BR2_cortex_m3
 718         default "cortex-m4"     if BR2_cortex_m4
 719         # armv8a
 720         default "cortex-a32"    if BR2_cortex_a32
 721         default "cortex-a35"    if BR2_cortex_a35
 722         default "cortex-a53"    if BR2_cortex_a53
 723         default "cortex-a57"    if BR2_cortex_a57
 724         default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53
 725         default "cortex-a72"    if BR2_cortex_a72
 726         default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53
 727         default "cortex-a73"    if BR2_cortex_a73
 728         default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35
 729         default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53
 730         default "exynos-m1"     if BR2_exynos_m1
 731         default "falkor"        if BR2_falkor
 732         default "qdf24xx"       if BR2_qdf24xx
 733         default "thunderx"      if BR2_thunderx
 734         default "thunderxt81"   if BR2_thunderxt81
 735         default "thunderxt83"   if BR2_thunderxt83
 736         default "thunderxt88"   if BR2_thunderxt88
 737         default "thunderxt88p1" if BR2_thunderxt88p1
 738         default "xgene1"        if BR2_xgene1
 739         # armv8.1a
 740         default "thunderx2t99"  if BR2_thunderx2t99
 741         default "thunderx2t99p1"        if BR2_thunderx2t99p1
 742         default "vulcan"        if BR2_vulcan
 743
 744 config BR2_GCC_TARGET_ABI
 745         default "aapcs-linux"   if BR2_arm || BR2_armeb
 746         default "lp64"          if BR2_aarch64 || BR2_aarch64_be
 747
 748 config BR2_GCC_TARGET_FPU
 749         default "vfp"           if BR2_ARM_FPU_VFPV2
 750         default "vfpv3"         if BR2_ARM_FPU_VFPV3
 751         default "vfpv3-d16"     if BR2_ARM_FPU_VFPV3D16
 752         default "vfpv4"         if BR2_ARM_FPU_VFPV4
 753         default "vfpv4-d16"     if BR2_ARM_FPU_VFPV4D16
 754         default "neon"          if BR2_ARM_FPU_NEON
 755         default "neon-vfpv4"    if BR2_ARM_FPU_NEON_VFPV4
 756         default "fp-armv8"      if BR2_ARM_FPU_FP_ARMV8
 757         default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
 758         depends on BR2_arm || BR2_armeb
 759
 760 config BR2_GCC_TARGET_FLOAT_ABI
 761         default "soft"          if BR2_ARM_SOFT_FLOAT
 762         default "softfp"        if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
 763         default "hard"          if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
 764
 765 config BR2_GCC_TARGET_MODE
 766         default "arm"           if BR2_ARM_INSTRUCTIONS_ARM
 767         default "thumb"         if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
 768
 769 config BR2_READELF_ARCH_NAME
 770         default "ARM"           if BR2_arm || BR2_armeb
 771         default "AArch64"       if BR2_aarch64 || BR2_aarch64_be