2 config BR2_ARM_CPU_HAS_NEON
5 # for some cores, NEON support is optional
6 config BR2_ARM_CPU_MAYBE_HAS_NEON
9 # for some cores, VFPv2 is optional
10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
13 config BR2_ARM_CPU_HAS_VFPV2
16 # for some cores, VFPv3 is optional
17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
19 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
21 config BR2_ARM_CPU_HAS_VFPV3
23 select BR2_ARM_CPU_HAS_VFPV2
25 # for some cores, VFPv4 is optional
26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
28 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
30 config BR2_ARM_CPU_HAS_VFPV4
32 select BR2_ARM_CPU_HAS_VFPV3
34 config BR2_ARM_CPU_HAS_THUMB2
38 prompt "Target Architecture Variant"
39 depends on BR2_arm || BR2_armeb
42 Specific CPU variant to use
56 config BR2_arm1136jf_s_r0
57 bool "arm1136jf_s rev0"
58 select BR2_ARM_CPU_HAS_VFPV2
59 config BR2_arm1136jf_s_r1
60 bool "arm1136jf_s rev1"
61 select BR2_ARM_CPU_HAS_VFPV2
62 config BR2_arm1176jz_s
64 config BR2_arm1176jzf_s
66 select BR2_ARM_CPU_HAS_VFPV2
69 select BR2_ARM_CPU_MAYBE_HAS_NEON
70 select BR2_ARM_CPU_MAYBE_HAS_VFPV4
71 select BR2_ARM_CPU_HAS_THUMB2
74 select BR2_ARM_CPU_HAS_NEON
75 select BR2_ARM_CPU_HAS_VFPV4
76 select BR2_ARM_CPU_HAS_THUMB2
79 select BR2_ARM_CPU_HAS_NEON
80 select BR2_ARM_CPU_HAS_VFPV3
81 select BR2_ARM_CPU_HAS_THUMB2
84 select BR2_ARM_CPU_MAYBE_HAS_NEON
85 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
86 select BR2_ARM_CPU_HAS_THUMB2
89 select BR2_ARM_CPU_HAS_NEON
90 select BR2_ARM_CPU_HAS_VFPV4
91 select BR2_ARM_CPU_HAS_THUMB2
96 select BR2_ARM_CPU_HAS_VFPV3
98 bool "strongarm sa110/sa1100"
105 config BR2_arm1136jf_s
107 default BR2_arm1136jf_s_r0 || BR2_arm1136jf_s_r1
111 depends on BR2_arm || BR2_armeb
114 Application Binary Interface to use. The Application Binary
115 Interface describes the calling conventions (how arguments
116 are passed to functions, how the return value is passed, how
117 system calls are made, etc.).
122 The EABI is currently the standard ARM ABI, which is used in
123 most projects. It supports both the 'soft' floating point
124 model (in which floating point instructions are emulated in
125 software) and the 'softfp' floating point model (in which
126 floating point instructions are executed using an hardware
127 floating point unit, but floating point arguments to
128 functions are passed in integer registers).
130 The 'softfp' floating point model is link-compatible with
131 the 'soft' floating point model, i.e you can link a library
132 built 'soft' with some other code built 'softfp'.
134 However, passing the floating point arguments in integer
135 registers is a bit inefficient, so if your ARM processor has
136 a floating point unit, and you don't have pre-compiled
137 'soft' or 'softfp' code, using the EABIhf ABI will provide
138 better floating point performances.
140 If your processor does not have a floating point unit, then
141 you must use this ABI.
143 config BR2_ARM_EABIHF
145 depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
147 The EABIhf is an extension of EABI which supports the 'hard'
148 floating point model. This model uses the floating point
149 unit to execute floating point instructions, and passes
150 floating point arguments in floating point registers.
152 It is more efficient than EABI for floating point related
153 workload. However, it does not allow to link against code
154 that has been pre-built for the 'soft' or 'softfp' floating
157 If your processor has a floating point unit, and you don't
158 depend on existing pre-compiled code, this option is most
159 likely the best choice.
163 config BR2_ARM_ENABLE_NEON
164 bool "Enable NEON SIMD extension support"
165 depends on BR2_ARM_CPU_MAYBE_HAS_NEON
166 select BR2_ARM_CPU_HAS_NEON
168 For some CPU cores, the NEON SIMD extension is optional.
169 Select this option if you are certain your particular
170 implementation has NEON support and you want to use it.
173 prompt "Floating point strategy"
174 depends on BR2_ARM_EABI || BR2_ARM_EABIHF
175 default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
176 default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
177 default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
178 default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
180 config BR2_ARM_SOFT_FLOAT
182 depends on BR2_ARM_EABI
183 select BR2_SOFT_FLOAT
185 This option allows to use software emulated floating
186 point. It should be used for ARM cores that do not include a
187 Vector Floating Point unit, such as ARMv5 cores (ARM926 for
188 example) or certain ARMv6 cores.
190 config BR2_ARM_FPU_VFPV2
192 depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
194 This option allows to use the VFPv2 floating point unit, as
195 available in some ARMv6 processors (ARM1136JF-S,
196 ARM1176JZF-S and ARM11 MPCore).
198 Note that this option is also safe to use for newer cores
199 such as Cortex-A, because the VFPv3 and VFPv4 units are
200 backward compatible with VFPv2.
202 config BR2_ARM_FPU_VFPV3
204 depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
206 This option allows to use the VFPv3 floating point unit, as
207 available in some ARMv7 processors (Cortex-A{8, 9}). This
208 option requires a VFPv3 unit that has 32 double-precision
209 registers, which is not necessarily the case in all SOCs
210 based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
211 instead, which is guaranteed to work on all Cortex-A{8, 9}.
213 Note that this option is also safe to use for newer cores
214 that have a VFPv4 unit, because VFPv4 is backward compatible
215 with VFPv3. They must of course also have 32
216 double-precision registers.
218 config BR2_ARM_FPU_VFPV3D16
220 depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
222 This option allows to use the VFPv3 floating point unit, as
223 available in some ARMv7 processors (Cortex-A{8, 9}). This
224 option requires a VFPv3 unit that has 16 double-precision
225 registers, which is generally the case in all SOCs based on
226 Cortex-A{8, 9}, even though VFPv3 is technically optional on
227 Cortex-A9. This is the safest option for those cores.
229 Note that this option is also safe to use for newer cores
230 such that have a VFPv4 unit, because the VFPv4 is backward
231 compatible with VFPv3.
233 config BR2_ARM_FPU_VFPV4
235 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
237 This option allows to use the VFPv4 floating point unit, as
238 available in some ARMv7 processors (Cortex-A{5, 7, 12,
239 15}). This option requires a VFPv4 unit that has 32
240 double-precision registers, which is not necessarily the
241 case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
242 unsure, you should probably use VFPv4-D16 instead.
244 Note that if you want binary code that works on all ARMv7
245 cores, including the earlier Cortex-A{8, 9}, you should
246 instead select VFPv3.
248 config BR2_ARM_FPU_VFPV4D16
250 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
252 This option allows to use the VFPv4 floating point unit, as
253 available in some ARMv7 processors (Cortex-A{5, 7, 12,
254 15}). This option requires a VFPv4 unit that has 16
255 double-precision registers, which is always available on
256 Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
259 Note that if you want binary code that works on all ARMv7
260 cores, including the earlier Cortex-A{8, 9}, you should
261 instead select VFPv3-D16.
263 config BR2_ARM_FPU_NEON
265 depends on BR2_ARM_CPU_HAS_NEON
267 This option allows to use the NEON SIMD unit, as available
268 in some ARMv7 processors, as a floating-point unit. It
269 should however be noted that using NEON for floating point
270 operations doesn't provide a complete compatibility with the
273 config BR2_ARM_FPU_NEON_VFPV4
275 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
276 depends on BR2_ARM_CPU_HAS_NEON
278 This option allows to use both the VFPv4 and the NEON SIMD
279 units for floating point operations. Note that some ARMv7
280 cores do not necessarily have VFPv4 and/or NEON support, for
281 example on Cortex-A5 and Cortex-A7, support for VFPv4 and
287 prompt "ARM instruction set"
288 depends on BR2_ARM_CPU_HAS_THUMB2
290 config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
293 This option instructs the compiler to generate regular ARM
294 instructions, that are all 32 bits wide.
296 config BR2_ARM_INSTRUCTIONS_THUMB2
299 This option instructions the compiler to generate Thumb2
300 instructions, which allows to mix 16 bits instructions and
301 32 bits instructions. This generally provides a much smaller
302 compiled binary size.
306 config BR2_ARM_INSTRUCTIONS_ARM
308 depends on !BR2_ARM_INSTRUCTIONS_THUMB2
311 default "arm" if BR2_arm
312 default "armeb" if BR2_armeb
315 default "LITTLE" if BR2_arm
316 default "BIG" if BR2_armeb
318 config BR2_GCC_TARGET_TUNE
319 default "arm7tdmi" if BR2_arm7tdmi
320 default "arm7tdmi" if BR2_arm720t
321 default "arm7tdmi" if BR2_arm740t
322 default "arm920" if BR2_arm920
323 default "arm920t" if BR2_arm920t
324 default "arm922t" if BR2_arm922t
325 default "arm926ej-s" if BR2_arm926t
326 default "arm1136j-s" if BR2_arm1136j_s
327 default "arm1136jf-s" if BR2_arm1136jf_s
328 default "arm1176jz-s" if BR2_arm1176jz_s
329 default "arm1176jzf-s" if BR2_arm1176jzf_s
330 default "cortex-a5" if BR2_cortex_a5
331 default "cortex-a7" if BR2_cortex_a7
332 default "cortex-a8" if BR2_cortex_a8
333 default "cortex-a9" if BR2_cortex_a9
334 default "cortex-a15" if BR2_cortex_a15
335 default "fa526" if BR2_fa526
336 default "marvell-pj4" if BR2_pj4
337 default "strongarm" if BR2_strongarm
338 default "xscale" if BR2_xscale
339 default "iwmmxt" if BR2_iwmmxt
341 config BR2_GCC_TARGET_ARCH
342 default "armv4t" if BR2_arm7tdmi
343 default "armv4t" if BR2_arm720t
344 default "armv4t" if BR2_arm920t
345 default "armv4t" if BR2_arm922t
346 default "armv5te" if BR2_arm926t
347 default "armv5t" if BR2_arm10t
348 default "armv6j" if BR2_arm1136jf_s_r0
349 default "armv6k" if BR2_arm1136jf_s_r1
350 default "armv6zk" if BR2_arm1176jz_s
351 default "armv6zk" if BR2_arm1176jzf_s
352 default "armv7-a" if BR2_cortex_a5
353 default "armv7-a" if BR2_cortex_a7
354 default "armv7-a" if BR2_cortex_a8
355 default "armv7-a" if BR2_cortex_a9
356 default "armv7-a" if BR2_cortex_a15
357 default "armv4" if BR2_fa526
358 default "armv7-a" if BR2_pj4
359 default "armv4" if BR2_strongarm
360 default "armv5te" if BR2_xscale
361 default "iwmmxt" if BR2_iwmmxt
363 config BR2_GCC_TARGET_ABI
364 default "aapcs-linux"
366 config BR2_GCC_TARGET_FPU
367 default "vfp" if BR2_ARM_FPU_VFPV2
368 default "vfpv3" if BR2_ARM_FPU_VFPV3
369 default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
370 default "vfpv4" if BR2_ARM_FPU_VFPV4
371 default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
372 default "neon" if BR2_ARM_FPU_NEON
373 default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
375 config BR2_GCC_TARGET_FLOAT_ABI
376 default "soft" if BR2_ARM_SOFT_FLOAT
377 default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
378 default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
380 config BR2_GCC_TARGET_MODE
381 default "arm" if BR2_ARM_INSTRUCTIONS_ARM
382 default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB2