arch/Config.in.arm

   1 # arm cpu features
   2 config BR2_ARM_CPU_HAS_NEON
   3         bool
   4
   5 # for some cores, NEON support is optional
   6 config BR2_ARM_CPU_MAYBE_HAS_NEON
   7         bool
   8
   9 # for some cores, VFPv2 is optional
  10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  11         bool
  12
  13 config BR2_ARM_CPU_HAS_VFPV2
  14         bool
  15
  16 # for some cores, VFPv3 is optional
  17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  18         bool
  19         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  20
  21 config BR2_ARM_CPU_HAS_VFPV3
  22         bool
  23         select BR2_ARM_CPU_HAS_VFPV2
  24
  25 # for some cores, VFPv4 is optional
  26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  27         bool
  28         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  29
  30 config BR2_ARM_CPU_HAS_VFPV4
  31         bool
  32         select BR2_ARM_CPU_HAS_VFPV3
  33
  34 config BR2_ARM_CPU_HAS_FP_ARMV8
  35         bool
  36         select BR2_ARM_CPU_HAS_VFPV4
  37
  38 config BR2_ARM_CPU_HAS_ARM
  39         bool
  40
  41 config BR2_ARM_CPU_HAS_THUMB
  42         bool
  43
  44 config BR2_ARM_CPU_HAS_THUMB2
  45         bool
  46
  47 config BR2_ARM_CPU_ARMV4
  48         bool
  49
  50 config BR2_ARM_CPU_ARMV5
  51         bool
  52
  53 config BR2_ARM_CPU_ARMV6
  54         bool
  55
  56 config BR2_ARM_CPU_ARMV7A
  57         bool
  58
  59 config BR2_ARM_CPU_ARMV7M
  60         bool
  61
  62 config BR2_ARM_CPU_ARMV8A
  63         bool
  64
  65 choice
  66         prompt "Target Architecture Variant"
  67         default BR2_arm926t
  68         help
  69           Specific CPU variant to use
  70
  71 if !BR2_ARCH_IS_64
  72 comment "armv4 cores"
  73 config BR2_arm920t
  74         bool "arm920t"
  75         select BR2_ARM_CPU_HAS_ARM
  76         select BR2_ARM_CPU_HAS_THUMB
  77         select BR2_ARM_CPU_ARMV4
  78         select BR2_ARCH_HAS_MMU_OPTIONAL
  79 config BR2_arm922t
  80         bool "arm922t"
  81         select BR2_ARM_CPU_HAS_ARM
  82         select BR2_ARM_CPU_HAS_THUMB
  83         select BR2_ARM_CPU_ARMV4
  84         select BR2_ARCH_HAS_MMU_OPTIONAL
  85 config BR2_fa526
  86         bool "fa526/626"
  87         select BR2_ARM_CPU_HAS_ARM
  88         select BR2_ARM_CPU_ARMV4
  89         select BR2_ARCH_HAS_MMU_OPTIONAL
  90 config BR2_strongarm
  91         bool "strongarm sa110/sa1100"
  92         select BR2_ARM_CPU_HAS_ARM
  93         select BR2_ARM_CPU_ARMV4
  94         select BR2_ARCH_HAS_MMU_OPTIONAL
  95
  96 comment "armv5 cores"
  97 config BR2_arm926t
  98         bool "arm926t"
  99         select BR2_ARM_CPU_HAS_ARM
 100         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 101         select BR2_ARM_CPU_HAS_THUMB
 102         select BR2_ARM_CPU_ARMV5
 103         select BR2_ARCH_HAS_MMU_OPTIONAL
 104 config BR2_iwmmxt
 105         bool "iwmmxt"
 106         select BR2_ARM_CPU_HAS_ARM
 107         select BR2_ARM_CPU_ARMV5
 108         select BR2_ARCH_HAS_MMU_OPTIONAL
 109 config BR2_xscale
 110         bool "xscale"
 111         select BR2_ARM_CPU_HAS_ARM
 112         select BR2_ARM_CPU_HAS_THUMB
 113         select BR2_ARM_CPU_ARMV5
 114         select BR2_ARCH_HAS_MMU_OPTIONAL
 115
 116 comment "armv6 cores"
 117 config BR2_arm1136j_s
 118         bool "arm1136j-s"
 119         select BR2_ARM_CPU_HAS_ARM
 120         select BR2_ARM_CPU_HAS_THUMB
 121         select BR2_ARM_CPU_ARMV6
 122         select BR2_ARCH_HAS_MMU_OPTIONAL
 123 config BR2_arm1136jf_s
 124         bool "arm1136jf-s"
 125         select BR2_ARM_CPU_HAS_ARM
 126         select BR2_ARM_CPU_HAS_VFPV2
 127         select BR2_ARM_CPU_HAS_THUMB
 128         select BR2_ARM_CPU_ARMV6
 129         select BR2_ARCH_HAS_MMU_OPTIONAL
 130 config BR2_arm1176jz_s
 131         bool "arm1176jz-s"
 132         select BR2_ARM_CPU_HAS_ARM
 133         select BR2_ARM_CPU_HAS_THUMB
 134         select BR2_ARM_CPU_ARMV6
 135         select BR2_ARCH_HAS_MMU_OPTIONAL
 136 config BR2_arm1176jzf_s
 137         bool "arm1176jzf-s"
 138         select BR2_ARM_CPU_HAS_ARM
 139         select BR2_ARM_CPU_HAS_VFPV2
 140         select BR2_ARM_CPU_HAS_THUMB
 141         select BR2_ARM_CPU_ARMV6
 142         select BR2_ARCH_HAS_MMU_OPTIONAL
 143 config BR2_arm11mpcore
 144         bool "mpcore"
 145         select BR2_ARM_CPU_HAS_ARM
 146         select BR2_ARM_CPU_MAYBE_HAS_VFPV2
 147         select BR2_ARM_CPU_HAS_THUMB
 148         select BR2_ARM_CPU_ARMV6
 149         select BR2_ARCH_HAS_MMU_OPTIONAL
 150
 151 comment "armv7a cores"
 152 config BR2_cortex_a5
 153         bool "cortex-A5"
 154         select BR2_ARM_CPU_HAS_ARM
 155         select BR2_ARM_CPU_MAYBE_HAS_NEON
 156         select BR2_ARM_CPU_MAYBE_HAS_VFPV4
 157         select BR2_ARM_CPU_HAS_THUMB2
 158         select BR2_ARM_CPU_ARMV7A
 159         select BR2_ARCH_HAS_MMU_OPTIONAL
 160 config BR2_cortex_a7
 161         bool "cortex-A7"
 162         select BR2_ARM_CPU_HAS_ARM
 163         select BR2_ARM_CPU_HAS_NEON
 164         select BR2_ARM_CPU_HAS_VFPV4
 165         select BR2_ARM_CPU_HAS_THUMB2
 166         select BR2_ARM_CPU_ARMV7A
 167         select BR2_ARCH_HAS_MMU_OPTIONAL
 168 config BR2_cortex_a8
 169         bool "cortex-A8"
 170         select BR2_ARM_CPU_HAS_ARM
 171         select BR2_ARM_CPU_HAS_NEON
 172         select BR2_ARM_CPU_HAS_VFPV3
 173         select BR2_ARM_CPU_HAS_THUMB2
 174         select BR2_ARM_CPU_ARMV7A
 175         select BR2_ARCH_HAS_MMU_OPTIONAL
 176 config BR2_cortex_a9
 177         bool "cortex-A9"
 178         select BR2_ARM_CPU_HAS_ARM
 179         select BR2_ARM_CPU_MAYBE_HAS_NEON
 180         select BR2_ARM_CPU_MAYBE_HAS_VFPV3
 181         select BR2_ARM_CPU_HAS_THUMB2
 182         select BR2_ARM_CPU_ARMV7A
 183         select BR2_ARCH_HAS_MMU_OPTIONAL
 184 config BR2_cortex_a12
 185         bool "cortex-A12"
 186         select BR2_ARM_CPU_HAS_ARM
 187         select BR2_ARM_CPU_HAS_NEON
 188         select BR2_ARM_CPU_HAS_VFPV4
 189         select BR2_ARM_CPU_HAS_THUMB2
 190         select BR2_ARM_CPU_ARMV7A
 191         select BR2_ARCH_HAS_MMU_OPTIONAL
 192 config BR2_cortex_a15
 193         bool "cortex-A15"
 194         select BR2_ARM_CPU_HAS_ARM
 195         select BR2_ARM_CPU_HAS_NEON
 196         select BR2_ARM_CPU_HAS_VFPV4
 197         select BR2_ARM_CPU_HAS_THUMB2
 198         select BR2_ARM_CPU_ARMV7A
 199         select BR2_ARCH_HAS_MMU_OPTIONAL
 200 config BR2_cortex_a15_a7
 201         bool "cortex-A15/A7 big.LITTLE"
 202         select BR2_ARM_CPU_HAS_ARM
 203         select BR2_ARM_CPU_HAS_NEON
 204         select BR2_ARM_CPU_HAS_VFPV4
 205         select BR2_ARM_CPU_HAS_THUMB2
 206         select BR2_ARM_CPU_ARMV7A
 207         select BR2_ARCH_HAS_MMU_OPTIONAL
 208         select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 209 config BR2_cortex_a17
 210         bool "cortex-A17"
 211         select BR2_ARM_CPU_HAS_ARM
 212         select BR2_ARM_CPU_HAS_NEON
 213         select BR2_ARM_CPU_HAS_VFPV4
 214         select BR2_ARM_CPU_HAS_THUMB2
 215         select BR2_ARM_CPU_ARMV7A
 216         select BR2_ARCH_HAS_MMU_OPTIONAL
 217         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 218 config BR2_cortex_a17_a7
 219         bool "cortex-A17/A7 big.LITTLE"
 220         select BR2_ARM_CPU_HAS_ARM
 221         select BR2_ARM_CPU_HAS_NEON
 222         select BR2_ARM_CPU_HAS_VFPV4
 223         select BR2_ARM_CPU_HAS_THUMB2
 224         select BR2_ARM_CPU_ARMV7A
 225         select BR2_ARCH_HAS_MMU_OPTIONAL
 226         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 227 config BR2_pj4
 228         bool "pj4"
 229         select BR2_ARM_CPU_HAS_ARM
 230         select BR2_ARM_CPU_HAS_VFPV3
 231         select BR2_ARM_CPU_ARMV7A
 232         select BR2_ARCH_HAS_MMU_OPTIONAL
 233
 234 comment "armv7m cores"
 235 config BR2_cortex_m3
 236         bool "cortex-M3"
 237         select BR2_ARM_CPU_HAS_THUMB2
 238         select BR2_ARM_CPU_ARMV7M
 239 config BR2_cortex_m4
 240         bool "cortex-M4"
 241         select BR2_ARM_CPU_HAS_THUMB2
 242         select BR2_ARM_CPU_ARMV7M
 243 endif # !BR2_ARCH_IS_64
 244
 245 comment "armv8 cores"
 246 config BR2_cortex_a32
 247         bool "cortex-A32"
 248         depends on !BR2_ARCH_IS_64
 249         select BR2_ARM_CPU_HAS_ARM
 250         select BR2_ARM_CPU_HAS_NEON
 251         select BR2_ARM_CPU_HAS_THUMB2
 252         select BR2_ARM_CPU_HAS_FP_ARMV8
 253         select BR2_ARM_CPU_ARMV8A
 254         select BR2_ARCH_HAS_MMU_OPTIONAL
 255         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 256 config BR2_cortex_a35
 257         bool "cortex-A35"
 258         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 259         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 260         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 261         select BR2_ARM_CPU_HAS_FP_ARMV8
 262         select BR2_ARM_CPU_ARMV8A
 263         select BR2_ARCH_HAS_MMU_OPTIONAL
 264         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 265 config BR2_cortex_a53
 266         bool "cortex-A53"
 267         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 268         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 269         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 270         select BR2_ARM_CPU_HAS_FP_ARMV8
 271         select BR2_ARM_CPU_ARMV8A
 272         select BR2_ARCH_HAS_MMU_OPTIONAL
 273 config BR2_cortex_a57
 274         bool "cortex-A57"
 275         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 276         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 277         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 278         select BR2_ARM_CPU_HAS_FP_ARMV8
 279         select BR2_ARM_CPU_ARMV8A
 280         select BR2_ARCH_HAS_MMU_OPTIONAL
 281 config BR2_cortex_a57_a53
 282         bool "cortex-A57/A53 big.LITTLE"
 283         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 284         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 285         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 286         select BR2_ARM_CPU_HAS_FP_ARMV8
 287         select BR2_ARM_CPU_ARMV8A
 288         select BR2_ARCH_HAS_MMU_OPTIONAL
 289         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 290 config BR2_cortex_a72
 291         bool "cortex-A72"
 292         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 293         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 294         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 295         select BR2_ARM_CPU_HAS_FP_ARMV8
 296         select BR2_ARM_CPU_ARMV8A
 297         select BR2_ARCH_HAS_MMU_OPTIONAL
 298         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 299 config BR2_cortex_a72_a53
 300         bool "cortex-A72/A53 big.LITTLE"
 301         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 302         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 303         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 304         select BR2_ARM_CPU_HAS_FP_ARMV8
 305         select BR2_ARM_CPU_ARMV8A
 306         select BR2_ARCH_HAS_MMU_OPTIONAL
 307         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 308 config BR2_cortex_a73
 309         bool "cortex-A73"
 310         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 311         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 312         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 313         select BR2_ARM_CPU_HAS_FP_ARMV8
 314         select BR2_ARM_CPU_ARMV8A
 315         select BR2_ARCH_HAS_MMU_OPTIONAL
 316         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 317 config BR2_cortex_a73_a35
 318         bool "cortex-A73/A35 big.LITTLE"
 319         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 320         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 321         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 322         select BR2_ARM_CPU_HAS_FP_ARMV8
 323         select BR2_ARM_CPU_ARMV8A
 324         select BR2_ARCH_HAS_MMU_OPTIONAL
 325         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 326 config BR2_cortex_a73_a53
 327         bool "cortex-A73/A53 big.LITTLE"
 328         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 329         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 330         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 331         select BR2_ARM_CPU_HAS_FP_ARMV8
 332         select BR2_ARM_CPU_ARMV8A
 333         select BR2_ARCH_HAS_MMU_OPTIONAL
 334         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 335 config BR2_exynos_m1
 336         bool "exynos-m1"
 337         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 338         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 339         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 340         select BR2_ARM_CPU_HAS_FP_ARMV8
 341         select BR2_ARM_CPU_ARMV8A
 342         select BR2_ARCH_HAS_MMU_OPTIONAL
 343         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 344 config BR2_falkor
 345         bool "falkor"
 346         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 347         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 348         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 349         select BR2_ARM_CPU_HAS_FP_ARMV8
 350         select BR2_ARM_CPU_ARMV8A
 351         select BR2_ARCH_HAS_MMU_OPTIONAL
 352         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 353 config BR2_qdf24xx
 354         bool "qdf24xx"
 355         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 356         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 357         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 358         select BR2_ARM_CPU_HAS_FP_ARMV8
 359         select BR2_ARM_CPU_ARMV8A
 360         select BR2_ARCH_HAS_MMU_OPTIONAL
 361         select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 362 if BR2_ARCH_IS_64
 363 config BR2_thunderx
 364         bool "thunderx"
 365         select BR2_ARM_CPU_HAS_FP_ARMV8
 366         select BR2_ARM_CPU_ARMV8A
 367         select BR2_ARCH_HAS_MMU_OPTIONAL
 368         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 369 config BR2_thunderxt81
 370         bool "thunderxt81"
 371         select BR2_ARM_CPU_HAS_FP_ARMV8
 372         select BR2_ARM_CPU_ARMV8A
 373         select BR2_ARCH_HAS_MMU_OPTIONAL
 374         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 375 config BR2_thunderxt83
 376         bool "thunderxt83"
 377         select BR2_ARM_CPU_HAS_FP_ARMV8
 378         select BR2_ARM_CPU_ARMV8A
 379         select BR2_ARCH_HAS_MMU_OPTIONAL
 380         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 381 config BR2_thunderxt88
 382         bool "thunderxt88"
 383         select BR2_ARM_CPU_HAS_FP_ARMV8
 384         select BR2_ARM_CPU_ARMV8A
 385         select BR2_ARCH_HAS_MMU_OPTIONAL
 386         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 387 config BR2_thunderxt88p1
 388         bool "thunderxt88p1"
 389         select BR2_ARM_CPU_HAS_FP_ARMV8
 390         select BR2_ARM_CPU_ARMV8A
 391         select BR2_ARCH_HAS_MMU_OPTIONAL
 392         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 393 endif # BR2_ARCH_IS_64
 394 config BR2_xgene1
 395         bool "xgene1"
 396         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 397         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 398         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 399         select BR2_ARM_CPU_HAS_FP_ARMV8
 400         select BR2_ARM_CPU_ARMV8A
 401         select BR2_ARCH_HAS_MMU_OPTIONAL
 402         select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 403
 404 if BR2_ARCH_IS_64
 405 comment "armv8.1a cores"
 406 config BR2_thunderx2t99
 407         bool "thunderx2t99"
 408         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 409         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 410         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 411         select BR2_ARM_CPU_HAS_FP_ARMV8
 412         select BR2_ARM_CPU_ARMV8A
 413         select BR2_ARCH_HAS_MMU_OPTIONAL
 414         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 415 config BR2_thunderx2t99p1
 416         bool "thunderx2t99p1"
 417         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 418         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 419         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 420         select BR2_ARM_CPU_HAS_FP_ARMV8
 421         select BR2_ARM_CPU_ARMV8A
 422         select BR2_ARCH_HAS_MMU_OPTIONAL
 423         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 424 config BR2_vulcan
 425         bool "vulcan"
 426         select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
 427         select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 428         select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 429         select BR2_ARM_CPU_HAS_FP_ARMV8
 430         select BR2_ARM_CPU_ARMV8A
 431         select BR2_ARCH_HAS_MMU_OPTIONAL
 432         select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 433 endif # BR2_ARCH_IS_64
 434 endchoice
 435
 436 config BR2_ARM_ENABLE_NEON
 437         bool "Enable NEON SIMD extension support"
 438         depends on BR2_ARM_CPU_MAYBE_HAS_NEON
 439         select BR2_ARM_CPU_HAS_NEON
 440         help
 441           For some CPU cores, the NEON SIMD extension is optional.
 442           Select this option if you are certain your particular
 443           implementation has NEON support and you want to use it.
 444
 445 config BR2_ARM_ENABLE_VFP
 446         bool "Enable VFP extension support"
 447         depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2
 448         select BR2_ARM_CPU_HAS_VFPV4 if BR2_ARM_CPU_MAYBE_HAS_VFPV4
 449         select BR2_ARM_CPU_HAS_VFPV3 if BR2_ARM_CPU_MAYBE_HAS_VFPV3
 450         select BR2_ARM_CPU_HAS_VFPV2 if BR2_ARM_CPU_MAYBE_HAS_VFPV2
 451         help
 452           For some CPU cores, the VFP extension is optional. Select
 453           this option if you are certain your particular
 454           implementation has VFP support and you want to use it.
 455
 456 choice
 457         prompt "Target ABI"
 458         depends on BR2_arm || BR2_armeb
 459         default BR2_ARM_EABIHF if BR2_ARM_CPU_HAS_VFPV2
 460         default BR2_ARM_EABI
 461         help
 462           Application Binary Interface to use. The Application Binary
 463           Interface describes the calling conventions (how arguments
 464           are passed to functions, how the return value is passed, how
 465           system calls are made, etc.).
 466
 467 config BR2_ARM_EABI
 468         bool "EABI"
 469         help
 470           The EABI is currently the standard ARM ABI, which is used in
 471           most projects. It supports both the 'soft' floating point
 472           model (in which floating point instructions are emulated in
 473           software) and the 'softfp' floating point model (in which
 474           floating point instructions are executed using an hardware
 475           floating point unit, but floating point arguments to
 476           functions are passed in integer registers).
 477
 478           The 'softfp' floating point model is link-compatible with
 479           the 'soft' floating point model, i.e you can link a library
 480           built 'soft' with some other code built 'softfp'.
 481
 482           However, passing the floating point arguments in integer
 483           registers is a bit inefficient, so if your ARM processor has
 484           a floating point unit, and you don't have pre-compiled
 485           'soft' or 'softfp' code, using the EABIhf ABI will provide
 486           better floating point performances.
 487
 488           If your processor does not have a floating point unit, then
 489           you must use this ABI.
 490
 491 config BR2_ARM_EABIHF
 492         bool "EABIhf"
 493         depends on BR2_ARM_CPU_HAS_VFPV2
 494         help
 495           The EABIhf is an extension of EABI which supports the 'hard'
 496           floating point model. This model uses the floating point
 497           unit to execute floating point instructions, and passes
 498           floating point arguments in floating point registers.
 499
 500           It is more efficient than EABI for floating point related
 501           workload. However, it does not allow to link against code
 502           that has been pre-built for the 'soft' or 'softfp' floating
 503           point models.
 504
 505           If your processor has a floating point unit, and you don't
 506           depend on existing pre-compiled code, this option is most
 507           likely the best choice.
 508
 509 endchoice
 510
 511 choice
 512         prompt "Floating point strategy"
 513         default BR2_ARM_FPU_FP_ARMV8 if BR2_ARM_CPU_HAS_FP_ARMV8
 514         default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
 515         default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
 516         default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
 517         default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
 518
 519 config BR2_ARM_SOFT_FLOAT
 520         bool "Soft float"
 521         depends on BR2_ARM_EABI
 522         select BR2_SOFT_FLOAT
 523         help
 524           This option allows to use software emulated floating
 525           point. It should be used for ARM cores that do not include a
 526           Vector Floating Point unit, such as ARMv5 cores (ARM926 for
 527           example) or certain ARMv6 cores.
 528
 529 config BR2_ARM_FPU_VFPV2
 530         bool "VFPv2"
 531         depends on BR2_ARM_CPU_HAS_VFPV2
 532         help
 533           This option allows to use the VFPv2 floating point unit, as
 534           available in some ARMv5 processors (ARM926EJ-S) and some
 535           ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
 536           MPCore).
 537
 538           Note that this option is also safe to use for newer cores
 539           such as Cortex-A, because the VFPv3 and VFPv4 units are
 540           backward compatible with VFPv2.
 541
 542 config BR2_ARM_FPU_VFPV3
 543         bool "VFPv3"
 544         depends on BR2_ARM_CPU_HAS_VFPV3
 545         help
 546           This option allows to use the VFPv3 floating point unit, as
 547           available in some ARMv7 processors (Cortex-A{8, 9}). This
 548           option requires a VFPv3 unit that has 32 double-precision
 549           registers, which is not necessarily the case in all SOCs
 550           based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
 551           instead, which is guaranteed to work on all Cortex-A{8, 9}.
 552
 553           Note that this option is also safe to use for newer cores
 554           that have a VFPv4 unit, because VFPv4 is backward compatible
 555           with VFPv3. They must of course also have 32
 556           double-precision registers.
 557
 558 config BR2_ARM_FPU_VFPV3D16
 559         bool "VFPv3-D16"
 560         depends on BR2_ARM_CPU_HAS_VFPV3
 561         help
 562           This option allows to use the VFPv3 floating point unit, as
 563           available in some ARMv7 processors (Cortex-A{8, 9}). This
 564           option requires a VFPv3 unit that has 16 double-precision
 565           registers, which is generally the case in all SOCs based on
 566           Cortex-A{8, 9}, even though VFPv3 is technically optional on
 567           Cortex-A9. This is the safest option for those cores.
 568
 569           Note that this option is also safe to use for newer cores
 570           such that have a VFPv4 unit, because the VFPv4 is backward
 571           compatible with VFPv3.
 572
 573 config BR2_ARM_FPU_VFPV4
 574         bool "VFPv4"
 575         depends on BR2_ARM_CPU_HAS_VFPV4
 576         help
 577           This option allows to use the VFPv4 floating point unit, as
 578           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 579           15}). This option requires a VFPv4 unit that has 32
 580           double-precision registers, which is not necessarily the
 581           case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
 582           unsure, you should probably use VFPv4-D16 instead.
 583
 584           Note that if you want binary code that works on all ARMv7
 585           cores, including the earlier Cortex-A{8, 9}, you should
 586           instead select VFPv3.
 587
 588 config BR2_ARM_FPU_VFPV4D16
 589         bool "VFPv4-D16"
 590         depends on BR2_ARM_CPU_HAS_VFPV4
 591         help
 592           This option allows to use the VFPv4 floating point unit, as
 593           available in some ARMv7 processors (Cortex-A{5, 7, 12,
 594           15}). This option requires a VFPv4 unit that has 16
 595           double-precision registers, which is always available on
 596           Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
 597           Cortex-A7.
 598
 599           Note that if you want binary code that works on all ARMv7
 600           cores, including the earlier Cortex-A{8, 9}, you should
 601           instead select VFPv3-D16.
 602
 603 config BR2_ARM_FPU_NEON
 604         bool "NEON"
 605         depends on BR2_ARM_CPU_HAS_NEON
 606         help
 607           This option allows to use the NEON SIMD unit, as available
 608           in some ARMv7 processors, as a floating-point unit. It
 609           should however be noted that using NEON for floating point
 610           operations doesn't provide a complete compatibility with the
 611           IEEE 754.
 612
 613 config BR2_ARM_FPU_NEON_VFPV4
 614         bool "NEON/VFPv4"
 615         depends on BR2_ARM_CPU_HAS_VFPV4
 616         depends on BR2_ARM_CPU_HAS_NEON
 617         help
 618           This option allows to use both the VFPv4 and the NEON SIMD
 619           units for floating point operations. Note that some ARMv7
 620           cores do not necessarily have VFPv4 and/or NEON support, for
 621           example on Cortex-A5 and Cortex-A7, support for VFPv4 and
 622           NEON is optional.
 623
 624 config BR2_ARM_FPU_FP_ARMV8
 625         bool "FP-ARMv8"
 626         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 627         help
 628           This option allows to use the ARMv8 floating point unit.
 629
 630 config BR2_ARM_FPU_NEON_FP_ARMV8
 631         bool "NEON/FP-ARMv8"
 632         depends on BR2_ARM_CPU_HAS_FP_ARMV8
 633         depends on BR2_ARM_CPU_HAS_NEON
 634         help
 635           This option allows to use both the ARMv8 floating point unit
 636           and the NEON SIMD unit for floating point operations.
 637
 638 endchoice
 639
 640 choice
 641         prompt "ARM instruction set"
 642         depends on BR2_arm || BR2_armeb
 643
 644 config BR2_ARM_INSTRUCTIONS_ARM
 645         bool "ARM"
 646         depends on BR2_ARM_CPU_HAS_ARM
 647         help
 648           This option instructs the compiler to generate regular ARM
 649           instructions, that are all 32 bits wide.
 650
 651 config BR2_ARM_INSTRUCTIONS_THUMB
 652         bool "Thumb"
 653         depends on BR2_ARM_CPU_HAS_THUMB
 654         # Thumb-1 and VFP are not compatible
 655         depends on BR2_ARM_SOFT_FLOAT
 656         help
 657           This option instructions the compiler to generate Thumb
 658           instructions, which allows to mix 16 bits instructions and
 659           32 bits instructions. This generally provides a much smaller
 660           compiled binary size.
 661
 662 comment "Thumb1 is not compatible with VFP"
 663         depends on BR2_ARM_CPU_HAS_THUMB
 664         depends on !BR2_ARM_SOFT_FLOAT
 665
 666 config BR2_ARM_INSTRUCTIONS_THUMB2
 667         bool "Thumb2"
 668         depends on BR2_ARM_CPU_HAS_THUMB2
 669         help
 670           This option instructions the compiler to generate Thumb2
 671           instructions, which allows to mix 16 bits instructions and
 672           32 bits instructions. This generally provides a much smaller
 673           compiled binary size.
 674
 675 endchoice
 676
 677 config BR2_ARCH
 678         default "arm"           if BR2_arm
 679         default "armeb"         if BR2_armeb
 680         default "aarch64"       if BR2_aarch64
 681         default "aarch64_be"    if BR2_aarch64_be
 682
 683 config BR2_ENDIAN
 684         default "LITTLE" if (BR2_arm || BR2_aarch64)
 685         default "BIG"    if (BR2_armeb || BR2_aarch64_be)
 686
 687 config BR2_GCC_TARGET_CPU
 688         # armv4
 689         default "arm920t"       if BR2_arm920t
 690         default "arm922t"       if BR2_arm922t
 691         default "fa526"         if BR2_fa526
 692         default "strongarm"     if BR2_strongarm
 693         # armv5
 694         default "arm926ej-s"    if BR2_arm926t
 695         default "iwmmxt"        if BR2_iwmmxt
 696         default "xscale"        if BR2_xscale
 697         # armv6
 698         default "arm1136j-s"    if BR2_arm1136j_s
 699         default "arm1136jf-s"   if BR2_arm1136jf_s
 700         default "arm1176jz-s"   if BR2_arm1176jz_s
 701         default "arm1176jzf-s"  if BR2_arm1176jzf_s
 702         default "mpcore"        if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
 703         default "mpcorenovfp"   if BR2_arm11mpcore
 704         # armv7a
 705         default "cortex-a5"     if BR2_cortex_a5
 706         default "cortex-a7"     if BR2_cortex_a7
 707         default "cortex-a8"     if BR2_cortex_a8
 708         default "cortex-a9"     if BR2_cortex_a9
 709         default "cortex-a12"    if BR2_cortex_a12
 710         default "cortex-a15"    if BR2_cortex_a15
 711         default "cortex-a15.cortex-a7"  if BR2_cortex_a15_a7
 712         default "cortex-a17"    if BR2_cortex_a17
 713         default "cortex-a17.cortex-a7"  if BR2_cortex_a17_a7
 714         default "marvell-pj4"   if BR2_pj4
 715         # armv7m
 716         default "cortex-m3"     if BR2_cortex_m3
 717         default "cortex-m4"     if BR2_cortex_m4
 718         # armv8a
 719         default "cortex-a32"    if BR2_cortex_a32
 720         default "cortex-a35"    if BR2_cortex_a35
 721         default "cortex-a53"    if BR2_cortex_a53
 722         default "cortex-a57"    if BR2_cortex_a57
 723         default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53
 724         default "cortex-a72"    if BR2_cortex_a72
 725         default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53
 726         default "cortex-a73"    if BR2_cortex_a73
 727         default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35
 728         default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53
 729         default "exynos-m1"     if BR2_exynos_m1
 730         default "falkor"        if BR2_falkor
 731         default "qdf24xx"       if BR2_qdf24xx
 732         default "thunderx"      if BR2_thunderx
 733         default "thunderxt81"   if BR2_thunderxt81
 734         default "thunderxt83"   if BR2_thunderxt83
 735         default "thunderxt88"   if BR2_thunderxt88
 736         default "thunderxt88p1" if BR2_thunderxt88p1
 737         default "xgene1"        if BR2_xgene1
 738         # armv8.1a
 739         default "thunderx2t99"  if BR2_thunderx2t99
 740         default "thunderx2t99p1"        if BR2_thunderx2t99p1
 741         default "vulcan"        if BR2_vulcan
 742
 743 config BR2_GCC_TARGET_ABI
 744         default "aapcs-linux"   if BR2_arm || BR2_armeb
 745         default "lp64"          if BR2_aarch64 || BR2_aarch64_be
 746
 747 config BR2_GCC_TARGET_FPU
 748         depends on BR2_arm || BR2_armeb
 749         default "vfp"           if BR2_ARM_FPU_VFPV2
 750         default "vfpv3"         if BR2_ARM_FPU_VFPV3
 751         default "vfpv3-d16"     if BR2_ARM_FPU_VFPV3D16
 752         default "vfpv4"         if BR2_ARM_FPU_VFPV4
 753         default "vfpv4-d16"     if BR2_ARM_FPU_VFPV4D16
 754         default "neon"          if BR2_ARM_FPU_NEON
 755         default "neon-vfpv4"    if BR2_ARM_FPU_NEON_VFPV4
 756         default "fp-armv8"      if BR2_ARM_FPU_FP_ARMV8
 757         default "neon-fp-armv8" if BR2_ARM_FPU_NEON_FP_ARMV8
 758
 759 config BR2_GCC_TARGET_FLOAT_ABI
 760         default "soft"          if BR2_ARM_SOFT_FLOAT
 761         default "softfp"        if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
 762         default "hard"          if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
 763
 764 config BR2_GCC_TARGET_MODE
 765         default "arm"           if BR2_ARM_INSTRUCTIONS_ARM
 766         default "thumb"         if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2
 767
 768 config BR2_READELF_ARCH_NAME
 769         default "ARM"           if BR2_arm || BR2_armeb
 770         default "AArch64"       if BR2_aarch64 || BR2_aarch64_be