2 config BR2_ARM_CPU_HAS_NEON
5 # for some cores, NEON support is optional
6 config BR2_ARM_CPU_MAYBE_HAS_NEON
9 # for some cores, VFPv2 is optional
10 config BR2_ARM_CPU_MAYBE_HAS_VFPV2
13 config BR2_ARM_CPU_HAS_VFPV2
16 # for some cores, VFPv3 is optional
17 config BR2_ARM_CPU_MAYBE_HAS_VFPV3
19 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
21 config BR2_ARM_CPU_HAS_VFPV3
23 select BR2_ARM_CPU_HAS_VFPV2
25 # for some cores, VFPv4 is optional
26 config BR2_ARM_CPU_MAYBE_HAS_VFPV4
28 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
30 config BR2_ARM_CPU_HAS_VFPV4
32 select BR2_ARM_CPU_HAS_VFPV3
34 config BR2_ARM_CPU_HAS_ARM
37 config BR2_ARM_CPU_HAS_THUMB
40 config BR2_ARM_CPU_HAS_THUMB2
43 config BR2_ARM_CPU_ARMV4
46 config BR2_ARM_CPU_ARMV5
49 config BR2_ARM_CPU_ARMV6
52 config BR2_ARM_CPU_ARMV7A
56 prompt "Target Architecture Variant"
57 depends on BR2_arm || BR2_armeb
60 Specific CPU variant to use
64 select BR2_ARM_CPU_HAS_ARM
65 select BR2_ARM_CPU_HAS_THUMB
66 select BR2_ARM_CPU_ARMV4
67 select BR2_ARCH_HAS_MMU_OPTIONAL
70 select BR2_ARM_CPU_HAS_ARM
71 select BR2_ARM_CPU_HAS_THUMB
72 select BR2_ARM_CPU_ARMV4
73 select BR2_ARCH_HAS_MMU_OPTIONAL
76 select BR2_ARM_CPU_HAS_ARM
77 select BR2_ARM_CPU_MAYBE_HAS_VFPV2
78 select BR2_ARM_CPU_HAS_THUMB
79 select BR2_ARM_CPU_ARMV5
80 select BR2_ARCH_HAS_MMU_OPTIONAL
81 config BR2_arm1136jf_s
83 select BR2_ARM_CPU_HAS_ARM
84 select BR2_ARM_CPU_HAS_VFPV2
85 select BR2_ARM_CPU_HAS_THUMB
86 select BR2_ARM_CPU_ARMV6
87 select BR2_ARCH_HAS_MMU_OPTIONAL
88 config BR2_arm1176jz_s
90 select BR2_ARM_CPU_HAS_ARM
91 select BR2_ARM_CPU_HAS_THUMB
92 select BR2_ARM_CPU_ARMV6
93 select BR2_ARCH_HAS_MMU_OPTIONAL
94 config BR2_arm1176jzf_s
96 select BR2_ARM_CPU_HAS_ARM
97 select BR2_ARM_CPU_HAS_VFPV2
98 select BR2_ARM_CPU_HAS_THUMB
99 select BR2_ARM_CPU_ARMV6
100 select BR2_ARCH_HAS_MMU_OPTIONAL
103 select BR2_ARM_CPU_HAS_ARM
104 select BR2_ARM_CPU_MAYBE_HAS_NEON
105 select BR2_ARM_CPU_MAYBE_HAS_VFPV4
106 select BR2_ARM_CPU_HAS_THUMB2
107 select BR2_ARM_CPU_ARMV7A
108 select BR2_ARCH_HAS_MMU_OPTIONAL
111 select BR2_ARM_CPU_HAS_ARM
112 select BR2_ARM_CPU_HAS_NEON
113 select BR2_ARM_CPU_HAS_VFPV4
114 select BR2_ARM_CPU_HAS_THUMB2
115 select BR2_ARM_CPU_ARMV7A
116 select BR2_ARCH_HAS_MMU_OPTIONAL
119 select BR2_ARM_CPU_HAS_ARM
120 select BR2_ARM_CPU_HAS_NEON
121 select BR2_ARM_CPU_HAS_VFPV3
122 select BR2_ARM_CPU_HAS_THUMB2
123 select BR2_ARM_CPU_ARMV7A
124 select BR2_ARCH_HAS_MMU_OPTIONAL
127 select BR2_ARM_CPU_HAS_ARM
128 select BR2_ARM_CPU_MAYBE_HAS_NEON
129 select BR2_ARM_CPU_MAYBE_HAS_VFPV3
130 select BR2_ARM_CPU_HAS_THUMB2
131 select BR2_ARM_CPU_ARMV7A
132 select BR2_ARCH_HAS_MMU_OPTIONAL
133 config BR2_cortex_a12
135 select BR2_ARM_CPU_HAS_ARM
136 select BR2_ARM_CPU_HAS_NEON
137 select BR2_ARM_CPU_HAS_VFPV4
138 select BR2_ARM_CPU_HAS_THUMB2
139 select BR2_ARM_CPU_ARMV7A
140 select BR2_ARCH_HAS_MMU_OPTIONAL
141 config BR2_cortex_a15
143 select BR2_ARM_CPU_HAS_ARM
144 select BR2_ARM_CPU_HAS_NEON
145 select BR2_ARM_CPU_HAS_VFPV4
146 select BR2_ARM_CPU_HAS_THUMB2
147 select BR2_ARM_CPU_ARMV7A
148 select BR2_ARCH_HAS_MMU_OPTIONAL
151 select BR2_ARM_CPU_HAS_ARM
152 select BR2_ARM_CPU_ARMV4
153 select BR2_ARCH_HAS_MMU_OPTIONAL
156 select BR2_ARM_CPU_HAS_ARM
157 select BR2_ARM_CPU_HAS_VFPV3
158 select BR2_ARM_CPU_ARMV7A
159 select BR2_ARCH_HAS_MMU_OPTIONAL
161 bool "strongarm sa110/sa1100"
162 select BR2_ARM_CPU_HAS_ARM
163 select BR2_ARM_CPU_ARMV4
164 select BR2_ARCH_HAS_MMU_OPTIONAL
167 select BR2_ARM_CPU_HAS_ARM
168 select BR2_ARM_CPU_HAS_THUMB
169 select BR2_ARM_CPU_ARMV5
170 select BR2_ARCH_HAS_MMU_OPTIONAL
173 select BR2_ARM_CPU_HAS_ARM
174 select BR2_ARM_CPU_ARMV5
175 select BR2_ARCH_HAS_MMU_OPTIONAL
180 depends on BR2_arm || BR2_armeb
183 Application Binary Interface to use. The Application Binary
184 Interface describes the calling conventions (how arguments
185 are passed to functions, how the return value is passed, how
186 system calls are made, etc.).
191 The EABI is currently the standard ARM ABI, which is used in
192 most projects. It supports both the 'soft' floating point
193 model (in which floating point instructions are emulated in
194 software) and the 'softfp' floating point model (in which
195 floating point instructions are executed using an hardware
196 floating point unit, but floating point arguments to
197 functions are passed in integer registers).
199 The 'softfp' floating point model is link-compatible with
200 the 'soft' floating point model, i.e you can link a library
201 built 'soft' with some other code built 'softfp'.
203 However, passing the floating point arguments in integer
204 registers is a bit inefficient, so if your ARM processor has
205 a floating point unit, and you don't have pre-compiled
206 'soft' or 'softfp' code, using the EABIhf ABI will provide
207 better floating point performances.
209 If your processor does not have a floating point unit, then
210 you must use this ABI.
212 config BR2_ARM_EABIHF
214 depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
216 The EABIhf is an extension of EABI which supports the 'hard'
217 floating point model. This model uses the floating point
218 unit to execute floating point instructions, and passes
219 floating point arguments in floating point registers.
221 It is more efficient than EABI for floating point related
222 workload. However, it does not allow to link against code
223 that has been pre-built for the 'soft' or 'softfp' floating
226 If your processor has a floating point unit, and you don't
227 depend on existing pre-compiled code, this option is most
228 likely the best choice.
232 config BR2_ARM_ENABLE_NEON
233 bool "Enable NEON SIMD extension support"
234 depends on BR2_ARM_CPU_MAYBE_HAS_NEON
235 select BR2_ARM_CPU_HAS_NEON
237 For some CPU cores, the NEON SIMD extension is optional.
238 Select this option if you are certain your particular
239 implementation has NEON support and you want to use it.
242 prompt "Floating point strategy"
243 depends on BR2_ARM_EABI || BR2_ARM_EABIHF
244 default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
245 default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
246 default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
247 default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
249 config BR2_ARM_SOFT_FLOAT
251 depends on BR2_ARM_EABI
252 select BR2_SOFT_FLOAT
254 This option allows to use software emulated floating
255 point. It should be used for ARM cores that do not include a
256 Vector Floating Point unit, such as ARMv5 cores (ARM926 for
257 example) or certain ARMv6 cores.
259 config BR2_ARM_FPU_VFPV2
261 depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
263 This option allows to use the VFPv2 floating point unit, as
264 available in some ARMv5 processors (ARM926EJ-S) and some
265 ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
268 Note that this option is also safe to use for newer cores
269 such as Cortex-A, because the VFPv3 and VFPv4 units are
270 backward compatible with VFPv2.
272 config BR2_ARM_FPU_VFPV3
274 depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
276 This option allows to use the VFPv3 floating point unit, as
277 available in some ARMv7 processors (Cortex-A{8, 9}). This
278 option requires a VFPv3 unit that has 32 double-precision
279 registers, which is not necessarily the case in all SOCs
280 based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
281 instead, which is guaranteed to work on all Cortex-A{8, 9}.
283 Note that this option is also safe to use for newer cores
284 that have a VFPv4 unit, because VFPv4 is backward compatible
285 with VFPv3. They must of course also have 32
286 double-precision registers.
288 config BR2_ARM_FPU_VFPV3D16
290 depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
292 This option allows to use the VFPv3 floating point unit, as
293 available in some ARMv7 processors (Cortex-A{8, 9}). This
294 option requires a VFPv3 unit that has 16 double-precision
295 registers, which is generally the case in all SOCs based on
296 Cortex-A{8, 9}, even though VFPv3 is technically optional on
297 Cortex-A9. This is the safest option for those cores.
299 Note that this option is also safe to use for newer cores
300 such that have a VFPv4 unit, because the VFPv4 is backward
301 compatible with VFPv3.
303 config BR2_ARM_FPU_VFPV4
305 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
307 This option allows to use the VFPv4 floating point unit, as
308 available in some ARMv7 processors (Cortex-A{5, 7, 12,
309 15}). This option requires a VFPv4 unit that has 32
310 double-precision registers, which is not necessarily the
311 case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
312 unsure, you should probably use VFPv4-D16 instead.
314 Note that if you want binary code that works on all ARMv7
315 cores, including the earlier Cortex-A{8, 9}, you should
316 instead select VFPv3.
318 config BR2_ARM_FPU_VFPV4D16
320 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
322 This option allows to use the VFPv4 floating point unit, as
323 available in some ARMv7 processors (Cortex-A{5, 7, 12,
324 15}). This option requires a VFPv4 unit that has 16
325 double-precision registers, which is always available on
326 Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
329 Note that if you want binary code that works on all ARMv7
330 cores, including the earlier Cortex-A{8, 9}, you should
331 instead select VFPv3-D16.
333 config BR2_ARM_FPU_NEON
335 depends on BR2_ARM_CPU_HAS_NEON
337 This option allows to use the NEON SIMD unit, as available
338 in some ARMv7 processors, as a floating-point unit. It
339 should however be noted that using NEON for floating point
340 operations doesn't provide a complete compatibility with the
343 config BR2_ARM_FPU_NEON_VFPV4
345 depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
346 depends on BR2_ARM_CPU_HAS_NEON
348 This option allows to use both the VFPv4 and the NEON SIMD
349 units for floating point operations. Note that some ARMv7
350 cores do not necessarily have VFPv4 and/or NEON support, for
351 example on Cortex-A5 and Cortex-A7, support for VFPv4 and
357 prompt "ARM instruction set"
359 config BR2_ARM_INSTRUCTIONS_ARM
361 depends on BR2_ARM_CPU_HAS_ARM
363 This option instructs the compiler to generate regular ARM
364 instructions, that are all 32 bits wide.
366 config BR2_ARM_INSTRUCTIONS_THUMB
368 depends on BR2_ARM_CPU_HAS_THUMB
370 This option instructions the compiler to generate Thumb
371 instructions, which allows to mix 16 bits instructions and
372 32 bits instructions. This generally provides a much smaller
373 compiled binary size.
375 config BR2_ARM_INSTRUCTIONS_THUMB2
377 depends on BR2_ARM_CPU_HAS_THUMB2
379 This option instructions the compiler to generate Thumb2
380 instructions, which allows to mix 16 bits instructions and
381 32 bits instructions. This generally provides a much smaller
382 compiled binary size.
387 default "arm" if BR2_arm
388 default "armeb" if BR2_armeb
391 default "LITTLE" if BR2_arm
392 default "BIG" if BR2_armeb
394 config BR2_ARCH_HAS_ATOMICS
397 config BR2_GCC_TARGET_CPU
398 default "arm920t" if BR2_arm920t
399 default "arm922t" if BR2_arm922t
400 default "arm926ej-s" if BR2_arm926t
401 default "arm1136j-s" if BR2_arm1136j_s
402 default "arm1136jf-s" if BR2_arm1136jf_s
403 default "arm1176jz-s" if BR2_arm1176jz_s
404 default "arm1176jzf-s" if BR2_arm1176jzf_s
405 default "cortex-a5" if BR2_cortex_a5
406 default "cortex-a7" if BR2_cortex_a7
407 default "cortex-a8" if BR2_cortex_a8
408 default "cortex-a9" if BR2_cortex_a9
409 default "cortex-a12" if BR2_cortex_a12
410 default "cortex-a15" if BR2_cortex_a15
411 default "fa526" if BR2_fa526
412 default "marvell-pj4" if BR2_pj4
413 default "strongarm" if BR2_strongarm
414 default "xscale" if BR2_xscale
415 default "iwmmxt" if BR2_iwmmxt
417 config BR2_GCC_TARGET_ABI
418 default "aapcs-linux"
420 config BR2_GCC_TARGET_FPU
421 default "vfp" if BR2_ARM_FPU_VFPV2
422 default "vfpv3" if BR2_ARM_FPU_VFPV3
423 default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
424 default "vfpv4" if BR2_ARM_FPU_VFPV4
425 default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
426 default "neon" if BR2_ARM_FPU_NEON
427 default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
429 config BR2_GCC_TARGET_FLOAT_ABI
430 default "soft" if BR2_ARM_SOFT_FLOAT
431 default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
432 default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
434 config BR2_GCC_TARGET_MODE
435 default "arm" if BR2_ARM_INSTRUCTIONS_ARM
436 default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2